Hi,
On Wed, 14 Apr 2021 at 02:20, Jason Merrill via Gcc-patches
wrote:
>
> PR49951 complained about the debugger jumping back to the declaration of a
> local variable when we run its destructor. That was fixed in 4.7, but broke
> again in 4.8. PR58123 fixed an inconsistency in the behavior, but
On Thu, 15 Apr 2021 at 17:19, Richard Sandiford via Gcc-patches
wrote:
>
> A lot of the SVE assembly tests are for generic-tuned SVE codegen
> and so can fail when run on a toolchain configured with --with-cpu.
>
> This could easily be solved by forcing -mtune=generic, like we already
> do for -mo
Hi,
On Fri, 9 Apr 2021 at 18:44, Hafiz Abid Qadeer wrote:
>
> Thanks for the review. Please see my comments below.
>
> On 09/04/2021 13:48, Tobias Burnus wrote:
> > Hi Abid,
> >
> > I think that's the same issue as https://gcc.gnu.org/PR98088
> > if so, please add 'PR middle-end/98088' to the c
Some of the CMSE tests have 'dg-do run', but qemu-arm does not support
the privileged instructions involved; one has to use qemu-system-arm
for this, which in turn requires modifications to the default
newlib/libgloss startup code to enable the FPU as the FP status
registers need to be saved when u
On Fri, 16 Apr 2021 at 13:29, Richard Sandiford via Gcc-patches
wrote:
>
> Jakub Jelinek writes:
> > On Thu, Apr 15, 2021 at 08:51:03PM +0200, Jakub Jelinek via Gcc-patches
> > wrote:
> >> Fixed, thanks for catching that (and the "r" -> "=r"; I've
> >> actually tested a patch that didn't have an
On Mon, 19 Apr 2021 at 12:40, Tobias Burnus wrote:
>
> On 19.04.21 11:25, Tobias Burnus wrote:
> > On 19.04.21 10:48, Christophe Lyon wrote:
> >> The new test generates an ICE on aarch64-linux-gnu in the gcc-10 branch:
> > Looks as someone (like me) should backport https://gcc.gnu.org/97880 /
> >
The acle/saturation.c test uses __[su]sat() and
__saturation_occurred() intrinsics but __[su]sat() are defined in
acle.h if __ARM_FEATURE_SAT true, while __saturation_occurred()
depends on __ARM_FEATURE_QBIT.
QBIT is a v5te feature, while SAT is available since v6, so the test
really needs __ARM_F
arm.h has had this error message since 1997, and was never updated to
take softfp into account. Anyway, it seems it was useful long ago, but
it is no longer needed since option parsing has been improved:
-mfloat-abi is handled via arm.opt and updates the var_float_abi
variable. So, the last instanc
On Wed, 21 Apr 2021 at 14:05, Richard Sandiford via Gcc-patches
wrote:
>
> Alex Coplan writes:
> > Hi Richard,
> >
> > On 15/04/2021 18:45, Richard Sandiford wrote:
> >> Looks good in general, but like you say, it's GCC 12 material.
> >
> > Thanks for the review. The attached patch addresses thes
The test requires an FPU, so use -march=armv7-a+fp -mfpu=auto instead
of -march=armv7-a.
We also remove dg-require-effective-target arm_fp_ok, but keep
dg-add-options arm_fp: this enables the test to pass on arm-eabi
configured with default cpu/fpu/mode.
dg-require-effective-target arm_fp_ok fail
Hi Jonathan,
On Fri, 11 Jun 2021 at 20:25, Jonathan Wakely via Gcc-patches
wrote:
>
> In C++23 there is a basic_string_view(Range&&) constructor, which is
> constrained to take a range (specifically, a contiguous_range). When the
> filesystem::path comparison operators call lhs.compare(rhs) the o
On Fri, 11 Jun 2021 at 18:25, Richard Sandiford
wrote:
>
> Christophe Lyon writes:
> > Thanks for the feedback. How about v2 attached?
> > Do you want me to merge neon_vec_unpack and
> > mve_vec_unpack and only have different assembly?
> > if (TARGET_HAVE_MVE)
> > return "vmovlb.%# %q0, %q1";
On Mon, 14 Jun 2021 at 18:01, Richard Sandiford
wrote:
>
> Christophe Lyon writes:
> > On Fri, 11 Jun 2021 at 18:25, Richard Sandiford
> > wrote:
> >>
> >> Christophe Lyon writes:
> >> > Thanks for the feedback. How about v2 attached?
> >> > Do you want me to merge neon_vec_unpack and
> >> > mv
Hi,
On Tue, 15 Jun 2021 at 00:58, Martin Sebor via Gcc-patches
wrote:
>
> On 6/2/21 3:46 PM, Marek Polacek wrote:
> > On Wed, Jun 02, 2021 at 03:40:49PM -0600, Martin Sebor via Gcc-patches
> > wrote:
> >> + if (!gimple_call_builtin_p (stmt, BUILT_IN_NORMAL))
> >> +{
> >> + /* See if th
On Wed, 16 Jun 2021 at 00:03, David Malcolm wrote:
>
> On Wed, 2021-06-09 at 11:00 -0400, David Malcolm wrote:
> > On Wed, 2021-06-09 at 16:17 +0200, Christophe Lyon wrote:
> > > On Tue, 8 Jun 2021 at 21:34, David Malcolm via Gcc-patches
> > > wrote:
> > > >
> > > > This patch verifies the previo
On Tue, 15 Jun 2021 at 08:47, Richard Biener via Gcc-patches
wrote:
>
> On Tue, Jun 15, 2021 at 8:01 AM Trevor Saunders wrote:
> >
> > This ensures callers take ownership of the returned vector.
> >
> > Signed-off-by: Trevor Saunders
> >
> > bootstrapped and regtested on x86_64-linux-gnu, ok?
>
On Thu, Jun 17, 2021 at 4:53 PM Trevor Saunders
wrote:
> On Thu, Jun 17, 2021 at 03:48:28PM +0200, Christophe Lyon wrote:
> > On Tue, 15 Jun 2021 at 08:47, Richard Biener via Gcc-patches
> > wrote:
> > >
> > > On Tue, Jun 15, 2021 at 8:01 AM Trevor Saunders
> wrote:
> > > >
> > > > This ensures
Hi Jonathan,
On Tue, 22 Jun 2021 at 22:34, Jonathan Wakely via Gcc-patches
wrote:
>
> On Tue, 22 Jun 2021 at 20:51, Jonathan Wakely wrote:
> >
> > On Tue, 22 Jun 2021 at 17:03, Matthias Kretz wrote:
> > >
> > > On Dienstag, 22. Juni 2021 17:20:41 CEST Jonathan Wakely wrote:
> > > > On Tue, 22 Ju
On 23/06/2021 12:11, Jonathan Wakely wrote:
On Wed, 23 Jun 2021 at 10:43, Christophe LYON wrote:
On 23/06/2021 11:17, Jonathan Wakely via Libstdc++ wrote:
On Wed, 23 Jun 2021 at 08:21, Christophe Lyon wrote:
This patch causes GCC build failures for bare-metal targets
(aarch64-elf, arm-eabi)
On 28/06/2021 10:40, Kyrylo Tkachov via Gcc-patches wrote:
-Original Message-
From: Prathamesh Kulkarni
Sent: 28 June 2021 09:38
To: Kyrylo Tkachov
Cc: Christophe Lyon ; gcc Patches
Subject: Re: [ARM] PR98435: Missed optimization in expanding vector
constructor
On Thu, 24 Jun 2021
On 25/06/2021 21:51, Jonathan Wakely via Libstdc++ wrote:
Conditionally #undef some more names that are used in system headers.
libstdc++-v3/ChangeLog:
PR libstdc++/97088
* testsuite/17_intro/names.cc: Undef more names for newlib and
also for arm-none-linux-gnueabi.
On 28/06/2021 17:26, Jonathan Wakely wrote:
On Mon, 28 Jun 2021 at 15:20, Jonathan Wakely wrote:
On Mon, 28 Jun 2021 at 12:56, Christophe LYON wrote:
On 25/06/2021 21:51, Jonathan Wakely via Libstdc++ wrote:
Conditionally #undef some more names that are used in system headers.
libstdc++-v3
On Tue, Jun 29, 2021 at 10:48 PM Rainer Orth
wrote:
> Hi Tobias,
>
> > On 29.06.21 13:58, Jakub Jelinek wrote:
> >
> >> Also, wonder if we shouldn't print the list of configured targets in
> that
> >> case, see candidates_list_and_hint functions and its callers.
> >> And it is unclear why we use
Hi,
I have just committed the following small patch as obvious:
Author: Christophe Lyon
Date: Wed Jun 30 11:44:00 2021 +
[testsuite]: Add missing dg-add-options float16 to
gcc.dg/debug/ctf/ctf-skip-types-2.c
The test already checks dg-require-effective-target float16, but this
I've noticed that overriding cpu/arch flags when running the testsuite
can cause this test to fail rather than being skipped because of
incompatible flags combination.
Since the test forces -march=armv7-a, make sure it is accepted in
combination with the current runtestflags.
2021-06-30 Christo
On 29/06/2021 12:46, Prathamesh Kulkarni wrote:
On Mon, 28 Jun 2021 at 14:48, Christophe LYON
wrote:
On 28/06/2021 10:40, Kyrylo Tkachov via Gcc-patches wrote:
-Original Message-
From: Prathamesh Kulkarni
Sent: 28 June 2021 09:38
To: Kyrylo Tkachov
Cc: Christophe Lyon ; gcc Patche
On 30/06/2021 21:56, Martin Sebor via Gcc-patches wrote:
On 6/11/21 8:46 AM, Martin Sebor wrote:
On 6/11/21 3:58 AM, Richard Sandiford wrote:
Martin Sebor via Gcc-patches writes:
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 7b37e1b602c..7cdc824730c 100644
--- a/gcc/config/
Hi,
On Wed, 9 Jun 2021 at 17:04, Richard Sandiford
wrote:
>
> Christophe Lyon writes:
> > The problem in this PR is that we call VPSEL with a mask of vector
> > type instead of HImode. This happens because operand 3 in vcond_mask
> > is the pre-computed vector comparison and has vector type. The
On Fri, 2 Jul 2021 at 10:53, Christophe Lyon wrote:
>
> Hi,
>
> On Wed, 9 Jun 2021 at 17:04, Richard Sandiford
> wrote:
> >
> > Christophe Lyon writes:
> > > The problem in this PR is that we call VPSEL with a mask of vector
> > > type instead of HImode. This happens because operand 3 in vcond_m
On Fri, Jul 2, 2021 at 4:29 PM Jakub Jelinek via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> On Fri, Jul 02, 2021 at 05:20:33PM +0300, Maxim Kuvyrkov wrote:
> > Hi Jakub,
> >
> > Thanks for helping me on IRC with debugging testsuite problems. Does
> this write up look good?
>
>
Hi Maxim,
Than
My previous patch to add a sanity check to genmultilib actually
checked the number of dirnames with the number of "sets of options"
rather than the number of options, thus breaking the build on some
targets.
To avoid duplicating once more the loop that constructs the sed
patterns, this patch check
On 11/21/22 11:16, Mark Wielaard wrote:
Hi,
On Fri, Nov 18, 2022 at 12:42:10PM -0700, Jeff Law wrote:
* genmultilib: Add sanity check.
OK.� It should be interesting to see if it trips.
It trips up various buildbot setups:
https://builder.sourceware.org/buildbot/#/changes/13720
On 11/21/22 13:17, Jakub Jelinek wrote:
On Mon, Nov 21, 2022 at 12:59:15PM +0100, Christophe Lyon wrote:
My previous patch to add a sanity check to genmultilib actually
checked the number of dirnames with the number of "sets of options"
rather than the number of options, thus breaking the bui
On 11/21/22 13:32, Mark Wielaard wrote:
Hi Christophe,
On Mon, 2022-11-21 at 13:12 +0100, Christophe Lyon wrote:
On 11/21/22 11:16, Mark Wielaard wrote:
On Fri, Nov 18, 2022 at 12:42:10PM -0700, Jeff Law wrote:
* genmultilib: Add sanity check.
OK. It should be interesting to see
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32 on-stack argument is not padded in
the same direction depending on endianness.
This patch fixes the testcase so that it expects the argument in the
right stack location, similarly to what other tests do
On 11/17/22 17:37, Andrea Corallo via Gcc-patches wrote:
From: Stam Markianos-Wright
In the past we had only defined the vsubq_x generic overload of the
vsubq_x_* intrinsics for float vector types. This would cause them
to fall back to the `__ARM_undef` failure state if they was called
thro
On 11/22/22 12:33, Richard Earnshaw wrote:
On 22/11/2022 11:21, Richard Sandiford wrote:
Richard Earnshaw via Gcc-patches writes:
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32
On 11/22/22 12:33, Richard Earnshaw wrote:
On 22/11/2022 11:21, Richard Sandiford wrote:
Richard Earnshaw via Gcc-patches writes:
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32
While working on enabling DFP for AArch64, I noticed new failures in
gcc.dg/compat/struct-layout-1.exp (t028) which were not actually
caused by DFP types handling. These tests are generated during 'make
check' and enabling DFP made generation different (not sure if new
non-DFP tests are generated,
While looking at PR 105549, which is about fixing the ABI break
introduced in GCC 9.1 in parameter alignment with bit-fields, we
noticed that the GCC 9.1 warning is not emitted in all the cases where
it should be. This patch fixes that and the next patch in the series
fixes the GCC 9.1 break.
We
After the recent patches to improve / tidy up MVE tests and patterns,
a few more tests need to be updated (replacing spaces with tabs).
Committed as obvious.
gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/mve-compare-1.c: Update.
* gcc.target/arm/simd/mve-compare-scalar-1.c: Upda
On Mon, Dec 13, 2021 at 3:31 PM Kyrylo Tkachov via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> Hi all,
>
> This second patch in the series adds an inline movmem expansion for
> TARGET_MOPS
> that emits the recommended sequence.
>
> A new param aarch64-mops-memmove-size-threshold is added to co
On Mon, Dec 13, 2021 at 3:29 PM Kyrylo Tkachov via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> Hi all,
>
> This patch adds the +mops architecture extension flag from the 2021 Arm
> Architecture extensions, Armv8.8-a.
> The +mops extensions introduce instructions to accelerate the memcpy,
> mem
This is v3 of this patch series, fixing issues I discovered before
committing v2 (which had been approved).
Thanks a lot to Richard Sandiford for his help.
The changes v2 -> v3 are:
Patch 4: Fix arm_hard_regno_nregs and CLASS_MAX_NREGS to support VPR.
Patch 7: Changes to the underlying repres
This patch mainly adds Neon tests similar to existing MVE ones,
to make sure we do not break Neon when fixing MVE.
mve-vcmp-f32-2.c is similar to mve-vcmp-f32.c but uses a conditional
with 2.0f and 3.0f constants to help scan-assembler-times.
2022-01-13 Christophe Lyon
gcc/testsuite/
These tests currently trigger an ICE which is fixed later in the patch
series.
The pr100757*.c testcases are derived from
gcc.c-torture/compile/20160205-1.c, forcing the use of MVE, and using
various types and return values different from 0 and 1 to avoid
commonalization with boolean masks. In ad
These tests are derived from the one provided in the PR: there is a
compile-only test because I did not have access to anything that could
execute MVE code until recently.
I have been able to add an executable test since QEMU supports MVE.
Instead of adding arm_v8_1m_mve_hw, I update arm_mve_hw so
At some point during the development of this patch series, it appeared
that in some cases the register allocator wants “VPR or general”
rather than “VPR or general or FP” (which is the same thing as
ALL_REGS). The series does not seem to require this anymore, but it
seems to be a good thing to do
VPR_REG is the only register in its class, so it should be handled by
TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling
default_class_likely_spilled_p. No test fails without this patch, but
it seems it should be implemented.
2022-01-13 Christophe Lyon
gcc/
* config/a
The vmvnq_n* intrinsics and have [u]int[16|32]_t arguments, so use
iterator instead of HI in mve_vmvnq_n_.
2022-01-13 Christophe Lyon
gcc/
* config/arm/mve.md (mve_vmvnq_n_): Use V_elem mode
for operand 1.
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
ind
This patch implements support for vectors of booleans to support MVE
predicates, instead of HImode. Since the ABI mandates pred16_t (aka
uint16_t) to represent predicates in intrinsics prototypes, we
introduce a new "predicate" type qualifier so that we can map relevant
builtins HImode arguments a
We make use of qualifier_predicate to describe MVE builtins
prototypes, restricting to auto-vectorizable vcmp* and vpsel builtins,
as they are exercised by the tests added earlier in the series.
Special handling is needed for mve_vpselq because it has a v2di
variant, which has no natural VPR.P0 re
The problem in this PR is that we call VPSEL with a mask of vector
type instead of HImode. This happens because operand 3 in vcond_mask
is the pre-computed vector comparison and has vector type.
This patch fixes it by implementing TARGET_VECTORIZE_GET_MASK_MODE,
returning the appropriate VxBI mode
This is mostly a mechanical change, only tested by the intrinsics
expansion tests.
2022-01-13 Christophe Lyon
gcc/
PR target/100757
PR target/101325
* config/arm/arm-builtins.c (BINOP_UNONE_NONE_NONE_QUALIFIERS):
Delete.
(TERNOP_UNONE_NONE_NONE_U
This patch covers a few builtins where we do not use the
iterator and thus we cannot use .
For v2di instructions, we keep the HI mode for predicates.
2022-01-13 Christophe Lyon
gcc/
PR target/100757
PR target/101325
* config/arm/arm-builtins.c (STRSBS_P_QUALIF
This patch covers a few non-load/store builtins where we do not use
the iterator and thus we cannot use .
2022-01-13 Christophe Lyon
gcc/
PR target/100757
PR target/101325
* config/arm/arm-builtins.c (CX_UNARY_UNONE_QUALIFIERS): Use
predicate.
(
VPR_REG should be part of ALL_REGS, this patch fixes this omission.
2022-01-13 Christophe Lyon
gcc/
* config/arm/arm.h (REG_CLASS_CONTENTS): Add VPR_REG to ALL_REGS.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 2416fb5ef64..ea9fb16b9b1 100644
--- a/gcc/config
When compiling gcc.target/arm/mve/intrinsics/mve_immediates_1_n.c with
-mthumb -mfloat-abi=hard -march=armv8.1-m.main+mve.fp+fp.dp, the compiler
crashes because:
error: insn does not satisfy its constraints:
(insn 28 14 17 2 (set (reg:V8HI 16 s0 [orig:249 u16 ] [249])
(mem/c:V8HI (pre_modify:SI
hes during stage1, so it should still be OK
if they are accepted as-is ?
Thanks,
Christophe
On Thu, Jan 13, 2022 at 3:58 PM Christophe Lyon via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
>
> This is v3 of this patch series, fixing issues I discovered before
> committing v2
Hi André,
On Fri, Jan 14, 2022 at 6:03 PM Andre Vieira (lists) via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> Hi Christophe,
>
> This patch relaxes the addressing modes for the mve full load and stores
> (by full loads and stores I mean non-widening or narrowing loads and
> stores resp). The
When I committed the patches to enable support for DFP on AArch64, I
forgot to update the installation documentation.
This patch adds AArch64 as needed (same as i386/x86_64).
OK for trunk and gcc-13?
2023-04-17 Christophe Lyon
gcc/
* doc/install.texi (enable-decimal-float): A
Hi,
This is the beginning of a long patch series to change the way Arm MVE
intrinsics are implemented. The goal is to get rid of arm_mve.h, which
takes a long time to parse and compile.
Roughly speaking, it's about using a framework very similar to what is
implemented for AArch64/SVE intrinsics.
This patch introduces a separate numberspace for general arm builtin
function codes. The intent of this patch is to separate the space of
function codes that may be assigned to general builtins and future
MVE intrinsic functions by using the first bit of each function code
to differentiate them. Th
This patch introduces the new MVE intrinsics framework, heavily
inspired by the SVE one in the aarch64 port.
Like the MVE intrinsic types implementation, the intrinsics framework
defines functions via a new pragma in arm_mve.h. A boolean parameter
is used to pass true when __ARM_MVE_PRESERVE_USER_
Introduce a function that will be used to build intrinsics which use
UNSPECS for the versions.
2022-09-08 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-functions.h (class
unspec_mve_function_exact_insn): New.
---
gcc/config/arm/arm-mve-builtins-functions.h | 151 ++
This patch implements vreinterpretq using the new MVE intrinsics
framework.
The old definitions for vreinterpretq are removed as a consequence.
2022-09-08 Murray Steele
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
Implement vuninitialized using the new MVE builtins framework.
We need to keep the overloaded __arm_vuninitializedq definitions
because their resolution depends on the result type only, which is not
currently supported by the resolver.
2022-09-08 Murray Steele
Christophe Lyon
gc
This patch adds the binary_opt_n shape description.
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
* config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 32 +++
gcc/config/arm/arm-
In order to avoid using a huge switch when generating all the
intrinsics (e.g. mve_vaddq_n_sv4si, ...), we want to generate a single
function taking the builtin code as parameter (e.g. mve_q_n (VADDQ_S,
)
This is achieved by using the new mve_insn iterator.
Having done that, it becomes easier
This patch adds the create shape description.
2022-09-08 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (create): New.
* config/arm/arm-mve-builtins-shapes.h: (create): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 22 ++
gcc/co
Factorize vandq, veorq, vorrq, vbicq so that they use the same
parameterized names.
2022-09-08 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
(MVE_FP_M_BINARY_LOGIC): New.
(MVE_INT_M_N_BINARY_LOGIC): New.
(MVE_INT_N_BINARY_LOGIC):
This patch adds the binary shape description.
2022-09-08 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary): New.
* config/arm/arm-mve-builtins-shapes.h (binary): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 27 +++
gcc/co
We need a 'fake' iterator to be able to use mve_insn for vcreateq_f.
2022-09-08 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_FP_CREATE): New.
(mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
* config/arm/mve.md (mve_vcreateq_f): Rename into ...
Factorize
vhaddq_n, vhsubq_n, vqaddq_n, vqdmulhq_n, vqrdmulhq_n, vqsubq_n
so that they use the same pattern.
2022-09-08 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
(mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
vqsubq.
Factorize vhaddq_m_n, vhsubq_m_n, vmlaq_m_n, vmlasq_m_n, vqaddq_m_n,
vqdmlahq_m_n, vqdmlashq_m_n, vqdmulhq_m_n, vqrdmlahq_m_n,
vqrdmlashq_m_n, vqrdmulhq_m_n, vqsubq_m_n
so that they use the same pattern.
2022-09-08 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_INT_SU_M_N_B
Introduce a function that will be used to build intrinsics which use
RTX codes for the non-predicated, no-mode version, and UNSPECS
otherwise.
2022-09-08 Christophe Lyon
gcc/ChangeLog:
* config/arm/arm-mve-builtins-functions.h (class
unspec_based_mve_function_base): New.
Implement vcreateq using the new MVE builtins framework.
2022-09-08 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New.
(vcreateq): New.
* config/arm/arm-mve-builtins-base.def (vcreateq): New.
* config/arm/arm-mve-builtins-bas
Factorize vabdq, vhaddq, vhsubq, vmulhq, vqaddq_u, vqdmulhq,
vqrdmulhq, vqrshlq, vqshlq, vqsubq_u, vrhaddq, vrmulhq, vrshlq
so that they use the same pattern.
2022-09-08 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_INT_SU_BINARY): New.
(mve_insn): Add vabdq, vhadd
Implement vorrq using the new MVE builtins framework.
2022-09-08 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F):
New.
(vorrq): New.
* config/arm/arm-mve-builtins-base.def (vorrq): New.
* config/arm/arm-mve-built
Implement vamdq, veorq using the new MVE builtins framework.
2022-09-08 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
(vandq,veorq): New.
* config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
* config/arm/arm
patch adds the binary_orrq shape description.
MODE_n intrinsics use a set of predicates (preds_m_or_none) different
the MODE_none ones, so we explicitly reference preds_m_or_none from
the shape, thus we need to make it a global array.
2022-09-08 Christophe Lyon
gcc/
* config/a
Factorize m-predicated versions of vabdq, vhaddq, vhsubq, vmaxq,
vminq, vmulhq, vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq,
vqdmulhq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq
so that they use the same pattern.
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