for the powerpc64le* case,
> > as that will work only with the Debian/Ubuntu mess.
I see. Didn't realise Fedora was keeping the old mess. ;-)
> > So perhaps something like completely untested following patch?
>
> The patch fixes the issue for me.
It's fine on Ubuntu t
for regressions on a current powerpc64le build. OK to apply,
and on the branches?
--
Alan Modra
Australia Development Lab, IBM
(x != dest)
+ emit_move_insn (dest, x);
}
- else
- move_block_to_reg (REGNO (reg), mem, nregs, args[i].mode);
}
/* When a parameter is a block, and perhaps in other cases, it is
--
Alan Modra
Australia Development Lab, IBM
On Sat, Mar 14, 2015 at 06:14:40AM -0700, H.J. Lu wrote:
> On Sat, Mar 14, 2015 at 6:02 AM, Alan Modra wrote:
> > I'll also throw together a testcase or three. For execute tests I'm
> > thinking of using sbrk to locate an odd sized struct such that access
> > past
On Sat, Mar 14, 2015 at 11:32:38PM +1030, Alan Modra wrote:
> I'll also throw together a testcase or three.
* gcc.dg/pr65408.c: New.
Index: gcc/testsuite/gcc.dg/pr65408.c
===
--- gcc/testsuite/gcc.dg/pr65408.c (
On Sun, Mar 15, 2015 at 10:51:02PM -0400, David Edelsohn wrote:
> On Tue, Dec 17, 2013 at 6:50 AM, Alan Modra wrote:
PR target/61350
> > gcc/
> > * config/rs6000/rs6000.md (bswapdi2): Remove one scratch reg.
> > Modify Z->r bswapdi splitter to use
On Tue, Mar 17, 2015 at 01:28:41PM -0600, Jeff Law wrote:
> On 03/14/2015 07:02 AM, Alan Modra wrote:
> > PR target/65408
> > PR target/58744
> > PR middle-end/36043
> > * calls.c (load_register_parameters): Don't load past end of
> > mem u
)))
;; Return 1 if the operand is a CONST_INT and it is the element for 64-bit
--
Alan Modra
Australia Development Lab, IBM
On Thu, Apr 02, 2015 at 01:03:19PM -0400, David Edelsohn wrote:
> On Thu, Apr 2, 2015 at 1:22 AM, Alan Modra wrote:
> > This cures an unrecognizable insn ICE by modifying a predicate of
> > extenddftf2_internal (the only place this predicate is used) to ensure
> > that rtl o
m,d,n"))]
+ [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,ws,d,&d")
+ (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,md,md,md")))
+ (use (match_operand:DF 2 "zero_reg_mem_operand" "d,r,j,m,d")
On Sat, Apr 04, 2015 at 08:25:10PM +0200, Andreas Schwab wrote:
> /daten/gcc/gcc-20150403/gcc/testsuite/gcc.c-torture/compile/pr33855.c:27:1:
> error: unrecognizable insn:.
Should be fixed with r221862.
--
Alan Modra
Australia Development Lab, IBM
On Wed, Mar 18, 2015 at 12:12:17PM +0100, Richard Biener wrote:
> On Wed, Mar 18, 2015 at 5:22 AM, Alan Modra wrote:
> > On Tue, Mar 17, 2015 at 01:28:41PM -0600, Jeff Law wrote:
> >> On 03/14/2015 07:02 AM, Alan Modra wrote:
> >> > PR target/65408
> >&
unset libgo_cv_c_split_stack_supported
+ ;;
+esac
AC_CACHE_CHECK([whether -fsplit-stack is supported],
[libgo_cv_c_split_stack_supported],
[CFLAGS_hold=$CFLAGS
--
Alan Modra
Australia Development Lab, IBM
> cared enough to push gas changes upstream.
>
> You need to configure it with --with-cpu. Not that that makes any
> sense :-)
Yes, I wouldn't have got past configure without adding --with-cpu.
--with-cpu doesn't solve the problem I'm talking about, which is that
On Fri, May 22, 2015 at 04:04:19PM +0930, Alan Modra wrote:
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02055.html
> * rtlanal.c (commutative_operand_precedence): Correct comments.
> * simplify-rtx.c (simplify_plus_minus_op_data_cmp): Delete forward
> declaration.
hanges. White space fixes.
>
> OK in principle, but...
Thanks for reviewing!
> > Some notes: Renaming canonicalized to not_canonical better reflects
> > its usage. At the time the var is set, the expression hasn't been
> > canonicalized.
>
> I'm quite skeptical
iling testcase).
Bootstrapped and regression tested powerpc64le-linux and
powerpc64-linux.
Alan Modra (7):
[RS6000] Hide insns not needing to be public
[RS6000] Tidy rotates
[RS6000] rtx_costs for ROTATE/ASHIFT inside AND
[RS6000] rldic in rotate and mask patterns
[RS6000] Split mask64_2_op
ine_insn "ashldi3_internal5"
+(define_insn "*ashldi3_internal5"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
@@ -5952,7 +5952,7 @@
"rldicr %
match_operand:DI 3 "const_int_operand" "n,n"))
(const_int 0)))
(clobber (match_scratch:DI 4 "=r,r"))]
"TARGET_64BIT && includes_rldicr_lshift_p (operands[2], operands[3])"
@@ -5973,7 +5965,7 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
-(match_operand:DI 3 "mask64_operand" ""))
+(match_operand:DI 3 "const_int_operand" ""))
(const_int 0)))
(clobber (match_scratch:DI 4 ""))]
"TARGET_POWERPC64 && reload_completed
@@ -5991,7 +5983,7 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "const_int_operand" "i,i"))
- (match_operand:DI 3 "mask64_operand" "n,n"))
+ (match_operand:DI 3 "const_int_operand" "n,n"))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
@@ -6008,7 +6000,7 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
-(match_operand:DI 3 "mask64_operand" ""))
+(match_operand:DI 3 "const_int_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
(and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
diff --git a/gcc/testsuite/gcc.target/powerpc/rotmask.c
b/gcc/testsuite/gcc.target/powerpc/rotmask.c
new file mode 100644
index 000..4d1b917
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/rotmask.c
@@ -0,0 +1,8 @@
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "rotldi" } } */
+
+unsigned long f (unsigned long x)
+{
+ return ((x << 1) | (x >> 63)) & 0x;
+}
--
Alan Modra
Australia Development Lab, IBM
f (includes_rldic_lshift_p (XEXP (op0, 1), op1))
+ return true;
+ if (GET_CODE (op0) == ASHIFT
+ && includes_rldicr_lshift_p (XEXP (op0, 1), op1))
+ return true;
+ }
+ }
+ return false;
+
case ASHIFT:
ca
+ (match_operand:SI 2 "const_int_operand" ""))
(match_operand:DI 3 "const_int_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
- (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
+ (and:DI (rotshift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"TARGET_POWERPC64 && reload_completed
&& includes_rldic_lshift_p (operands[2], operands[3])"
[(set (match_dup 0)
- (and:DI (ashift:DI (match_dup 1) (match_dup 2))
+ (and:DI (rotshift:DI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 4)
(compare:CC (match_dup 0)
(const_int 0)))]
"")
+
(define_insn "*ashldi3_internal7"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r")
--
Alan Modra
Australia Development Lab, IBM
(match_dup 2)))]
- "TARGET_64BIT && rs6000_gen_cell_microcode"
- "@
- #
- #"
- "&& reload_completed"
- [(set (match_dup 0)
- (and:DI (rotate:DI (match_dup 1)
- (match_dup 4))
- (match_dup 5)))
- (parallel [(set (match_dup 3)
- (compare:CC (and:DI (rotate:DI (match_dup 0)
- (match_dup 6))
- (match_dup 7))
- (const_int 0)))
- (set (match_dup 0)
- (and:DI (rotate:DI (match_dup 0)
- (match_dup 6))
- (match_dup 7)))])]
-{
- build_mask64_2_operands (operands[2], &operands[4]);
-}
- [(set_attr "type" "two")
- (set_attr "dot" "yes")
- (set_attr "length" "8,12")])
;; 128-bit logical operations expanders
--
Alan Modra
Australia Development Lab, IBM
e CONST:
case HIGH:
case SYMBOL_REF:
--
Alan Modra
Australia Development Lab, IBM
OST that is selected if -mdebug=cost. */
static int
--
Alan Modra
Australia Development Lab, IBM
= cselib_lookup (x, GET_MODE (x), 0, VOIDmode);
--
Alan Modra
Australia Development Lab, IBM
On Fri, Jan 16, 2015 at 11:03:24AM -0600, Segher Boessenkool wrote:
> On Fri, Jan 16, 2015 at 08:12:27PM +1030, Alan Modra wrote:
> > OK, so we need to fix this in the rs6000 backend, but it occurs to me
> > that cprop also has a bug here. It shouldn't be touching fixe
On Fri, Jan 16, 2015 at 09:35:16AM -0700, Jeff Law wrote:
> On 01/16/15 02:42, Alan Modra wrote:
> > * cprop.c (do_local_cprop): Disallow replacement of fixed
> > hard registers.
> OK. Extra credit for a testcase, ppc specific is obviously OK.
Thanks. Committed revi
On Fri, Jan 16, 2015 at 08:09:51PM -0600, Segher Boessenkool wrote:
> On Sat, Jan 17, 2015 at 11:07:12AM +1030, Alan Modra wrote:
> > On Fri, Jan 16, 2015 at 11:03:24AM -0600, Segher Boessenkool wrote:
> > > On Fri, Jan 16, 2015 at 08:12:27PM +1030, Alan Modra wrote:
> > &
On Sat, Jan 17, 2015 at 11:16:57AM +1030, Alan Modra wrote:
> On Fri, Jan 16, 2015 at 09:35:16AM -0700, Jeff Law wrote:
> > On 01/16/15 02:42, Alan Modra wrote:
> > > * cprop.c (do_local_cprop): Disallow replacement of fixed
> > > hard registers.
> > OK.
; invocation.
Since you've been looking at this area, please consider reviewing
https://gcc.gnu.org/ml/gcc-patches/2014-01/msg01157.html
--
Alan Modra
Australia Development Lab, IBM
On Mon, Jan 19, 2015 at 10:43:29PM -0500, David Edelsohn wrote:
> On Fri, Jan 17, 2014 at 10:58 PM, Alan Modra wrote:
> > This patch cures PR59828 by translating all the -mcpu options at once,
> > in order, to their equivalent assembler -m options by using a new spec
> > func
On Tue, Jan 20, 2015 at 09:26:12AM -0500, David Edelsohn wrote:
> On Tue, Jan 20, 2015 at 12:41 AM, Alan Modra wrote:
> > On Mon, Jan 19, 2015 at 10:43:29PM -0500, David Edelsohn wrote:
> >> On Fri, Jan 17, 2014 at 10:58 PM, Alan Modra wrote:
> >> > This patch cu
turn true;
-
- if (pt_solutions_intersect (gimple_call_use_set (call), &pi->pt))
- return true;
-}
- else
+ if (pt_solution_includes_base (gimple_call_use_set (call), base))
return true;
/* Inspect call arguments for passed-by-value aliases. */
--
Alan Modra
Australia Development Lab, IBM
On Mon, Jan 26, 2015 at 10:11:14AM +0100, Richard Biener wrote:
> On Sat, Jan 24, 2015 at 12:23 AM, Alan Modra wrote:
> > How does this look as a potential fix for PR64703? I haven't made
> > many forays into gimple code, so even though this patch passes
> > bootstrap
state above. You think differently,
and I won't push my approach further. The bug isn't important enough
to argue over.
--
Alan Modra
Australia Development Lab, IBM
"initial-exec", "local-exec"};
I just made the same mistake in a binutils commit message. The proper
term is general-dynamic, not global-dynamic. See Drepper's TLS paper,
section 4. http://www.akkadia.org/drepper/tls.pdf
--
Alan Modra
Australia Development Lab, IBM
-dynamic. See Drepper's TLS paper,
> > section 4. http://www.akkadia.org/drepper/tls.pdf
>
> Hmm, this seems to disagree with our attribute:
> @item -ftls-model=@var{model}
> @opindex ftls-model
> Alter the thread-local storage model to be used (@pxref{Thread-Local}).
long
+resolve_ifunc (unsigned long value, unsigned long adjust)
+{
+ Elf64_FuncDesc opd;
+
+ if (adjust)
+{
+ Elf64_FuncDesc *func = (Elf64_FuncDesc *) value;
+ opd.fd_func = func->fd_func + adjust;
+ opd.fd_toc = func->fd_toc + adjust;
+ opd.fd_aux = func->
On Sat, Jan 17, 2015 at 01:12:49PM +0100, Richard Biener wrote:
> On January 17, 2015 1:37:12 AM CET, Alan Modra wrote:
> >On Fri, Jan 16, 2015 at 11:03:24AM -0600, Segher Boessenkool wrote:
> >> On Fri, Jan 16, 2015 at 08:12:27PM +1030, Alan Modra wrote:
> >> > OK,
rs6000.o
./prev-gcc/rs6000.o
./stage1-gcc/rs6000.o
So the patch didn't make a real mess..
--
Alan Modra
Australia Development Lab, IBM
r, as is done in glibc.
> > And it means that indirect calls to const functions are severely
> > pessimized (not that it matters?) as they effectively become pure calls.
That might be a problem but see my other email comparing gcc object
files.
--
Alan Modra
Australia Development Lab, IBM
On Fri, Jan 30, 2015 at 01:19:51PM +1030, Alan Modra wrote:
> On Thu, Jan 29, 2015 at 04:21:15PM +0100, Richard Biener wrote:
> > > This means that you still will be able to create a testcase that is
> > > miscompiled with exposing the address-taking to points-to analysis.
&g
On Fri, Jan 16, 2015 at 08:12:27PM +1030, Alan Modra wrote:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-December/123776.html
> shows gcc-5 miscompiling a powerpc64 linux kernel. The executive
> summary is that the rs6000 backend has a bug in its RTL description of
> indirec
ngs about applying the patch. I suspect that future changes to
tree optimization passes will break glibc again (at least, versions
of glibc that don't have the asm fix), so it's probably better to not
apply an incomplete fix. We're in a really grey area of the C
standard when it comes to the glibc code.
--
Alan Modra
Australia Development Lab, IBM
already_loaded (crtl->emit.sequence_stack->last))
{
rtx sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
rtx func_sc_offset = GEN_INT (2 * GET_MODE_SIZE (Pmode));
--
Alan Modra
Australia Development Lab, IBM
On Tue, Feb 03, 2015 at 03:08:01PM +0100, Jakub Jelinek wrote:
> On Wed, Feb 04, 2015 at 12:27:35AM +1030, Alan Modra wrote:
> > @@ -33002,7 +33092,9 @@ rs6000_call_aix (rtx value, rtx func_desc, rtx fla
> > originally direct, the 3rd word has not been w
On Tue, Feb 03, 2015 at 11:14:49AM -0500, David Edelsohn wrote:
> On Tue, Feb 3, 2015 at 8:57 AM, Alan Modra wrote:
> > PR target/64876
> > * config/rs6000/rs6000.c (chain_already_loaded): New function.
> > (rs6000_call_aix): Use it.
>
> Okay wi
o, I can implement an accessor function to give me
the previous sequence, but see m32c.c use of crtl->emit.sequence_stack.
--
Alan Modra
Australia Development Lab, IBM
On Thu, Feb 05, 2015 at 08:12:25AM +0100, Jakub Jelinek wrote:
> On Thu, Feb 05, 2015 at 02:09:54PM +1030, Alan Modra wrote:
> > Jakub, was your suggestion to use get_last_insn_anywhere() based on
> > not wanting to expose details that should be internal to
> > emit-rtl.[ch]?
On Thu, Feb 05, 2015 at 11:31:53AM +0100, Jakub Jelinek wrote:
> On Thu, Feb 05, 2015 at 08:59:01PM +1030, Alan Modra wrote:
> > On Thu, Feb 05, 2015 at 08:12:25AM +0100, Jakub Jelinek wrote:
> > > On Thu, Feb 05, 2015 at 02:09:54PM +1030, Alan Modra wrote:
> > > >
On Thu, Feb 05, 2015 at 08:59:01PM +1030, Alan Modra wrote:
> Thanks, I'll use it directly now and have a patch in the works to tidy
> m32c.c and rs6000.c.
As threatened, the emit-rtl tidy. Besides adding a couple of
accessors, I've moved x_first_insn and x_last_insn into a struc
cannot change anything. */
@@ -9802,7 +9802,7 @@ reg_nonzero_bits_for_combine (const_rtx x, machine
&& CONST_INT_P (tem)
&& INTVAL (tem) > 0
&& val_signbit_known_set_p (GET_MODE (x), INTVAL (tem)))
- tem = GEN_INT (INTVAL (tem) | ~GET_MODE_MASK (GET_MODE (x)));
+ gcc_unreachable ();
#endif
return tem;
}
--
Alan Modra
Australia Development Lab, IBM
));
+ else
+ emit_insn (gen_adddi3_carry (frame_reg_rtx,
+ptr_reg, offset));
}
else
{
--
Alan Modra
Australia Development Lab, IBM
On Thu, Feb 12, 2015 at 10:04:45AM -0500, David Edelsohn wrote:
> On Thu, Feb 12, 2015 at 7:33 AM, Alan Modra wrote:
> > * config/rs6000/rs6000.c (rs6000_emit_epilogue): Use addsi3_carry
> > or adddi3_carry when restoring frame_reg_rtx from r0 after restvr.
>
On Thu, Feb 12, 2015 at 07:01:12PM -0500, David Edelsohn wrote:
> On Thu, Feb 12, 2015 at 5:10 PM, Alan Modra wrote:
> > On Thu, Feb 12, 2015 at 10:04:45AM -0500, David Edelsohn wrote:
> >> On Thu, Feb 12, 2015 at 7:33 AM, Alan Modra wrote:
> >> >
r_rtx, 0);
}
- else if (GET_CODE (addr_rtx) == PLUS
- && CONST_INT_P (XEXP (addr_rtx, 1)))
-{
- *base = XEXP (addr_rtx, 0);
- *offset = INTVAL (XEXP (addr_rtx, 1));
-}
- else
+ if (!REG_P (addr_rtx))
return false;
+ *base = addr_rtx;
return true;
}
On ppc64 ELFv2 just the
lazy plt resolution trashes r11.
--
Alan Modra
Australia Development Lab, IBM
ons make this fairly uncommon, for
instance the GNU powerpc linkers won't do this unless the function
address is taken in the executable by non-PIC (see
pointer_equality_needed in BFD code).
--
Alan Modra
Australia Development Lab, IBM
. The -mno- options are to counter options added by
check_vect_support_and_set_flags based on hardware detection. On
power8 hardware just switching to -mdejagnu-cpu results in, for
example:
...xgcc -B.../ ...gcc.dg/vect/pr4875.c -fno-diagnostics-show-caret \
-fno-diagnostics-show-line-numbers -fdiagnostics-color=never -flto \
-ffat-lto-objects -maltivec -mpower8-vector -ftree-vectorize \
-fno-vect-cost-model -fno-common -O2 -fdump-tree-vect-details \
-O3 -mdejagnu-cpu=power6 -S -o pr48765.s
--
Alan Modra
Australia Development Lab, IBM
iation_width): Treat PROCESSOR_FUTURE like
> PROCESSOR_POWER9 for now.
> (rs6000_adjust_cost): Likewise.
> (rs6000_issue_rate): Likewise.
rs6000_register_move_cost needs similar tweaks.
--
Alan Modra
Australia Development Lab, IBM
NOTOC,foo
>
> Are we guaranteed the assembler always writes a pld like this as 8 bytes?
Strictly speaking the assembler might nop pad *before* the pld making
a total of 12 bytes, and that's the reason to put the .reloc *after*
the prefix instruction.
--
Alan Modra
Australia Development Lab, IBM
tvec v = gen_rtvec (3, toc_reg, func_desc, tlsarg);
rtx mark_toc_reg = gen_rtx_UNSPEC (Pmode, v, UNSPEC_PLTSEQ);
--
Alan Modra
Australia Development Lab, IBM
> {
>rs6000_sibcall_sysv (NULL_RTX, operands[0], operands[1], operands[2]);
>DONE;
> @@ -10796,7 +10797,7 @@
>DONE;
> }
>
> - if (DEFAULT_ABI == ABI_V4)
> + if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN)
and here.
> {
>rs6000_sibcall_sysv (operands[0], operands[1], operands[2],
> operands[3]);
>DONE;
> --
> 2.17.1
>
--
Alan Modra
Australia Development Lab, IBM
On Mon, Dec 03, 2018 at 07:14:36PM +, Iain Sandoe wrote:
>
> > On 3 Dec 2018, at 06:18, Alan Modra wrote:
> >
> > On Mon, Dec 03, 2018 at 01:26:48AM +, Iain Sandoe wrote:
>
> >> The first patch makes Darwin share the sysv lowering, up until late in th
pc64; \
+ mcpu=rs64: -mppc64; \
mcpu=401: -mppc; \
mcpu=403: -m403; \
mcpu=405: -m405; \
@@ -130,11 +131,12 @@
mcpu=e500mc64: -me500mc64; \
mcpu=e5500: -me5500; \
mcpu=e6500: -me6500; \
+ mcpu=titan: -mtitan; \
!mcpu*: %{mpower9-vector: -mpower9; \
mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
mvsx: -mpower7; \
mpowerpc64: -mppc64;: %(asm_default)}; \
- :%eMissing -mcpu option in ASM_SPEC_CPU?\n} \
+ :%eMissing -mcpu option in ASM_CPU_SPEC?\n} \
%{mvsx: -mvsx -maltivec; maltivec: -maltivec} \
-many"
--
Alan Modra
Australia Development Lab, IBM
,@object
> .align 3
Looks good to me. I hadn't noticed the bad #endif placement with
respect to FUNC_END when I added .cfi_endproc, which naturally goes
with FUNC_END.
--
Alan Modra
Australia Development Lab, IBM
On Wed, Nov 14, 2018 at 01:43:57PM +1030, Alan Modra wrote:
> On Tue, Nov 13, 2018 at 05:17:41AM -0600, Segher Boessenkool wrote:
> > On Tue, Nov 13, 2018 at 12:02:55PM +1030, Alan Modra wrote:
> > > OK, fair enough. Another option is to just disable -many when gcc is
> >
(value, call[0]);
- unsigned int mask = CALL_V4_SET_FP_ARGS | CALL_V4_CLEAR_FP_ARGS;
- call[1] = gen_rtx_USE (VOIDmode, GEN_INT (INTVAL (cookie) & mask));
+ call[1] = gen_rtx_USE (VOIDmode, cookie);
call[2] = simple_return_rtx;
insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (3, call));
--
Al
insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (3, call));
insn = emit_call_insn (insn);
--
Alan Modra
Australia Development Lab, IBM
On Fri, Dec 14, 2018 at 07:57:08PM -0600, Segher Boessenkool wrote:
> On Sat, Dec 15, 2018 at 11:48:07AM +1030, Alan Modra wrote:
> > I noticed when looking at PR88311 that rs6000_call_sysv should be
> > using gen_hard_reg_clobber (as the sysv call insns did prior to me
fine LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \
%{rdynamic:-export-dynamic} \
-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
--
Alan Modra
Australia Development Lab, IBM
On Mon, Dec 17, 2018 at 11:05:57AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Dec 17, 2018 at 10:40:01AM +1030, Alan Modra wrote:
> > Since I broke powerpc*-freebsd and the other non-linux powerpc
> > targets, I guess I ought to fix them. The following is a variat
On Tue, Dec 18, 2018 at 03:20:02AM -0600, Segher Boessenkool wrote:
> Hi Alan,
>
> On Tue, Dec 18, 2018 at 10:39:27AM +1030, Alan Modra wrote:
> > On Mon, Dec 17, 2018 at 11:05:57AM -0600, Segher Boessenkool wrote:
> > > On Mon, Dec 17, 2018 at 10:40:01AM +1030, Alan Modr
se);
+ fprintf (outf, " ? ");
+ write_attr_value (outf, attr, XEXP (value, 1));
+ fprintf (outf, " : ");
+ write_attr_value (outf, attr, XEXP (value, 2));
+ fprintf (outf, ")");
+ break;
+
default:
gcc_unreachable ();
}
--
Alan Modra
Australia Development Lab, IBM
On Thu, Jan 03, 2019 at 12:41:52PM +, Richard Sandiford wrote:
> Alan Modra writes:
> > +case PLUS:
> > + current_or = or_attr_value (XEXP (exp, 0));
> > + if (current_or != -1)
> > + {
> > + int n = current_or;
> > + c
On Thu, Jan 03, 2019 at 07:03:59PM +, Richard Sandiford wrote:
> Richard Sandiford writes:
> > This still seems risky and isn't what the name and function comment
OK, how about this delta from the previous patch to ameliorate the
maintenance risk?
diff --git a/gcc/genattrtab.c b/gcc/genattrt
On Fri, Jan 04, 2019 at 12:18:03PM +, Richard Sandiford wrote:
> Alan Modra writes:
> > On Thu, Jan 03, 2019 at 07:03:59PM +, Richard Sandiford wrote:
> >> Richard Sandiford writes:
> >> > This still seems risky and isn't what the name and function
const_string "8")]
(const_string "4")))])
-(define_insn_and_split "*call_value_nonlocal_sysv"
+(define_insn "*call_value_nonlocal_sysv"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2)))
@@ -10538,18 +10555,6 @@ (define_insn_and_split
"*call_value_nonlocal_sysv"
output_asm_insn ("creqv 6,6,6", operands);
return rs6000_call_template (operands, 1);
-}
- "DEFAULT_ABI == ABI_V4
- && TARGET_SECURE_PLT && flag_pic && !SYMBOL_REF_LOCAL_P (operands[1])
- && (INTVAL (operands[3]) & CALL_LONG) == 0"
- [(parallel [(set (match_dup 0)
- (call (mem:SI (match_dup 1))
-(match_dup 2)))
- (use (match_dup 3))
- (use (match_dup 4))
- (clobber (reg:SI LR_REGNO))])]
-{
- operands[4] = pic_offset_table_rtx;
}
[(set_attr "type" "branch,branch")
(set_attr "length" "4,8")])
--
Alan Modra
Australia Development Lab, IBM
UNSPEC_PLT16_LO))]
- "HAVE_AS_PLTSEQ && TARGET_TLS_MARKERS
+ "HAVE_AS_PLTSEQ
&& (DEFAULT_ABI == ABI_ELFv2 || DEFAULT_ABI == ABI_V4)"
{
return rs6000_pltseq_template (operands, 2);
@@ -10287,7 +10287,7 @@ (define_insn "*pltseq_mtctr_"
(match_operand:P 2 "symbol_ref_operand" "s")
(match_operand:P 3 "" "")]
UNSPEC_PLTSEQ))]
- "HAVE_AS_PLTSEQ && TARGET_TLS_MARKERS
+ "HAVE_AS_PLTSEQ
&& (DEFAULT_ABI == ABI_ELFv2 || DEFAULT_ABI == ABI_V4)"
{
return rs6000_pltseq_template (operands, 3);
--
Alan Modra
Australia Development Lab, IBM
t;TARGET_PLTSEQ
&& (DEFAULT_ABI == ABI_ELFv2 || DEFAULT_ABI == ABI_V4)"
{
return rs6000_pltseq_template (operands, 3);
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 2e90bf37747..3f94bb7671c 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -405,6 +405,10 @@ mlongcall
Target Report Var(rs6000_default_long_calls) Save
Avoid all range limits on call instructions.
+mpltseq
+Target Report Var(rs6000_pltseq) Init(1) Save
+Use inline plt sequences to implement long calls.
+
; This option existed in the past, but now is always on.
mgen-cell-microcode
Target RejectNegative Undocumented Ignore
--
Alan Modra
Australia Development Lab, IBM
On Mon, Jan 07, 2019 at 12:10:38PM +, Richard Sandiford wrote:
> Alan Modra writes:
> > +/* Given an attribute value expression, return the maximum value that
> > + might be evaluated assuming all conditionals are independent.
> > + Return INT_MAX if the value can&#x
t a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index 17fea80a0a5..4645ef3b21e 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -39,7 +39,7 @@
/* Override rs6000.h definition. */
#undef ASM_DEFAULT_SPEC
-#defineASM_DEFAULT_SPEC "-mppc"
+#defineASM_DEFAULT_SPEC "-mppc%{m64:64}"
#defineTARGET_HAS_TOC (TARGET_64BIT
\
|| (TARGET_MINIMAL_TOC \
--
Alan Modra
Australia Development Lab, IBM
uiltin_version ("CRuntime_Bionic"); \
- else if (OPTION_MUSL) \
- builtin_version ("CRuntime_Musl");\
-} while (0)
-
#undef CPP_OS_DEFAULT_SPEC
#define CPP_OS_DEFAULT_SPEC "%(cpp_os_linux) %(include_extra)"
--
Alan Modra
Australia Development Lab, IBM
),
- simple_return_rtx)));
+ insn = emit_call_insn (gen_sibcall (funexp, const0_rtx, const0_rtx));
SIBLING_CALL_P (insn) = 1;
emit_barrier ();
--
Alan Modra
Australia Development Lab, IBM
On Sat, Jul 27, 2019 at 01:22:57PM -0500, Segher Boessenkool wrote:
> On Sat, Jul 27, 2019 at 02:56:23PM +0930, Alan Modra wrote:
> > The patch also introduces ASM_DEFAULT_EXTRA for the altivec variant
> > targets so as to enable -maltivec by default.
>
> That is a behavio
ses/>. */
+/* Undef gnu-user.h macros we don't want. */
+#undef CPLUSPLUS_CPP_SPEC
+#undef LINK_GCC_C_SEQUENCE_SPEC
+
/* Override the defaults, which exist to force the proper definition. */
#ifdef IN_LIBGCC2
--
Alan Modra
Australia Development Lab, IBM
s_symbol_ref" "")]
+ UNSPEC_TLSGOTTPREL))]
+ "HAVE_AS_TLS"
+ " %0,%1@got@tprel@pcrel"
+ [(set_attr "prefixed" "yes")])
+
;; "b" output constraint here and on tls_tls input to support linker tls
;; optimization. The linker may edit the instructions emitted by a
;; tls_got_tprel/tls_tls pair to addis,addi.
@@ -9722,6 +9757,14 @@
"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"
" %0,%2@got@tprel@l(%1)")
+(define_insn "tls_tls_pcrel_"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")
+ (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+ UNSPEC_TLSTLS_PCREL))]
+ "TARGET_ELF && HAVE_AS_TLS"
+ "add %0,%1,%2@tls@pcrel")
+
(define_insn "tls_tls_"
[(set (match_operand:P 0 "gpc_reg_operand" "=r")
(unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
--
Alan Modra
Australia Development Lab, IBM
On Thu, Aug 15, 2019 at 01:24:07PM -0500, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Aug 15, 2019 at 01:35:10PM +0930, Alan Modra wrote:
> > Supporting TLS for -mpcrel turns out to be relatively simple, in part
> > due to deciding that !TARGET_TLS_MARKERS with -mpcrel is sil
2")
- (const_string "8"])
+ (const_string "8")))])
(define_insn "*call_value_indirect_pcrel"
[(set (match_operand 0 "" "")
@@ -10697,23 +10656,14 @@ (define_insn "*call_value_indirect_pcrel"
(clobber (reg:P LR_REGNO))]
"rs6000_pcrel_p (cfun)"
{
- if (IS_NOMARK_TLSGETADDR (operands[2]))
-rs6000_output_tlsargs (operands);
-
return rs6000_indirect_call_template (operands, 1);
}
[(set_attr "type" "jmpreg")
(set (attr "length")
- (plus
- (if_then_else (match_test "IS_NOMARK_TLSGETADDR (operands[2])")
- (if_then_else (match_test "TARGET_CMODEL != CMODEL_SMALL")
- (const_int 8)
- (const_int 4))
- (const_int 0))
- (if_then_else (and (match_test "!rs6000_speculate_indirect_jumps")
-(match_test "which_alternative != 1"))
+ (if_then_else (and (match_test "!rs6000_speculate_indirect_jumps")
+ (match_test "which_alternative != 1"))
(const_string "8")
- (const_string "4"])
+ (const_string "4")))])
;; Call subroutine returning any type.
(define_expand "untyped_call"
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 1b69507cfa8..29803b753eb 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -246,10 +246,6 @@ mavoid-indexed-addresses
Target Report Var(TARGET_AVOID_XFORM) Init(-1) Save
Avoid generation of indexed load/store instructions when possible.
-mtls-markers
-Target Report Var(tls_markers) Init(1) Save
-Mark __tls_get_addr calls with argument info.
-
msched-epilog
Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) Save
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index df6fefd72b9..feeda9fcc0e 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4354,7 +4354,7 @@ The OpenRISC 1000 32-bit processor with delay slots.
You can specify a default version for the @option{-mcpu=@var{cpu_type}}
switch by using the configure option @option{--with-cpu-@var{cpu_type}}.
-You will need GNU binutils 2.15 or newer.
+You will need GNU binutils 2.20 or newer.
@html
--
Alan Modra
Australia Development Lab, IBM
; time. At the end, we could raise the costs for all targets to 8 to
> effectively revert to the previous state.
>
> [1] https://gcc.gnu.org/ml/gcc-patches/2019-08/msg02009.html
Those SPEC regressions sound similar to what I saw when trying to give
proper costing to moves between general regs and vsx regs on Power9.
rs6000.c:rs6000_ira_change_pseudo_allocno_class is the hack I used to
work around bad register allocation decisions due to poor register
pressure calculation.
--
Alan Modra
Australia Development Lab, IBM
example, when loading a TImode mem to
gprs you will load at offset+0 and offset+8 when powerpc64, and
offset+0, offset+4, offset+8, and offset+12 when powerpc32.
--
Alan Modra
Australia Development Lab, IBM
useful with
TARGET_COMPUTE_PRESSURE_CLASSES (and possibly SCHED_PRESSURE_MODEL
too).
--
Alan Modra
Australia Development Lab, IBM
src/std/math.d:242:5: error: static assert
"Only 64-bit, 80-bit, and 128-bit reals are supported for LittleEndian CPUs"
242 | static assert(real.mant_dig == 53 || real.mant_dig == 64
| ^
--
Alan Modra
Australia Development Lab, IBM
the new
sequences and relocs to support -mlongcall. This allows lazy dynamic
resolution of the plt entries so it is now possible to dlopen
libraries and have -mlongcall code call functions in those libraries.
That wasn't possible before. See
https://bugzilla.redhat.com/show_bug.cgi?id=1633721
l_nonlocal_sysv"
/* Can use CR0 since it is volatile across sibcalls. */
return "crset 2\;beq%T0-\;b $";
}
- else if (DEFAULT_ABI == ABI_V4 && flag_pic)
-{
- gcc_assert (!TARGET_SECURE_PLT);
- return "b %z0@plt";
-}
else
-return "b %z0";
+return rs6000_output_call (operands, 0, true, "");
}
[(set_attr "type" "branch")
(set_attr_alternative "length"
@@ -11109,13 +11067,8 @@ (define_insn "*sibcall_value_nonlocal_sysv"
/* Can use CR0 since it is volatile across sibcalls. */
return "crset 2\;beq%T1-\;b $";
}
- else if (DEFAULT_ABI == ABI_V4 && flag_pic)
-{
- gcc_assert (!TARGET_SECURE_PLT);
- return "b %z1@plt";
-}
else
-return "b %z1";
+return rs6000_output_call (operands, 1, true, "");
}
[(set_attr "type" "branch")
(set_attr_alternative "length"
@@ -11137,9 +11090,12 @@ (define_insn "*sibcall_aix"
(match_operand 1 "" "g,g"))
(simple_return)]
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
- "@
- b %z0
- b%T0"
+{
+ if (which_alternative == 0)
+return rs6000_output_call (operands, 0, true, "");
+ else
+return "b%T0";
+}
[(set_attr "type" "branch")])
(define_insn "*sibcall_value_aix"
@@ -11148,9 +11104,12 @@ (define_insn "*sibcall_value_aix"
(match_operand 2 "" "g,g")))
(simple_return)]
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
- "@
- b %z1
- b%T1"
+{
+ if (which_alternative == 0)
+return rs6000_output_call (operands, 1, true, "");
+ else
+return "b%T1";
+}
[(set_attr "type" "branch")])
(define_expand "sibcall_epilogue"
--
Alan Modra
Australia Development Lab, IBM
- "DEFAULT_ABI == ABI_ELFv2 && rs6000_speculate_indirect_jumps"
- "b%T1l\; 2,%3(1)"
- [(set_attr "type" "jmpreg")
- (set_attr "length" "8")])
-
-; Variant with deliberate misprediction.
-(define_insn "*call_value_indirect_elfv2_nospec"
- [(set (match_operand 0 "" "")
- (call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))
- (match_operand 2 "" "g,g")))
- (set (reg:P TOC_REGNUM) (unspec:P [(match_operand:P 3 "const_int_operand"
"n,n")] UNSPEC_TOCSLOT))
- (clobber (reg:P LR_REGNO))]
- "DEFAULT_ABI == ABI_ELFv2 && !rs6000_speculate_indirect_jumps"
- "crset 2\;beq%T1l-\; 2,%3(1)"
+ "DEFAULT_ABI == ABI_ELFv2"
+{
+ return rs6000_output_indirect_call (operands, 1, false);
+}
[(set_attr "type" "jmpreg")
- (set_attr "length" "12")])
+ (set (attr "length")
+ (if_then_else (and (match_test "!rs6000_speculate_indirect_jumps")
+ (match_test "which_alternative != 1"))
+ (const_string "12")
+ (const_string "8")))])
;; Call subroutine returning any type.
(define_expand "untyped_call"
@@ -11020,13 +10990,7 @@ (define_insn "*sibcall_nonlocal_sysv"
output_asm_insn ("creqv 6,6,6", operands);
if (which_alternative >= 2)
-{
- if (rs6000_speculate_indirect_jumps)
- return "b%T0";
- else
- /* Can use CR0 since it is volatile across sibcalls. */
- return "crset 2\;beq%T0-\;b $";
-}
+return rs6000_output_indirect_call (operands, 0, true);
else
return rs6000_output_call (operands, 0, true, "");
}
--
Alan Modra
Australia Development Lab, IBM
UNSPEC_TLSTPRELHA))]
+(define_insn "tls_tprel_ha_"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")
+ (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+ UNSPEC_TLSTPRELHA))]
"HAVE_AS_TLS"
"addis %0,%1,%2@tprel@ha")
-(define_insn "tls_tprel_lo_"
- [(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")
- (unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")
-(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]
- UNSPEC_TLSTPRELLO))]
+(define_insn "tls_tprel_lo_"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")
+ (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+ UNSPEC_TLSTPRELLO))]
"HAVE_AS_TLS"
"addi %0,%1,%2@tprel@l")
;; "b" output constraint here and on tls_tls input to support linker tls
;; optimization. The linker may edit the instructions emitted by a
;; tls_got_tprel/tls_tls pair to addis,addi.
-(define_insn_and_split "tls_got_tprel_"
- [(set (match_operand:TLSmode 0 "gpc_reg_operand" "=b")
- (unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")
-(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]
- UNSPEC_TLSGOTTPREL))]
+(define_insn_and_split "tls_got_tprel_"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=b")
+ (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+ UNSPEC_TLSGOTTPREL))]
"HAVE_AS_TLS"
- "l %0,%2@got@tprel(%1)"
+ "l %0,%2@got@tprel(%1)"
"&& TARGET_CMODEL != CMODEL_SMALL"
[(set (match_dup 3)
- (high:TLSmode
- (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))
+ (high:P
+ (unspec:P [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))
(set (match_dup 0)
- (lo_sum:TLSmode (match_dup 3)
- (unspec:TLSmode [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))]
+ (lo_sum:P (match_dup 3)
+ (unspec:P [(match_dup 1) (match_dup 2)] UNSPEC_TLSGOTTPREL)))]
{
operands[3] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);
}
[(set (attr "length")
(if_then_else (ne (symbol_ref "TARGET_CMODEL") (symbol_ref
"CMODEL_SMALL"))
- (const_int 8)
- (const_int 4)))])
-
-(define_insn "*tls_got_tprel_high"
- [(set (match_operand:TLSmode 0 "gpc_reg_operand" "=b")
- (high:TLSmode
- (unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")
- (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]
- UNSPEC_TLSGOTTPREL)))]
+ (const_int 8)
+ (const_int 4)))])
+
+(define_insn "*tls_got_tprel_high"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=b")
+ (high:P
+ (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+UNSPEC_TLSGOTTPREL)))]
"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"
"addis %0,%1,%2@got@tprel@ha")
-(define_insn "*tls_got_tprel_low"
- [(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")
- (lo_sum:TLSmode (match_operand:TLSmode 1 "gpc_reg_operand" "b")
-(unspec:TLSmode [(match_operand:TLSmode 3 "gpc_reg_operand" "b")
- (match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]
-UNSPEC_TLSGOTTPREL)))]
+(define_insn "*tls_got_tprel_low"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")
+ (lo_sum:P (match_operand:P 1 "gpc_reg_operand" "b")
+(unspec:P [(match_operand:P 3 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+ UNSPEC_TLSGOTTPREL)))]
"HAVE_AS_TLS && TARGET_CMODEL != CMODEL_SMALL"
- "l %0,%2@got@tprel@l(%1)")
+ "l %0,%2@got@tprel@l(%1)")
-(define_insn "tls_tls_"
- [(set (match_operand:TLSmode 0 "gpc_reg_operand" "=r")
- (unspec:TLSmode [(match_operand:TLSmode 1 "gpc_reg_operand" "b")
-(match_operand:TLSmode 2 "rs6000_tls_symbol_ref" "")]
- UNSPEC_TLSTLS))]
+(define_insn "tls_tls_"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=r")
+ (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
+ (match_operand:P 2 "rs6000_tls_symbol_ref" "")]
+ UNSPEC_TLSTLS))]
"TARGET_ELF && HAVE_AS_TLS"
"add %0,%1,%2@tls")
--
Alan Modra
Australia Development Lab, IBM
ix"
(define_insn "*call_indirect_elfv2"
[(call (mem:SI (match_operand:P 0 "register_operand" "c,*l"))
-(match_operand 1 "" "g,g"))
+(match_operand 1))
(set (reg:P TOC_REGNUM) (unspec:P [(match_operand:P 2 "const_int_operand"
"n,n")] UNSPEC_TOCSLOT))
(clobber (reg:P LR_REGNO))]
"DEFAULT_ABI == ABI_ELFv2"
@@ -10808,7 +10808,7 @@ (define_insn "*call_indirect_elfv2"
(define_insn "*call_value_indirect_elfv2"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:P 1 "register_operand" "c,*l"))
- (match_operand 2 "" "g,g")))
+ (match_operand 2)))
(set (reg:P TOC_REGNUM) (unspec:P [(match_operand:P 3 "const_int_operand"
"n,n")] UNSPEC_TOCSLOT))
(clobber (reg:P LR_REGNO))]
"DEFAULT_ABI == ABI_ELFv2"
@@ -10901,7 +10901,7 @@ (define_expand "sibcall_value"
(define_insn "*sibcall_local32"
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
-(match_operand 1 "" "g,g"))
+(match_operand 1))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
(simple_return)]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
@@ -10919,7 +10919,7 @@ (define_insn "*sibcall_local32"
(define_insn "*sibcall_local64"
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
-(match_operand 1 "" "g,g"))
+(match_operand 1))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
(simple_return)]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
@@ -10938,7 +10938,7 @@ (define_insn "*sibcall_local64"
(define_insn "*sibcall_value_local32"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:SI 1 "current_file_function_operand"
"s,s"))
- (match_operand 2 "" "g,g")))
+ (match_operand 2)))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
(simple_return)]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
@@ -10957,7 +10957,7 @@ (define_insn "*sibcall_value_local32"
(define_insn "*sibcall_value_local64"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:DI 1 "current_file_function_operand"
"s,s"))
- (match_operand 2 "" "g,g")))
+ (match_operand 2)))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
(simple_return)]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
@@ -11050,7 +11050,7 @@ (define_insn "*sibcall_value_nonlocal_sysv"
(define_insn "*sibcall_aix"
[(call (mem:SI (match_operand:P 0 "call_operand" "s,c"))
-(match_operand 1 "" "g,g"))
+(match_operand 1))
(simple_return)]
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
{
@@ -11064,7 +11064,7 @@ (define_insn "*sibcall_aix"
(define_insn "*sibcall_value_aix"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:P 1 "call_operand" "s,c"))
- (match_operand 2 "" "g,g")))
+ (match_operand 2)))
(simple_return)]
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
{
--
Alan Modra
Australia Development Lab, IBM
] is the value FUNCTION_ARG returns for the VOID argument
;; which indicates how to set cr1
@@ -10572,7 +10438,7 @@ (define_insn_and_split "*call_nonlocal_sysv"
#if TARGET_MACHO
return macho_output_call(insn, operands, 0, 2);
#else
- return rs6000_output_call (operands, 0, false, "");
+ return rs6000_output_call (operands, 0, false);
#endif
}
"DEFAULT_ABI == ABI_V4
@@ -10605,7 +10471,7 @@ (define_insn "*call_nonlocal_sysv_secure"
else if (INTVAL (operands[2]) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn ("creqv 6,6,6", operands);
- return rs6000_output_call (operands, 0, false, "");
+ return rs6000_output_call (operands, 0, false);
}
[(set_attr "type" "branch,branch")
(set_attr "length" "4,8")])
@@ -10659,7 +10525,7 @@ (define_insn_and_split "*call_value_nonlocal_sysv"
#if TARGET_MACHO
return macho_output_call(insn, operands, 1, 3);
#else
- return rs6000_output_call (operands, 1, false, "");
+ return rs6000_output_call (operands, 1, false);
#endif
}
"DEFAULT_ABI == ABI_V4
@@ -10694,7 +10560,7 @@ (define_insn "*call_value_nonlocal_sysv_secure"
else if (INTVAL (operands[3]) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn ("creqv 6,6,6", operands);
- return rs6000_output_call (operands, 1, false, "");
+ return rs6000_output_call (operands, 1, false);
}
[(set_attr "type" "branch,branch")
(set_attr "length" "4,8")])
@@ -10728,7 +10594,7 @@ (define_insn "*call_nonlocal_aix"
(clobber (reg:P LR_REGNO))]
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
{
- return rs6000_output_call (operands, 0, false, "");
+ return rs6000_output_call (operands, 0, false);
}
[(set_attr "type" "branch")
(set_attr "length" "8")])
@@ -10740,7 +10606,7 @@ (define_insn "*call_value_nonlocal_aix"
(clobber (reg:P LR_REGNO))]
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
{
- return rs6000_output_call (operands, 1, false, "");
+ return rs6000_output_call (operands, 1, false);
}
[(set_attr "type" "branch")
(set_attr "length" "8")])
@@ -10991,7 +10857,7 @@ (define_insn "*sibcall_nonlocal_sysv"
if (which_alternative >= 2)
return rs6000_output_indirect_call (operands, 0, true);
else
-return rs6000_output_call (operands, 0, true, "");
+return rs6000_output_call (operands, 0, true);
}
[(set_attr "type" "branch")
(set_attr_alternative "length"
@@ -11031,7 +10897,7 @@ (define_insn "*sibcall_value_nonlocal_sysv"
return "crset 2\;beq%T1-\;b $";
}
else
-return rs6000_output_call (operands, 1, true, "");
+return rs6000_output_call (operands, 1, true);
}
[(set_attr "type" "branch")
(set_attr_alternative "length"
@@ -11055,7 +10921,7 @@ (define_insn "*sibcall_aix"
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
{
if (which_alternative == 0)
-return rs6000_output_call (operands, 0, true, "");
+return rs6000_output_call (operands, 0, true);
else
return "b%T0";
}
@@ -11069,7 +10935,7 @@ (define_insn "*sibcall_value_aix"
"DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2"
{
if (which_alternative == 0)
-return rs6000_output_call (operands, 1, true, "");
+return rs6000_output_call (operands, 1, true);
else
return "b%T1";
}
--
Alan Modra
Australia Development Lab, IBM
;)
- (const_int 0))
- (const_string "16")
- (const_string "8"))])])
+ (set_attr "length" "4,8")])
+
+(define_insn "*sibcall_value_indirect_nonlocal_sysv"
+ [(set (match_operand 0 "" "")
+ (call (mem:SI (match_operand:P 1 "indirect_call_operand" "c,*l,X"))
+ (match_operand 2)))
+ (use (match_operand:SI 3 "immediate_operand" "n,n,n"))
+ (simple_return)]
+ "DEFAULT_ABI == ABI_V4
+ || DEFAULT_ABI == ABI_DARWIN"
+{
+ if (INTVAL (operands[3]) & CALL_V4_SET_FP_ARGS)
+output_asm_insn ("crxor 6,6,6", operands);
+
+ else if (INTVAL (operands[3]) & CALL_V4_CLEAR_FP_ARGS)
+output_asm_insn ("creqv 6,6,6", operands);
+
+ return rs6000_output_indirect_call (operands, 1, true);
+}
+ [(set_attr "type" "jmpreg")
+ (set (attr "length")
+ (cond [(and (and (match_test "!rs6000_speculate_indirect_jumps")
+(match_test "which_alternative != 1"))
+ (match_test "(INTVAL (operands[3]) & (CALL_V4_SET_FP_ARGS |
CALL_V4_CLEAR_FP_ARGS))"))
+ (const_string "12")
+ (ior (and (match_test "!rs6000_speculate_indirect_jumps")
+(match_test "which_alternative != 1"))
+ (match_test "(INTVAL (operands[3]) & (CALL_V4_SET_FP_ARGS |
CALL_V4_CLEAR_FP_ARGS))"))
+ (const_string "8")]
+ (const_string "4")))])
(define_insn "*sibcall_value_nonlocal_sysv"
[(set (match_operand 0 "" "")
- (call (mem:SI (match_operand:P 1 "call_operand" "s,s,c,c"))
- (match_operand 2 "" "")))
- (use (match_operand:SI 3 "immediate_operand" "O,n,O,n"))
+ (call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
+ (match_operand 2)))
+ (use (match_operand:SI 3 "immediate_operand" "O,n"))
(simple_return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
@@ -10888,29 +10994,10 @@ (define_insn "*sibcall_value_nonlocal_sysv"
else if (INTVAL (operands[3]) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn ("creqv 6,6,6", operands);
- if (which_alternative >= 2)
-{
- if (rs6000_speculate_indirect_jumps)
- return "b%T1";
- else
- /* Can use CR0 since it is volatile across sibcalls. */
- return "crset 2\;beq%T1-\;b $";
-}
- else
-return rs6000_output_call (operands, 1, true);
+ return rs6000_output_call (operands, 1, true);
}
[(set_attr "type" "branch")
- (set_attr_alternative "length"
- [(const_string "4")
- (const_string "8")
- (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0))
- (const_string "12")
- (const_string "4"))
- (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0))
- (const_string "16")
- (const_string "8"))])])
+ (set_attr "length" "4,8")])
;; AIX ABI sibling call patterns.
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 59585912556..5b81faa95eb 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -4636,6 +4636,12 @@ LCF0:
[AC_DEFINE(HAVE_AS_ENTRY_MARKERS, 1,
[Define if your assembler supports the R_PPC64_ENTRY relocation.])])
+gcc_GAS_CHECK_FEATURE([plt sequence marker support],
+ gcc_cv_as_powerpc_pltseq_markers, [2,31,0],-a32 --fatal-warnings,
+ [ .reloc .,R_PPC_PLTSEQ; nop],,
+ [AC_DEFINE(HAVE_AS_PLTSEQ, 1,
+ [Define if your assembler supports R_PPC*_PLTSEQ relocations.])])
+
case $target in
*-*-aix*)
gcc_GAS_CHECK_FEATURE([AIX .ref support],
--
Alan Modra
Australia Development Lab, IBM
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