The r16-142-g01e5ef3e8b9128 chagned return type of _Str_sink::view()
to basic_string_view<_CharT>. The mutable access is provided by _M_span
function, that is now used for mingw path.
libstdc++-v3/ChangeLog:
* include/std/ostream (vprint_unicode) [_WIN32 && !__CYGWIN__]: Call
_Str
This is a response to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14940#c57
The patch was submitted to MSYS2 for testing in 2022-5. No issue reports have
been received so far:
*
https://github.com/msys2/MINGW-packages/blob/455762a45250642b90e9ff34020d001c1be09015/mingw-w64-gcc/0021-PR14940-Al
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the Swedish team of translators. The file is available at:
https://translationproject.org/latest/gcc/sv.po
(This file, 'gcc-15.1.0.sv.po', has ju
On Fri, Mar 28, 2025 at 12:20:18PM +0100, Jakub Jelinek wrote:
> Here is the incremental patch I was talking about.
> For noop sets, we don't need to test much, they can go to i2
> unless that would violate i3 JUMP condition.
>
> With this the try_combine on the pr119291.c testcase doesn't fail,
>
On Fri, Apr 25, 2025 at 09:12:45PM -0700, Andrew Pinski wrote:
> --- a/gcc/tree-tailcall.cc
> +++ b/gcc/tree-tailcall.cc
> @@ -1083,57 +1083,74 @@ find_tail_calls (basic_block bb, struct tailcall
> **ret, bool only_musttail,
> {
>bool ok = false;
>value_range val;
> - tre
Make sense to me, it looks like the combine will always take place if GR2VR
is 0, 1 or 2 for now.
I am try to customize the cost here to make it fail to combine but get failed
with below change.
+ if (rcode == VEC_DUPLICATE && SCALAR_INT_MODE_P (GET_MODE (XEXP (x, 0 {
+cost_val = 1;
+
The following rewords the documentation for -Og which over-promises
the ability to debug the generated code. While -Og enables
var-tracking and thus improves debugging in some areas the experience
is usually worse than -O0 for standard C code.
Any other comments/clarifications? OK?
Thanks,
Rich
Hi All,
The following testcase shows an incorrect masked codegen:
#define N 512
#define START 1
#define END 505
int x[N] __attribute__((aligned(32)));
int __attribute__((noipa))
foo (void)
{
int z = 0;
for (unsigned int i = START; i < END; ++i)
{
z++;
if (x[i] > 0)
Hi All,
When the input is already a subreg and we try to make a paradoxical
subreg out of it for copysign this can fail if it violates the subreg
relationship.
Use force_lowpart_subreg instead of lowpart_subreg to then force the
results to a register instead of ICEing.
Bootstrapped Regtested on
Hi Jeevitha,
Looks like Peter's review comments have not been incorporated.
Please update the patch and, as Peter suggested, send the next version of the
patch as it's own email thread.
Regards,
Surya
On 03/04/25 8:17 pm, jeevitha wrote:
>
> Ping!
>
> please review.
>
> Thanks & Regards
> Jee
On Sun, Apr 27, 2025 at 12:49 AM Andrew Pinski wrote:
>
> This adds support for rotate left/right to the GIMPLE front-end
> via __ROTATE_LEFT/__ROTATE_RIGHT oeprators.
OK.
> PR c/119432
> gcc/c/ChangeLog:
>
> * gimple-parser.cc (gimple_binary_identifier_code): Add
> __ROT
On Sun, Apr 27, 2025 at 12:51 AM Andrew Pinski wrote:
>
> While looking into adding __ROTATE_LEFT and __ROTATE_RIGHT, I noticed
> this code is just a bunch of if statments repeated. Instead we could just
> use a simple lookup array to do the same thinga and it would be easier to
> add to the array
Tamar Christina writes:
>> -Original Message-
>> From: Richard Sandiford
>> Sent: Friday, April 25, 2025 6:55 PM
>> To: Jennifer Schmitz
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH] AArch64: Fold LD1/ST1 with ptrue to LDR/STR for 128-bit
>> VLS
>>
>> Jennifer Schmitz writes:
On Fri, Apr 25, 2025 at 3:06 PM Andi Kleen wrote:
>
> On 2025-04-23 10:18, Richard Biener wrote:
> > On Tue, Apr 22, 2025 at 5:43 PM Andi Kleen wrote:
> >>
> >> On 2025-04-22 13:22, Richard Biener wrote:
> >> > On Sat, Apr 12, 2025 at 5:09 PM Andi Kleen wrote:
> >> >>
> >> >> From: Andi Kleen
>
On Sat, Apr 26, 2025 at 2:42 AM Pengxuan Zheng wrote:
>
> Certain permute that blends a vector with zero can be interpreted as an AND
> of a
> mask. This idea was suggested by Richard Sandiford when he was reviewing my
> patch which tries to optimizes certain vector permute with the FMOV
> instr
On Sun, Apr 27, 2025 at 10:20 PM Andrew Pinski wrote:
>
> On Sat, Apr 5, 2025 at 4:56 AM Andrew Pinski wrote:
> >
> > After EVRP was switched to the ranger (r12-2305-g398572c1544d8b), we are
> > better handling the case
> > where __builtin_unreachable comes after a loop. Instead of removing
> >
On Fri, Apr 25, 2025 at 9:47 PM Jonathan Wakely wrote:
> This will hardly make a dent in the very slow compile times for
> but it seems worth doing anyway.
>
> libstdc++-v3/ChangeLog:
>
> * include/bits/regex_compiler.h (_AnyMatcher::operator()):
> Replace tag dispatching with 'i
On Sun, Apr 27, 2025 at 1:07 AM Andrew Pinski wrote:
>
> When we have an empty function, things can go wrong with
> cfi_startproc/cfi_endproc and a few other
> things like exceptions. So if the only thing the function does is a call to
> __builtin_unreachable,
> let's expand that to a __builtin_
On Mon, Apr 28, 2025 at 5:31 AM liuhongt wrote:
>
> From: "hongtao.liu"
>
> For BB with all debug_stmt, it will be ignored by afdo_set_bb_count,
> but it can be set with count of single successors PHIs which edge from
> the BB.(only nonzero count is annotatted).
>
> Tested with -march=x86-64-v3 -
On Tue, Apr 22, 2025 at 10:01 AM Hongtao Liu wrote:
>
> On Mon, Apr 21, 2025 at 4:30 PM H.J. Lu wrote:
> >
> > On Mon, Apr 21, 2025 at 11:29 AM Hongtao Liu wrote:
> > >
> > > On Sat, Apr 19, 2025 at 1:25 PM H.J. Lu wrote:
> > > >
> > > > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote:
> > > > >
On Fri, Apr 25, 2025 at 1:57 AM Andrew Pinski wrote:
>
> While working on PR 119903, I noticed that there is code in
> replace_stmt_with_simplification
> which makes sure that the comparison of a GIMPLE_COND does not throw
> (non-call exceptions and trapping math) but the gimple verifier does not
On Mon, 28 Apr 2025, 08:05 Tomasz Kamiński, wrote:
> The r16-142-g01e5ef3e8b9128 chagned return type of _Str_sink::view()
> to basic_string_view<_CharT>. The mutable access is provided by _M_span
> function, that is now used for mingw path.
>
I can test that later for mingw-w64, or the reporter
On 4/27/25 5:57 PM, Owen Avery wrote:
This patch should make it easier to selectively disable
-Wvirtual-move-assign errors by adding an attribute
for move assignment operators which marks them as handling
duplicate calls.
Thanks, but this sort of situation seems like a good fit for
#pragma GCC
> On Apr 28, 2025, at 06:49, Richard Biener wrote:
>
> On Wed, Apr 23, 2025 at 6:09 PM Qing Zhao wrote:
>>
>> Richard,
>>
>> Thanks a lot for the hint.
>>
>>> On Apr 23, 2025, at 04:17, Richard Biener
>>> wrote:
>>>
I have met the following issue when I tried to implement the follow
On x86, both stores with 32-bit immediate and register are supported:
0: 48 c7 40 10 00 00 00 00 movq $0x0,0x10(%rax)
8: 48 89 50 10 movq %rdx,0x10(%rax)
But store with 32-bit immediate is 4 byte longer.
Add UNSPEC_STORE_BY_PIECES to x86 backend for register store to avoid
sto
On Fri, Jan 31, 2025 at 1:43 PM Richard Biener wrote:
>
> The following improves genmatch generated code so we avoid more
> spurious SSA assignments to be pushed to the GIMPLE sequence or
> simplifications rejected when we're not supposed to produce any
> for outer and intermediate conversions.
>
native_decode_rtx handles integer modes by building up a wide_int
and then converting it to an rtx. This patch splits out the
wide_int part, so that callers who don't want an rtx can avoid
creating garbage rtl.
Bootstrapped & regression-tested on aarch64-linux-gnu. OK to install?
Richard
gcc/
Pengxuan Zheng writes:
> We can optimize AND with certain vector of immediates as FMOV if the result of
> the AND is as if the upper lane of the input vector is set to zero and the
> lower
> lane remains unchanged.
>
> For example, at present:
>
> v4hi
> f_v4hi (v4hi x)
> {
> return x & (v4hi){
On Wed, Mar 5, 2025 at 12:50 PM Richard Biener wrote:
>
> On Tue, 4 Mar 2025, Richard Sandiford wrote:
>
> > Richard Biener writes:
> > > When vectorizing a shift of u16 data by an amount that's known to
> > > be less than 16 we currently fail to emit a vector u16 shift. The
> > > first reason i
On Mon, Apr 28, 2025 at 2:04 AM H.J. Lu wrote:
>
> On Wed, Apr 23, 2025 at 1:56 PM Uros Bizjak wrote:
>
> > +static void
> > +ix86_find_all_reg_uses_1 (HARD_REG_SET ®set,
> > + rtx set, unsigned int regno,
> > + auto_bitmap &worklist)
> > +{
> > + rtx dest = SET_DEST (set);
> > +
> > + if (!R
On Mon, 28 Apr 2025, Richard Biener wrote:
> The following rewords the documentation for -Og which over-promises
> the ability to debug the generated code. While -Og enables
> var-tracking and thus improves debugging in some areas the experience
> is usually worse than -O0 for standard C code.
>
Richard Biener writes:
> On Sat, Apr 26, 2025 at 2:42 AM Pengxuan Zheng
> wrote:
>>
>> Certain permute that blends a vector with zero can be interpreted as an AND
>> of a
>> mask. This idea was suggested by Richard Sandiford when he was reviewing my
>> patch which tries to optimizes certain vec
The below adds additional verification to fld_type_variant that
there's only one variant matching fld_type_variant_equal_p on the
chain. The PR shows that variants built with build_qualified_type
can be equal to others in that regard but not with regard to
what build_qualified_type does.
Bootstra
Predictive commoning fails to preserve alias info for the refs it
creates. The following adds this to see whether it fixes the
observed regression in 436.cactusADM after r15-7665.
Bootstrapped and tested on x86_64-unknown-linux-gnu, will push later.
PR tree-optimization/119044
*
> On 27 Apr 2025, at 08:42, Tamar Christina wrote:
>
> External email: Use caution opening links or attachments
>
>
>> -Original Message-
>> From: Richard Sandiford
>> Sent: Friday, April 25, 2025 4:45 PM
>> To: Jennifer Schmitz
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH]
This patch transforms RTL expressions of the form (subreg (not X)) into
(not (subreg X)) if the subreg is an operand of another binary logical
operation. This transformation can expose opportunities to combine more
logical operations.
For example, it improves the codegen of the following AArch64 N
Thanks Richard for all review comments. I have addressed the comments and sent
a v2 patch in a new email thread.
--
Thanks,
Pengfei
> On 28 Apr 2025, at 09:59, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Tamar Christina writes:
>>> -Original Message-
>>> From: Richard Sandiford
>>> Sent: Friday, April 25, 2025 6:55 PM
>>> To: Jennifer Schmitz
>>> Cc: gcc-patches@g
On Wed, Apr 23, 2025 at 6:09 PM Qing Zhao wrote:
>
> Richard,
>
> Thanks a lot for the hint.
>
> > On Apr 23, 2025, at 04:17, Richard Biener
> > wrote:
> >
> >> I have met the following issue when I tried to implement the following
> >> into tree-object-size.cc:
> >> (And this took me quite som
On Mon, Apr 28, 2025 at 11:43 AM liuhongt wrote:
>
> From: "hongtao.liu"
>
> > I think the comment is a bit off, it should be "For an empty BB ..." since
> > we should not change behavior on whether there are debug stmts or not.
> Changed.
>
> For an empty BB with all debug_stmt, it will be ignor
This patch implements the folding of a vector addition followed by a
logical shift right by 1 (add + lsr #1) on AArch64 into an unsigned
halving add, allowing GCC to emit NEON or SVE2 UHADD instructions.
For example, this patch helps improve the codegen from:
add v0.4s, v0.4s, v31.4s
On Mon, 28 Apr 2025 at 09:19, Tomasz Kaminski wrote:
>
>
>
> On Fri, Apr 25, 2025 at 9:47 PM Jonathan Wakely wrote:
>>
>> This will hardly make a dent in the very slow compile times for
>> but it seems worth doing anyway.
>>
>> libstdc++-v3/ChangeLog:
>>
>> * include/bits/regex_compiler.
On Thu, Apr 24, 2025 at 12:06:52PM -0400, Jason Merrill wrote:
> On 4/22/25 4:48 PM, Jason Merrill wrote:
> > On 4/22/25 1:21 PM, Tobias Burnus wrote:
> > > Jason Merrill wrote:
> > > > On 4/22/25 11:04 AM, Tobias Burnus wrote:
> > > > > The question is why does this code trigger at all, given
> >
Status
==
The GCC 14 branch is open for regression and documentation fixes. We
are planning for the GCC 14.3 release on May 22th which means scheduling
a release candidate on May 15th in about two weeks from now.
Please work through your assigned bugs and regression fixes and
backport fixes
HTEC Proprietary
Hi,
>>> From 16b3207aed5e4846fde4f3ffa1253c65ef6ba056 Mon Sep 17 00:00:00 2001
>>> From: Aleksandar Rakic
>>> Date: Wed, 23 Apr 2025 14:14:17 +0200
>>> Subject: [PATCH] Make MSA and microMIPS R5 unsupported
>>>
>>> There are no platforms nor simulators for MSA and microMIPS R5 s
Status
==
The gcc-13 branch is open for regression and documentation fixes.
It's time to plan for the GCC 13.4 release following the planned
GCC 14.3 release. The plan is to do a release candidate for GCC 13.4
on Thursday, May 29th, one week after the GCC 14.3 release followed
by the relase
Hi,
as described in PR 119852, the output of -fdump-ipa-clones can contain
"(null)" as the suffix/reason for cloning when we need to create a
clone to hold the original function during recursive inlining. Such
clone is never output and so should not be part of the dump output
either.
Bootstrappe
Hi,
I have noticed that the option -fdump-ipa-clones is not documented
although there are users who depend on it. This patch adds the
missing documentation along with the description of the information it
dumps and the format it uses.
I am never quite sure which of the texinfo mark-ups is the mo
Hi,
I noticed that the name of the fifth parameter of
cgraph_node::create_version_clone_with_body is different in the class
definition in cgraph.h and in the actual member function definition in
cgraphclones.cc. The former (clone_name) is misleading and so this
patch changes it to the latter (suf
Hi
in PR 119852 we agreed that since the NULL-ness of the suffix
parameter should prevent creation of a record in the ipa-clones
dump (which is implemented by a previous patch), it should not default
to NULL.
Bootstrapped and tested on x86_64-linux. OK for master?
Thanks,
Martin
gcc/ChangeL
Jennifer Schmitz writes:
>> On 27 Apr 2025, at 08:42, Tamar Christina wrote:
>>
>> External email: Use caution opening links or attachments
>>
>>
>>> -Original Message-
>>> From: Richard Sandiford
>>> Sent: Friday, April 25, 2025 4:45 PM
>>> To: Jennifer Schmitz
>>> Cc: gcc-patches@g
On Mon, 28 Apr 2025 at 14:59, Patrick Palka wrote:
>
> Tested on x86_64-pc-linux-gnu, does this look OK for trunk/15?
>
> -- >8 --
>
> These std::erase_if overloads were wrongly implemented as hidden
> friends, visible only via ADL, so erase_if(x) would work but not
> std::erase_if(x).
Would it b
Hi,
starting with GCC 15 the order is not unique for any symtab_nodes but
m_uid is, I believe we ought to dump the latter in the ipa-clones dump,
if only so that people can reliably match entries about new clones to
those about removed nodes (if any).
Bootstrapped and tested on x86_64-linux. OK f
From: "hongtao.liu"
> I think the comment is a bit off, it should be "For an empty BB ..." since
> we should not change behavior on whether there are debug stmts or not.
Changed.
For an empty BB with all debug_stmt, it will be ignored by
afdo_set_bb_count, but it can be set with count of single
On Sun, Apr 27, 2025 at 11:56:21AM +0200, Josef Melcr wrote:
> * builtin-attrs.def (0): New int list.
This is just weird. Write
* builtin-attrs.def: Add DEF_LIST_INT_INT (0,2).
?
> +DEF_CALLBACK_ATTRIBUTE(GOMP, 1, 0)
> +DEF_CALLBACK_ATTRIBUTE(GOMP, 1, 2)
> +DEF_CALLBACK_ATTRIBUTE(O
On Mon, Apr 28, 2025 at 4:26 PM H.J. Lu wrote:
>
> > > This is what my patch does:
> > But it iterates through vector_insns, using a def-ref chain to find
> > those insns. I think we can just record those single_set with src as
> > const_m1/zero, and replace src for them.
>
> Will fix it.
Fixed
On Thu, Apr 10, 2025 at 4:09 PM Richard Biener wrote:
>
> The following removes the ability to switch back to non SLP-only
> operation of the vectorizer - a requirement to start cleaning out
> non-SLP paths without risk of regressing that case.
I have pushed this series now.
Richard.
>
On Thu, 3 Apr 2025 at 13:58, Rasmus Villemoes wrote:
>
> In many setups, especially when CI and/or some meta-build system like
> Yocto or buildroot, is involved, gcc ends up being invoked using
> absolute path names, which are often long and uninteresting.
>
> That amounts to a lot of noise both w
On Tue, Feb 18, 2025 at 1:44 PM Richard Biener wrote:
>
> The following changes how flag_complex_method is managed towards
> being able to record that in the optimization set so we can stream
> and restore it per function. Currently -fcx-fortran-rules and
> -fcx-limited-range are separate recorde
On Sat, Dec 14, 2024 at 9:22 PM Jeff Law wrote:
>
>
>
> On 12/3/24 10:07 AM, Richard Biener wrote:
> > Turns out SLP discovery can end up doing a lot of vector type
> > builds from scalar types. Those are all ultimatively cached but
> > end up built and layouted first. The latter is particularly
On Mon, 28 Apr 2025, Alexander Monakov wrote:
>
> On Mon, 28 Apr 2025, Richard Biener wrote:
>
> > The following rewords the documentation for -Og which over-promises
> > the ability to debug the generated code. While -Og enables
> > var-tracking and thus improves debugging in some areas the ex
From: Pan Li
This patch will add testcase for unsigned integer SAT_ADD form 7:
#define DEF_VEC_SAT_U_ADD_FMT_9(WT, T) \
void __attribute__((noinline)) \
vec_sat_u_add_##WT##_##T##_fmt_9 (T *out, T *op_1, T *o
From: Pan Li
This patch would like to support the form 7 of the unsigned
integer SAT_ADD, aka below example.
#define DEF_SAT_U_ADD_FMT_7(WT, T) \
T __attribute__((noinline))\
sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
{ \
T max = -1;
Kyrylo Tkachov writes:
>> On 25 Apr 2025, at 19:55, Richard Sandiford
>> wrote:
>>
>> Jennifer Schmitz writes:
>>> If -msve-vector-bits=128, SVE loads and stores (LD1 and ST1) with a
>>> ptrue predicate can be replaced by neon instructions (LDR and STR),
>>> thus avoiding the predicate altoget
From: Pan Li
This patch serices would like to support form 7 of the unsigned integer
SAT_ADD. Different to another forms of SAT_ADD, the form 7 will
leverage a wider type to tell overflow or not, aka:
#define DEF_SAT_U_ADD_FMT_7(WT, T) \
T __attribute__((noinline))\
sat_u_
From: Pan Li
This patch will add testcase for unsigned integer SAT_ADD form 7:
#define DEF_SAT_U_ADD_FMT_7(WT, T) \
T __attribute__((noinline))\
sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
{ \
T max = -1; \
On Mon, Apr 28, 2025 at 2:38 PM Richard Sandiford
wrote:
>
> native_decode_rtx handles integer modes by building up a wide_int
> and then converting it to an rtx. This patch splits out the
> wide_int part, so that callers who don't want an rtx can avoid
> creating garbage rtl.
>
> Bootstrapped &
> On 25 Apr 2025, at 19:55, Richard Sandiford wrote:
>
> Jennifer Schmitz writes:
>> If -msve-vector-bits=128, SVE loads and stores (LD1 and ST1) with a
>> ptrue predicate can be replaced by neon instructions (LDR and STR),
>> thus avoiding the predicate altogether. This also enables formation
For global initializers with IPA PTA we initialize them from the
IPA reference data but that lacks references to the constant pool.
The following conservatively considers the whole initializer.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
Richard.
PR ipa/119973
*
For floating point, !flag_trapping_math is needed for the pattern which
transforms 2 conversions to 1 conversion, and may lose 1 potential trap.
There shouldn't be any accuracy issue.
It also handles real_cst if it can be represented in different floating point
types without loss of precision.
Bo
On Mon, Apr 28, 2025 at 2:56 PM Qing Zhao wrote:
>
>
>
> > On Apr 28, 2025, at 06:49, Richard Biener
> > wrote:
> >
> > On Wed, Apr 23, 2025 at 6:09 PM Qing Zhao wrote:
> >>
> >> Richard,
> >>
> >> Thanks a lot for the hint.
> >>
> >>> On Apr 23, 2025, at 04:17, Richard Biener
> >>> wrote:
>
> -Original Message-
> From: Jennifer Schmitz
> Sent: Monday, April 28, 2025 11:40 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Sandiford ; Tamar Christina
>
> Subject: Re: [PATCH] aarch64: Optimize SVE extract last to Neon lane extract
> for
> 128-bit VLS.
>
>
>
> > On 27 Apr 202
> On Apr 28, 2025, at 09:40, Richard Biener wrote:
>
> On Mon, Apr 28, 2025 at 2:56 PM Qing Zhao wrote:
>>
>>
>>
>>> On Apr 28, 2025, at 06:49, Richard Biener
>>> wrote:
>>>
>>> On Wed, Apr 23, 2025 at 6:09 PM Qing Zhao wrote:
Richard,
Thanks a lot for the hint.
>>
Tested on x86_64-pc-linux-gnu, does this look OK for trunk/15?
-- >8 --
These std::erase_if overloads were wrongly implemented as hidden
friends, visible only via ADL, so erase_if(x) would work but not
std::erase_if(x).
PR libstdc++/119427
libstdc++-v3/ChangeLog:
* include/std/
From: Owen Avery
gcc/testsuite/ChangeLog:
* rust/compile/derive-debug1.rs: Adjust a path.
* rust/compile/nr2/exclude: Remove derive-debug1.rs.
Signed-off-by: Owen Avery
---
gcc/testsuite/rust/compile/derive-debug1.rs | 2 +-
gcc/testsuite/rust/compile/nr2/exclude | 1 -
2
From: Owen Avery
gcc/rust/ChangeLog:
* resolve/rust-forever-stack.hxx
(ForeverStack::resolve_path): Pass instance of Node to lambda by
reference instead of by value.
Signed-off-by: Owen Avery
---
gcc/rust/resolve/rust-forever-stack.hxx | 2 +-
1 file changed, 1 inserti
From: Pierre-Emmanuel Patry
This commit introduce a new public function to visit function parameters
in the default visitor. It allows visitors derived from DefaultVisitor
to override only a small part of the default visitor.
gcc/rust/ChangeLog:
* ast/rust-ast-visitor.cc (DefaultASTVisi
On Mon, 28 Apr 2025 at 16:22, Patrick Palka wrote:
>
> On Mon, 28 Apr 2025, Jonathan Wakely wrote:
>
> > On Mon, 28 Apr 2025 at 14:59, Patrick Palka wrote:
> > >
> > > Tested on x86_64-pc-linux-gnu, does this look OK for trunk/15?
> > >
> > > -- >8 --
> > >
> > > These std::erase_if overloads wer
From: Owen Avery
Fixes PR#119641
gcc/rust/ChangeLog:
* checks/errors/borrowck/rust-bir-place.h
(IndexVec::size_type): Add.
(IndexVec::MAX_INDEX): Add.
(IndexVec::size): Change the return type to the type of the
internal value used by the index type.
From: Pierre-Emmanuel Patry
gcc/testsuite/ChangeLog:
* rust/compile/multiple_bindings1.rs: Add missing lang items.
Signed-off-by: Pierre-Emmanuel Patry
---
.../rust/compile/multiple_bindings1.rs| 29 ---
1 file changed, 19 insertions(+), 10 deletions(-)
diff -
From: Pierre-Emmanuel Patry
gcc/rust/ChangeLog:
* ast/rust-ast.h: Add hash function.
Signed-off-by: Pierre-Emmanuel Patry
---
gcc/rust/ast/rust-ast.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/gcc/rust/ast/rust-ast.h b/gcc/rust/ast/rust-ast.h
index 94585dc1344.
On Mon, Apr 28, 2025 at 9:05 AM Andrew Pinski wrote:
>
> On Mon, Apr 28, 2025 at 8:48 AM wrote:
> >
> > From: Pierre-Emmanuel Patry
> >
> > InlineAsm node does not support memory clobbers.
>
> A few review on this.
> I think this should just be called extended rather than referencing LLVM here.
From: Pierre-Emmanuel Patry
gcc/rust/ChangeLog:
* resolve/rust-late-name-resolver-2.0.cc (Late::visit): Add binding
creation in visitor.
* resolve/rust-late-name-resolver-2.0.h: Add function prototypes.
* resolve/rust-name-resolution-context.h: Add binding context
Dne 28. 04. 25 v 10:58 Jakub Jelinek napsal(a):
On Sun, Apr 27, 2025 at 11:56:21AM +0200, Josef Melcr wrote:
* builtin-attrs.def (0): New int list.
This is just weird. Write
* builtin-attrs.def: Add DEF_LIST_INT_INT (0,2).
?
+DEF_CALLBACK_ATTRIBUTE(GOMP, 1, 0)
+DEF_CALLBACK_
From: Philip Herron
We were wrongly adding the assertion that this must not be an enum but
this is a pointless assertion we only care that there are variant in the
ADT and if the field exists in the first variant.
Fixes Rust-GCC#3581
gcc/rust/ChangeLog:
* typecheck/rust-hir-type-check-
From: Pierre-Emmanuel Patry
gcc/testsuite/ChangeLog:
* rust/compile/black_box.rs: New test.
Signed-off-by: Pierre-Emmanuel Patry
---
gcc/testsuite/rust/compile/black_box.rs | 28 +
1 file changed, 28 insertions(+)
create mode 100644 gcc/testsuite/rust/compile/
From: Philip Herron
Fixes Rust-GCC#3652
gcc/testsuite/ChangeLog:
* rust/compile/nr2/exclude: nr2 does not error on the T it should
require Self::T
* rust/compile/issue-3652.rs: New test.
Signed-off-by: Philip Herron
---
gcc/testsuite/rust/compile/issue-3652.rs | 7 +++
g
From: Pierre-Emmanuel Patry
gcc/rust/ChangeLog:
* expand/rust-macro-builtins-asm.cc (parse_asm_arg): Emit error
message.
Signed-off-by: Pierre-Emmanuel Patry
---
gcc/rust/expand/rust-macro-builtins-asm.cc | 8
1 file changed, 8 insertions(+)
diff --git a/gcc/rust/exp
From: Philip Herron
The error handling here was done long ago when we didnt know how to do
any error handling very well. This removed bad fatal_errors and adds in
some nice rich_location error diagnostics instead.
Fixes Rust-GCC#3628
gcc/rust/ChangeLog:
* typecheck/rust-hir-type-check-
From: Pierre-Emmanuel Patry
Both nodes had the same id, this led to a resolution conflict.
gcc/rust/ChangeLog:
* expand/rust-derive-clone.cc (DeriveClone::clone_enum_struct): Clone
path to avoid using the same nodeid.
gcc/testsuite/ChangeLog:
* rust/compile/nr2/exclude
From: Pierre-Emmanuel Patry
Default visitor should visit all it's children.
gcc/rust/ChangeLog:
* ast/rust-ast-visitor.cc (DefaultASTVisitor::visit): Visit visibility.
Signed-off-by: Pierre-Emmanuel Patry
---
gcc/rust/ast/rust-ast-visitor.cc | 1 +
1 file changed, 1 insertion(+)
dif
From: Pierre-Emmanuel Patry
gcc/testsuite/ChangeLog:
* rust/compile/nr2/exclude: Remove passing test from exclusion list.
Signed-off-by: Pierre-Emmanuel Patry
---
gcc/testsuite/rust/compile/nr2/exclude | 2 --
1 file changed, 2 deletions(-)
diff --git a/gcc/testsuite/rust/compile/nr2
From: Pierre-Emmanuel Patry
gcc/rust/ChangeLog:
* resolve/rust-default-resolver.cc (DefaultResolver::visit): Add visit
function for TypeParam.
* resolve/rust-default-resolver.h: Add function prototype.
* resolve/rust-forever-stack.h: Add function to check for forw
From: Owen Avery
gcc/rust/ChangeLog:
* ast/rust-ast-visitor.cc
(DefaultASTVisitor::visit): Visit the loop labels of
WhileLetLoopExpr instances before visiting their scrutinee
expressions.
* resolve/rust-early-name-resolver-2.0.cc
(Early::resolve_gl
On Mon, Apr 28, 2025 at 8:48 AM wrote:
>
> From: Pierre-Emmanuel Patry
>
> InlineAsm node does not support memory clobbers.
A few review on this.
I think this should just be called extended rather than referencing LLVM here.
>
> gcc/rust/ChangeLog:
>
> * ast/rust-ast-collector.cc (Token
From: Pierre-Emmanuel Patry
gcc/rust/ChangeLog:
* ast/rust-ast-collector.cc (TokenCollector::visit): Remove error kind
and change function call.
* ast/rust-ast-visitor.cc (DefaultASTVisitor::visit): Change call name.
* ast/rust-path.cc (ConstGenericParam::as_strin
Rebased to GCC 15.1
This patch introduces inline definitions for the __fma and __fmaf
functions in arm_acle.h for arm targets. These definitions rely on
__builtin_fma and __builtin_fmaf to ensure proper inlining and to meet
the ACLE requirements [1].
The patch has been tested locally using a cros
Hi
Pretty straightforward except for the aligned_storage one for which I
just avoid the check when gnu-versioned-namespace mode is being used.
libstdc++: [_GLIBCXX_INLINE_VERSION] Fix several tests failures
Several tests are failing when libstdc++ is configured with:
--enable-symv
On Mon, Apr 28, 2025 at 1:13 AM Richard Biener
wrote:
>
> On Sun, Apr 27, 2025 at 12:51 AM Andrew Pinski
> wrote:
> >
> > While looking into adding __ROTATE_LEFT and __ROTATE_RIGHT, I noticed
> > this code is just a bunch of if statments repeated. Instead we could just
> > use a simple lookup ar
Hi Andrew,
On 4/28/25 6:05 PM, Andrew Pinski wrote:
On Mon, Apr 28, 2025 at 8:48 AM wrote:
From: Pierre-Emmanuel Patry
InlineAsm node does not support memory clobbers.
A few review on this.
I think this should just be called extended rather than referencing LLVM here.
This node exists s
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