Re: [PATCH] gm2: fix bad programming practice warning

Wilken Gottwalt writes: > Fix identifier names to be too similar to Modula-2 keywords and causing > warnings coming from Modula-2's own libraries. > > m2/m2log/InOut.mod:51:18: note: In implementation module ‘InOut’: > either the identifier has the same name as a keyword or alternatively a > keyw

Re: [PATCH v2] fold fold_truth_andor field merging into ifcombine

On Dec 8, 2024, Richard Biener wrote: > Like below, gimple_convert_def_p (). >> +static bool >> +gimple_fold_follow_convert (tree t, tree op[1]) > Since it doesn't actually fold - can you name it > static bool > gimple_binop_def_p (...) >> + if (tree_swap_operands_p (op0, op1)) >> +

Re: [PATCH] Invalid gimple __BB# accepted due to usage of atoi -> replace atoi with stroul in c_parser_gimple_parse_bb_spec [PR114541]

On 12/9/24 10:15 AM, Richard Biener wrote: Can you send the patch in git format-patch format please so that it includes the commit message and Author tag and I can git am for pushing? At least you are not listed in MAINTAINERS and thus likely do not have git commit access? Yes, currently I do n

[PATCH] libstdc++: add support for cv-qualified types in atomic_ref (P3323R1)

Hello, The attached patch implements P3323R1, a DR against C++20 (11?), which fixes LWG 4069 and 3508 by clarifying that std::atomic_ref is meant to be supported (whereas std::atomic is meant to be unsupported). I've tried to keep the refactorings to a minimum and follow the structure of th

Re: Rust: libformat_parser: Lower minimum Rust version to 1.49

Hi Thomas, On 12/9/24 10:59 AM, Thomas Schwinge wrote: Hi! On 2024-12-05T13:37:13+0100, Arthur Cohen wrote: On 12/4/24 13:35, Thomas Schwinge wrote: On 2024-11-25T11:24:08+0100, Arthur Cohen wrote: [...] We had previously done something similar to adapt to Rust 1.72 when we originally reus

Re: [PATCH] Invalid gimple __BB# accepted due to usage of atoi -> replace atoi with stroul in c_parser_gimple_parse_bb_spec [PR114541]

On Mon, Dec 9, 2024 at 12:34 PM Heiko Eißfeldt wrote: > > On 12/9/24 10:15 AM, Richard Biener wrote: > > Can you send the patch in git format-patch format please so that > > it includes the commit message and Author tag and I can git am > > for pushing? At least you are not listed in MAINTAINERS

[PATCH 3/6] libstdc++: port bitwise relocatable away from is_trivial

Hello, This aligns __is_bitwise_relocatable with its modern meaning, that is, checking for trivial move construction and destruction. Thanks, -- Giuseppe D'Angelo From 0666e993066818ab0940c61d8d9539e883848b29 Mon Sep 17 00:00:00 2001 From: Giuseppe D'Angelo Date: Mon, 9 Dec 2024 02:11:19 +010

[PATCH 5/6] libstdc++: port tests away from is_trivial

Hello, This ports some misc test away from is_trivial. Thanks, -- Giuseppe D'Angelo From 7b0548ee8732b5211a50cba7781b4fe25d9f5f04 Mon Sep 17 00:00:00 2001 From: Giuseppe D'Angelo Date: Mon, 9 Dec 2024 02:44:30 +0100 Subject: [PATCH 5/6] libstdc++: port tests away from is_trivial In preparation

[PATCH 4/6] libstdc++: port the ranges::uninitialized_* algorithms away from is_trivial

Hello, The range-based uninitialized_* algorithm have codepaths that turn constructions into assignments if the output type is trivial. Change this detection to be more accurate. There's a couple of cases which are suspicious and deserve accurate reasoning. Thanks, -- Giuseppe D'Angelo From

[PATCH 6/6] libstdc++: deprecate is_trivial (P3247R2)

Hello, Finally, this commit deprecates is_trivial and is_trivial_v in C++26. Thanks, -- Giuseppe D'Angelo From 976ad3ec85cdd6fbd6eea7495077ef5b602cf088 Mon Sep 17 00:00:00 2001 From: Giuseppe D'Angelo Date: Mon, 9 Dec 2024 01:28:08 +0100 Subject: [PATCH 6/6] libstdc++: deprecate is_trivial (P3

[PATCH 2/6] libstdc++: pstl: port away from is_trivial

For PSTL, I've just chosen to port from is_trivial to the direct equivalent, as I'm really unsure about the meaning of the code. -- Giuseppe D'Angelo From a24a9495976a08f19df32dddf9b0e29661aca696 Mon Sep 17 00:00:00 2001 From: Giuseppe D'Angelo Date: Mon, 9 Dec 2024 02:06:25 +0100 Subject: [PATC

[PATCH] docs: Clarify -fsanitize=hwaddress target support [PR117960]

Hi! Since GCC 13 -fsanitize=hwaddress is not supported just on AArch64, but also on x86_64 (but only with -mlam=u48 or -mlam=u57). Ok for trunk? 2024-12-09 Jakub Jelinek PR sanitize/117960 * doc/invoke.texi (fsanitize=hwaddress): Clarify on which targets it is support

Re: [PATCH v2 1/3] aarch64: Add support for fp8 convert and scale

writes: > The AArch64 FEAT_FP8 extension introduces instructions for conversion > and scaling. > > This patch introduces the following intrinsics: > 1. vcvt{1|2}_{bf16|high_bf16|low_bf16}_mf8_fpm. > 2. vcvt{q}_mf8_f16_fpm. > 3. vcvt_{high}_mf8_f32_fpm. > 4. vscale{q}_{f16|f32|f64}. > > We introduc

Re: [PATCH] tree-optimization/117912 - bogus address equivalences for __builtin_object_size

Hi! On Thu, Dec 05, 2024 at 11:37:45AM +0100, Richard Biener wrote: > VN again is the culprit for exploiting address equivalences before > __builtin_object_size got the chance to do its job. This time > it isn't about union members but adjacent structure fields where > an address to one after the

Re: [PATCH v3 1/7] middle-end: Handle resized PHI nodes in loop_version()

On Tue, Dec 3, 2024 at 2:42 PM Richard Biener wrote: > > On Tue, Dec 3, 2024 at 2:07 PM Lewis Hyatt wrote: > > > > On Tue, Dec 03, 2024 at 01:28:28PM +0100, Richard Biener wrote: > > > On Mon, Dec 2, 2024 at 1:55 AM Lewis Hyatt wrote: > > > > > > > > This patch is my new way to handle what was p

RE: [PATCH 5/7]middle-end: Add initial support for poly_int64 BIT_FIELD_REF in expand pass [PR96342]

> > if (need_to_clear && maybe_gt (size, 0) && !vector) > > @@ -8058,9 +8058,9 @@ store_constructor (tree exp, rtx target, int cleared, > poly_int64 size, > >element of TARGET, determined by counting the elements. */ > > for (idx = 0, i = 0; > > vec_safe_it

Re: [PATCH v2 2/3] aarch64: Add support for fp8dot2 and fp8dot4

writes: > The AArch64 FEAT_FP8DOT2 and FEAT_FP8DOT4 extension introduces > instructions for dot product of vectors. > > This patch introduces the following intrinsics: > 1. vdot{q}_{fp16|fp32}_mf8_fpm. > 2. vdot{q}_lane{q}_{fp16|fp32}_mf8_fpm. > > It introduces two flags: fp8dot2 and fp8dot4. > >

Re: [PATCH 1/6] libstdc++: port away from is_trivial in string classes

On 09/12/24 13:06 +0100, Giuseppe D'Angelo wrote: Hello, This is a series of commits that will end up with the deprecation of the is_trivial type trait in C++26 (P3247R2). Existing usages in libstdc+++ need to be ported away, either to the direct replacement (is_trivially_copyable && is_tri

[PATCH] Assign separate timevar to duplicate computed goto pass

It currently shares the timevar with bb-reorder but can use significant memory and compile-time on its own. Bootstrap and regtest running on x86_64-unknown-linux-gnu, will push. * timevar.def (TV_DUP_COMPGOTO): Add. * bb-reorder.cc (pass_data_duplicate_computed_gotos): Use

Re: [PATCH v2 3/3] aarch64: Add support for fp8fma instructions

writes: > The AArch64 FEAT_FP8FMA extension introduces instructions for > multiply-add of vectors. > > This patch introduces the following instructions: > 1. {vmlalbq|vmlaltq}_f16_mf8_fpm. > 2. {vmlalbq|vmlaltq}_lane{q}_f16_mf8_fpm. > 3. {vmlallbbq|vmlallbtq|vmlalltbq|vmlallttq}_f32_mf8_fpm. > 4.

[PATCH] Free RTL SSA after late-combine

Late-combine fails to release RTL SSA info, leaking memory (as -fmem-report shows). Bootstrap and regtest running on x86_64-unknown-linux-gnu, OK? Thanks, Richard. * late-combine.cc (late_combine::execute): Delete RTL SSA. --- gcc/late-combine.cc | 4 1 file changed, 4 insertions(+

Re: [PATCH 2/6] libstdc++: pstl: port away from is_trivial

On 09/12/24 13:08 +0100, Giuseppe D'Angelo wrote: For PSTL, I've just chosen to port from is_trivial to the direct equivalent, as I'm really unsure about the meaning of the code. Yeah, I'm not sure either. I note that the code uses std::conjunction instead of the non-portable __and_. std::conj

Re: [PATCH] docs: Clarify -fsanitize=hwaddress target support [PR117960]

On Mon, 9 Dec 2024, Jakub Jelinek wrote: > Hi! > > Since GCC 13 -fsanitize=hwaddress is not supported just on AArch64, but also > on x86_64 (but only with -mlam=u48 or -mlam=u57). > > Ok for trunk? OK. > 2024-12-09 Jakub Jelinek > > PR sanitize/117960 > * doc/invoke.texi (fsani

Re: [PATCH] Free RTL SSA after late-combine

Richard Biener writes: > Late-combine fails to release RTL SSA info, leaking memory > (as -fmem-report shows). Ouch! Pretty big blunder, sorry :( > Bootstrap and regtest running on x86_64-unknown-linux-gnu, OK? OK, thanks. Richard > > Thanks, > Richard. > > * late-combine.cc (late_comb

Re: [PATCH 3/6] libstdc++: port bitwise relocatable away from is_trivial

On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: Hello, This aligns __is_bitwise_relocatable with its modern meaning, that is, checking for trivial move construction and destruction. Looks good, thanks. Thanks, -- Giuseppe D'Angelo From 0666e993066818ab0940c61d8d9539e883848b29 Mon Sep 1

Re: [PATCH 2/6] libstdc++: pstl: port away from is_trivial

On 09/12/24 13:13 +, Jonathan Wakely wrote: On 09/12/24 13:08 +0100, Giuseppe D'Angelo wrote: For PSTL, I've just chosen to port from is_trivial to the direct equivalent, as I'm really unsure about the meaning of the code. Yeah, I'm not sure either. I note that the code uses std::conjunct

[PATCH 4/5] RISC-V: Implment N modifier for printing the register number rather than the register name

The modifier `N`, to print the raw encoding of a register. This is used when using `.insn , `, where the user wants to pass a value to the instruction in a known register, but where the instruction doesn't follow the existing instruction formats, so the assembly parser is not expecting a register n

[PATCH 2/5] RISC-V: Add cr and cf constraint

gcc/ChangeLog: * config/riscv/constraints.md (cr): New. (cf): New. * config/riscv/riscv.h (reg_class): Add RVC_GR_REGS and RVC_FP_REGS. (REG_CLASS_NAMES): Ditto. (REG_CLASS_CONTENTS): Ditto. * doc/md.texi: Document cr and cf constraint. gcc/

[PATCH 3/5] RISC-V Rename internal operand modifier N to n

Here is a purposal that using N for printing register encoding number, so let rename the existing internal operand modifier `N` to `n`. gcc/ChangeLog: * config/riscv/corev.md (*cv_branch): Update modifier. (*branch): Ditto. * config/riscv/riscv.cc (riscv_print_operand): Up

[PATCH 1/5] RISC-V: Rename constraint c0* to k0*

Rename those constraint since we want define other constraint start with `c`, those constraints are internal and undocumented, so it's fine to rename. gcc/ChangeLog: * config/riscv/constraints.md (c01): Rename to... (k01): ...this. (c02): Rename to... (k02): ...thi

[PATCH 0/5] New Asm Constraints and Modifiers - RVC, Raw Encodings, Pairs

This patch set implements the proposal from riscv-c-api-doc[1]. It adds two constraints and one modifier with the goal of improving the user experience for `.insn`, making it easier for users to experiment with new ISA extensions. A quick summary of this patch set: - Add R constraint for even-odd

[PATCH 5/5] RISC-V: Add new constraint R for register even-odd pairs

Although this constraint is not currently used for any instructions, it is very useful for custom instructions. Additionally, some new standard extensions (not yet upstream), such as `Zilsd` and `Zclsd`, are potential users of this constraint. Therefore, I believe there is sufficient justification

Re: [PATCH v2] testsuite/gcc.dg/tree-ssa/pr111456-1.c: Handle fallout

On Sun, Dec 8, 2024 at 7:58 PM Hans-Peter Nilsson wrote: > > v2: oops, typo: component is tree-optimization, not tree-ssa. > Resent for the benefit of autotesters that don't yet > understand natural language. > > Forcing a fail and marking as xfail is IMHO better than > passing --param=logical-op-

Re: [PATCH 5/5] RISC-V: Add new constraint R for register even-odd pairs

Apparently I forgot to attach the testcase, will put in v2 or put it when committing to the trunk. On Mon, Dec 9, 2024 at 5:06 PM Kito Cheng wrote: > > Although this constraint is not currently used for any instructions, it is > very > useful for custom instructions. Additionally, some new stand

Re: [PATCH] Fix type compatibility for types with flexible array member [PR113688,PR114014,PR117724]

On Mon, 9 Dec 2024, Martin Uecker wrote: > > Hi Richard, > > this is another version. It now adds an "ignore_size" flag > to gimple_canonical_types_compatible_p and uses this instead > of having the complicated special case for arrays at the > end. IMO the "complicated" special case was better

[committed] libstdc++: Add missing equality comparison in new tests [PR117921]

These new tests fail in Debug Mode because the allocator types aren't equality comparable. libstdc++-v3/ChangeLog: PR libstdc++/117921 * testsuite/23_containers/set/modifiers/swap/adl.cc: Add equality comparison for Allocator. * testsuite/23_containers/unordered_se

Re: [PATCH] wwwdocs: Clarify DCO name/identity and (anonymous) pseudonym policy

Hi, On Mon, 2024-12-02 at 11:16 +0100, Mark Wielaard wrote: > Adjust the DCO text to match the broader community usage and > clarifications around the use of real names, known identities and > (anonymous) pseudonyms. > > These changes clarify what was meant by "real name" and that it is not > req

Re: [PATCH] arm: remove obsolete vcond expanders

On Fri, 6 Dec 2024, Richard Earnshaw wrote: > The vcond{,u} expander paterns have been declared as obsolete. Remove > them from the Arm backend. OK (not sure if you were expecting approval from me ;)), the patterns are no longer exercised anywhere. Richard. > gcc/ChangeLog: > > PR targe

Re: [PATCH] Invalid gimple __BB# accepted due to usage of atoi -> replace atoi with stroul in c_parser_gimple_parse_bb_spec [PR114541]

On 12/8/24 10:17 AM, Richard Biener wrote: Note you picked a difficult patch - as said, the atoi fix looks OK to me, even if it doesn't solve downstream issues. Can you split that out so I can approve that separately? Thanks for your insights. I am a bit relieved that I don't have to handle all

Re: [PATCH] tree-optimization/117912 - bogus address equivalences for __builtin_object_size

On Sat, 7 Dec 2024, Siddhesh Poyarekar wrote: > On 2024-12-05 05:37, Richard Biener wrote: > > VN again is the culprit for exploiting address equivalences before > > __builtin_object_size got the chance to do its job. This time > > it isn't about union members but adjacent structure fields where

[PATCH 1/6] libstdc++: port away from is_trivial in string classes

Hello, This is a series of commits that will end up with the deprecation of the is_trivial type trait in C++26 (P3247R2). Existing usages in libstdc+++ need to be ported away, either to the direct replacement (is_trivially_copyable && is_trivially_default_constructible) or, when possible, to

Re: [PATCH 2/2] Integrate scev-cprop into DCE [PR90594]

On Fri, Dec 6, 2024 at 2:57 PM Feng Xue OS wrote: > > Currently, if could, scev-cprop unconditionally replaces loop closed ssa with > an expression built from loop initial value and loop niter, which might cause > redundant code-gen when all interior computations related to IV inside loop > are al

Rust: libformat_parser: Lower minimum Rust version to 1.49 (was: Rust: Work around 'error[E0658]: `let...else` statements are unstable')

Hi! On 2024-12-05T13:37:13+0100, Arthur Cohen wrote: > On 12/4/24 13:35, Thomas Schwinge wrote: >> On 2024-11-25T11:24:08+0100, Arthur Cohen wrote: >>> [...] We had previously done something similar to >>> adapt to Rust 1.72 when we originally reused the format_args parser: >>> >>> https://githu

Re: [PATCH] Invalid gimple __BB# accepted due to usage of atoi -> replace atoi with stroul in c_parser_gimple_parse_bb_spec [PR114541]

On Mon, Dec 9, 2024 at 8:39 AM Heiko Eißfeldt wrote: > > On 12/8/24 10:17 AM, Richard Biener wrote: > > Note you picked a difficult patch - as said, the atoi fix looks OK to > me, even if > it doesn't solve downstream issues. Can you split that out so I can > approve that > separately? > > Thanks

nvptx: Switch default from '-march=sm_30' to '-march=sm_52' (was: Raise nvptx code generation to default PTX ISA 7.3, sm_52, therefore CUDA 11.3 (released 2021-04))

Hi! On 2024-09-20T18:49:46+0200, Thomas Schwinge wrote: > We'd like to raise nvptx code generation from PTX ISA 6.0, sm_30 "Kepler" > to default PTX ISA 7.3, sm_52 "Maxwell", therefore CUDA 11.3 (2021-04). > This is, primarily, so that we're able to use 'alloca' and related stack > manipulation i

[PATCH] RISC-V: Update Xsfvqmacc and Xsfvfnrclip extensions' testcases

Update Sifive Xsfvqmacc and Xsfvfnrclip extension's testcases. Co-Authored by: Jiawei Chen Co-Authored by: Yulong Shi Co-Authored by: Yixuan Chen gcc/ChangeLog: * config/riscv/vector.md: Add sf_vqmacc and sf_vfnrclip to has_vtype_op. gcc/testsuite/ChangeLog: * gcc.target/ris

Re: [PATCH 1/2] Refactor final_value_replacement_loop [PR90594]

On Fri, Dec 6, 2024 at 2:56 PM Feng Xue OS wrote: > > This patch refactors the procedure in tree-scalar-evolution.cc in order to > partially export its functionality to other module, so decomposes it to > several relatively independent utility functions. > > Thanks, > Feng > --- > gcc/ >

Re: [PATCH] arm: remove obsolete vcond expanders

On 09/12/2024 08:16, Richard Biener wrote: On Fri, 6 Dec 2024, Richard Earnshaw wrote: The vcond{,u} expander paterns have been declared as obsolete. Remove them from the Arm backend. OK (not sure if you were expecting approval from me ;)), the patterns are no longer exercised anywhere. My

Re: [PATCH] tree-optimization/117912 - bogus address equivalences for __builtin_object_size

On Mon, 9 Dec 2024, Jakub Jelinek wrote: > Hi! > > On Thu, Dec 05, 2024 at 11:37:45AM +0100, Richard Biener wrote: > > VN again is the culprit for exploiting address equivalences before > > __builtin_object_size got the chance to do its job. This time > > it isn't about union members but adjacen

Re: [PATCH] tree-optimization/117912 - bogus address equivalences for __builtin_object_size

On Mon, Dec 09, 2024 at 02:30:59PM +0100, Richard Biener wrote: > Those would be UB, I've tried to keep the check conservative but fast. Ok. > I'll retest, repost and push. thanks. Jakub

Re: [PATCH 4/6] libstdc++: port the ranges::uninitialized_* algorithms away from is_trivial

On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: Hello, The range-based uninitialized_* algorithm have codepaths that turn constructions into assignments if the output type is trivial. Change this detection to be more accurate. There's a couple of cases which are suspicious and deserve accur

Re: [PATCH 6/6] libstdc++: deprecate is_trivial (P3247R2)

On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: Hello, Finally, this commit deprecates is_trivial and is_trivial_v in C++26. Looks good, thanks. I'll apply this whole series. Thanks, -- Giuseppe D'Angelo From 976ad3ec85cdd6fbd6eea7495077ef5b602cf088 Mon Sep 17 00:00:00 2001 From: Giuse

Re: [PATCH 5/6] libstdc++: port tests away from is_trivial

On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: Hello, This ports some misc test away from is_trivial. This is fine, thanks. Thanks, -- Giuseppe D'Angelo From 7b0548ee8732b5211a50cba7781b4fe25d9f5f04 Mon Sep 17 00:00:00 2001 From: Giuseppe D'Angelo Date: Mon, 9 Dec 2024 02:44:30 +0100

Re: [PATCH] s390: Fix UNSPEC_CC_TO_INT canonicalization

On 12/6/24 19:00, Juergen Christ wrote: Canonicalization of comparisons for UNSPEC_CC_TO_INT missed one case causing unnecessarily complex code. This especially seems to hit the Linux kernel. gcc/ChangeLog: * config/s390/s390.cc (s390_canonicalize_comparison): Add missing UN

[patch] Allow target to chose address-space for artificial rodata lookup tables.

This patch adds a new target hook that allows to chose a non-generic named address-space for compiler generated lookup tables. The purpose is that there are cases (on avr namely) where the generic address space is sub-optimal because it must put .rodata in RAM. With this hook it is possible to c

Re: [PATCH v3] c++, coroutines: Fix awaiter var creation [PR116506].

> On 9 Dec 2024, at 17:41, Jason Merrill wrote: > > On 10/31/24 4:40 AM, Iain Sandoe wrote: >> This version tested on x86_64-darwin,linux, powerpc64-linux, on folly >> and by Sam on wider codebases, > Why don't you need a variable to preserve o across suspensions if it's a > call retu

Re: [PATCH] c++, coroutines: Make suspend index consistent for debug.

On 11/29/24 8:47 AM, Iain Sandoe wrote: Tested on x86_64-darwin, x86_64-linux, OK for trunk? thanks Iain --- 8< --- At present, we only update the suspend index when we actually are at the stage that the coroutine is considered suspended. This is on the basis that it is UB to resume or destroy

Re: [PATCH] c++, coroutines:Ensure bind exprs are visited once [PR98935].

On 11/29/24 8:45 AM, Iain Sandoe wrote: Tested on x86_64-darwin, x86_64, powerpc64-linux, OK for trunk? thanks Iain --- 8< --- Recent changes in the C++ FE and the coroutines implementation have exposed a latent issue in which a bind expression containing a var that we need to capture in the co

[PATCH v3] testsuite/gcc.dg/tree-ssa/pr111456-1.c: Handle fallout

> From: Richard Biener > Date: Mon, 9 Dec 2024 10:06:49 +0100 > As Andrew said the fix the testcase was written for was targeting > --param logical-op-non-short-circuit=1 it makes more sense to force > that so we continue to check it works. 'k, that's a valid argument. > We should simply track

Re: [PATCH] c++, coroutines: Make suspend index consistent for debug.

On 12/9/24 2:00 PM, Iain Sandoe wrote: On 9 Dec 2024, at 18:56, Jason Merrill wrote: On 11/29/24 8:47 AM, Iain Sandoe wrote: Tested on x86_64-darwin, x86_64-linux, OK for trunk? thanks Iain --- 8< --- At present, we only update the suspend index when we actually are at the stage that the co

Re: [PATCH] c++, coroutines: Handle statement expressions part 1.

On 11/29/24 8:43 AM, Iain Sandoe wrote: Tested on x86_64-darwin, x86_64/powerpc64-linux, on folly and more widely by Sam. There are possibly additional BZ dups that will be covered (this fixes 117231, a P1). OK for trunk? thanks Iain --- 8< --- In the current implementation, statement expressi

[PATCH] replace atoi with strtoul in opts.cc, lto-wrapper.c, lto/lto.c [PR114542]

Straight forward replacements of atoi() with strtoul() in order to avoid UB and detect invalid argument values. Tested with x86_64-pc-linux-gnu. 2024-12-09 Heiko Eißfeldt     PR lto/114542     * lto-wrapper.cc (run_gcc):     Use strtoul with ERANGE check instead of atoi     * lto/lto.cc (do_wh

[PATCH] testsuite/gcc.dg/tree-ssa/pr117973-1.c: New test

I could probably assume that this is what you had in mind, but anyway: Ok to commit? -- >8 -- PR117973 covers the aspect of non-LOGICAL_OP_NON_SHORT_CIRCUIT targets for PR111456, for which the test-case gcc.dg/tree-ssa/pr111456-1.c started failing as described in PR117954. * gcc.dg/tree-s

Re: [PATCH] c++, coroutines: Make suspend index consistent for debug.

> On 9 Dec 2024, at 19:34, Jason Merrill wrote: > > On 12/9/24 2:00 PM, Iain Sandoe wrote: >>> On 9 Dec 2024, at 18:56, Jason Merrill wrote: >>> >>> On 11/29/24 8:47 AM, Iain Sandoe wrote: Tested on x86_64-darwin, x86_64-linux, OK for trunk? thanks Iain --- 8< --- >>

[PATCH] libstdc++: Fix fancy pointer support in linked lists

The union members I used in the new _Node types for fancy pointers only work for value types that are trivially default constructible. This change adds an unsigned char member to the union, so the node's default constructor is not defined as deleted. libstdc++-v3/ChangeLog: * include/bits

Re: [PATCH 0/3] testsuite: RISC-V: Improve support for RV32E

Oh i just saw other part before i saw cover letter, anyway， LGTM for this patch set, thanks :) Dimitar Dimitrov 於 2024年12月10日 週二 00:16 寫道： > Many test cases implicitly require some form of I ABI variant for > RISC-V to be the default. Hence they fail when ILP32E is configured as > the default A

Re: Should -fsanitize=bounds support counted-by attribute for pointers inside a structure?

> On Dec 7, 2024, at 03:57, Martin Uecker wrote: > > Am Freitag, dem 06.12.2024 um 16:13 + schrieb Qing Zhao: >> >>> On Dec 6, 2024, at 10:56, Martin Uecker wrote: >>> >>> Am Freitag, dem 06.12.2024 um 14:16 + schrieb Qing Zhao: > > ... > > > I think the relevant sce

[committed] RISC-V testsuite changes to test clmul expansion of CRCs

This testsuite only patch allows us to test code generation for CRC functions using clmul instructions. Conceptually it's trivial. We already have various execution tests in gcc.dg/torture. We just define a new set of dg directives and include the testcase in gcc.dg/torture. The only gotch

[PATCH v2 2/4] arm: [MVE intrinsics] add support for tuples

This patch is largely a copy/paste from the aarch64 SVE counterpart, and adds support for tuples to the MVE intrinsics framework. Introduce function_resolver::infer_tuple_type which will be used to resolve overloaded vst2q and vst4q function names in a later patch. Fix access to acle_vector_types

RE: [PATCH 6/7]middle-end: add vec_init support for variable length subvector concatenation.

> >> So I think we can simply set const_n_elts to CONSTRUCTOR_NELTS > >> for vector_typed_elts_p? > >> > > Done, gcc/ChangeLog: PR target/96342 * expr.cc (store_constructor): add support for variable-length vectors. Co-authored-by: Tamar Christina Bootstrapped Regteste

Re: [PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

On Mon, 09 Dec 2024 09:05:10 PST (-0800), Robin Dapp wrote: +/* { dg-additional-options "-mabi=lp64d" { target { rv64 } } } */ +/* { dg-additional-options "-mabi=ilp32d" { target { rv32 } } } */ Wouldn't skipping those tests also be reasonable? I.e. adding a target to the compile directive inst

Re: [PATCH v3] c++, coroutines: Fix awaiter var creation [PR116506].

On 10/31/24 4:40 AM, Iain Sandoe wrote: This version tested on x86_64-darwin,linux, powerpc64-linux, on folly and by Sam on wider codebases, Why don't you need a variable to preserve o across suspensions if it's a call returning lvalue reference? We always need a space for the awaiter, unless

Re: [PATCH 5/6] libstdc++: port tests away from is_trivial

On Mon, 9 Dec 2024 at 17:43, Jonathan Wakely wrote: > > On Mon, 9 Dec 2024 at 13:49, Jonathan Wakely wrote: > > > > On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: > > >Hello, > > > > > >This ports some misc test away from is_trivial. > > > > This is fine, thanks. > > I'm seeing a number of FAIL

[PATCH] libstdc++: Skip redundant assertions in std::span construction [PR117966]

As PR c++/117966 shows, the Debug Mode checks cause a compilation error for a global constexpr std::span. Those checks are redundant when constructing from an array or a range, because we already know we have a valid range and we know its size. Instead of delegating to the std::span(contiguous_iter

Re: [PATCH 5/6] libstdc++: port tests away from is_trivial

On Mon, 9 Dec 2024 at 17:44, Jonathan Wakely wrote: > > On Mon, 9 Dec 2024 at 17:43, Jonathan Wakely wrote: > > > > On Mon, 9 Dec 2024 at 13:49, Jonathan Wakely wrote: > > > > > > On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: > > > >Hello, > > > > > > > >This ports some misc test away from is

Re: [PATCH] c++, coroutines: Make suspend index consistent for debug.

> On 9 Dec 2024, at 18:56, Jason Merrill wrote: > > On 11/29/24 8:47 AM, Iain Sandoe wrote: >> Tested on x86_64-darwin, x86_64-linux, >> OK for trunk? >> thanks >> Iain >> --- 8< --- >> At present, we only update the suspend index when we actually are >> at the stage that the coroutine is cons

[PATCH] driver: fix crash with --diagnostics-plain-output [PR117942]

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? -- >8 -- We are crashing here because decode_cmdline_options_to_array has: if (!strcmp (opt, "-fdiagnostics-plain-output")) ... but that doesn't handle the '--FLAG' variant. gcc/ChangeLog: * opts-common.cc (decode_cmdli

[PATCH] wwwdocs: gcc-15: start adding notes on C23

How does this look? Thanks Dave --- htdocs/gcc-15/changes.html| 12 htdocs/gcc-15/porting_to.html | 34 +- 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html index 23866bde..94731

[PATCH v4] fold fold_truth_andor field merging into ifcombine

This patch introduces various improvements to the logic that merges field compares, while moving it into ifcombine. Before the patch, we could merge: (a.x1 EQNE b.x1) ANDOR (a.y1 EQNE b.y1) into something like: (((type *)&a)[Na] & MASK) EQNE (((type *)&b)[Nb] & MASK) if both of A's field

Re: [PATCH] wwwdocs: gcc-15: start adding notes on C23

On Mon, Dec 09, 2024 at 02:44:42PM -0500, David Malcolm wrote: > +C23 brings the following changes: > + > +Function prototypes with empty > params change from implicit int to void > + > + In C23 () in a function declaration means the same as > (void), whereas previously it implicitly declared the

Re: [PATCH 6/6 v2] libstdc++: deprecate is_trivial (P3247R2)

On 09/12/2024 18:43, Jonathan Wakely wrote: On Mon, 9 Dec 2024 at 13:49, Jonathan Wakely wrote: On 09/12/24 13:22 +0100, Giuseppe D'Angelo wrote: Hello, This ports some misc test away from is_trivial. This is fine, thanks. I'm seeing a number of FAILures not fixed by this patch: Apologies,

[PATCH] clang-format AlwaysBreakAfterReturnType to TopLevelDefinitions

From: Matthew Malcomson The previous value of TopLevel meant that the function name of declarations would also be on a new line. This does not match the current formatting of headers. Manual testing done on c-common.h. Also set BraceWrapping.BeforeWhile to true to match the formatting specifie

[committed] libstdc++: Remove std::allocator::is_always_equal typedef for C++26

This was removed by P2868R3, voted into the C++26 draft at the November 2023 meeting in Kona. We've had a deprecated warning in place for three years. libstdc++-v3/ChangeLog: * include/bits/allocator.h (allocator::is_always_equal): Do not define for C++26. (allocator::is_a

[committed v2] libstdc++: Add workaround for read(2) EINVAL on macOS and FreeBSD [PR102259]

On macOS and FreeBSD the read(2) system call can return EINVAL for large sizes, so limit the maximum that we try to read. The calling code in basic_filebuf::xsgetn will loop until it gets the size it wants, so we don't need to loop in basic_file::xsgetn, just limit the maximum size. libstdc++-v3/C

[PATCH 0/3] testsuite: RISC-V: Improve support for RV32E

Many test cases implicitly require some form of I ABI variant for RISC-V to be the default. Hence they fail when ILP32E is configured as the default ABI for the toolchain. Example error: spawn ... -march=rv32gc_zbb ... cc1: error: ILP32E ABI does not support the 'D' extension This p

[PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

Some tests add options for V and Zvbb extensions, but do not have checks whether the default abi supports them. Fix by explicitly specifying ilp32d and lp64d ABI. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vandn-1.c: Specify ilp32d ABI for RV32 targets, and lp6

Re: [PATCH] expr: Don't clear whole unions [PR116416]

On Sat, Dec 07, 2024 at 10:01:53AM -0500, Jason Merrill wrote: > On 12/6/24 5:02 PM, Marek Polacek wrote: > > On Mon, Oct 14, 2024 at 03:57:45PM -0400, Jason Merrill wrote: > > > OK. > > > > The patch was approved, but even after the r15-5746 + r15-5747 changes, > > pr78687.C still FAILs: > >

Re: [PATCH] Fortran: fix two minor front-end GMP memleaks

Thanks, Jerry! Pushed as r15-6053. Am 08.12.24 um 23:57 schrieb Jerry Delisle: Looks good, OK to push. On Sun, Dec 8, 2024, 1:39 PM Harald Anlauf wrote: Dear all, while looking at testcases with inquiry refs, I encountered two minor GMP memleaks due to double-initialization of GMP variable

[committed] libstdc++: Fix debug containers for constant evaluation [PR117962]

Using a stateful allocator with std::vector would fail in Debug Mode, because the allocator-extended move constructor tries to swap all the attached safe iterators, but that uses a non-inline function which isn't constexpr. We don't actually need to swap any iterators in constant expressions, becau

[PATCH v2 4/4] arm: [MVE intrinsics] rework vst2q vst4q vld2q vld4q

Implement vst2q, vst4q, vld2q and vld4q using the new MVE builtins framework. Since MVE uses different tuple modes than Neon, we need to use VALID_MVE_STRUCT_MODE because VALID_NEON_STRUCT_MODE is no longer a super-set of it, for instance in output_move_neon and arm_print_operand_address. In arm_

[PATCH v2 1/4] arm: [MVE intrinsics] add modes for tuples

Add V2x and V4x modes, like we do on aarch64 for Advanced SIMD q-registers. gcc/ChangeLog: * config/arm/arm-modes.def (MVE_STRUCT_MODES): New. --- gcc/config/arm/arm-modes.def | 22 ++ 1 file changed, 22 insertions(+) diff --git a/gcc/config/arm/arm-modes.def b/gcc/c

[PATCH v2 0/4] arm: [MVE intrinsics] Rework intrinsics for loads/stores/ tuples

Changes v1->v2: - Keep MAX_TUPLE_SIZE=0 and update accesses to acle_vector_types accordingly. - implement arm_array_mode in patch 4/4 instead of 2/4 to avoid temporary regressions when running the testsuite at patch 2/4 (helps future bisects) This patch series re-implements the intrinscs

[PATCH v2 3/4] arm: [MVE intrinsics] fix store shape to support tuples

Now that tuples are properly supported, we can update the store shape, to expect "t0" instead of "v0" as last argument. gcc/ChangeLog: * config/arm/arm-mve-builtins-shapes.cc (struct store_def): Add support for tuples. --- gcc/config/arm/arm-mve-builtins-shapes.cc | 4 ++-- 1 fil

Re: [PATCH v3] arm: [MVE intrinsics] Fix support for predicate constants [PR target/114801]

On 06/12/2024 18:14, Christophe Lyon wrote: On Fri, 6 Dec 2024 at 12:41, Richard Earnshaw (lists) wrote: On 04/12/2024 20:56, Christophe Lyon wrote: On Wed, 4 Dec 2024 at 12:39, Richard Earnshaw (lists) wrote: On 25/11/2024 20:08, Christophe Lyon wrote: In this PR, we have to handle a cas

Re: [PATCH] clang-format AlwaysBreakAfterReturnType to TopLevelDefinitions

On 12/9/24 9:36 AM, mmalcom...@nvidia.com wrote: From: Matthew Malcomson The previous value of TopLevel meant that the function name of declarations would also be on a new line. This does not match the current formatting of headers. Manual testing done on c-common.h. Also set BraceWrapping.B

Re: [PATCH 2/6] libstdc++: pstl: port away from is_trivial

On 09/12/2024 14:13, Jonathan Wakely wrote: Could I ask you to open an issue about std::is_trivial upstream: https://github.com/oneapi-src/oneDPL/issues If/when they fix it, we can consider aligning with their direction. And that might resolve the question of which aspects of triviality are real

[PATCH v2] gimple: Add limit after which slower switchlower algs are used [PR117091] [PR117352]

Hi Richi, This is the second version of the patch. I've lowered the default value of the switch-lower-slow-alg-max-cases from 1 to 1000. I've also noticed that I forgot to add an entry into the param section of doc/invoke.texi so I fixed that. I'm bootstraping and regtesting this again just

Re: [PATCH v2] gimple: Add limit after which slower switchlower algs are used [PR117091] [PR117352]

> Am 09.12.2024 um 16:19 schrieb Filip Kastl : > > Hi Richi, > > This is the second version of the patch. I've lowered the default value of > the > switch-lower-slow-alg-max-cases from 1 to 1000. I've also noticed that I > forgot to add an entry into the param section of doc/invoke.tex

Re: [RFC/RFA][PATCH v7 00/12] CRC optimization.

Mariam Arutunian writes: > Hello, > > This patch series is a revised version of the following: > https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668229.html. > > In this version: > >- Patch 09/12 has been updated with comments provided by Matevos, which >were missing in the previou

Re: [PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

> +/* { dg-additional-options "-mabi=lp64d" { target { rv64 } } } */ > +/* { dg-additional-options "-mabi=ilp32d" { target { rv32 } } } */ Wouldn't skipping those tests also be reasonable? I.e. adding a target to the compile directive instead. I'd find that a bit more intuitive than overriding th

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