Re: [PATCH] Take register pressure into account for vec_construct when the components are not loaded from memory.

On Wed, Nov 29, 2023 at 3:47 PM Richard Biener wrote: > > On Tue, Nov 28, 2023 at 8:54 AM liuhongt wrote: > > > > For vec_contruct, the components must be live at the same time if > > they're not loaded from memory, when the number of those components > > exceeds available registers, spill happen

Re: [r14-5930 Regression] FAIL: gcc.c-torture/compile/libcall-2.c -Os (test for excess errors) on Linux/x86_64

> On Wed, Nov 29, 2023 at 07:51:15AM +0100, Jose E. Marchesi wrote: >> > FAIL: gcc.c-torture/compile/libcall-2.c -O1 (test for excess errors) >> > FAIL: gcc.c-torture/compile/libcall-2.c -O2 -flto >> > -fno-use-linker-plugin -flto-partition=none (test for excess errors) >> > FAIL: gcc.c-tortur

Re: [r14-5930 Regression] FAIL: gcc.c-torture/compile/libcall-2.c -Os (test for excess errors) on Linux/x86_64

On Wed, Nov 29, 2023 at 09:20:55AM +0100, Jose E. Marchesi wrote: > OK to the patch below? > > >From a697f9e9442d96d3eda228b825dd8e8e06206c03 Mon Sep 17 00:00:00 2001 > From: "Jose E. Marchesi" > Date: Wed, 29 Nov 2023 09:16:48 +0100 > Subject: [PATCH] testsuite: move gcc.c-torture/compile/libcal

[PATCH] fold-const: Fix up multiple_of_p [PR112733]

Hi! We ICE on the following testcase when wi::multiple_of_p is called on widest_int 1 and -128 with UNSIGNED. I still need to work on the actual wide-int.cc issue, the latest patch attached to the PR regressed bitint-{38,39}.c, so will need to debug that, but there is a clear bug on the fold-cons

[PATCH] RISC-V: Support highpart register overlap for vwcvt

Since Richard supports register filters recently, we are able to support highpart register overlap for widening RVV instructions. This patch support it for vwcvt intrinsics. I leverage real application user codes for vwcvt: https://github.com/riscv/riscv-v-spec/issues/929 https://godbolt.org/z/x

Re: [r14-5930 Regression] FAIL: gcc.c-torture/compile/libcall-2.c -Os (test for excess errors) on Linux/x86_64

> On Wed, Nov 29, 2023 at 09:20:55AM +0100, Jose E. Marchesi wrote: >> OK to the patch below? >> >> >From a697f9e9442d96d3eda228b825dd8e8e06206c03 Mon Sep 17 00:00:00 2001 >> From: "Jose E. Marchesi" >> Date: Wed, 29 Nov 2023 09:16:48 +0100 >> Subject: [PATCH] testsuite: move gcc.c-torture/comp

[PATCH] RISC-V: Support highpart register overlap for vwcvt

Since Richard supports register filters recently, we are able to support highpart register overlap for widening RVV instructions. This patch support it for vwcvt intrinsics. I leverage real application user codes for vwcvt: https://github.com/riscv/riscv-v-spec/issues/929 https://godbolt.org/z/x

Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

Sorry for sending it twice. Add Co-authored-by: kito-cheng Co-authored-by: kito-cheng in changelog. No other difference. juzhe.zh...@rivai.ai From: Juzhe-Zhong Date: 2023-11-29 16:34 To: gcc-patches CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong Subject: [PATCH] RISC-V: Supp

[PATCH] RISC-V: Add explicit braces to eliminate warning.

From: xuli ../.././gcc/gcc/config/riscv/riscv.cc: In function ‘void riscv_option_override()’: ../.././gcc/gcc/config/riscv/riscv.cc:8673:6: warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else] if (TARGET_RVE) ^ gcc/ChangeLog: * config/riscv/riscv.cc (r

Re: [PATCH] RISC-V: Add explicit braces to eliminate warning.

LGTM. Thanks for fixing it. juzhe.zh...@rivai.ai From: Li Xu Date: 2023-11-29 16:46 To: gcc-patches CC: kito.cheng; palmer; juzhe.zhong; xuli Subject: [PATCH] RISC-V: Add explicit braces to eliminate warning. From: xuli ../.././gcc/gcc/config/riscv/riscv.cc: In function ‘void riscv_option_

Re: [PATCH v4] Introduce strub: machine-independent stack scrubbing

On Nov 23, 2023, Richard Biener wrote: > Conceptually it shouldn't be much different from what IPA-SRA does > which is cloning a function but with different arguments, the function > signature transform described in terms of ipa-param-manipulation bits. > I've talked with Martin and at least ther

Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

OK, thanks for moving that forward! but just one nit: don't include godbolt.org url as possible since it's not permanently valid. On Wed, Nov 29, 2023 at 4:36 PM juzhe.zh...@rivai.ai wrote: > > Sorry for sending it twice. > > Add > > Co-authored-by: kito-cheng > Co-authored-by: kito-cheng > >

[PATCH] Use vec_extact_lo instead of subreg in reduc__scal_m.

Loop vectorizer will use vec_perm to select lower part of a vector, there could be some redundancy when using subreg in reduc__scal_m, because rtl cse can't figure out vec_select lower part is just subreg. I'm trying to canonicalize vec_select to subreg like aarch64 did, but there're so many regre

Re: [PATCH] fold-const: Fix up multiple_of_p [PR112733]

Jakub Jelinek writes: > Hi! > > We ICE on the following testcase when wi::multiple_of_p is called on > widest_int 1 and -128 with UNSIGNED. I still need to work on the > actual wide-int.cc issue, the latest patch attached to the PR regressed > bitint-{38,39}.c, so will need to debug that, but the

Re: [PATCH] fold-const: Fix up multiple_of_p [PR112733]

> Am 29.11.2023 um 09:29 schrieb Jakub Jelinek : > > Hi! > > We ICE on the following testcase when wi::multiple_of_p is called on > widest_int 1 and -128 with UNSIGNED. I still need to work on the > actual wide-int.cc issue, the latest patch attached to the PR regressed > bitint-{38,39}.c, s

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

On 28/11/2023 23:26, Jeff Law wrote: On 11/28/23 15:18, Jivan Hakobyan wrote:     The amdgcn ICE I reported still exists: Can you send a build command to reproduce ICE. I built on x86-64, RV32/64, and did not get any faults. THe code is clearly wrong though.  We need to test that we have a s

Re: [PATCH v4] Introduce hardbool attribute for C

On Nov 20, 2023, Richard Biener wrote: > On Mon, 20 Nov 2023, Alexandre Oliva wrote: >> On Oct 20, 2023, Alexandre Oliva wrote: >> >> > Here's a refreshed and retested version of the patch for hardened >> > booleans in C. It is unchanged aside from some conflict resolution, >> > compared with

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

On Mon, 2023-11-27 at 23:06 -0700, Jeff Law wrote: > This has (of course) been tested on rv64.  It's also been bootstrapped > and regression tested on x86.  Bootstrap and regression tested (C only) > for m68k, sh4, sh4eb, alpha.  Earlier versions were also bootstrapped > and regression tested on

[PATCH] combine: Fix ICE in try_combine on pr112494.c [PR112560]

The compiler, configured with --enable-checking=yes,rtl,extra ICEs with: internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have 'E' (rtx unspec) in try_combine, at combine.cc:3237 This is 3236 /* Just replace the CC reg with a new mode. */ 3237 SUBST

Re: [PATCH] mingw: Exclude utf8 manifest [PR111170, PR108865]

Thanks. Eric, who originally reported the issue with the Ada compiler dropping a feature due to the utf8 manifest, is asking for this to be backported onto the 13 branch here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70#c13 If you agree with this, is there anything you would like me to d

Re: [PATCH #2/4] c++: mark short-enums as packed

Hello, Jason, On Nov 22, 2023, Jason Merrill wrote: > On 11/22/23 13:12, Jason Merrill wrote: >> I'm coming to the conclusion that your C++ patch is fine but we >> should remove the TYPE_PACKED warning from >> check_address_or_pointer_of_packed_member.  And maybe add >> -Wcast-align=strict to -

Re: [PATCH v1 2/2] LoongArch: Optimize vector constant extract-{even/odd} permutation.

On Tue, 2023-11-28 at 15:39 +0800, Li Wei wrote: > For vector constant extract-{even/odd} permutation replace the default > [x]vshuf instruction combination with [x]vilv{l/h} instruction, which > can reduce instructions and improves performance. > > gcc/ChangeLog: > > * config/loongarch/loo

[COMMITTED] testsuite: Adjust g++.dg/opt/devirt2.C on SPARC

Since 20231124, g++.dg/opt/devirt2.C began to FAIL on 32 and 64-bit Solaris/SPARC: FAIL: g++.dg/opt/devirt2.C -std=gnu++14 scan-assembler-times (jmp|call)[^\\n]*xyzzy 4 FAIL: g++.dg/opt/devirt2.C -std=gnu++17 scan-assembler-times (jmp|call)[^\\n]*xyzzy 4 FAIL: g++.dg/opt/devirt2.C -std=gnu+

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

Jivan Hakobyan writes: >> >> The amdgcn ICE I reported still exists: > > > Can you send a build command to reproduce ICE. > I built on x86-64, RV32/64, and did not get any faults. The ICE that Andrew reported relies on configuring with: --enable-checking=yes,extra,rtl since rtl checking isn't

Re: [PATCH] testsuite, x86: Handle a broken assembler.

Thanks Richard, Pushed as https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d65eb8a6bbeae7533dd41cb307b427f3f8585d9b FX

[PATCH] RISC-V: Support highpart overlap for vext.vf

PR target/112431 gcc/ChangeLog: * config/riscv/vector.md: Support highpart overlap for vext.vf2 gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/unop_v_constraint-2.c: Adapt test. * gcc.target/riscv/rvv/base/pr112431-4.c: New test. * gcc.target/riscv/

Re: [PATCH] mingw: Exclude utf8 manifest [PR111170, PR108865]

On 11/29/23 09:36, Costas Argyris wrote: Thanks. Eric, who originally reported the issue with the Ada compiler dropping a feature due to the utf8 manifest, is asking for this to be backported onto the 13 branch here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70#c13 If you agree with thi

Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

Looks like this already went in while I was looking at it... In general it looks ok to me but I would have really hoped for some more comments. > +;; These following constraints are used by RVV instructions with dest EEW > > src EEW. > +;; RISC-V 'V' Spec 5.2. Vector Operands: > +;; The destinat

Re: [PATCH v2] Fortran: fix reallocation on assignment of polymorphic variables [PR110415]

Hi Andrew, This is OK by me. I attach a slightly edited version of the patch itself in the hope that it will make the code a bit clearer. Thanks and welcome! Paul On Mon, 27 Nov 2023 at 17:35, Andrew Jenner wrote: > This is the second version of the patch - previous discussion at: > https:/

Re: Re: [PATCH 2/4] [ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insns

On 2023-11-29 13:26  Jeff Law wrote: > > > >On 11/27/23 19:32, Fei Gao wrote: >> op=[PLUS, MINUS, IOR, XOR, ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT] >> >> SIGN_EXTEND, ZERO_EXTEND and SUBREG has been considered >> to support SImode in 64-bit machine. >Let's defer these for now.  We're suppose

[PATCH] wide-int: Fix wide_int division/remainder [PR112733]

Hi! This patch fixes the other half of the PR, where we were crashing on the UNSIGNED widest_int modulo of 1 % -128 (where the -128 in UNSIGNED is 131072 bit 0xf...f80). The patch actually has 2 independent parts, if you want, they could be split out. The fix for the divmod buffer overflow

[RFC PATCH] RISC-V: Remove f{r,s}flags builtins

From: Christoph Müllner We have two builtins which are undocumented and have no known users. Further, they don't exist in LLVM (so are no portable). This means they are in an unclear state of being supported or not. Let's remove them get them out of this undecided state. A discussion about makin

Re: Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

>> Looks like this already went in while I was looking at it... I committed it after kito approve that. >> I can't really match spec and code. For the lmul = 2 case sure, >> but W84 e.g. allows v4 and not v6? What actually is "highest-numbered part"? Yes. For vwcvt, LMUL 4 -> LMUL 8. We allow

Re: [PATCH 09/44] RISC-V: Rework branch costing model for if-conversion

On Tue, 28 Nov 2023, Jeff Law wrote: > FWIW, I was looking at a regression with our internal tests after your > changes. It was quite nice to see how well twiddling -mbranch-cost > correlated to how many instructions we would allow in a conditional move > sequence. I'm a bit concerned though t

Re: [PATCH] tree-sra: Avoid returns of references to SRA candidates

Hi, On Tue, Nov 28 2023, Jan Hubicka wrote: >> On Tue, 28 Nov 2023, Martin Jambor wrote: >> >> > On Tue, Nov 28 2023, Richard Biener wrote: >> > > On Mon, 27 Nov 2023, Martin Jambor wrote: >> > > >> > >> Hi, >> > >> >> > >> The enhancement to address PR 109849 contained an importsnt thinko, >> >

Re: [COMMITTED] testsuite: Adjust g++.dg/opt/devirt2.C on SPARC

On Wed, 29 Nov 2023, Rainer Orth wrote: > Tested on sparc-sun-solaris2.11, installed on trunk. Thank you for fixing it. Maciej

Re: [PATCH] tree-sra: Avoid returns of references to SRA candidates

> Hi, > > On Tue, Nov 28 2023, Jan Hubicka wrote: > >> On Tue, 28 Nov 2023, Martin Jambor wrote: > >> > >> > On Tue, Nov 28 2023, Richard Biener wrote: > >> > > On Mon, 27 Nov 2023, Martin Jambor wrote: > >> > > > >> > >> Hi, > >> > >> > >> > >> The enhancement to address PR 109849 contained an

Re: [PATCH] wide-int: Fix wide_int division/remainder [PR112733]

On Wed, 29 Nov 2023, Jakub Jelinek wrote: > Hi! > > This patch fixes the other half of the PR, where we were crashing on the > UNSIGNED widest_int modulo of 1 % -128 (where the -128 in UNSIGNED is > 131072 bit 0xf...f80). > The patch actually has 2 independent parts, if you want, they cou

Re: [PATCH] combine: Fix ICE in try_combine on pr112494.c [PR112560]

On Wed, Nov 29, 2023 at 10:35 AM Uros Bizjak wrote: > > The compiler, configured with --enable-checking=yes,rtl,extra ICEs with: > > internal compiler error: RTL check: expected elt 0 type 'e' or 'u', > have 'E' (rtx unspec) in try_combine, at combine.cc:3237 > > This is > > 3236 /* J

Re: Re: [PATCH v2] gimple-match.pd Add more optimization for gimple_cond

On Tue, Nov 28, 2023 at 7:08 AM Andrew Pinski wrote: > > On Mon, Nov 27, 2023 at 10:04 PM Feng Wang > wrote: > > > > On 2023-11-28 11:06 Andrew Pinski wrote: > > >On Mon, Nov 27, 2023 at 6:56 PM Feng Wang > > >wrote: > > >> > > >> The link of PATCH v1: > > >> https://www.mail-archive.com/gc

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

On Wed, 2023-11-29 at 17:33 +0800, Xi Ruoyao wrote: > On Mon, 2023-11-27 at 23:06 -0700, Jeff Law wrote: > > This has (of course) been tested on rv64.  It's also been bootstrapped > > and regression tested on x86.  Bootstrap and regression tested (C only) > > for m68k, sh4, sh4eb, alpha.  Earlier

Re: [PATCH] [GCC] match.pd: Simplify rule for bitwise not with casts

On Tue, Nov 28, 2023 at 7:56 PM Andrew Pinski wrote: > > On Tue, Nov 28, 2023 at 7:38 AM wrote: > > > > From: Ezra Sitorus > > > > Add the transform rule (T)(~A) -> ~(T)(A) for view_convert. The simplified > > result could be a single assembly instruction when chained with other > > instructio

Re: [PATCH v4] Introduce strub: machine-independent stack scrubbing

On Wed, Nov 29, 2023 at 9:53 AM Alexandre Oliva wrote: > > On Nov 23, 2023, Richard Biener wrote: > > > Conceptually it shouldn't be much different from what IPA-SRA does > > which is cloning a function but with different arguments, the function > > signature transform described in terms of ipa-p

Fix '23_containers/span/at.cc' for '-fno-exceptions' configurations (was: [committed] libstdc++: Add std::span::at for C++26 (P2821R5))

Hi! On 2023-11-21T16:10:17+, Jonathan Wakely wrote: > Tested x86_64-linux. Pushed to trunk. > --- /dev/null > +++ b/libstdc++-v3/testsuite/23_containers/span/at.cc Pushed to master branch commit 762b428815d4e762abdff5c1ffc1e9aa60da7870 "Fix '23_containers/span/at.cc' for '-fno-exceptions' c

Re: Fix 'g++.dg/cpp26/static_assert1.C' for '-fno-exceptions' configurations

Hi! On 2023-11-28T12:11:22-0500, Jason Merrill wrote: > On 11/28/23 12:08, Thomas Schwinge wrote: >> // { dg-options "" } >> +// Override any default-'-fno-exceptions': >> +// { dg-additional-options -fexceptions } > > Might as well put the -fexceptions into the dg-options instead of having > tw

Re: [PATCH] combine: Fix ICE in try_combine on pr112494.c [PR112560]

On Wed, Nov 29, 2023 at 1:25 PM Richard Biener wrote: > > On Wed, Nov 29, 2023 at 10:35 AM Uros Bizjak wrote: > > > > The compiler, configured with --enable-checking=yes,rtl,extra ICEs with: > > > > internal compiler error: RTL check: expected elt 0 type 'e' or 'u', > > have 'E' (rtx unspec) in t

Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

>>> I can't really match spec and code.  For the lmul = 2 case sure, >>> but W84 e.g. allows v4 and not v6?  What actually is "highest-numbered >>>part"? > Yes. > > For vwcvt, LMUL 4 -> LMUL 8.  > We allow overlap  vwcvt v0 (occupy v0 - v7), v4 (occupy v4 - v7) > This patch support the overlap ab

Re: [PATCH] RISC-V: Support highpart overlap for vext.vf

LGTM (in context of the last message) but please consider adding the comments/naming I suggested. Regards Robin

RE: [PATCH 8/21]middle-end: update vectorizable_live_reduction with support for multiple exits and different exits

On Mon, 27 Nov 2023, Tamar Christina wrote: > > > > > This is a respun patch with a fix for VLA. > > > > > > This adds support to vectorizable_live_reduction to handle multiple > > > exits by doing a search for which exit the live value should be > > > materialized in. > > > > > > Additionally w

Re: Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

>> But don't we allow e.g. v2 and v4 with W82? Shouldn't it be % 8 == 6 >> and % 8 == 7 for W82 and W81? Or for W41, % 4 == 3? At least when looking >> at the given spec example that would correspond to W82? I think you are right. It should be W86 for vsext.vf4 (LMUL2 -> LMUL8) W87 for vsext.vf

Re: T-Head Vector for GCC-14? (was Re: RISC-V: Support XTheadVector extensions)

On Tue, Nov 28, 2023 at 5:21 PM Jeff Law wrote: > > On 11/28/23 12:56, Philipp Tomsich wrote: > > >> That's obviously a risky thing to do given it was sent right at the end > >> of the window, but it meets the rules. > >> > >> Folks in the call seemed generally amenable to at least trying for 14,

Re: Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt

>> overlap or group_overlap. Then change "no" to "none" and rename >> "vconstraint_enabled" to "group_overlap_valid" (or without the group). >> Add a comment to group_overlap_valid: >> ; Widening instructions have group-overlap constraints. Those are only >> ; valid for certain register-group s

Re: [PATCH v2 1/2] libatomic: atomic_16.S: Improve ENTRY, END and ALIAS macro interface

On 13/11/2023 11:37, Victor Do Nascimento wrote: The introduction of further architectural-feature dependent ifuncs for AArch64 makes hard-coding ifunc `_i' suffixes to functions cumbersome to work with. It is awkward to remember which ifunc maps onto which arch feature and makes the code har

GCN: Generally enable the 'gcc.target/gcn/avgpr-[...]' test cases (was: [committed] amdgcn: Add Accelerator VGPR registers)

Hi! On 2023-11-15T14:10:47+, Andrew Stubbs wrote: > * gcc.target/gcn/avgpr-mem-double.c: New test. > * gcc.target/gcn/avgpr-mem-int.c: New test. > * gcc.target/gcn/avgpr-mem-long.c: New test. > * gcc.target/gcn/avgpr-mem-short.c: New test. > * gcc.target/gcn/avgp

RE: [PATCH 9/21]middle-end: implement vectorizable_early_exit for codegen of exit code

On Mon, 27 Nov 2023, Tamar Christina wrote: > Ping > > > -Original Message- > > From: Tamar Christina > > Sent: Monday, November 6, 2023 7:40 AM > > To: gcc-patches@gcc.gnu.org > > Cc: nd ; rguent...@suse.de; j...@ventanamicro.com > > Subject: [PATCH 9/21]middle-end: implement vectorizab

Re: [PATCH] testsuite, i386: Only check for cfi directives if supported [PR112729]

Rainer Orth writes: > gcc.target/i386/apx-interrupt-1.c and two more tests FAIL on Solaris/x86 > with the native assembler. Like Darwin as, it doesn't support cfi > directives. Instead of adding more and more targets in every affected > test, this patch introduces a cfi effective-target keyword

Re: GCN: Generally enable the 'gcc.target/gcn/avgpr-[...]' test cases

On 29/11/2023 13:44, Thomas Schwinge wrote: Hi! On 2023-11-15T14:10:47+, Andrew Stubbs wrote: * gcc.target/gcn/avgpr-mem-double.c: New test. * gcc.target/gcn/avgpr-mem-int.c: New test. * gcc.target/gcn/avgpr-mem-long.c: New test. * gcc.target/gcn/avgpr-mem-sh

[PATCH] libiberty: Disable hwcaps for sha1.o

This patch commit bf4f40cc3195eb7b900bf5535cdba1ee51fdbb8e Author: Jakub Jelinek Date: Tue Nov 28 13:14:05 2023 +0100 libiberty: Use x86 HW optimized sha1 broke Solaris/x86 bootstrap with the native as: libtool: compile: /var/gcc/regression/master/11.4-gcc/build/./gcc/gccgo -B/var/gcc/

Re: [PATCH v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp

Hello All: I am working on fixing the below issues and incorporating comments from Kewen and Michael. Thanks & Regards Ajit On 28/11/23 9:11 pm, Michael Meissner wrote: > On Tue, Nov 28, 2023 at 05:44:43PM +0800, Kewen.Lin wrote: >> on 2023/11/28 15:05, Michael Meissner wrote: >>> I tried using

In 'libgomp.c/target-simd-clone-{1,2,3}.c', restrict 'scan-offload-ipa-dump's to 'only_for_offload_target amdgcn-amdhsa' (was: [PATCH v4] OpenMP: Generate SIMD clones for functions with "declare targe

Hi! On 2022-11-14T21:46:15-0700, Sandra Loosemore via Gcc-patches wrote: > [...] I've added infrastructure to support testing on the offload > compiler, added new test cases, and reworked the existing test cases to > scan for interesting things written to the dump file instead of > examining the

Re: [PATCH] libiberty: Disable hwcaps for sha1.o

On Wed, Nov 29, 2023 at 03:10:00PM +0100, Rainer Orth wrote: > 2023-11-29 Rainer Orth > > config: > * hwcaps.m4 (GCC_CHECK_ASSEMBLER_HWCAP): Require > AC_CANONICAL_TARGET. > > libiberty: > * configure.ac (GCC_CHECK_ASSEMBLER_HWCAP): Invoke. > * configure, ac

RE: [PATCH v4] [tree-optimization/110279] Consider FMA in get_reassociation_width

> -Original Message- > From: Richard Biener > Sent: Tuesday, November 21, 2023 9:01 PM > To: Di Zhao OS > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH v4] [tree-optimization/110279] Consider FMA in > get_reassociation_width > > On Thu, Nov 9, 2023 at 6:53 PM Di Zhao OS > wrote: > >

RE: [PATCH 10/21]middle-end: implement relevancy analysis support for control flow

On Mon, 27 Nov 2023, Tamar Christina wrote: > Ping > > > -Original Message- > > From: Tamar Christina > > Sent: Monday, November 6, 2023 7:40 AM > > To: gcc-patches@gcc.gnu.org > > Cc: nd ; rguent...@suse.de; j...@ventanamicro.com > > Subject: [PATCH 10/21]middle-end: implement relevancy

Re: [PATCH] Add C intrinsics for scalar crypto extension

On Mon, Nov 27, 2023 at 9:36 AM Liao Shihua wrote: > > This patch add C intrinsics for scalar crypto extension. > Because of riscv-c-api > (https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44/files) includes > zbkb/zbkc/zbkx's > intrinsics in bit manipulation extension, this patch only supp

Re: [PATCH v2 2/2] libatomic: Enable LSE128 128-bit atomics for armv9.4-a

On 13/11/2023 11:37, Victor Do Nascimento wrote: The armv9.4-a architectural revision adds three new atomic operations associated with the LSE128 feature: * LDCLRP - Atomic AND NOT (bitclear) of a location with 128-bit value held in a pair of registers, with original data loaded into

Re: [PATCH] aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c

The 11/10/2023 12:22, Florian Weimer wrote: > This test looks like it intends to pass a small struct argument > through both a non-variadic and variadic argument, but due to > the typo, it does not achieve that. > > gcc/testsuite/ > > * gcc.target/aarch64/aapcs64/ice_1.c (foo): Call named.

Re: [PATCH] aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c

On 10/11/2023 11:22, Florian Weimer wrote: This test looks like it intends to pass a small struct argument through both a non-variadic and variadic argument, but due to the typo, it does not achieve that. gcc/testsuite/ * gcc.target/aarch64/aapcs64/ice_1.c (foo): Call named. --- g

[PATCH] c++: wrong ambiguity in accessing static field [PR112744]

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? Now that I'm posting this patch, I think you'll probably want me to use ba_any unconditionally. That works too; g++.dg/tc1/dr52.C just needs a trivial testsuite tweak: 'C' is not an accessible base of 'X' v. 'C' is an inaccessible b

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

On Wed, 2023-11-29 at 20:37 +0800, Xi Ruoyao wrote: > On Wed, 2023-11-29 at 17:33 +0800, Xi Ruoyao wrote: > > On Mon, 2023-11-27 at 23:06 -0700, Jeff Law wrote: > > > This has (of course) been tested on rv64.  It's also been bootstrapped > > > and regression tested on x86.  Bootstrap and regression

Re: [PATCH] aarch64: enable mixed-types for aarch64 simdclones

Sorry for the very slow review on this. It LGTM apart from some minor comments below: "Andre Vieira (lists)" writes: > Hey, > > Just a minor update to the patch, I had missed the libgomp testsuite, so > had to make some adjustments there too. > > gcc/ChangeLog: > > * config/aarch64/aar

Re: [PATCH] aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder

The 11/10/2023 19:48, Florian Weimer wrote: > * config/aarch64/linux-unwind.h > (aarch64_fallback_frame_state): Add cast to the expected type > in sc assignment. > > (Almost a v2, but the other issue was already fixed via in r14-4183.) > > --- > libgcc/config/aarch64/linux-unwi

Re: [PATCH v7 2/5] OpenMP/OpenACC: Rework clause expansion and nested struct handling

Hi Julian, On 29.11.23 12:43, Julian Brown wrote: Here is a patch incorporating your initial review comments (hopefully!). Thanks. The patch LGTM - with the two remarks below addressed. (i.e. fixing one testcase and filing two PRs (or common PR) about the features missing and exposed by the

Re: [PATCH v2 1/3] libgomp, nvptx: low-latency memory allocator

On 08/09/2023 10:04, Tobias Burnus wrote: Regarding patch 2/3 and MEMSPACE_VALIDATE. In general, I wonder how to handle memory spaces (and traits) that aren't supported. Namely, when to return 0L and when to silently use ignore the trait / use another memory space. The current omp_init_allocat

Re: [committed v2] libstdc++: Define std::ranges::to for C++23 (P1206R7) [PR111055]

On Thu, 23 Nov 2023, Jonathan Wakely wrote: > Here's the finished version of the std::ranges::to patch, which I've > pushed to trunk. > > Tested x86_64-linux. > > -- >8 -- > > This adds the std::ranges::to functions for C++23. The rest of P1206R7 > is not yet implemented, i.e. the new construct

Re: [PATCH] Add C intrinsics for scalar crypto extension

在 2023/11/29 23:03, Christoph Müllner 写道: On Mon, Nov 27, 2023 at 9:36 AM Liao Shihua wrote: This patch add C intrinsics for scalar crypto extension. Because of riscv-c-api (https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44/files) includes zbkb/zbkc/zbkx's intrinsics in bit manipulati

[COMMITTED 1/2] Add operand_check_p to range-ops.

I've been going back and forth with this for the past week, and finally settled on a solution This patch adds an operand_check_p() (lhs_type, op1_type, op2_type) method to range_ops which will confirm whether the types of the operands being passed to fold_range, op1_range, and op2_range  are p

[COMMITTED 2/2] PR tree-optimization/111922 - Check operands before invoking fold_range.

This patch utilizes the new check_operands_p() routine in range-ops to verify the operands are compatible before IPA tries to call fold_range().   I do not know if there are other places in IPA that should be checking this, but we have a bug report for this place at least. The other option wou

Re: [PATCH 8/8] aarch64: Add SVE support for simd clones [PR 96342]

"Andre Vieira (lists)" writes: > Rebased, no major changes, still needs review. > > On 30/08/2023 10:19, Andre Vieira (lists) via Gcc-patches wrote: >> This patch finalizes adding support for the generation of SVE simd >> clones when no simdlen is provided, following the ABI rules where the >> w

Re: [PATCH v2 1/6] libgomp: basic pinned memory on Linux

On 22/11/2023 14:26, Tobias Burnus wrote: Hi Andrew, Side remark: -#define MEMSPACE_CALLOC(MEMSPACE, SIZE) \ - calloc (1, (((void)(MEMSPACE), (SIZE This fits a bit more to previous patch, but I wonder whether that should use (MEMSPACE, NMEMB, SIZE) instead - to fit to the actual calloc

Re: [PATCH] c++: wrong ambiguity in accessing static field [PR112744]

On Wed, 29 Nov 2023, Marek Polacek wrote: > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? > > Now that I'm posting this patch, I think you'll probably want me to use > ba_any unconditionally. That works too; g++.dg/tc1/dr52.C just needs > a trivial testsuite tweak: > 'C' is not

Re: [RFA] New pass for sign/zero extension elimination

Why did you leave out MINUS from safe_for_live_propagation ?

Re: [PATCH] c++: wrong ambiguity in accessing static field [PR112744]

On Wed, Nov 29, 2023 at 12:23:46PM -0500, Patrick Palka wrote: > On Wed, 29 Nov 2023, Marek Polacek wrote: > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? > > > > Now that I'm posting this patch, I think you'll probably want me to use > > ba_any unconditionally. That works too

Re: [PATCH v2 4/5] Add support for target_version attribute

Andrew Carlotti writes: > This patch adds support for the "target_version" attribute to the middle > end and the C++ frontend, which will be used to implement function > multiversioning in the aarch64 backend. > > On targets that don't use the "target" attribute for multiversioning, > there is no

Re: [PATCH] Add C intrinsics for scalar crypto extension

On Wed, Nov 29, 2023 at 5:49 PM Liao Shihua wrote: > > > 在 2023/11/29 23:03, Christoph Müllner 写道: > > On Mon, Nov 27, 2023 at 9:36 AM Liao Shihua wrote: > > This patch add C intrinsics for scalar crypto extension. > Because of riscv-c-api > (https://github.com/riscv-non-isa/riscv-c-api-doc/pull

Re: [PATCH] testsuite: scev: expect fail on ilp32

> From: Rainer Orth > Date: Tue, 28 Nov 2023 16:13:35 +0100 > Richard Biener writes: > > > On Sun, 19 Nov 2023, Jeff Law wrote: > > > >> > >> > >> On 11/19/23 00:30, Alexandre Oliva wrote: > >> > > >> > I've recently patched scev-3.c and scev-5.c because it only passed by > >> > accident on

Re: [PATCH v2] AArch64: Fix strict-align cpymem/setmem [PR103100]

Wilco Dijkstra writes: > v2: Use UINTVAL, rename max_mops_size. > > The cpymemdi/setmemdi implementation doesn't fully support strict alignment. > Block the expansion if the alignment is less than 16 with STRICT_ALIGNMENT. > Clean up the condition when to use MOPS. > > Passes regress/bootstrap, OK

Re: [PATCH v2] AArch64: Add inline memmove expansion

Wilco Dijkstra writes: > v2: further cleanups, improved comments > > Add support for inline memmove expansions. The generated code is identical > as for memcpy, except that all loads are emitted before stores rather than > being interleaved. The maximum size is 256 bytes which requires at most 1

[PATCH] c++, v4: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]

On Tue, Nov 28, 2023 at 11:27:55AM -0500, Jason Merrill wrote: > On 11/24/23 03:34, Jakub Jelinek wrote: > > On Mon, Sep 18, 2023 at 07:12:40PM +0200, Jakub Jelinek via Gcc-patches > > wrote: > > > On Tue, Aug 22, 2023 at 09:39:11AM +0200, Jakub Jelinek via Gcc-patches > > > wrote: > > > > The fo

[committed] rs6000: Fix up c-c++-common/builtin-classify-type-1.c failure [PR112725]

Hi! The rs6000 backend (and s390 one as well) diagnoses passing vector types to unprototyped functions, which breaks the builtin-classify-type-1.c test. The builtin isn't really unprototyped, it is just type-generic and accepting vector types is just fine there, all it does is categorize the vecto

[PATCH] s390: Fix builtin-classify-type-1.c on s390 too [PR112725]

Hi! Given that the s390 backend defines pretty much the same target hook as rs6000, I believe it suffers (at least when using -mvx?) the same problem as rs6000, though admittedly this is so far completely untested. Ok for trunk if it passes bootstrap/regtest there? 2023-11-29 Jakub Jelinek

[PATCH] bpf: change ASM_COMMENT_START to '#'

The BPF "pseudo-C" assembly dialect uses semi-colon (;) to separate statements, not to begin line comments. The GNU assembler was recently changed accordingly: https://sourceware.org/pipermail/binutils/2023-November/130867.html This patch adapts the BPF backend in GCC accordingly, to use a hash

Re: [PATCH] c++, v4: Implement C++26 P2169R4 - Placeholder variables with no name [PR110349]

On 11/29/23 13:01, Jakub Jelinek wrote: On Tue, Nov 28, 2023 at 11:27:55AM -0500, Jason Merrill wrote: On 11/24/23 03:34, Jakub Jelinek wrote: On Mon, Sep 18, 2023 at 07:12:40PM +0200, Jakub Jelinek via Gcc-patches wrote: On Tue, Aug 22, 2023 at 09:39:11AM +0200, Jakub Jelinek via Gcc-patches

[PATCH v2] c++: P2280R4, Using unknown refs in constant expr [PR106650]

On Mon, Nov 20, 2023 at 04:29:33PM -0500, Jason Merrill wrote: > On 11/17/23 16:46, Marek Polacek wrote: > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? > > > > -- >8 -- > > This patch is an attempt to implement (part of?) P2280, Using unknown > > pointers and references in consta

Re: [PATCH] c++: wrong ambiguity in accessing static field [PR112744]

On 11/29/23 10:45, Marek Polacek wrote: Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? Now that I'm posting this patch, I think you'll probably want me to use ba_any unconditionally. That works too; g++.dg/tc1/dr52.C just needs a trivial testsuite tweak: 'C' is not an accessibl

Re: [PATCH #2/4] c++: mark short-enums as packed

On 11/29/23 04:39, Alexandre Oliva wrote: Hello, Jason, On Nov 22, 2023, Jason Merrill wrote: On 11/22/23 13:12, Jason Merrill wrote: I'm coming to the conclusion that your C++ patch is fine but we should remove the TYPE_PACKED warning from check_address_or_pointer_of_packed_member.  And may

Re: [PATCH] bpf: change ASM_COMMENT_START to '#'

Hi David. OK. Thanks. > The BPF "pseudo-C" assembly dialect uses semi-colon (;) to separate > statements, not to begin line comments. The GNU assembler was recently > changed accordingly: > > https://sourceware.org/pipermail/binutils/2023-November/130867.html > > This patch adapts the BPF bac

Re: [RFA] New pass for sign/zero extension elimination

We already noticed it and will roll back in V3 With the best regards Jivan Hakobyan > On 29 Nov 2023, at 21:37, Joern Rennecke wrote: > > Why did you leave out MINUS from safe_for_live_propagation ?

Re: [V2] New pass for sign/zero extension elimination -- not ready for "final" review

The reason is removing MINUS from safe_for_live_propagation. We did not do it on purpose, will roll back on V3. > On 29 Nov 2023, at 19:46, Xi Ruoyao wrote: > > On Wed, 2023-11-29 at 20:37 +0800, Xi Ruoyao wrote: >>> On Wed, 2023-11-29 at 17:33 +0800, Xi Ruoyao wrote: >>> On Mon, 2023-11-2

Re: [RFC PATCH] RISC-V: Remove f{r,s}flags builtins

Hi Christoph, The precommit-ci is seeing a large number of ICE segmentation faults as a result of this patch: https://github.com/ewlu/gcc-precommit-ci/issues/796#issuecomment-1831853523 The failures aren't in riscv.exp testsuite files so that's likely why you didn't run into them in your test

[PATCH] c++: bogus -Wparentheses warning [PR112765]

Bootstrapped and regtested on x86_64-pc-linu-xgnu, does this look OK for trunk? -- >8 -- We need to consistently look through implicit INDIRECT_REF when setting/checking for -Wparentheses warning suppression. In passing use STRIP_REFERENCE_REF consistently as well. PR c++/112765 gcc/cp

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