On 25/01/13 06:15, Hurugalawadi, Naveen wrote:
Hi,
Please find attached the patch that fixes following warning in aarch64:-
warning: "TARGET_FIXED_CONDITION_CODE_REGS" redefined
Thanks,
Naveen.H.S
2013-01-25 Naveen H.S
* config/aarch64/aarch64.c (TARGET_FIXED_CONDITION_CODE_REGS):
On 14/01/13 18:00, Tejas Belagod wrote:
Hi,
Attached is a patch that fixes sqdmulh_lane_* intrinsics. Previously they,
used to accept 128-bit lane index range. This fixes this bug to accept 64-bit
lane index range. sqdmulh_laneq_* and AdvSIMD scalar ones still accept
128-bit lane index range as
Vladimir,
this patch adds analysis of register usage of functions for usage by IRA.
The patch:
- adds analysis in pass_final to track which hard registers are set or clobbered
by the function body, and stores that information in a struct cgraph_node.
- adds a target hook fn_other_hard_reg_usage
Hello!
> The libitm TSX hardware transaction fast path currently does quite a bit of
> unnecessary work (saving registers etc.) before even trying to start
> a hardware transaction. This patch moves the initial attempt at a
> transaction early into the assembler stub. Complicated work like retries
On Thu, Jan 24, 2013 at 7:15 PM, Jonathan Wakely wrote:
> Googlers, please include the libstdc++ list on patches to the
> libstdc++ code, even if it's only to a google branch. I don't read
> gcc-patches but am still interested in the changes you make to the
> code on your branch.
Thanks Jonathan
On 01/24/2013 06:45 PM, David Edelsohn wrote:
>> Since switching to C++ inside gcc, it isn't possible to get working gcc/g++
>> binaries installed using native ld on AIX without this patch, as these need
>> dynamic libstdc++.a from builddir(!). Even after successful build with the
>> workaround fr
On Thu, Jan 24, 2013 at 4:15 PM, Jonathan Wakely wrote:
> This does look like something that could be included in debug mode,
> but probably not until we're back in Stage 1. Please either put it in
> Bugzilla (and CC me) or if you're diligent enough to remember please
> email us again during Sta
ira-improv branch has been merged with trunk @ 195439.
Committed as rev. 195438.
On 01/25/2013 08:05 AM, Tom de Vries wrote:
Vladimir,
this patch adds analysis of register usage of functions for usage by IRA.
The patch:
- adds analysis in pass_final to track which hard registers are set or clobbered
by the function body, and stores that information in a struct cgraph_nod
> Probably the attached (RFC) patch can be useful in this case. The
> patch allows to specify the label for xbegin, so it is possible to
> implement code like following (non-sensical) example:
It can be actually implemented using asm goto. I have some macros
for this. And the tree optimizers shou
On Fri, Jan 25, 2013 at 8:55 AM, Michael Haubenwallner
wrote:
> Hmm - which "oslevel -s" do you use?
>
> Here I've tried on 7100-01-05-1228.
> Also available are 5300-08-09-1013 and 6100-07-05-1228.
I used to bootstrap on AIX 5.3. I now bootstrap on AIX 7.1 and I try
AIX 6.1 occasionally.
> In
Ping?
Thanks,
Greta
> -Original Message-
> From: Greta Yorsh [mailto:greta.yo...@arm.com]
> Sent: 18 January 2013 11:44
> To: GCC Patches
> Cc: richard.sandif...@linaro.org; Ramana Radhakrishnan; Richard
> Earnshaw
> Subject: [PATCH,ARM] remove incscc and decscc patterns
>
> Remove incsc
On 18/01/13 11:44, Greta Yorsh wrote:
Remove incscc and decscc expanders that appear to be dead, along with the
related patterns.
This patch is a follow up on:
http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01128.html
No regression qemu for arm-none-eabi. Bootstrap successful.
Ok for trunk?
Tha
We were getting type-punning warnings while building up code to
dereference a pointer to member function because the compiler can see
that the complete object doesn't have a vtable. In such cases, we can
also see that and avoid building up that code in the first place.
Tested x86_64-pc-linux-
On Jan 24, 2013, at 11:28 AM, Georg-Johann Lay wrote:
>> Please consider this as a reminder to review the patch posted at
>> following link:-
>> http://gcc.gnu.org/ml/gcc-patches/2012-12/msg00765.html
>
> What is this good for?
>
> Why are you changing the semantics of an existing, global constr
This sequence of patches improves Cortex-A7 pipeline description.
[1/5] Add ffmas and ffmad type attribute and use it instead of fmacs and
fmacd (respectively) for fused multiply and accumulate operations.
[2/5] Update pipeline description of vdiv, vsqrt, and various vfp and neon
mac operations.
[
Applied as obvious:
http://gcc.gnu.org/r195471
* doc/extend.texi (Example of asm with clobbered asm reg): Fix
missing ':' in asm example.
Fused and not fused multiply and accumulated operations may have different
timing characteristics, for example in Cortex-A7. Currently, the compiler
captures all of these operations using the same "type" attribute fmac.
This patch adds a new "type" attribute ffma to separate fused operations
from
Hi!
As shown by the testcases, we shouldn't try to optimize volatile
stores resp. loads in tree-ssa-phiopt.c.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?
2013-01-25 Jakub Jelinek
PR tree-optimization/56098
* tree-ssa-phiopt.c (nt_init_bl
This patch updates the description of vmul, vdiv, vsqrt, vmla,vmls, vfma,
vfms operations for vfp and neon. It uses ffmas and ffmad type attribute
introduced by the previous patch.
gcc/
2013-01-03 Greta Yorsh
* config/arm/cortex-a7.md (cortex_a7_neon_mul, cortex_a7_neon_mla):
New
Add bypasses to forward the result of one MAC operation to the accumulator
of another MAC operation.
Towards this end, we add a new function arm_mac_accumulator_is_result to be
used as a guard for bypasses. Existing guard
arm_mac_accumulator_is_mul_result requires a multiply operation as the
produ
Improve handling of call insns in cortex-a7 pipeline description, as
follows.
A call can dual-issue as a younger instruction but not as an older
instruction (from compiler's point of view). This patch adjusts the function
cortexa7_younger (used by the implementation of TARGET_SCHED_REORDER hook)
In cortex_a7_idiv, the use of cortex_a7_all reservation can be replaced by
cortex_a7_both, because all other reservations require at least one of
cortex_a7_ex1 or cortex_a7_ex2. Then, remove unused reservation units
cortex_a7_neon and cortex_a7_all.
gcc/
2013-01-03 Greta Yorsh
* confi
PR54814 causes spill fails because reload.c:find_valid_class_1 tests only one
hard register instead of all hard registers of regno:mode in rclass:
http://gcc.gnu.org/PR54814
The patch was originally worked out by Bernd Schmidt and fixed a problem
introduced in
http://gcc.gnu.org/r190252
The pa
Given what stage we are in for trunk, I'm going to let the arm folks review
this… [ this is my form of a ping for you! ]
On Jan 21, 2013, at 9:04 PM, amol pise wrote:
> Please let me know the patch is OK for trunk ?
>
> On 1/21/13, amol pise wrote:
>>
>> * gcc/testsuite/gcc.target/arm/neon-v
Committed as obvious:
http://gcc.gnu.org/r195473
http://gcc.gnu.org/r195472
* doc/invoke.texi (AVR Built-in Macros): Document __XMEGA__.
On 01/25/2013 11:41 AM, Georg-Johann Lay wrote:
PR54814 causes spill fails because reload.c:find_valid_class_1 tests only one
hard register instead of all hard registers of regno:mode in rclass:
http://gcc.gnu.org/PR54814
The patch was originally worked out by Bernd Schmidt and fixed a problem
We were assuming well-formed code.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit dc80cbbc639c39dd8728aa14d6188bcd9061bfd0
Author: Jason Merrill
Date: Fri Jan 25 06:15:26 2013 -0500
PR c++/56095
* pt.c (convert_nontype_argument_function): Handle invalid input.
(convert_n
On 01/25/2013 11:21 AM, Jakub Jelinek wrote:
Hi!
As shown by the testcases, we shouldn't try to optimize volatile
stores resp. loads in tree-ssa-phiopt.c.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?
2013-01-25 Jakub Jelinek
PR tree-optimizatio
Jeff Law schrieb:
On 01/25/2013 11:41 AM, Georg-Johann Lay wrote:
PR54814 causes spill fails because reload.c:find_valid_class_1 tests
only one
hard register instead of all hard registers of regno:mode in rclass:
http://gcc.gnu.org/PR54814
The patch was originally worked out by Bernd Schmidt
This patch, written by Jakub in PR 56076, avoids crashing in
libbacktrace if it sees a relative file name but did not see a
DW_AT_comp_dir attribute. Bootstrapped and ran libbacktrace testsuite
on x86_64-unknown-linux-gnu. Committed to mainline.
Ian
2013-01-25 Jakub Jelinek
PR othe
Looks like sparc64 broke for libgo when parallel garbage collection was
introduced. This patch is an attempt to get it working again.
Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu, not that
that proves much. Committed to mainline.
Ian
diff -r b8ae4def7c14 libgo/runtime/lfstack.c
On Tue, Jan 15, 2013 at 9:45 AM, Mike Frysinger wrote:
> On Tuesday 15 January 2013 09:56:06 Ian Lance Taylor wrote:
>> On Sun, Dec 23, 2012 at 3:30 PM, Mike Frysinger wrote:
>> > diff --git a/libgo/configure.ac b/libgo/configure.ac
>> > index 8cde50b..63d8cbc 100644
>> > --- a/libgo/configure.ac
Hi all,
I thought I would update my entry which just mentions the bug work
which I have done. I mentioned pointer plus and other optimizations
in the new entry. I think other people should update their own entry
also.
Thanks,
Andrew Pinski
* doc/contrib.texi (Contributors): Update Andrew Pin
On Friday 25 January 2013 19:13:55 Ian Lance Taylor wrote:
> On Tue, Jan 15, 2013 at 9:45 AM, Mike Frysinger wrote:
> > On Tuesday 15 January 2013 09:56:06 Ian Lance Taylor wrote:
> >> On Sun, Dec 23, 2012 at 3:30 PM, Mike Frysinger wrote:
> >> > diff --git a/libgo/configure.ac b/libgo/configure.ac
On Wed, 23 Jan 2013, Richard Sandiford wrote:
> > Index: config/mips/gnu-user.h
> > ===
> > --- config/mips/gnu-user.h (revision 195351)
> > +++ config/mips/gnu-user.h (working copy)
> > @@ -137,3 +137,12 @@ extern const char *host_
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