On 14/01/13 18:00, Tejas Belagod wrote:
Hi, Attached is a patch that fixes sq<r>dmulh<q>_lane_* intrinsics. Previously they, used to accept 128-bit lane index range. This fixes this bug to accept 64-bit lane index range. sq<r>dmulh<q>_laneq_* and AdvSIMD scalar ones still accept 128-bit lane index range as before. It has passed regressions on aarch64-none-elf. OK for trunk and aarch64-4.7-branch?
OK
