Date: 2023-07-27 17:57
To: juzhe.zh...@rivai.ai
CC: gcc-patches; kito.cheng; jeffreyalaw; Robin Dapp
Subject: Re: Re: [PATCH V3] RISC-V: Enable basic VLS modes support
Hmmm, does it mean we'll have (set (mem) (mem)) after legitimize_move???
Or maybe try to
use define_insn_and_split rathe
ds[0], operands[1]);
gcc_assert (ok_p);
DONE;
}
)
Is it reasonable to you?
juzhe.zh...@rivai.ai
From: Kito Cheng
Date: 2023-07-27 17:57
To: juzhe.zh...@rivai.ai
CC: gcc-patches; kito.cheng; jeffreyalaw; Robin Dapp
Subject: Re: Re: [PATCH V3] RISC-V: Enable basic VLS modes support
Hmm
Hmmm, does it mean we'll have (set (mem) (mem)) after legitimize_move???
Or maybe try to
use define_insn_and_split rather than define_split for the (set (mem) (mem))
On Thu, Jul 27, 2023 at 5:50 PM juzhe.zh...@rivai.ai
wrote:
>
> Hi, kito.
> I tried to reject mem->mem in this pattern:
> (define
Hi, kito.
I tried to reject mem->mem in this pattern:
(define_insn_and_split "*mov"
[(set (match_operand:VLS_AVL_IMM 0 "reg_or_mem_operand" "=vr, m, vr")
(match_operand:VLS_AVL_IMM 1 "reg_or_mem_operand" " m,vr, vr"))]
"TARGET_VECTOR
&& (register_operand (operands[0], mode)
|
