rator for example: VF VWFetc.
>
>
> juzhe.zh...@rivai.ai
>
>
> From: Kito Cheng
> Date: 2023-06-06 09:32
> To: juzhe.zh...@rivai.ai
> CC: pan2.li; gcc-patches; Kito.cheng; yanzhang.wang
> Subject: Re: [PATCH v1] RISC-V: Support RV
WFetc.
>
>
> juzhe.zh...@rivai.ai
>
>
> From: Kito Cheng
> Date: 2023-06-06 09:32
> To: juzhe.zh...@rivai.ai
> CC: pan2.li; gcc-patches; Kito.cheng; yanzhang.wang
> Subject: Re: [PATCH v1] RISC-V: Support RVV FP16 ZVFH Reduction
> floating-point intri
: Re: [PATCH v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point
intrinsic API
> diff --git a/gcc/config/riscv/vector-iterators.md
> b/gcc/config/riscv/vector-iterators.md
> index e4f2ba90799..c338e3c9003 100644
> --- a/gcc/config/riscv/vector-iterators.md
> +++ b/gcc/conf
previous one?
Both works for me.
Pan
From: juzhe.zh...@rivai.ai
Sent: Tuesday, June 6, 2023 9:39 AM
To: kito.cheng
Cc: Li, Pan2 ; gcc-patches ;
Kito.cheng ; Wang, Yanzhang
Subject: Re: Re: [PATCH v1] RISC-V: Support RVV FP16 ZVFH Reduction
floating-point intrinsic API
Oh. YES. Thanks
Subject: Re: [PATCH v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point
intrinsic API
> diff --git a/gcc/config/riscv/vector-iterators.md
> b/gcc/config/riscv/vector-iterators.md
> index e4f2ba90799..c338e3c9003 100644
> --- a/gcc/config/riscv/vector-iterators.md
> +++ b/gcc/conf
> diff --git a/gcc/config/riscv/vector-iterators.md
> b/gcc/config/riscv/vector-iterators.md
> index e4f2ba90799..c338e3c9003 100644
> --- a/gcc/config/riscv/vector-iterators.md
> +++ b/gcc/config/riscv/vector-iterators.md
> @@ -330,10 +330,18 @@ (define_mode_iterator VF_ZVE32 [
> ])
> (define_mod
LGTM
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-06-05 22:49
To: gcc-patches
CC: juzhe.zhong; kito.cheng; pan2.li; yanzhang.wang
Subject: [PATCH v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point
intrinsic API
From: Pan Li
This patch support the intrinsic API of FP16 ZVFH Reducti
