On 2012-06-13 01:33, Richard Guenther wrote:
> If you are sure it won't break anything go ahead (sooner than later please).
Done.
r~
On 2012-06-12 16:16, David Edelsohn wrote:
> Should Altivec and SSE be used for TImode, and AVX for OImode?
I dunno about Altivec, but SSE/AVX loads are not guaranteed atomic, so, no.
r~
On Tue, 12 Jun 2012, Richard Henderson wrote:
> On 2012-06-11 18:40, David Edelsohn wrote:
> >> > Nope. I do see the obvious mistake in the atomic_load pattern though:
> >> > The mode iterator should have been INT1 not INT.
> > Did you want to commit the fix for the iterator?
> >
>
> Applied th
On Tue, Jun 12, 2012 at 9:40 AM, Richard Henderson wrote:
>> I like your suggestion, but the PowerPC developer community does not
>> uniformly appreciate that behavior.
>
> Surely there's a difference between gratuitously using fp registers
> and that being the *only* way to implement a particula
On Tue, Jun 12, 2012 at 11:51 AM, Richard Henderson wrote:
> On 2012-06-11 18:40, David Edelsohn wrote:
>>> > Nope. I do see the obvious mistake in the atomic_load pattern though:
>>> > The mode iterator should have been INT1 not INT.
>> Did you want to commit the fix for the iterator?
>>
>
> App
On Jun 12, 2012, at 6:40 AM, Richard Henderson wrote:
> On 2012-06-11 18:40, David Edelsohn wrote:
>> On Sat, Jun 9, 2012 at 10:40 AM, Richard Henderson wrote:
>>
>>> Nope. I do see the obvious mistake in the atomic_load pattern though:
>>> The mode iterator should have been INT1 not INT.
>>
>>
On 2012-06-11 18:40, David Edelsohn wrote:
>> > Nope. I do see the obvious mistake in the atomic_load pattern though:
>> > The mode iterator should have been INT1 not INT.
> Did you want to commit the fix for the iterator?
>
Applied the following to mainline.
It ought to go onto the 4.7 branch
On 2012-06-11 18:40, David Edelsohn wrote:
> On Sat, Jun 9, 2012 at 10:40 AM, Richard Henderson wrote:
>
>> Nope. I do see the obvious mistake in the atomic_load pattern though:
>> The mode iterator should have been INT1 not INT.
>
> Did you want to commit the fix for the iterator?
Yes. I'm j
On Sat, Jun 9, 2012 at 10:40 AM, Richard Henderson wrote:
> Nope. I do see the obvious mistake in the atomic_load pattern though:
> The mode iterator should have been INT1 not INT.
Did you want to commit the fix for the iterator?
> ... and for extra credit we ought to implement DImode atomic l
On 2012-06-09 03:39, Eric Botcazou wrote:
> the 4.7 compiler generates at -O:
>
> load:
> sync
> lwz 10,0(3)
> lwz 11,4(3)
> cmpw 7,10,10
> bne- 7,$+4
> isync
> mr 3,10
> mr 4,11
> blr
>
> Is that really an atomic load?
Nope
> The conversion of the __sync post-reload splitters was half
> complete. Since there are nearly no restrictions on what may
> appear between LL and SC, expand all the patterns immediatly.
> This allows significantly easier code generation for subword
> atomic operations.
On PowerPC/Linux, for:
Richard,
* rs6000: Rewrite sync patterns for atomic; expand early.
Okay. Please go ahead and apply your patch with the conservative
implementation of memory model for CONSUME while I investigate
further.
Thanks, David
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