On Jun 12, 2012, at 6:40 AM, Richard Henderson wrote: > On 2012-06-11 18:40, David Edelsohn wrote: >> On Sat, Jun 9, 2012 at 10:40 AM, Richard Henderson <r...@twiddle.net> wrote: >> >>> Nope. I do see the obvious mistake in the atomic_load pattern though: >>> The mode iterator should have been INT1 not INT. >> >> Did you want to commit the fix for the iterator? > > Yes. I'm just finishing testing that patch in fact. > >> I like your suggestion, but the PowerPC developer community does not >> uniformly appreciate that behavior. > > Surely there's a difference between gratuitously using fp registers > and that being the *only* way to implement a particular operation...
I think this would be a good question to ask the hard real time low latency interrupt crowd, I was going to say they prefer low latency interrupts, but, to the extent you have to use a slow mechanism instead of using DI atomic FPRs... I'm not sure how they would weigh in. Maybe the RTEMS, Ada or CodeSourcery people can weigh in...
