RE: [gcc-wwwdocs PATCH] gcc-14/15: Mention recent change for Intel x86_64

> From: Gerald Pfeifer > Sent: Sunday, March 30, 2025 4:23 AM > > On Mon, 24 Mar 2025, Haochen Jiang wrote: > > Mention AVX10.1 option changes, revise AVX10.2 option and mention > > APX_F new feature in GCC 15. > > --- > > >New ISA extension support for Intel AVX10.1 was added. > > - AV

RE: [PATCH 00/27] Use avx10.x as the only option for AVX10 with 512 bit vector support while remove avx10.x-256/512 option and 256 bit rounding support

> all AVX512 features while disabling AVX512FP16. And "-mavx512f -mno- > avx10.1" > should disable all AVX512 features. Both of the two combinations currently > will ignore "-mno-". In GCC 15, we will raise a warning to mention that we Correction here, "-mavx512f -mno-avx10.1" should keep AVX512 o

RE: [gcc-wwwdocs PATCH] gcc-14/15: Mention recent change for Intel x86_64

> From: Gerald Pfeifer > Sent: Sunday, March 30, 2025 5:23 AM > > On Mon, 24 Mar 2025, Haochen Jiang wrote: > > Mention AVX10.1 option changes, revise AVX10.2 option and mention > > APX_F new feature in GCC 15. > > --- > > >New ISA extension support for Intel AVX10.1 was added. > > - AV

RE: [RFC PATCH] i386: Re-alias -mavx10.2 to 512 bit and make -mno-avx10.x-512 disable the whole AVX10.x

> From: Richard Biener > Sent: Tuesday, January 28, 2025 4:41 PM > > >On Mon, Jan 27, 2025 at 3:54 PM Jiang, Haochen > >wrote: > > -mno-evex512 will do nothing with AVX10 related options. It will only > > apply on -mavx512xxx options. > > > > In GC

RE: [RFC PATCH] i386: Re-alias -mavx10.2 to 512 bit and make -mno-avx10.x-512 disable the whole AVX10.x

> From: Richard Biener > Sent: Monday, January 27, 2025 5:09 PM > > On Mon, Jan 27, 2025 at 8:30 AM Haochen Jiang > wrote: > > > > Hi all, > > > > AVX10 has been published for one and half year and we have got many > > feedbacks on that, one of the feedback is on whether the alias option > > -ma

RE: [COMMITTED] OpenMP: Fix metadirective test failures on x86_64 with -m32

> From: Sandra Loosemore > Sent: Friday, January 17, 2025 12:11 PM > Thanks for the quick fix! Thx, Haochen > gcc/testsuite/ChangeLog > * c-c++-common/gomp/metadirective-device.c: Don't add extra > options > for target ia32. > * c-c++-common/gomp/metadirective-target-device-1

RE: [PATCH] i386: Change mnemonics from TCVTROWPS2PBF16[H,L] to TCVTROWPS2BF16[H,L]

> From: Liu, Hongtao > Sent: Friday, January 3, 2025 6:33 PM > > > From: Jiang, Haochen > > Sent: Friday, January 3, 2025 4:55 PM > > > > Hi all, > > > > The mnemonics for TCVTROWPS2PBF16[H,L] has been changed to > > TCVTROWPS2BF16[H,L] in ISE0

RE: [gcc-wwwdocs PATCH] gcc-15: Mention new ISA and Diamond Rapids support for x86_64 backend

> From: Gerald Pfeifer > Sent: Tuesday, December 17, 2024 3:57 PM > > On Mon, 25 Nov 2024, Jiang, Haochen wrote: > > I will do all of the changes with little tweak here. The "and" should > > be added (actually changed the previous "or" to "and&qu

RE: [PATCH] Support Intel AVX10.2 minmax, vector copy and compare instructions

Oops, Please ignore this patch, should be sent to Binutils not here. Multi-threading made the mistake. Thx, Haochen > From: Haochen Jiang > Sent: Wednesday, December 4, 2024 3:29 PM > > From: "Mo, Zewei" > > Hi all, > > As satcvt patch is about to commit, we will move on the final patch of

RE: [committed] c: Default to -std=gnu23

> From: Joseph Myers > Sent: Saturday, November 16, 2024 7:47 AM > > Change the default language version for C compilation from -std=gnu17 > to -std=gnu23. A few tests are updated to remove local definitions of > bool, true and false (where making such an unconditional test change > seemed to ma

RE: [gcc-wwwdocs PATCH] gcc-15: Mention new ISA and Diamond Rapids support for x86_64 backend

> From: Gerald Pfeifer > Sent: Sunday, November 24, 2024 7:17 AM > > On Mon, 11 Nov 2024, Haochen Jiang wrote: > > This patch will add recent new ISA and arch support for x86_64 backend > > into gcc-wwwdocs. > > > + New ISA extension support for Intel AMX-AVX512 was added. > > In all these cas

RE: [gcc-wwwdocs PATCH] gcc-15: Mention new ISA and Diamond Rapids support for x86_64 backend

Ping for this gcc-wwwdocs patch. Thx, Haochen > From: Haochen Jiang > Sent: Monday, November 11, 2024 11:16 AM > > Hi all, > > This patch will add recent new ISA and arch support for x86_64 backend into > gcc-wwwdocs. > > Ok for gcc-wwwdocs? > > Thx, > Haochen > > --- > htdocs/gcc-15/chang

RE: [PATCH] testsuite: Fix up builtin-prefetch-1.c tests

> From: Xi Ruoyao > Sent: Saturday, November 2, 2024 1:16 AM > > How can you use "read-shared" as an identifier? It's not allowed by all C > standard versions. > I did a last minute change to fix that but unfortunately did not get into my patch. My apology. Thx, Haochen

RE: Pushed: [PATCH] testsuite: Fix up builtin-prefetch-1.c tests

> From: Xi Ruoyao > Sent: Saturday, November 2, 2024 1:50 AM \ > > On 11/1/24 11:16 AM, Xi Ruoyao wrote: > > > How can you use "read-shared" as an identifier?  It's not allowed by > > > all C standard versions. > > > > > > gcc/testsuite/ChangeLog: > > > > > > * gcc.c-torture/execute/builtin-pref

RE: [r15-4833 Regression] FAIL: gcc.dg/builtin-prefetch-1.c (test for warnings, line 36) on Linux/x86_64

> From: haochen.jiang > Sent: Friday, November 1, 2024 4:32 PM > > On Linux/x86_64, > > e9ab41b79933d42410126f0eb7b29f820745276c is the first bad commit commit > e9ab41b79933d42410126f0eb7b29f820745276c > Author: Hu, Lin1 > Date: Fri Nov 1 10:04:40 2024 +0800 > > Support Intel MOVRS > >

RE: [testsuite] Fix bb-slp-77.c for x86

> From: Kugan Vivekanandarajah > Sent: Thursday, October 31, 2024 4:29 PM > > This test bb-slp-77.c extracted relies on the completely unrolling of the > inner > loop. However, for x86 in gcc.dg/vect/, loop is not unrolled and the inner > loop > is vectorized thus not triggering expected BB

RE: [PATCH 6/7] Support Intel MOVRS

> From: Uros Bizjak > Sent: Tuesday, October 22, 2024 7:32 PM > > On Tue, Oct 22, 2024 at 8:31 AM Haochen Jiang > wrote: > > > > diff --git a/gcc/builtins.cc b/gcc/builtins.cc index > > 37c7c98e5c7..52520d54b84 100644 > > --- a/gcc/builtins.cc > > +++ b/gcc/builtins.cc > > @@ -1296,8 +1296,8 @@

RE: [PATCH] i386: Refactor get_intel_cpu

> From: Uros Bizjak > Sent: Friday, October 18, 2024 2:05 PM > > On Fri, Oct 18, 2024 at 4:56 AM Haochen Jiang > wrote: > > > > Hi all, > > > > ISE054 has just been disclosed and you can find doc from here: > > > > https://cdrdv2.intel.com/v1/dl/getContent/671368 > > > > From ISE, it shows that

RE: [PATCH v5] gcc, libcpp: Add warning switch for "#pragma once in main file" [PR89808]

> From: Andreas Schwab > Sent: Wednesday, October 9, 2024 2:04 PM > > ../../libcpp/directives.cc: In function 'void do_pragma_once(cpp_reader*)': > ../../libcpp/directives.cc:2078:20: error: unknown conversion type character > '<' in format [-Werror=format=] > 2078 | "%<#pragma

RE: [PATCH] i386: Enhance AVX10.2 convert tests

> From: Haochen Jiang > Sent: Wednesday, September 18, 2024 1:38 PM > > Hi all, > > For AVX10.2 convert tests, all of them are missing mask tests previously, this > patch will add them in the tests. > > Tested on sde with assembler with these insts. Ok for trunk? Please ignore this patch, I mi

RE: [PATCH] x86: Refine V4BF/V2BF FMA testcase

> From: Levy Hsu > Sent: Thursday, September 5, 2024 4:55 PM > To: gcc-patches@gcc.gnu.org > > Simple testcase fix, ok for trunk? > > This patch removes specific register checks to account for possible > register spills and disables tests in 32-bit mode. This adjustment > is necessary because V4

RE: [r15-3359 Regression] FAIL: gcc.target/i386/avx10_2-bf-vector-cmpp-1.c (test for excess errors) on Linux/x86_64

> -Original Message- > From: Richard Biener > Sent: Tuesday, September 3, 2024 2:40 PM > > On Tue, Sep 3, 2024 at 7:36 AM Jiang, Haochen > wrote: > > > > > > > > > From: Hongtao Liu > > > Sent: Tuesday, September 3, 2024 1:47 PM >

RE: [r15-3359 Regression] FAIL: gcc.target/i386/avx10_2-bf-vector-cmpp-1.c (test for excess errors) on Linux/x86_64

> -Original Message- > From: Hongtao Liu > Sent: Tuesday, September 3, 2024 1:47 PM > To: Jiang, Haochen > Cc: haochen.jiang ; ad...@levyhsu.com; gcc- > regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org > Subject: Re: [r15-3359 Regression] FAIL: gcc.target/i386/avx1

RE: [r15-3359 Regression] FAIL: gcc.target/i386/avx10_2-bf-vector-cmpp-1.c (test for excess errors) on Linux/x86_64

As each AVX10.2 testcases previously, this is caused by option combination warning, which is expected. > From: haochen.jiang > Sent: Monday, September 2, 2024 9:06 PM > > On Linux/x86_64, > > f77435aa3911c437cba71991509eee57b333b3ce is the first bad commit commit > f77435aa3911c437cba71991509e

RE: [gcc-wwwdocs PATCH] gcc-15: Mention recent update for x86_64 backend

> -Original Message- > From: Gerald Pfeifer > Sent: Thursday, August 29, 2024 3:20 AM > > On Wed, 28 Aug 2024, Haochen Jiang wrote: > > Sorry for the disturb since I mis-typoed gcc-patches to gcc-patchs, > > resend the patch. > > No worries. > > > This patch will add documentation for r

RE: [r15-3185 Regression] FAIL: gcc.target/i386/avx10_2-compare-1.c (test for excess errors) on Linux/x86_64

As applied to all AVX10.2 patches, it is caused by vector size warning mentioned previously. Thx, Haochen > -Original Message- > From: haochen.jiang > Sent: Monday, August 26, 2024 11:54 PM > To: jun.zh...@intel.com; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org;

RE: [r15-3000 Regression] FAIL: gcc.target/i386/avx10_2-rounding-3.c (test for excess errors) on Linux/x86_64

; From: haochen.jiang > Sent: Tuesday, August 20, 2024 11:59 PM > To: Hu, Lin1 ; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org; Jiang, Haochen > Subject: [r15-3000 Regression] FAIL: gcc.target/i386/avx10_2-rounding-3.c > (test for excess errors) on Linux/x86_64

RE: [PATCH 00/22] Support AVX10.2 ymm rounding

> -Original Message- > From: Haochen Jiang > Sent: Wednesday, August 14, 2024 5:02 PM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com > Subject: [PATCH 00/22] Support AVX10.2 ymm rounding > > Hi all, > > The initial patch for AVX10.2 has been merged this week. > > F

RE: [PATCH 0/1] Initial support for AVX10.2

> -Original Message- > From: Andi Kleen > Sent: Saturday, August 3, 2024 3:06 AM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH 0/1] Initial support for AVX10.2 > > > > > INT8 i

RE: [PATCH 0/1] Initial support for AVX10.2

> -Original Message- > From: Andi Kleen > Sent: Friday, August 2, 2024 2:04 AM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH 0/1] Initial support for AVX10.2 > > Haochen Jiang writes: > &g

RE: [PATCH v2] i386: Add non-optimize prefetchi intrins

> -Original Message- > From: Jakub Jelinek > Sent: Tuesday, July 30, 2024 2:57 PM > To: Hongtao Liu > Cc: Jiang, Haochen ; gcc-patches@gcc.gnu.org; > Liu, Hongtao ; ubiz...@gmail.com > Subject: Re: [PATCH v2] i386: Add non-optimize prefetchi intrins > > On

RE: [PATCH v2] i386: Fix AVX512 intrin macro typo

> -Original Message- > From: Jakub Jelinek > Sent: Monday, July 29, 2024 4:41 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH v2] i386: Fix AVX512 intrin macro typo > > On Mon, Jul 29, 2024

RE: [r13-8949 Regression] FAIL: gcc.target/i386/avx512dq-vreducess-1b.c (test for excess errors) on Linux/x86_64

> -Original Message- > From: haochen.jiang > Sent: Monday, July 29, 2024 1:28 PM > To: Jiang, Haochen ; gcc-regress...@gcc.gnu.org; > gcc-patches@gcc.gnu.org > Subject: [r13-8949 Regression] FAIL: gcc.target/i386/avx512dq-vreducess- > 1b.c (test for excess errors) on Linux

RE: [PATCH v2] i386: Fix AVX512 intrin macro typo

> -Original Message- > From: Jakub Jelinek > Sent: Friday, July 26, 2024 7:59 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH v2] i386: Fix AVX512 intrin macro typo > > On Fri, Jul 26, 2024 a

RE: [PATCH] i386: Fix AVX512 intrin macro typo

> -Original Message- > From: Jakub Jelinek > Sent: Friday, July 26, 2024 2:31 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH] i386: Fix AVX512 intrin macro typo > > On Fri, Jul 26, 2024 at 02:2

RE: [PATCH Ping] i386: Use BLKmode for {ld,st}tilecfg

Ping for this patch Thx, Haochen > -Original Message- > From: Haochen Jiang > Sent: Thursday, July 18, 2024 9:45 AM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; hjl.to...@gmail.com; > ubiz...@gmail.com > Subject: [PATCH] i386: Use BLKmode for {ld,st}tilecfg > > Hi all, > > For AM

RE: [r15-2196 Regression] FAIL: c-c++-common/dfp/convert-bfp-6.c -std=gnu++98 execution test on Linux/x86_64

> -Original Message- > From: Jakub Jelinek > Sent: Wednesday, July 24, 2024 1:09 PM > To: Jiang, Haochen > Cc: j...@ventanamicro.com; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org > Subject: Re: [r15-2196 Regression] FAIL: c-c++-common/dfp/convert-b

RE: [r15-2196 Regression] FAIL: c-c++-common/dfp/convert-bfp-6.c -std=gnu++98 execution test on Linux/x86_64

It might be a false positive timeout alert. Please ignore that first. Thx, Haochen > -Original Message- > From: haochen.jiang > Sent: Tuesday, July 23, 2024 7:51 PM > To: j...@ventanamicro.com; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org; Jiang, Haochen >

RE: [r15-2135 Regression] FAIL: libgomp.oacc-fortran/privatized-ref-2.f90 -DACC_DEVICE_TYPE_host=1 -DACC_MEM_SHARED=1 -foffload=disable -Os at line 32 (test for warnings, line 31) on Linux/x86_64

sed. However, is that right? I am not familiar with either Fortran or libgomp, but the warning like something declared here which might report variable declaration conflict seems needed. Thx, Haochen From: Jiang, Haochen Sent: Friday, July 19, 2024 9:49 AM To: Paul Richard Thomas Cc: pa...@gcc.gn

RE: [r15-2135 Regression] FAIL: libgomp.oacc-fortran/privatized-ref-2.f90 -DACC_DEVICE_TYPE_host=1 -DACC_MEM_SHARED=1 -foffload=disable -Os at line 32 (test for warnings, line 31) on Linux/x86_64

-patches@gcc.gnu.org; Jiang, Haochen Subject: Re: [r15-2135 Regression] FAIL: libgomp.oacc-fortran/privatized-ref-2.f90 -DACC_DEVICE_TYPE_host=1 -DACC_MEM_SHARED=1 -foffload=disable -Os at line 32 (test for warnings, line 31) on Linux/x86_64 Hi Haochen, Try removing lines 37-41 since these are

RE: [PATCH 05/10] i386: Fix dot_prod backend patterns for mmx and sse targets

> -Original Message- > From: Hongtao Liu > Sent: Thursday, July 11, 2024 9:45 AM > To: Victor Do Nascimento > Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com; > richard.earns...@arm.com > Subject: Re: [PATCH 05/10] i386: Fix dot_prod backend patterns for mmx and > sse targets > >

RE: [COMMITTED] testsuite: i386: Require ifunc support in gcc.target/i386/avx10_1-25.c etc.

Hi Rainer, I will also backport the patch to GCC14 since the original patch is also backported. Thank for your test on Solaris/x86! Thx, Haochen > -Original Message- > From: Rainer Orth > Sent: Tuesday, June 4, 2024 7:34 PM > To: gcc-patches@gcc.gnu.org > Cc: Jiang, Hao

RE: [r15-983 Regression] FAIL: gcc.target/i386/avx10_1-25.c (test for excess errors) on Linux/x86_64

The fail is expected since -march=cascadelake -mavx10.1-256 will lead to a warning. Also, we could not use -mno-avx512f with -mavx10.1-256, which also lead to a warning. > -Original Message- > From: haochen.jiang > Sent: Monday, June 3, 2024 10:22 PM > To: Jiang, Haochen ;

RE: [PATCH 0/2] Align tight loops to solve cross cacheline issue

> > > > Bootstrapped and regtested on x86_64-pc-linux-gnu. > Ok for this if there's no objection in 48 hours. > > > > > > > > After we committed into trunk for a month, if there isn't any > > > > unexpected happen. We planned to backport it to GCC14.2. I accidentally backported it to GCC14.2 for n

RE: [PATCH v3] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW

> -Original Message- > From: Uros Bizjak > Sent: Tuesday, May 21, 2024 9:04 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao > Subject: Re: [PATCH v3] i386: Disable ix86_expand_vecop_qihi2 > when !TARGET_AVX512BW > > On Tue, May 21, 202

RE: [PATCH v2] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW

> > diff --git a/gcc/testsuite/gcc.target/i386/pr115069.c > b/gcc/testsuite/gcc.target/i386/pr115069.c > > new file mode 100644 > > index 000..c4b48b602ef > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr115069.c > > @@ -0,0 +1,78 @@ > > +/* { dg-do compile } */ > > +/* { dg-opti

RE: [COMMITTED] Regenerate riscv.opt.urls and i386.opt.urls

C? My current understanding is yes. Thx, Haochen > -Original Message- > From: Mark Wielaard > Sent: Monday, May 20, 2024 7:22 PM > To: gcc-patches@gcc.gnu.org > Cc: Palmer Dabbelt ; Jeff Law > ; Jiang, Haochen ; Hu, > Lin1 ; Mark Wielaard > Subject: [COMMITTED] Regen

[r15-579 Regression] FAIL: libgomp.oacc-c++/../libgomp.oacc-c-c++-common/acc_prof-kernels-1.c -DACC_DEVICE_TYPE_host=1 -DACC_MEM_SHARED=1 -foffload=disable -O2 (test for excess errors) on Linux/x86_64

On Linux/x86_64, a9251ab3c91c8c559d0306838575a666ae62dff4 is the first bad commit commit a9251ab3c91c8c559d0306838575a666ae62dff4 Author: Richard Biener Date: Thu May 16 12:35:28 2024 +0200 wrong code with points-to and volatile caused with GCC configured with ../../gcc/configure --pr

RE: [PATCH 0/2] Align tight loops to solve cross cacheline issue

Also cc Honza and Richard since we touched generic tune. Thx, Haochen > -Original Message- > From: Haochen Jiang > Sent: Wednesday, May 15, 2024 11:04 AM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com > Subject: [PATCH 0/2] Align tight loops to solve cross cacheline

RE: [r15-429 Regression] FAIL: experimental/simd/pr109261_constexpr_simd.cc -msse2 -O2 -Wno-psabi (test for excess errors) on Linux/x86_64

x, Haochen > -Original Message- > From: Matthias Kretz > Sent: Tuesday, May 14, 2024 9:26 PM > To: Jiang, Haochen > Cc: gcc-regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org > Subject: Re: [r15-429 Regression] FAIL: > experimental/simd/pr109261_constexpr_simd.cc -

RE: [PATCH] i386: Fix array index overflow in pr105354-2.c

> -Original Message- > From: Uros Bizjak > Sent: Friday, April 26, 2024 5:13 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao > Subject: Re: [PATCH] i386: Fix array index overflow in pr105354-2.c > > On Fri, Apr 26, 2024 at 11:03 AM Haochen Ji

RE: [PATCH] i386: Fix aes/vaes patterns [PR114576]

> -Original Message- > From: Jakub Jelinek > Sent: Monday, April 8, 2024 9:43 PM > To: Jiang, Haochen > Cc: Hongtao Liu ; gcc-patches@gcc.gnu.org; Liu, Hongtao > ; ubiz...@gmail.com > Subject: Re: [PATCH] i386: Fix aes/vaes patterns [PR114576] > > On Mon,

RE: [PATCH] i386: Fix aes/vaes patterns [PR114576]

Hi Jakub, Sorry for the late response since I am on vacation for now. > As the following testcase shows, the above change was incorrect. > > Using aes isa for the second alternative is obviously wrong, aes is enabled > whenever -maes is, regardless of -mavx or -mno-avx, so the above change > mea

RE: [PATCH] i386: Add AVX10.1 related macros

> -Original Message- > From: Richard Biener > Sent: Thursday, January 11, 2024 4:19 PM > To: Liu, Hongtao > Cc: Jiang, Haochen ; gcc-patches@gcc.gnu.org; > ubiz...@gmail.com; bur...@net-b.de; san...@codesourcery.com > Subject: Re: [PATCH] i386: Add AVX10.1 related ma

RE: [gcc-wwwdocs PATCH v2] gcc-13/14: Mention recent update for x86_64 backend

> -Original Message- > From: Haochen Jiang > Sent: Thursday, December 21, 2023 4:26 PM > To: gcc-patches@gcc.gnu.org > Cc: ubiz...@gmail.com; Liu, Hongtao ; > ger...@pfeifer.com > Subject: [gcc-wwwdocs PATCH v2] gcc-13/14: Mention recent update for > x86_64 backend > > Hi all, > > This i

RE: [r14-6770 Regression] FAIL: gcc.dg/gnu23-tag-4.c (test for excess errors) on Linux/x86_64

‘struct g *’ [-Wincompatible-pointer-types] Thx, Haochen > -Original Message- > From: Martin Uecker > Sent: Friday, December 22, 2023 5:39 PM > To: gcc-regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen > ; Joseph Myers > Subject: Re: [r14-6770 Regression]

RE: [gcc-wwwdocs PATCH] gcc-13/14: Mention recent update for x86_64 backend

> -Original Message- > From: Gerald Pfeifer > Sent: Wednesday, December 13, 2023 2:20 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [gcc-wwwdocs PATCH] gcc-13/14: Mention recent update for > x86_64 backend

RE: [RFC] Intel AVX10.1 Compiler Design and Support

> > On the other hand, a new EVEX-capable level might bring earlier adoption > > of EVEX capabilities to AMD CPUs, which still should be an improvement > > over AVX2. This could benefit AMD as well. So I would really like to > > see some AMD feedback here. > > > > There's also the matter that tim

RE: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c scan-assembler-times shrq 2 on Linux/x86_64

> -Original Message- > From: Hongtao Liu > Sent: Tuesday, December 12, 2023 2:06 PM > To: Jiang, Haochen > Cc: Andrew Pinski (QUIC) ; haochen.jiang > ; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org > Subject: Re: [r14-6420 Regression] FAIL: gcc.targe

RE: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c scan-assembler-times shrq 2 on Linux/x86_64

> -Original Message- > From: Jiang, Haochen > Sent: Tuesday, December 12, 2023 9:11 AM > To: Andrew Pinski (QUIC) ; haochen.jiang > ; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org > Subject: RE: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c scan- &

RE: [r14-6420 Regression] FAIL: gcc.target/i386/pr110790-2.c scan-assembler-times shrq 2 on Linux/x86_64

> -Original Message- > From: Andrew Pinski (QUIC) > Sent: Tuesday, December 12, 2023 9:01 AM > To: haochen.jiang ; Andrew Pinski (QUIC) > ; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org; Jiang, Haochen > Subject: RE: [r14-6420 Regression] FAIL: gcc.target/i

RE: [PATCH] i386: Mark Xeon Phi ISAs as deprecated

> -Original Message- > From: Richard Biener > Sent: Friday, December 1, 2023 4:37 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH] i386: Mark Xeon Phi ISAs as deprecated > > On Fri, Dec 1, 202

RE: [PATCH] i386: Mark Xeon Phi ISAs as deprecated

> -Original Message- > From: Richard Biener > Sent: Friday, December 1, 2023 3:04 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH] i386: Mark Xeon Phi ISAs as deprecated > > On Fri, Dec 1, 20

RE: [r14-5578 Regression] FAIL: gfortran.dg/gomp/pr27573.f90 -O (test for excess errors) on Linux/x86_64

> -Original Message- > From: Sebastian Huber > Sent: Monday, November 27, 2023 3:58 PM > To: haochen.jiang ; gcc- > regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen > > Subject: Re: [r14-5578 Regression] FAIL: gfortran.dg/gomp/pr27573.f90 -O (test &g

RE: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march support

> -Original Message- > From: Gerald Pfeifer > Sent: Saturday, November 25, 2023 7:29 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march > support

RE: [PATCH v2] gcov: Fix integer types in gen_counter_update()

> -Original Message- > From: Sebastian Huber > Sent: Wednesday, November 22, 2023 10:24 PM > To: Christophe Lyon > Cc: Jakub Jelinek ; gcc-patches@gcc.gnu.org > Subject: Re: [PATCH v2] gcov: Fix integer types in gen_counter_update() > > On 22.11.23 15:22, Christophe Lyon wrote: > > On Tu

RE: [RFC] Intel AVX10.1 Compiler Design and Support

> > > > I wonder whether adoption could be made easier by also providing a > > > > -mavx10[.0] level that removes some of the more obscure sub-ISA > > > > requirements to cover more existing implementations (I'd not add > > > > -mavx10.0-512 here). > > > > I'd require only skylake-AVX512 features

RE: [x86_64 PATCH] PR target/110551: Tweak mulx register allocation using peephole2.

> -Original Message- > From: Uros Bizjak > Sent: Thursday, November 2, 2023 3:23 AM > To: Roger Sayle > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [x86_64 PATCH] PR target/110551: Tweak mulx register allocation > using peephole2. > > On Wed, Nov 1, 2023 at 1:58 PM Roger Sayle > wrote: >

RE: [x86 PATCH] PR target/110551: Fix reg allocation for widening multiplications.

Hi Roger, It seems that your patch caused some regression on x86_64: https://gcc.gnu.org/pipermail/gcc-regression/2023-October/078390.html https://gcc.gnu.org/pipermail/gcc-regression/2023-October/078391.html Could you help verify that? A simple reproducer under build folder will be: make chec

RE: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march support

> -Original Message- > From: Jiang, Haochen > Sent: Friday, October 27, 2023 10:52 AM > To: Jiang, Haochen ; gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com; Gerald Pfeifer > > Subject: RE: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new IS

RE: [gccwwwdocs PATCH] gcc-13/14: Mention Intel new ISA and march support

> -Original Message- > From: Haochen Jiang > Sent: Monday, October 23, 2023 10:18 AM > To: gcc-patches@gcc.gnu.org > Cc: ger...@pfeifer.com; ubiz...@gmail.com; Liu, Hongtao > > Subject: [gccwwwdocs PATCH] gcc-13/14: Mention Intel new ISA and march > support > > Hi all, > > This patch me

RE: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march support

> -Original Message- > From: Gcc-patches bounces+haochen.jiang=intel@gcc.gnu.org> On Behalf Of Haochen Jiang > via Gcc-patches > Sent: Monday, July 17, 2023 11:34 AM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com > Subject: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention

RE: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces [PR111449]

> -Original Message- > From: Jiang, Haochen > Sent: Wednesday, October 25, 2023 4:47 PM > To: Richard Sandiford ; HAO CHEN GUI > > Cc: gcc-patches > Subject: RE: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces > [PR111449] > > > -Origin

RE: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces [PR111449]

> -Original Message- > From: Richard Sandiford > Sent: Wednesday, October 25, 2023 4:40 PM > To: HAO CHEN GUI > Cc: Jiang, Haochen ; gcc-patches patc...@gcc.gnu.org> > Subject: Re: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces > [PR111449] &

RE: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces [PR111449]

Hi Haochen Gui, It seems that the commit caused lots of test case fail on x86 platforms: https://gcc.gnu.org/pipermail/gcc-regression/2023-October/078379.html https://gcc.gnu.org/pipermail/gcc-regression/2023-October/078380.html https://gcc.gnu.org/pipermail/gcc-regression/2023-October/078381.htm

RE: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces [PR111449]

It seems that the mail got caught elsewhere and did not send into gcc-patches mailing thread. Resending that. Thx, Haochen -Original Message- From: Jiang, Haochen Sent: Tuesday, October 24, 2023 4:43 PM To: HAO CHEN GUI ; Richard Sandiford Cc: gcc-patches Subject: RE: [PATCH-1v4

RE: [PATCH 0/3] Add Intel new cpu archs

> -Original Message- > From: Hongtao Liu > Sent: Wednesday, October 18, 2023 8:25 AM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH 0/3] Add Intel new cpu archs > > On Mon, Oct 16, 2023 at 2:2

[r14-4629 Regression] FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2 on Linux/x86_64

On Linux/x86_64, 3179ad72f67f31824c444ef30ef171ad7495d274 is the first bad commit commit 3179ad72f67f31824c444ef30ef171ad7495d274 Author: Richard Biener rguent...@suse.de Date: Fri Oct 13 12:32:51 2023 +0200 OMP SIMD inbranch call vectorization for AVX512 style mas

[r14-4046 Regression] FAIL: 23_containers/vector/bool/110807.cc -std=gnu++17 (test for excess errors) on Linux/x86_64

On Linux/x86_64, 3a0e01f6bb1d6ec444001f2caea6ef43a4a83e3a is the first bad commit commit 3a0e01f6bb1d6ec444001f2caea6ef43a4a83e3a Author: Jonathan Wakely Date: Fri Sep 1 21:27:57 2023 +0100 libstdc++: Add support for running tests with multiple -std options caused FAIL: 23_containers/vec

[r14-3823 Regression] FAIL: c-c++-common/analyzer/compound-assignment-1.c -std=c++98 (test for warnings, line 72) on Linux/x86_64

On Linux/x86_64, 50b5199cff690891726877e1c00ac53dfb7cc1c8 is the first bad commit commit 50b5199cff690891726877e1c00ac53dfb7cc1c8 Author: benjamin priour Date: Sat Sep 9 18:03:56 2023 +0200 analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [PR96395] caused FAIL: c-c++-common/analy

[r14-3571 Regression] FAIL: gcc.target/i386/pr52252-atom.c scan-assembler palignr on Linux/x86_64

On Linux/x86_64, caa7a99a052929d5970677c5b639e1fa5166e334 is the first bad commit commit caa7a99a052929d5970677c5b639e1fa5166e334 Author: Richard Biener Date: Wed Aug 30 11:57:47 2023 +0200 tree-optimization/111228 - combine two VEC_PERM_EXPRs caused FAIL: gcc.target/i386/pr52252-atom.c

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Richard Biener > Sent: Wednesday, August 23, 2023 3:32 PM > To: Hongtao Liu > Cc: Jakub Jelinek ; Jiang, Haochen > ; ZiNgA BuRgA ; gcc- > patc...@gcc.gnu.org > Subject: Re: Intel AVX10.1 Compiler Design and Support > > On Tue, A

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Hongtao Liu > Sent: Wednesday, August 23, 2023 10:19 AM > To: Jiang, Haochen > Cc: Jakub Jelinek ; Richard Biener > ; ZiNgA BuRgA ; > gcc-patches@gcc.gnu.org > Subject: Re: Intel AVX10.1 Compiler Design and Support > > On Wed,

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Jakub Jelinek > Sent: Tuesday, August 22, 2023 11:02 PM > To: Hongtao Liu > Cc: Richard Biener ; Jiang, Haochen > ; ZiNgA BuRgA ; gcc- > patc...@gcc.gnu.org > Subject: Re: Intel AVX10.1 Compiler Design and Support > > On Tue, Au

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Richard Biener > Sent: Tuesday, August 22, 2023 4:36 PM > To: Jakub Jelinek > Cc: Jiang, Haochen ; ZiNgA BuRgA > ; Hongtao Liu ; gcc- > patc...@gcc.gnu.org > Subject: Re: Intel AVX10.1 Compiler Design and Support > > On Tue,

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: ZiNgA BuRgA > Sent: Monday, August 21, 2023 5:27 PM > To: Richard Biener ; Hongtao Liu > > Cc: Jiang, Haochen ; gcc-patches@gcc.gnu.org > Subject: Re: Intel AVX10.1 Compiler Design and Support > > Another way (not saying this i

[r14-2946 Regression] FAIL: gcc.target/i386/pr87007-5.c scan-assembler-times vxorps[^\n\r]*xmm[0-9] 0 on Linux/x86_64

From: haochen.jiang Sent: Tuesday, August 15, 2023 5:26 PM To: rguent...@suse.de; gcc-regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen Subject: [r14-2946 Regression] FAIL: gcc.target/i386/pr87007-5.c scan-assembler-times vxorps[^\n\r]*xmm[0-9] 0 on Linux/x86_64 On Linux/x86_64

[r14-3148 Regression] FAIL: gcc.dg/vect/bb-slp-subgroups-2.c scan-tree-dump-times slp2 "optimized: basic block" 2 on Linux/x86_64

From: haochen.jiang Sent: Tuesday, August 15, 2023 5:26 PM To: rguent...@suse.de; gcc-regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen Subject: [r14-3148 Regression] FAIL: gcc.dg/vect/bb-slp-subgroups-2.c scan-tree-dump-times slp2 "optimized: basic block" 2 on Linux/

RE: Intel AVX10.1 Compiler Design and Support

Hi all, There are lots of discussions on arch level and ABIs and I really appreciate that. For the arch level issue, it might be a little early to discuss and should not block these patches. For ABI issue, the problem actually comes from the current behavior between GCC and clang/LLVM are diff

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Jan Beulich > Sent: Thursday, August 10, 2023 9:31 PM > To: Phoebe Wang > Cc: Joseph Myers ; Wang, Phoebe > ; Hongtao Liu ; Jiang, Haochen > ; gcc-patches@gcc.gnu.org; ubiz...@gmail.com; Liu, > Hongtao ; Zhang, Annita ; &g

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Richard Biener > Sent: Tuesday, August 8, 2023 8:45 PM > To: Jiang, Haochen > Cc: Jakub Jelinek ; gcc-patches@gcc.gnu.org; > ubiz...@gmail.com; Liu, Hongtao > Subject: Re: Intel AVX10.1 Compiler Design and Support > > On Tue, Au

RE: Intel AVX10.1 Compiler Design and Support

> -Original Message- > From: Richard Biener > Sent: Wednesday, August 9, 2023 1:38 PM > To: Phoebe Wang > Cc: Hongtao Liu ; Joseph Myers > ; Jiang, Haochen ; gcc- > patc...@gcc.gnu.org; ubiz...@gmail.com; Liu, Hongtao > ; Zhang, Annita ; Wang, > Phoebe ; x86-64

RE: Intel AVX10.1 Compiler Design and Support

Hi Jakub, > So, what does this imply for the current ISAs? AVX10 will imply AVX2 on the ISA level. And we suppose AVX10 is an independent ISA feature set. Although sharing the same instructions and encodings, AVX10 and AVX512 are conceptual independent features, which means they are orthogonal.

RE: [r14-2639 Regression] FAIL: gcc.dg/vect/bb-slp-pr95839-v8.c scan-tree-dump slp2 "optimized: basic block" on Linux/x86_64

> -Original Message- > From: Richard Biener > Sent: Thursday, July 20, 2023 9:28 PM > To: Maciej W. Rozycki > Cc: haochen.jiang ; gcc- > regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen > > Subject: Re: [r14-2639 Regression] FAIL: gcc.dg/vect/bb

RE: [x86 PATCH] Fix FAIL of gcc.target/i386/pr91681-1.c

> -Original Message- > From: Jiang, Haochen > Sent: Friday, July 14, 2023 10:50 AM > To: Roger Sayle ; gcc-patches@gcc.gnu.org > Cc: 'Uros Bizjak' > Subject: RE: [x86 PATCH] Fix FAIL of gcc.target/i386/pr91681-1.c > > > The recent change in TImode p

RE: [x86 PATCH] Fix FAIL of gcc.target/i386/pr91681-1.c

> The recent change in TImode parameter passing on x86_64 results in the FAIL > of pr91681-1.c. The issue is that with the extra flexibility, the combine > pass is > now spoilt for choice between using either the > *add3_doubleword_concat or the *add3_doubleword_zext > patterns, when one operand

[r14-2462 Regression] FAIL: libgomp.c++/../libgomp.c-c++-common/alloc-12.c execution test on Linux/x86_64

On Linux/x86_64, 450b05ce54d3f08c583c3b5341233ce0df99725b is the first bad commit commit 450b05ce54d3f08c583c3b5341233ce0df99725b Author: Tobias Burnus Date: Wed Jul 12 13:50:21 2023 +0200 libgomp: Use libnuma for OpenMP's partition=nearest allocation trait caused with GCC configured w

RE: [r14-2314 Regression] FAIL: gcc.target/i386/pr100711-2.c scan-assembler-times vpandn 8 on Linux/x86_64

> -Original Message- > From: Hongtao Liu > Sent: Friday, July 7, 2023 3:55 PM > To: Beulich, Jan > Cc: haochen.jiang ; Jiang, Haochen > ; gcc-regress...@gcc.gnu.org; gcc- > patc...@gcc.gnu.org; Liu, Hongtao > Subject: Re: [r14-2314 Regression] FAIL: gcc.targe

RE: [COMMITTED] i386: Use 2x-wider modes when emulating QImode vector instructions

> gcc/ChangeLog: > > * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): > Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode) > instructions when available. Emulate truncation via > ix86_expand_vec_perm_const_1 when native truncate insn > is not available. > (ix86

RE: [PATCH] i386: Share AES xmm intrin with VAES

> > a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index > > 33e281901cf..e7d565a8389 100644 > > --- a/gcc/config/i386/sse.md > > +++ b/gcc/config/i386/sse.md > > @@ -25107,67 +25107,71 @@ > > > > ;; > > ;; > > > > (define_insn

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