> From: Gerald Pfeifer <ger...@pfeifer.com> > Sent: Sunday, November 24, 2024 7:17 AM > > On Mon, 11 Nov 2024, Haochen Jiang wrote: > > This patch will add recent new ISA and arch support for x86_64 backend > > into gcc-wwwdocs. > > > + <li>New ISA extension support for Intel AMX-AVX512 was added. > > In all these cases, can we just sasy "ISA extension support ... was added" and > drop the "New"? > > > + compiler switch. 128 and 256 bit MOVRS intrinsics are available > > + via > > "128- and 256-bit..." > > > + <li>The EVEX version support for Intel SM4 was added. > > + New 512-bit SM4 intrinsics are available via the > > + <code>-msm4 -mavx10.2-512</code> compiler switch. > > Just "EVEX version support..." > > > + AMX-FP8, AMX-MOVRS, AMX-TF32, AMX-TRANSPOSE, APX_F, AVX10.2 > with > > + 512 bit > > "512-bit" > > > <li>Support for Xeon Phi CPUs (a.k.a. Knight Landing and Knight Mill) > > were > > removed in GCC 15. GCC will no longer accept <code>-march=knl</code>, > > <code>-march=knm</code>,<code>-mavx5124fmaps</code>, > > "...no longer accepts..." > > And make the last ", and <code>-mavx5124fmaps</code>" (adding a blank > and the word "and"). >
I will do all of the changes with little tweak here. The "and" should be added (actually changed the previous "or" to "and") between <code>-mtune=knl</code> and <code>-mtune=knm</code>. Thx, Haochen
