>
> With part suffixes we also may want to merge specially, since the
> entry_count of the split part does not correspond to entry_count of the
> original function.
>
> I wonder, does partitioned function work with the google tool? I
> remember it had limitations in this respect.
>
Yes, Here a
Add debug dump for the remove_redundant_vector pass with the following
output:
Replace:
(insn 7 4 8 2 (set (reg:V2DI 103)
(const_vector:V2DI [
(const_int 0 [0]) repeated x2
])) "x.c":8:13 2406 {movv2di_internal}
(nil))
with:
(insn 7 4 8 2 (set (reg:V2DI
On Tue, Jun 24, 2025 at 4:19 AM Patrick Palka wrote:
> Tested on x86_64-pc-linux-gnu, does this look OK for trunk?
>
> -- >8 --
>
> When checking __is_complete_or_unbounded on a reference to incomplete
> type, we overeagerly try to instantiate/complete the referenced type
> which besides being un
On Mon, Jun 23, 2025 at 2:24 PM H.J. Lu wrote:
>
> On Wed, Jun 18, 2025 at 3:17 PM H.J. Lu wrote:
> >
> > 1. Don't generate the loop if the loop count is 1.
> > 2. For memset with vector on small size, use vector if small size supports
> > vector, otherwise use the scalar value.
> > 3. Duplicate
On Tue, Jun 24, 2025 at 1:18 PM Jan Hubicka wrote:
>
> > Here is the v3 patch. It no longer uses "rep mov/stos". Lili, can you
> > measure
> > its performance impact on Intel and AMD cpus?
> >
> > The updated generic has
> >
> > Update memcpy and memset inline strategies for -mtune=generic:
>
On Fri, Jun 20, 2025 at 01:19:45PM -0500, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Jun 20, 2025 at 10:38:30PM +0530, Surya Kumari Jangala wrote:
> > On 14/06/25 2:13 pm, Michael Meissner wrote:
> > > This is patch #4 of 4 to add -mcpu=future support to the PowerPC.
> >
> > I think this should
From: Yunze Zhu
This commit add support for xtheadvector-specific indexed segment load/store
intrinsics with b/h/w suffix. We also defined enum to be used in
thead-vector.md
https://github.com/XUANTIE-RV/thead-extension-spec/pull/66
V2:
Change to reuse existed thead function base th_loadstore_w
Hi,
this patch adds -fauto-profile-inlining which can be used to control
the auto-profile directed inlning. The feature is quite interesitng
but also may trigger unexpected code size growth or prevent useful
IPA inlining in the profiled binary.
Bootstrapped/regtested x86_64. Plan to commit it tom
From: Yunze Zhu
This commit add support for xtheadvector-specific fault-only-first segment
load/store intrinsics with b/h/w suffix. We also defined enum to be used
in thead-vector.md
https://github.com/XUANTIE-RV/thead-extension-spec/pull/66
V2:
Change to reuse existed thead function base th_lo
From: panciyan
This patch adds testcase for form2, as shown below:
T __attribute__((noinline)) \
sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)\
{\
T sum = (T)((UT)x + (UT)IMM);
From: Yunze Zhu
This commit add support for xtheadvector-specific strided segment load/store
intrinsics with b/h/w suffix. We also defined enum to be used in
thead-vector.md
https://github.com/XUANTIE-RV/thead-extension-spec/pull/66
V2:
Change to reuse existed thead function base th_loadstore_w
From: Yunze Zhu
This commit add support for xtheadvector-specific unit-stride segment
load/store intrinsics with b/h/w suffix. We also defined enum to be used
in thead-vector.md
https://github.com/XUANTIE-RV/thead-extension-spec/pull/66
V3:
Define new mode iterator and remove unnecessary insn p
> -Original Message-
> From: Cui, Lili
> Sent: Monday, June 23, 2025 8:38 PM
> To: Uros Bizjak
> Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao
> Subject: RE: [PATCH] Fix shrink wrap separate ICE for mingw [PR120741]
>
> > On Mon, Jun 23, 2025 at 1:19 PM Cui, Lili wrote:
> > >
> > > From:
From: "hongtao.liu"
- /* Uses in a group can share setup code, so only add setup cost once. */
- cost -= cost.scratch;
It looks like the original code took into account avoiding double
counting, but unfortunately cost is reset inside the follow loop which
invalidates the upper code, and makes
> >> -riscv_vector::emit_vlmax_insn (code_for_pred_broadcast (mode),
> >> - riscv_vector::UNARY_OP, operands);
> >> +/* We cannot do anything with a Float16 mode apart from converting.
> >> + So convert to float, broadcast and truncate. */
> >> +
Tested on x86_64-pc-linux-gnu, does this look OK for trunk?
-- >8 --
When checking __is_complete_or_unbounded on a reference to incomplete
type, we overeagerly try to instantiate/complete the referenced type
which besides being unnecessary may also produce a -Wsfinae-incomplete
warning (added in
> On Sun, 22 Jun 2025, Jan Hubicka wrote:
>
> > Hi,
> > auto-fdo is currently confused by a fact that all inlined functions get
> > locators with 0 discriminator, so it is not bale to distinguish multiple
> > inlined calls from single line.
> >
> > Discriminator is lost by calling LOCATION_LOCUS
On 6/23/25 7:07 PM, Kito Cheng wrote:
-riscv_vector::emit_vlmax_insn (code_for_pred_broadcast (mode),
- riscv_vector::UNARY_OP, operands);
+/* We cannot do anything with a Float16 mode apart from converting.
+ So convert to float, broadcast and t
On 5/20/25 1:22 AM, Stefan Schulze Frielinghaus wrote:
Currently a register asm already materializes during expand. This
means, a hard register is allocated for the very first access of a
register asm as e.g. in an assignment. As a consequence this might lead
to suboptimal register allocatio
> -riscv_vector::emit_vlmax_insn (code_for_pred_broadcast (mode),
> - riscv_vector::UNARY_OP, operands);
> +/* We cannot do anything with a Float16 mode apart from converting.
> + So convert to float, broadcast and truncate. */
> +if (TARGET_ZVFH
On 5/20/25 1:22 AM, Stefan Schulze Frielinghaus wrote:
Since genoutput has no information about hard register names we cannot
statically verify those names in constraints of the machine description.
Therefore, we have to do it at runtime. Although verification shouldn't
be too expensive, rest
On 6/7/25 1:04 AM, Andrew Pinski wrote:
Currently expand_constructor when it comes to BLKmode types, we store out
the constructor to memory. But for the zero case, we could just use `const_int
0`
instead for types who are less than or equal to BITS_PER_WORD.
This is only valid if we expanding
> On Jun 23, 2025, at 18:00, Siddhesh Poyarekar wrote:
>
> Thanks, there are some formatting nits below that need fixing, otherwise this
> looks good to me. I can't approve though, so please ping a maintainer for
> that.
Hi, Sid,
Thanks a lot for your review.
I will fix the format issues
This is primarily work from Robin and Shreya. My contribution is just
mentoring for Shreya and writing the ChangeLog. Shreya is busy on a
code generation issue and I expect both new entries in the tuning
structure as well as new instances of the tuning structure in the works
(spacemit x60) co
On 6/23/25 3:56 PM, Peter Bergner wrote:
On 6/20/25 10:38 PM, Jeff Law wrote:
+;; REG or REG+D where D fits in a simm12 and has the low 4 bits
+;; off. The REG+D form can be reloaded into a temporary if needed
+;; after FP elimination if that exposes an invalid offset.
+(define_predicate "pr
On 6/23/25 5:28 PM, Sam James wrote:
Followup to r16-1613-g34e1e5e33ec3eb. remove_reg_equal_equiv_notes's
2nd argument is 'no_rescan' which we accidentally had on, tripping
an assert in combine or ira because we hadn't left things in a consistent
state.
Fix the thinko by enabling rescanning.
gc
Followup to r16-1613-g34e1e5e33ec3eb. remove_reg_equal_equiv_notes's
2nd argument is 'no_rescan' which we accidentally had on, tripping
an assert in combine or ira because we hadn't left things in a consistent
state.
Fix the thinko by enabling rescanning.
gcc/ChangeLog:
PR rtl-optimizatio
No functional change intended.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r16-1635-ge6406aefd1a25b.
gcc/analyzer/ChangeLog:
* region-model.cc
(exception_thrown_from_unrecognized_call::print): Add
"final override" to vfunc.
---
gcc/an
This patch refactors the support for -fdiagnostics-add-output=SCHEME
from GCC's options parsing so that it is also available to
sarif-replay and to other clients of libgdiagnostics.
With this users of sarif-replay and other such tools can generate HTML
or SARIF as well as text output, using the sa
Hello,
On Thu, May 23 2024, Andrew MacLeod wrote:
> This patch provides a basic oracle which doesn't do anything, but will
> still respond when queried. This allows passes to avoid the NULL check
> for an oracle pointer before they do anything, and results in a slight
> speedup in VRP, and a s
Hi,
On Fri, Oct 25 2024, Richard Biener wrote:
> The following places a few strathegic asserts so we do not end up
> with COND_EXPRs with a comparison as the first operand during
> vectorization.
>
> Bootstrap and regtest running on x86_64-unknown-linux-gnu.
>
> These are the asserts I'd like to k
On 2025-06-23 10:42, Qing Zhao wrote:
gcc/ChangeLog:
* tree-object-size.cc (access_with_size_object_size): Update comments
for pointers with .ACCESS_WITH_SIZE.
(collect_object_sizes_for): Propagate size info through GIMPLE_ASSIGN
for pointers with .ACCESS_WITH_SIZ
Hi!
On Mon, Jun 23, 2025 at 07:30:51PM +0530, Surya Kumari Jangala wrote:
> On 14/06/25 2:07 pm, Michael Meissner wrote:
> > @@ -119,6 +122,7 @@
> > | OPTION_MASK_FLOAT128_HW \
> > | OPTION_MASK_FLOAT128_KEYWORD \
> >
On 6/20/25 10:38 PM, Jeff Law wrote:
> +;; REG or REG+D where D fits in a simm12 and has the low 4 bits
> +;; off. The REG+D form can be reloaded into a temporary if needed
> +;; after FP elimination if that exposes an invalid offset.
> +(define_predicate "prefetch_operand"
I think you mean 5 bit
On Mon, 23 Jun 2025, Marek Polacek wrote:
> Thanks for the review. Ok?
OK.
--
Joseph S. Myers
josmy...@redhat.com
On Mon, 23 Jun 2025, Jakub Jelinek wrote:
> Hi!
>
> I'd like to ping some C family patches:
>
> https://gcc.gnu.org/pipermail/gcc-patches/2025-April/681741.html
> - PR44677 - c, c++: Extend -Wunused-but-set-* warnings
>
> https://gcc.gnu.org/pipermail/gcc-patches/2025-June/685543.html
> - P
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk/15?
-- >8 --
We were erroring because the TEMPLATE_DECL of the existing partial
specialisation has an undeduced return type, but the imported
declaration did not.
The root cause is similar to what was fixed in r13-2744-g4fac53d65221
This is more based on documentation reading that on testing
as still only limited MI300 testing has been done and seemingly
this code does not usually get touched.
MI300's "9.1.10 Memory Scope and Temporal Control" distinguishes
between scalar memory (9.1.10.1) for which a single control bit exis
This simple patch adds the 'if' clause to 'acc wait'. while OpenACC 3.0
also added it to the init, shutdown and set directive this patch only
handles 'acc wait' as that's used in the ICON code.
Committed as Rev. r16-1634-g2b077252cafa50
Tobias
commit 2b077252cafa5045498a0e0c480ee6d48c136232
Auth
On 6/23/25 9:43 AM, Paul Richard Thomas wrote:
Hello All,
I was mulling over the F2018 status of gfortran, when I came across the
additions to the IMPORT statement. This seemed like such a useful
addition to fortran that I set about an implementation; thinking that
this would be low hanging f
On 6/23/25 3:02 AM, KuanLin Chen wrote:
Hi,
This extension defines vector instructions to extract a pair of FP16
data from
a floating-point register. Multiply the top FP16 data with the FP16 elements
and add the result with the bottom FP16 data.
gcc/ChangeLog:
* common/config/ris
Richard Biener writes:
>> Am 23.06.2025 um 17:37 schrieb Andrew Burgess :
>>
>> This commit is for the benefit of GDB, but as the binutils-gdb
>> repository shares the contrib/ directory with gcc, this commit must
>> first be applied to gcc then copied back to binutils-gdb.
>>
>> This commit e
On 6/23/25 12:39 PM, Harald Anlauf wrote:
Dear all,
here's an obvious fix for a rejects-valid when an interface was
renamed on use and is extended in the importing module. One check
incorrectly referred to the original interface name, not the
renamed one.
Regtested on x86_64-pc-linux-gnu. OK
> -Original Message-
> From: Andrew Pinski (QUIC)
> Sent: Monday, June 23, 2025 8:01 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Andrew Pinski (QUIC)
> Subject: [PATCH] expand: Allow sibcalling for return structures
> in some cases [PR71761]
>
> In the case of tailing call with a return of a
Am 23.06.25 um 22:33 schrieb Jerry D:
On 6/23/25 12:39 PM, Harald Anlauf wrote:
Dear all,
here's an obvious fix for a rejects-valid when an interface was
renamed on use and is extended in the importing module. One check
incorrectly referred to the original interface name, not the
renamed one.
Hi Mikael!
Am 23.06.25 um 19:51 schrieb Mikael Morin:
Le 22/06/2025 à 21:09, Harald Anlauf a écrit :
Hi Mikael!
Am 20.06.25 um 12:08 schrieb Mikael Morin:
From: Mikael Morin
Regression-tested on x86_64-pc-linux-gnu.
Ok for master?
-- >8 --
The temporary variables that are generated to
Dear all,
here's an obvious fix for a rejects-valid when an interface was
renamed on use and is extended in the importing module. One check
incorrectly referred to the original interface name, not the
renamed one.
Regtested on x86_64-pc-linux-gnu. OK for mainline / backports?
Thanks,
Harald
Le 22/06/2025 à 21:09, Harald Anlauf a écrit :
Hi Mikael!
Am 20.06.25 um 12:08 schrieb Mikael Morin:
From: Mikael Morin
Regression-tested on x86_64-pc-linux-gnu.
Ok for master?
-- >8 --
The temporary variables that are generated to implement SELECT TYPE
and TYPE IS statements have (befo
On 6/23/25 3:02 AM, KuanLin Chen wrote:
Hi,
This patch adds support for the XAndesperf ISA extension.
The 32-bit AndeStar V5 extension includes branch instructions,
load effective address instructions, and string processing
instructions for performance improvement.
New INSN patterns are added
Hi
Even if you have no time to review this for now could you only answer
the question below that is to say:
Should the current _GLIBCXX_INLINE_VERSION abi be preserved ?
Thanks
On 16/06/2025 19:36, François Dumont wrote:
I eventually wonder if it is such a big deal to add the new symbols
Hi all,
This patch addresses previous review feedback by splitting the atan handling
into a separate patch.
This patch is part of
https://gcc.gnu.org/pipermail/fortran/attachments/20250607/4a4a9cb6/attachment.obj
Please take a look when you are available. Thanks!
Best regards,
Yuao
0001-gcc-
Hello All,
I was mulling over the F2018 status of gfortran, when I came across the
additions to the IMPORT statement. This seemed like such a useful addition
to fortran that I set about an implementation; thinking that this would be
low hanging fruit. Parsing and checking the constraints C897-8100
On Thu, Jun 12, 2025 at 07:13:13PM +, Joseph Myers wrote:
> On Thu, 12 Jun 2025, Marek Polacek wrote:
>
> > +
> > +
> > +Support ++ and -- on complex values
> > + > href="https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3259.pdf";>N3259
> > +15
> > +
> > +
>
> This sh
On Thu, Jun 19, 2025 at 08:36:42PM +, Joseph Myers wrote:
> On Fri, 13 Jun 2025, Marek Polacek wrote:
>
> > doesn't need any changes, I think. Another is "modified existing functions
> > to preserve the const-ness of the type placed into the function", I don't
> > what this is talking about.
This commit is for the benefit of GDB, but as the binutils-gdb
repository shares the contrib/ directory with gcc, this commit must
first be applied to gcc then copied back to binutils-gdb.
This commit extends the two scripts contrib/dg-extract-results.{py,sh}
to handle GDB's 'unexpected core files
On Mon, Jun 23, 2025 at 11:06:39AM -0400, Jason Merrill wrote:
> P3491 define_static_* includes some reflection bits, but the core
> functionality is independent of reflection, so let's give it its own row in
> the table.
Ok. I've committed the following incremental patch then (plus created one
n
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Successful run of analyzer integration tests on x86_64-pc-linux-gnu.
Pushed to trunk as r16-1630-g5a64c96cfe7a4d.
gcc/ChangeLog:
PR other/116792
* diagnostic-format-html.cc (html_token_printer::print_tokens):
Ha
On 6/23/25 5:17 AM, Jakub Jelinek wrote:
Hi!
I've created new PRs for the new papers and committed the following to
update cxx-status.html.
The html omits the R suffixes on papers which aren't public in wg21.link
link yet, we can change those incrementally.
Thanks, makes sense.
diff --git a/
In the case of tailing call with a return of a structure, currently
all large structures are rejected. We can allow the case were the return
of the "tail call" function is setting the return value of the current
function. This allows for the musttail that is located in pr71761-1.c.
This should be
Thank you, Sid!
I just sent the 6th version of the patch based on all your suggestions and
comments.
(Also fixed the typo in doc/extend.texi per Joseph’s comments)
Could you lease take a look at it (patch #2 includes all the changes per your
suggestions)
and let me know whether it’s good to go
> On Jun 21, 2025, at 07:46, Siddhesh Poyarekar wrote:
>
> On 2025-06-20 10:22, Qing Zhao wrote:
>> Okay, this is a reasonable solution to this problem.
>> I will add a new —param option as suggested, and then guard the generation
>> of the size expression for:
>> __builtin_dynamic_object_size
Hi,
This is the 6th version of the patch set to extend "counted_by" attribute
to pointer fields of structures.
The C FE parts (patch #1 and #3) of the 5th version have been approved
by Joseph already (with a minor typo fix, which is included in this new
version);
The middle end part (patch #2)
And Convert a pointer reference with counted_by attribute to
.ACCESS_WITH_SIZE.
For example:
struct PP {
size_t count2;
char other1;
char *array2 __attribute__ ((counted_by (count2)));
int other2;
} *pp;
specifies that the "array2" is an array that is pointed by the
pointer field, and
Current array bound checker only instruments ARRAY_REF, and the INDEX
information is the 2nd operand of the ARRAY_REF.
When extending the array bound checker to pointer references with
counted_by attributes, the hardest part is to get the INDEX of the
corresponding array ref from the offset comput
gcc/ChangeLog:
* tree-object-size.cc (access_with_size_object_size): Update comments
for pointers with .ACCESS_WITH_SIZE.
(collect_object_sizes_for): Propagate size info through GIMPLE_ASSIGN
for pointers with .ACCESS_WITH_SIZE.
gcc/testsuite/ChangeLog:
*
Thanks Ciyan.
Suggest to break this patch into a series with 2 PATCH(es),
the middle-end(aka gcc/match.pd) and the risc-v backend,
then Richard could locate the middle-end part easily, and
leave the risc-v parts to the risc-v ports.
Pan
-Original Message-
From: Ciyan Pan
Sent: Monday,
On 6/23/25 3:02 AM, KuanLin Chen wrote:
Hi,
This is a patch series for Andes vender extension of RISC-V.
These patches are tested by riscv-gnu-toolchain gcc/g++ testsuite. And
the report is the same as without these patches.
= Summary of gcc testsuite =
Hi Mike,
On 14/06/25 2:07 pm, Michael Meissner wrote:
> This is patch #1 of 4 that adds the support that can be used in developing GCC
> support for future PowerPC processors.
Please reword the commit message, perhaps something like:
This is patch #1 of 4 that adds support for the option -mcpu=fu
Dear GCC Developers,
I previously received comments from Joseph and Jakub, which I believe I
addressed more than a month ago.
Please could someone review version 4?
Thanks,
Chris
On 21/05/2025 16:13, Christopher Bazley wrote:
Commit 0547dbb725b reduced the number of cases in which
union pad
> On Mon, Jun 23, 2025 at 1:19 PM Cui, Lili wrote:
> >
> > From: Lili Cui
> >
> > Hi Uros,
> >
> > I need to remove another assertion in the shrink wrap separate patch.
> Added two cases for changing the CHECK_STACK_LIMIT value.
> >
> > The default values for CHECK_STACK_LIMIT for target wingw an
Andrew Pinski writes:
> On Fri, Jun 20, 2025, 4:47 PM Wilco Dijkstra wrote:
>
>>
>> TARGET_CONST_ANCHOR appears to trigger too often, even on simple
>> immediates.
>> It inserts extra ADD/SUB instructions even when a single MOV exists.
>> Disable it to improve overall code quality: on SPEC2017 it
ping
> -Original Message-
> From: Tamar Christina
> Sent: Tuesday, June 10, 2025 4:19 PM
> To: Richard Biener
> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford ;
> nd
> Subject: RE: [PATCH 1/3]middle-end: support vec_cbranch_any and
> vec_cbranch_all [PR118974]
>
> > We could
> > >
On Mon, Jun 23, 2025 at 1:19 PM Cui, Lili wrote:
>
> From: Lili Cui
>
> Hi Uros,
>
> I need to remove another assertion in the shrink wrap separate patch. Added
> two cases for changing the CHECK_STACK_LIMIT value.
>
> The default values for CHECK_STACK_LIMIT for target wingw and option
> -msta
Hi,
This extension defines vector load instructions to move sign-extended or
zero-extended INT4 data into 8-bit vector register elements.
gcc/ChangeLog:
* config/riscv/andes-vector-builtins-bases.cc
(nds_nibbleload): New class.
* config/riscv/andes-vector-builtins-bases.h
> > > > -Original Message-
> > > > From: Uros Bizjak
> > > > Sent: Wednesday, June 18, 2025 9:22 PM
> > > > To: Cui, Lili
> > > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ;
> > > > hongjiu...@intel.com
> > > > Subject: Re: [PATCH] x86: Fix shrink wrap separate ICE under
> > > > -fstack-c
Le 23/06/2025 à 09:17, Richard Biener a écrit :
On Sun, Jun 22, 2025 at 2:11 PM Mikael Morin wrote:
From: Mikael Morin
Changes v1 -> v2:
- Also handle complex conjugate operator.
That's OK.
- Don't create the NON_LVALUE_EXPR if there is a type conversion between the
doubled opera
On Sun, Jun 22, 2025 at 2:11 PM Mikael Morin wrote:
>
> From: Mikael Morin
>
> Changes v1 -> v2:
> - Also handle complex conjugate operator.
That's OK.
> - Don't create the NON_LVALUE_EXPR if there is a type conversion between the
>doubled operators.
We're not doing that elsewhere so I'd
Hi,
This is a patch series for Andes vender extension of RISC-V.
These patches are tested by riscv-gnu-toolchain gcc/g++ testsuite. And the
report is the same as without these patches.
= Summary of gcc testsuite =
| # of unexpected case /
From: Lili Cui
Hi Uros,
I need to remove another assertion in the shrink wrap separate patch. Added two
cases for changing the CHECK_STACK_LIMIT value.
The default values for CHECK_STACK_LIMIT for target wingw and option
-mstack-arg-probe are 4000 and (-1) respectively. In this case, shrink w
On Sat, Jun 7, 2025 at 3:56 PM Yuao Ma wrote:
>
> Hi all,
>
> This patch has been updated to conditionally fold the specified math functions
> only when using MPFR version 4.2.0 or newer.
>
> To accompany this change, the test case now utilizes `__builtin_constant_p` to
> determine whether to exec
On Wed, Jun 18, 2025 at 3:17 PM H.J. Lu wrote:
>
> 1. Don't generate the loop if the loop count is 1.
> 2. For memset with vector on small size, use vector if small size supports
> vector, otherwise use the scalar value.
> 3. Duplicate the promoted scalar value for vector.
> 4. Always expand vecto
On Thu, 12 Jun 2025, Jakub Jelinek wrote:
> Hi!
>
> These testcases show another problem with -fsanitize=address
> vs. musttail tail calls. In particular, there can be
> .ASAN_MARK (POISON, &a, 4);
> etc. calls after a tail call and those just prevent the tailc pass
> to mark the musttail call
On Thu, 12 Jun 2025, Jakub Jelinek wrote:
> Hi!
>
> The following testcase is rejected by GCC 15 but accepted (with
> s/gnu/clang/) by clang.
> The problem is that we want to execute a sequence of instructions to
> unpoison all automatic variables in the function and mark the var block
> allocate
On Mon, 23 Jun 2025, Tamar Christina wrote:
> Consider the loop
>
> void f1 (int *restrict a, int n)
> {
> #pragma GCC unroll 4 requested
> for (int i = 0; i < n; i++)
> a[i] *= 2;
> }
>
> Which today is vectorized and then unrolled 3x by the RTL unroller due to the
> use of the pragma. T
On Mon, 23 Jun 2025, Tamar Christina wrote:
> This patch fixes a bug where the current code assumed that exact_log2 returns
> NULL on failure, but it instead returns -1. So there are some cases where the
> right shift could shift out the entire value.
>
> Secondly it also removes the requirement
On Fri, Jun 20, 2025 at 3:47 PM Mikael Morin wrote:
>
> From: Mikael Morin
>
> Regression tested on x86_64-linux. OK for master?
OK.
Thanks,
Richard.
> -- 8< --
>
> gcc/ChangeLog:
>
> * match.pd (`-(-X)`, `~(~X)`): Add a NON_LVALUE_EXPR wrapper to the
> simplification of doub
Consider the loop
void f1 (int *restrict a, int n)
{
#pragma GCC unroll 4 requested
for (int i = 0; i < n; i++)
a[i] *= 2;
}
Which today is vectorized and then unrolled 3x by the RTL unroller due to the
use of the pragma. This is unfortunate because the pragma was intended for the
scalar l
This patch fixes a bug where the current code assumed that exact_log2 returns
NULL on failure, but it instead returns -1. So there are some cases where the
right shift could shift out the entire value.
Secondly it also removes the requirement that VF be a power of two. With an
uneven unroll fact
Hi!
I've created new PRs for the new papers and committed the following to
update cxx-status.html.
The html omits the R suffixes on papers which aren't public in wg21.link
link yet, we can change those incrementally.
diff --git a/htdocs/projects/cxx-status.html b/htdocs/projects/cxx-status.html
i
On Thu, Jun 19, 2025 at 10:25 AM H.J. Lu wrote:
>
> Extend the remove_redundant_vector pass to handle vector broadcasts from
> constant and variable scalars. When broadcasting from constants and
> function arguments, we can place a single widest vector broadcast at
> entry of the nearest common d
On Mon, Jun 23, 2025 at 4:45 PM H.J. Lu wrote:
>
> On Mon, Jun 23, 2025 at 4:10 PM H.J. Lu wrote:
> >
> > On Mon, Jun 23, 2025 at 3:11 PM Hongtao Liu wrote:
> > >
> > > On Thu, Jun 19, 2025 at 10:25 AM H.J. Lu wrote:
> > > >
> > > > Extend the remove_redundant_vector pass to handle vector broad
This is what I've just pushed.
-- >8 --
gcc/ChangeLog:
* match.pd (`-(-X)`, `~(~X)`, `conj(conj(X))`): Add a
NON_LVALUE_EXPR wrapper to the simplification of doubled unary
operators NEGATE_EXPR, BIT_NOT_EXPR and CONJ_EXPR.
gcc/testsuite/ChangeLog:
* gfortran.dg/
On 4/23/2025 6:01 PM, Artemiy Volkov wrote:
> Hi all,
>
> sending a v2 of
> https://gcc.gnu.org/pipermail/gcc-patches/2025-April/680893.html after
> fixing several issues with the original patch. Namely, the changes
> since v1 are:
>
> - Remove the call to df_finish_pass () at the end of split_e
From: panciyan
This patch would like to support signed scalar SAT_ADD IMM form 2
Form2:
T __attribute__((noinline)) \
sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)\
{\
T sum = (T)((UT)x
Hi,
This extension defines vector instructions to calculae of the
signed/unsigned
dot product of four SEW/4-bit data and accumulate the result into a SEWbit
element for all elements in a vector register.
gcc/ChangeLog:
* config/riscv/andes-vector-builtins-bases.cc (nds_vd4dot): New
class
On Mon, Jun 23, 2025 at 4:10 PM H.J. Lu wrote:
>
> On Mon, Jun 23, 2025 at 3:11 PM Hongtao Liu wrote:
> >
> > On Thu, Jun 19, 2025 at 10:25 AM H.J. Lu wrote:
> > >
> > > Extend the remove_redundant_vector pass to handle vector broadcasts from
> > > constant and variable scalars. When broadcasti
On VXE targets, we can directly use the fp min/max instruction instead of
calling into libm for fmin/fmax etc.
Provide fmin/fmax versions also for vectors even though it cannot be
called directly. This will be exploited with a follow-up patch when
reductions are introduced.
Bootstrapped and regt
Hi,
This patch adds support for the XAndesperf ISA extension.
The 32-bit AndeStar V5 extension includes branch instructions,
load effective address instructions, and string processing
instructions for performance improvement.
New INSN patterns are added into the new file andes.md
as a seprated ven
> +++ b/gcc/config/riscv/andes.md
> @@ -0,0 +1,430 @@
> +;; Machine description for Andes vendor extensions
> +;; Copyright (C) 2021-2025 Free Software Foundation, Inc.
2025 rather than 2021-2025
>+(define_constraint "ads_Bz07"
Could you rename it to Ou07?
>+ "Zero extended immediate 7-bit v
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