Re: [PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

On Thu, 9 Jun 2016, Marc Glisse wrote: > On Wed, 8 Jun 2016, Jakub Jelinek wrote: > > > On Wed, Jun 08, 2016 at 01:43:56PM -0400, Jason Merrill wrote: > > > > A few random ideas I was considering: > > > > * restrict it to GIMPLE, so we can't have a regression in the > > > > front-ends. > > > > *

Re: [PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

On Wed, 8 Jun 2016, Jason Merrill wrote: > On Wed, Jun 8, 2016 at 11:16 AM, Marc Glisse wrote: > > On Wed, 8 Jun 2016, Richard Biener wrote: > > > >> The following works around PR70992 but the issue came up repeatedly > >> that we are not very consistent in preserving the undefined behavior > >>

Re: [PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

On Wed, 8 Jun 2016, Jakub Jelinek wrote: On Wed, Jun 08, 2016 at 01:43:56PM -0400, Jason Merrill wrote: A few random ideas I was considering: * restrict it to GIMPLE, so we can't have a regression in the front-ends. * fold x/0 to 0 with TREE_OVERFLOW set, to tell the front-end that something is

Re: [PATCH v2, rs6000] Add built-in function support for new Power9 vector absolute difference unsigned instructions

On Wed, Jun 08, 2016 at 03:34:53PM -0600, Kelvin Nilsen wrote: > This patch adds built-in function support for the ISA 3.0 vabsub, > vabsduh, and vabsduw instructions. This second version of the patch > differs from the first in the following ways: > I have bootstrapped and tested on powerpc64l

[PATCH v2, rs6000] Add built-in function support for new Power9 vector absolute difference unsigned instructions

This patch adds built-in function support for the ISA 3.0 vabsub, vabsduh, and vabsduw instructions. This second version of the patch differs from the first in the following ways: 1. Changed the base name of the macros defined in altivec.h from vec_adu to vec_absd. 2. Removed unnecessary em

Re: [PATCH][SPARC] Fix cpu auto-detection in M7 and S7 (Sonoma)

> No problem. Do I need the approval of a maintainer in particular for > commits in the 6 branch? No, maintainers can approve patches for branches outside of release periods. -- Eric Botcazou

Container debug light mode

Hi Here is the patch I already proposed to introduce the debug light mode for vector and deque containers. It also simplify some internal calls. * include/debug/debug.h (__glibcxx_requires_non_empty_range, __glibcxx_requires_nonempty) (__glibcxx_requires_subscript): Move..

Re: Add a test for C DR#423 (PR c/65471)

On Wed, 8 Jun 2016, Marek Polacek wrote: > Reading it occured > to me that we might resolve c/65471, dealing with type interpretation in > _Generic, too. Since it turned out that GCC already does the right thing, > I'm only adding a new t

Re: [PATCH 9/17][ARM] Add NEON FP16 arithmetic instructions.

On Wed, 8 Jun 2016, James Greenhalgh wrote: > My question is whether you consider the different behaviour between scalar > float16_t and vector-of-float16_t types to be a bug? I can think of some No, because it matches how things work for vectors of integer types. E.g.: typedef unsigned char v

Re: [PATCH][SPARC] Fix cpu auto-detection in M7 and S7 (Sonoma)

> Starting with the M7 we will be using the same identifiers to identify > the cpu in both Solaris (via kstat) and GNU/Linux (via /proc/cpuinfo). > This little patch fixes the SPARC M7 entry in cpu_names, and also adds > an entry for the Sonoma SoC. > > Tested in sparc64-*

Re: [C++ Patch] Fix some simple location issues

OK. Jason

Re: [PATCH] integer overflow checking builtins in constant expressions

OK. Jason

Re: [PATCH][SPARC] Fix cpu auto-detection in M7 and S7 (Sonoma)

> Starting with the M7 we will be using the same identifiers to identify > the cpu in both Solaris (via kstat) and GNU/Linux (via /proc/cpuinfo). > This little patch fixes the SPARC M7 entry in cpu_names, and also adds > an entry for the Sonoma SoC. >

Re: [C++ PATCH] Fix -Wunused-* regression (PR c++/71442)

OK. Jason

Re: [PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

On Wed, Jun 08, 2016 at 01:43:56PM -0400, Jason Merrill wrote: > > A few random ideas I was considering: > > * restrict it to GIMPLE, so we can't have a regression in the front-ends. > > * fold x/0 to 0 with TREE_OVERFLOW set, to tell the front-end that something > > is going on. > > * fold to (x/y

Re: [C++ Patch/RFC] Tiny tsubst tweak

The first patch is OK. Jason

Re: [PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

On Wed, Jun 8, 2016 at 11:16 AM, Marc Glisse wrote: > On Wed, 8 Jun 2016, Richard Biener wrote: > >> The following works around PR70992 but the issue came up repeatedly >> that we are not very consistent in preserving the undefined behavior >> of division or modulo by zero. Ok - the only inconsis

Re: [PATCH 0/9] separate shrink-wrapping

On Wed, Jun 08, 2016 at 06:43:23PM +0200, Bernd Schmidt wrote: > On 06/08/2016 05:16 PM, Segher Boessenkool wrote: > >On the plus side I should have caught most of it now. And the failures > >are rarely silent, they show up during compilation already. > > That does count as a plus. Aborts in dwar

Re: [PATCH 1/2][AArch64] Implement AAPCS64 updates for alignment attribute

On Tue, Jun 07, 2016 at 12:07:03PM +0100, James Greenhalgh wrote: > On Fri, Jan 22, 2016 at 05:16:00PM +, Alan Lawrence wrote: > > > > On 21/01/16 17:23, Alan Lawrence wrote: > > > On 18/01/16 17:10, Eric Botcazou wrote: > > >> > > >> Could you post the list of files that differ? How do they

[Patch, lra] PR70751, correct the cost for spilling non-pseudo into memory

As discussed on the PR https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751, here is the patch. For this particular failure on arm, *arm_movsi_insn has the following operand constraints: operand 0: "=rk,r,r,r,rk,m" operand 1: "rk, I,K,j,mi,rk" gcc won't explicitly refuse an unmatch CT_

Re: [PATCH 0/9] separate shrink-wrapping

On 06/08/2016 05:16 PM, Segher Boessenkool wrote: On the plus side I should have caught most of it now. And the failures are rarely silent, they show up during compilation already. That does count as a plus. Aborts in dwarf2cfi, I assume. Most of the problems are code changes the later passe

Re: [PATCH][3/3][RTL ifcvt] PR middle-end/37780: Conditional expression with __builtin_clz() should be optimized out

On 07/06/16 20:34, Christophe Lyon wrote: On 26 May 2016 at 11:53, Kyrill Tkachov wrote: Hi all, In this PR we want to optimise: int foo (int i) { return (i == 0) ? N : __builtin_clz (i); } on targets where CLZ is defined at zero to the constant 'N'. This is determined at the RTL level th

Re: [PATCH][SPARC] Fix cpu auto-detection in M7 and S7 (Sonoma)

> Starting with the M7 we will be using the same identifiers to identify > the cpu in both Solaris (via kstat) and GNU/Linux (via /proc/cpuinfo). > This little patch fixes the SPARC M7 entry in cpu_names, and also adds > an entry for the Sonoma SoC. > > Tested in sparc64-*

Re: libgomp: Unconfuse offload plugins vs. offload targets

Hi! On Wed, 8 Jun 2016 16:08:38 +0200, Jakub Jelinek wrote: > On Wed, Jun 08, 2016 at 03:27:44PM +0200, Thomas Schwinge wrote: > > This got me confused recently, so I took the effort to clean it up. OK > > to commit? > > As I said earlier, I don't find anything confusing on what we have there >

Re: [PATCH 0/9] separate shrink-wrapping

On Wed, Jun 08, 2016 at 01:55:55PM +0200, Bernd Schmidt wrote: > On 06/08/2016 03:47 AM, Segher Boessenkool wrote: > >This patch series introduces separate shrink-wrapping. > [...] > >The next six patches are to prevent later passes from mishandling the > >epilogue instructions that now appear befo

Re: [PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

On Wed, 8 Jun 2016, Richard Biener wrote: The following works around PR70992 but the issue came up repeatedly that we are not very consistent in preserving the undefined behavior of division or modulo by zero. Ok - the only inconsistency is that we fold 0 % x to 0 but not 0 % 0 (with literal ze

Re: move increase_alignment from simple to regular ipa pass

> I think it would be nice to work towards transitioning > flag_section_anchors to a flag on varpool nodes, thereby removing > the Optimization flag from common.opt:fsection-anchors > > That would simplify the walk over varpool candidates. Makes sense to me, too. There are more candidates for su

Re: [PATCH 4/N] Add new analyze_brprob_spec.py script

> Hi. > > The second follow up patch adds new script which is a simple wrapper around > analyze_brprob.py and can be used to dump statistics for results that are in > different folder (like SPEC benchmarks). > > Sample: > ./contrib/analyze_brprob_spec.py --sorting=hitrate > /home/marxin/Programm

Re: [PATCH 3/N] Add sorting support to analyze_brprob script

> Hello. > > This is a small followup, where I would like to add new argument to > analyze_brprob.py > script file. With the patch, one can sort predictors by e.g. hitrate: OK, thanks! Honza

[gomp4.5] !$omp declare target changes

Hi! I've committed following patch to implement OpenMP 4.5 declare target construct. In addition, I've fixed omp declare simd handling, where it would in free form incorrectly accept free form SUBROUTINE FOO(A) !$OMP DECLARE SIMDLINEAR(A) INTEGER :: A END SUBROUTINE (no space between SIMD and f

Re: [PATCH AArch64]Support missing vcond pattern by adding/using vec_cmp/vcond_mask patterns.

> From: James Greenhalgh > Sent: 31 May 2016 16:24 > To: Bin Cheng > Cc: gcc-patches@gcc.gnu.org; nd > Subject: Re: [PATCH AArch64]Support missing vcond pattern by adding/using > vec_cmp/vcond_mask patterns. > > On Tue, May 17, 2016 at 09:02:22AM +, Bin Cheng wrote: > > Hi, > > Alan and

Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: > I've tried the attached patch (which does only dg-options -> > dg-additional-options). > For GCC, it's better, except that on arm-none-eabi qemu complains about > an illegal instruction when asked to use arm926 and GCC is configured

Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

On 8 June 2016 at 12:33, Richard Biener wrote: > On Wed, 8 Jun 2016, Jakub Jelinek wrote: > >> On Wed, Jun 08, 2016 at 12:26:17PM +0200, Richard Biener wrote: >> > > So: should I change dg-options into dg-additional-options for all the >> > > tests for consistency, or only on the 3 ones where it m

Re: [PING^4][PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

Ping. On 19/05/16 11:19, Andre Vieira (lists) wrote: > Ping for GCC-7, patch applies cleanly, passed make check for cortex-m0. > > Might be worth mentioning that this patch has been used in three > releases of the GNU ARM embedded toolchain, using GCC versions 4.9 and > 5, and no issues have been

Re: move increase_alignment from simple to regular ipa pass

On Tue, 7 Jun 2016, Prathamesh Kulkarni wrote: > On 3 June 2016 at 13:35, Jan Hubicka wrote: > >> > fsection-anchors > >> > Common Report Var(flag_section_anchors) > >> > Access data in the same section from shared anchor points. > >> > >> Funny. I see the following on trunk: > >> > >> fsection-

Re: [PATCH v1] Support for SPARC M7 and VIS 4.0

On Wed, 8 Jun 2016, Eric Botcazou wrote: > I have also attached an update for the wwwdocs module, OK to install? Yes, definitely! Thank you, Gerald

Re: RFC [1/2] divmod transform

On Fri, 3 Jun 2016, Jim Wilson wrote: > On Mon, May 30, 2016 at 12:45 AM, Richard Biener wrote: > > Joseph - do you know sth about why there's not a full set of divmod > > libfuncs in libgcc? > > Because udivmoddi4 isn't a libfunc, it is a helper function for the > div and mov libfuncs. Since w

Re: libgomp: Unconfuse offload plugins vs. offload targets

On Wed, Jun 08, 2016 at 03:27:44PM +0200, Thomas Schwinge wrote: > Hi! > > This got me confused recently, so I took the effort to clean it up. OK > to commit? As I said earlier, I don't find anything confusing on what we have there and would strongly prefer not to change it. Can you submit the a

Re: [PING] [PR c/71381] C/C++ OpenACC cache directive rejects valid syntax

On Wed, Jun 08, 2016 at 03:28:57PM +0200, Thomas Schwinge wrote: > > [PR c/71381] C/C++ OpenACC cache directive rejects valid syntax > > > > gcc/c/ > > PR c/71381 > > * c-parser.c (c_parser_omp_variable_list) : > > Loosen checking. > >

Re: [PATCH, RFC] First cut at using vec_construct for strided loads

On Wed, 8 Jun 2016, Bill Schmidt wrote: > Hi Richard, > > > On Jun 8, 2016, at 7:29 AM, Richard Biener > > wrote: > > > > On Wed, Jun 13, 2012 at 4:18 AM, William J. Schmidt > > wrote: > >> This patch is a follow-up to the discussion generated by > >> http://gcc.gnu.org/ml/gcc-patches/2012-06

Re: [PATCH][SPARC] Fix cpu auto-detection in M7 and S7 (Sonoma)

> Starting with the M7 we will be using the same identifiers to identify > the cpu in both Solaris (via kstat) and GNU/Linux (via /proc/cpuinfo). > This little patch fixes the SPARC M7 entry in cpu_names, and also adds > an entry for the Sonoma SoC. > > Tested in sparc64-*-linux-gnu, sparcv9-*-lin

Re: [PING] [PR other/70945] Handle function_glibc_finite_math in offloading

On Wed, Jun 08, 2016 at 03:47:54PM +0200, Thomas Schwinge wrote: > > I'm not saying newlib in general, let newlib do whatever they want, but > > I'm talking about offloading port(s) of newlib, which IMHO should provide > > translation layer from the host headers to the offloading target functions.

Re: [PATCH v1] Support for SPARC M7 and VIS 4.0

> Committed to trunk. Thanks. You're welcome. Now backported onto the 6 branch, together with your previous patch for --with-cpu-{32,64}. I have also attached an update for the wwwdocs module, OK to install? -- Eric BotcazouIndex: gcc-6/changes.html ==

Re: [PING] [PR other/70945] Handle function_glibc_finite_math in offloading

Hi! On Tue, 7 Jun 2016 08:54:10 +0200, Jakub Jelinek wrote: > On Mon, Jun 06, 2016 at 09:11:18PM +, Joseph Myers wrote: > > On Fri, 3 Jun 2016, Jakub Jelinek wrote: > > > I think it would be better to just add this support to newlib. > > > > That suggestion doesn't really make sense to me.

Re: [PATCH, RFC] First cut at using vec_construct for strided loads

Hi Richard, > On Jun 8, 2016, at 7:29 AM, Richard Biener wrote: > > On Wed, Jun 13, 2012 at 4:18 AM, William J. Schmidt > wrote: >> This patch is a follow-up to the discussion generated by >> http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00546.html. I've added >> vec_construct to the cost model

[PATCH][SPARC] Fix cpu auto-detection in M7 and S7 (Sonoma)

Starting with the M7 we will be using the same identifiers to identify the cpu in both Solaris (via kstat) and GNU/Linux (via /proc/cpuinfo). This little patch fixes the SPARC M7 entry in cpu_names, and also adds an entry for the Sonoma SoC. Tested in sparc64-*-linux-gnu, sparcv9-*-linux-gnu and

[PING] [PR c/71381] C/C++ OpenACC cache directive rejects valid syntax

Hi! Ping. On Thu, 2 Jun 2016 13:47:08 +0200, I wrote: > On Wed, 05 Nov 2014 17:29:19 +0100, I wrote: > > In r217145, I applied Jim's patch to gomp-4_0-branch: > > > > commit 4361f9b6b2c74c2961c3a5290a4945abe2d7a444 > > Author: tschwinge > > Date: Wed Nov 5 16:26:47 2014 + > > > > Ope

libgomp: Unconfuse offload plugins vs. offload targets

Hi! This got me confused recently, so I took the effort to clean it up. OK to commit? commit 5a1b2d8440a459fd2c623ba76fd6cab478ada54f Author: Thomas Schwinge Date: Wed Jun 8 15:18:11 2016 +0200 libgomp: Unconfuse offload plugins vs. offload targets libgomp/ * plugin/

[PATCH] Testcase for PR68558

Vectorized since GCC 6. Tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-06-08 Richard Biener * gcc.dg/vect/slp-44.c: New testcase. Index: gcc/testsuite/gcc.dg/vect/slp-44.c === --- gcc/testsuite/gcc.dg/vect/

Re: [PATCH,rs6000] Add built-in function support for new Power9 vector absolute difference unsigned instructions

> On Jun 7, 2016, at 2:29 AM, Richard Biener wrote: > > On Tue, Jun 7, 2016 at 1:58 AM, Kelvin Nilsen > wrote: >> >> This patch adds built-in function support for the ISA 3.0 vabsub, >> vabsduh, and vabsduw instructions. >> >> I have bootstrapped and tested on powerpc64le-unkonwn-linux-gnu wi

[Patch, testsuite] Skip some more tests for targets with int size < 32

Hi, This patch requires int32plus support for a few more tests - these were failing for the avr target. bswap-2.c uses left shifts wider than 16 bits on a char, and pr68067-{1,2} use an out of range negative number (INT_MIN for 32 bit int). If this is ok, could someone commit please? I

Re: Update probabilities in predict.def to match reality

On Wed, Jun 8, 2016 at 2:50 PM, Jan Hubicka wrote: >> On Wed, Jun 8, 2016 at 2:35 PM, Jan Hubicka wrote: >> >> On 06/08/2016 12:21 PM, Andreas Schwab wrote: >> >> > Jan Hubicka writes: >> >> > >> >> >> Bootstrapped/regtested x86_64-linux, will commit it later today. >> >> > >> >> > FAIL: gcc.dg/

[PATCH] Remove strided SLP load vectorization restriction

Currently we only handle group_size <= nunits && nunits % group_size == 0 strided SLP loads. That's overly restrictive as we can chunk group_size > nunits && group_size % nunits == 0 loads and handle all other cases by constructing the vector from scalars (as we'd do for non-SLP). Bootstrapped o

Re: Update probabilities in predict.def to match reality

> On Wed, Jun 8, 2016 at 2:35 PM, Jan Hubicka wrote: > >> On 06/08/2016 12:21 PM, Andreas Schwab wrote: > >> > Jan Hubicka writes: > >> > > >> >> Bootstrapped/regtested x86_64-linux, will commit it later today. > >> > > >> > FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?*

Re: [PATCH] Improve "str" + 2 > "str" folding (PR c++/71448)

On Wed, 8 Jun 2016, Jakub Jelinek wrote: > Hi! > > For the purposes of fold_comparison, various constants (in this case > STRING_CST) work the same as decls, in particular we know the objects > extents and can determine possible pointer wrapping. > > Bootstrapped/regtested on x86_64-linux and i6

Re: [C++ Patch/RFC] Tiny tsubst tweak

... well, I suppose that in principle the super-safe thing to do in such cases would be checking immediately and returning immediately only if we are in a SFINAE context. Like in the untested patchlet attached. Paolo. / Index: pt.c ==

Re: Update probabilities in predict.def to match reality

On Wed, Jun 8, 2016 at 2:35 PM, Jan Hubicka wrote: >> On 06/08/2016 12:21 PM, Andreas Schwab wrote: >> > Jan Hubicka writes: >> > >> >> Bootstrapped/regtested x86_64-linux, will commit it later today. >> > >> > FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?* " 7 >> > >> >

Re: [PATCH 0/9] separate shrink-wrapping

> Is the usage of the word "concern" here standard for this kind of thing? > It seems odd somehow but maybe that's just me. No, I find it quite odd too. -- Eric Botcazou

[PATCH] Improve "str" + 2 > "str" folding (PR c++/71448)

Hi! For the purposes of fold_comparison, various constants (in this case STRING_CST) work the same as decls, in particular we know the objects extents and can determine possible pointer wrapping. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk (and maybe later for 6.x)? 2016-

Re: [PATCH 2/2] Add edge predictions pruning

> 2016-06-01 Martin Liska > > * analyze_brprob.py: Cover new dump output format. > > gcc/ChangeLog: > > 2016-06-01 Martin Liska > > * predict.c (dump_prediction): Add new argument. > (enum predictor_reason): New enum. > (struct predictor_hash): New struct. >

Re: [C++ PATCH] Fix -Wunused-* regression (PR c++/71442)

On Tue, Jun 07, 2016 at 05:23:34PM +0200, Jakub Jelinek wrote: > Marek has recently added code to set TREE_USED bits on the elements of > TREE_VEC referenced in SIZEOF_EXPR. > But, as the testcase shows, it can be used on various parameter/argument > packs, some of them have types as elements, othe

[C++ Patch/RFC] Tiny tsubst tweak

Hi, while looking a bit into c++/71169 I noticed that in one place we first call tsubst_aggr_type and tubst_copy and then we check if either returned error_mark_node. Performance-wise, it would be better to check as soon as possible the return value of the former and in case return immediatel

Re: Update probabilities in predict.def to match reality

> On 06/08/2016 12:21 PM, Andreas Schwab wrote: > > Jan Hubicka writes: > > > >> Bootstrapped/regtested x86_64-linux, will commit it later today. > > > > FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?* " 7 > > > > Andreas. > > > > Hi. > > It's caused by a different pr

[PATCH 4/N] Add new analyze_brprob_spec.py script

Hi. The second follow up patch adds new script which is a simple wrapper around analyze_brprob.py and can be used to dump statistics for results that are in different folder (like SPEC benchmarks). Sample: ./contrib/analyze_brprob_spec.py --sorting=hitrate /home/marxin/Programming/cpu2006/benchs

Re: [PATCH, RFC] First cut at using vec_construct for strided loads

On Wed, Jun 13, 2012 at 4:18 AM, William J. Schmidt wrote: > This patch is a follow-up to the discussion generated by > http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00546.html. I've added > vec_construct to the cost model for use in vect_model_load_cost, and > implemented a cost calculation that

[PATCH 3/N] Add sorting support to analyze_brprob script

Hello. This is a small followup, where I would like to add new argument to analyze_brprob.py script file. With the patch, one can sort predictors by e.g. hitrate: Example CPU2006 HEURISTICS BRANCHES (REL) HITRATE COVERAGE COVERAGE (REL) loop iv compa

Re: [PATCH 2/2] Add edge predictions pruning

Hi. I'm sending second version of the patch, where I fixed dump_prediction function to dump a proper edge. Thanks, Martin >From 0d82e8def140636fe186888a525fe84e329d676b Mon Sep 17 00:00:00 2001 From: marxin Date: Tue, 31 May 2016 17:29:53 +0200 Subject: [PATCH 2/4] Add edge predictions pruning

Re: [PATCH 1/2][v3] Drop excess size used for run time allocated stack variables.

> There's some discussion about how STACK_POINT_OFFSET shouldn't cause us > to have to align, and postponing that optimization to gcc-4.7. Since > STACK_POINTER_OFFSET should be constant, it ought to be easy enough to > take it into account. See the "Minor cleanup to allocate_dynamic_stack_space"

Re: Update probabilities in predict.def to match reality

On 06/08/2016 12:21 PM, Andreas Schwab wrote: > Jan Hubicka writes: > >> Bootstrapped/regtested x86_64-linux, will commit it later today. > > FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?* " 7 > > Andreas. > Hi. It's caused by a different probabilities for BB 2: @@

Re: Update probabilities in predict.def to match reality

> On 06/07/2016 09:27 PM, Jan Hubicka wrote: > > There are bugs in few predictors - goto predictor is dead because the FE > > code was dropped, > > return predictor is bit random because CFG is optimized (it should probably > > be done in FE), > > loop iv compare seems bogus and fortran fail allo

Re: [PATCH 0/9] separate shrink-wrapping

On 06/08/2016 03:47 AM, Segher Boessenkool wrote: This patch series introduces separate shrink-wrapping. [...] The next six patches are to prevent later passes from mishandling the epilogue instructions that now appear before the epilogue: mostly, you cannot do much to instructions with a REG_C

Re: Update probabilities in predict.def to match reality

On 06/07/2016 09:27 PM, Jan Hubicka wrote: > There are bugs in few predictors - goto predictor is dead because the FE code > was dropped, > return predictor is bit random because CFG is optimized (it should probably > be done in FE), > loop iv compare seems bogus and fortran fail alloc does not s

Re: Introduce param for copy loop headers pass

On 06/08/2016 11:31 AM, Jan Hubicka wrote: I think 20 insns to copy for loop header is way too much. The constant came from jump.c that was operating with quite different IL and compiler. This patch adds --param for it so we can fine tune it for new millenia. +@item max-loop-headers-insns +The

Re: Introduce param for copy loop headers pass

On Wed, 8 Jun 2016, Jan Hubicka wrote: > Hi, > I think 20 insns to copy for loop header is way too much. The constant came > from jump.c that was operating with quite different IL and compiler. > This patch adds --param for it so we can fine tune it for new millenia. > > Bootstrapped/regtested x8

Re: increase alignment of global structs in increase_alignment pass

On 7 June 2016 at 20:17, Wilco Dijkstra wrote: > > After your commit these tests fail on AArch64: > > UNRESOLVED: gcc.dg/vect/section-anchors-vect-70.c scan-ipa-dump-times > increase_alignment "Increasing alignment of decl" 0 > UNRESOLVED: gcc.dg/vect/section-anchors-vect-70.c scan-ipa-dump-times

[Patch, avr] Fix broken stack-usage-1.c test

Hi, A recent patch I submitted fixed broken -fstack-usage for the avr target, by including the size of the return address pushed to the stack (https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01715.html). I forgot to send this testcase modification with that patch - here's the fix for maki

Re: [PATCH 2/2][v3] Drop excess size used for run time allocated stack variables.

On 05/25/2016 03:32 PM, Dominik Vogt wrote: * explow.c (round_push): Use know adjustment. (allocate_dynamic_stack_space): Pass known adjustment to round_push. gcc/testsuite/ChangeLog I was thinking about whether it would be possible/desirable to eliminate the double add entire

Re: [PATCH 1/2][v3] Drop excess size used for run time allocated stack variables.

On 05/25/2016 03:30 PM, Dominik Vogt wrote: * explow.c (allocate_dynamic_stack_space): Simplify knowing that MUST_ALIGN was always true and extra_align ist always BITS_PER_UNIT. I tried to do some archaeology to find out how the code came to look the way it currently does. A re

Re: [PATCH GCC]Remove duplciated alias check in vectorizer

On Mon, Jun 6, 2016 at 6:00 PM, Bin Cheng wrote: > Hi, > GCC now generates duplicated alias check in vectorizer when versioning loops. > In current implementation, DR_OFFSET and DR_INIT are added together too > early when creating structure dr_with_seg_len. This has two disadvantages: > A) st

Add a test for C DR#423 (PR c/65471)

Reading it occured to me that we might resolve c/65471, dealing with type interpretation in _Generic, too. Since it turned out that GCC already does the right thing, I'm only adding a new test. (We should discard qualifiers from controlli

[PATCH] Fold x/x to 1, 0/x to 0 and 0%x to 0 consistently

The following works around PR70992 but the issue came up repeatedly that we are not very consistent in preserving the undefined behavior of division or modulo by zero. Ok - the only inconsistency is that we fold 0 % x to 0 but not 0 % 0 (with literal zero). After folding is now no longer done ea

Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

On Wed, 8 Jun 2016, Jakub Jelinek wrote: > On Wed, Jun 08, 2016 at 12:26:17PM +0200, Richard Biener wrote: > > > So: should I change dg-options into dg-additional-options for all the > > > tests for consistency, or only on the 3 ones where it makes them pass? > > > (pr71259.c, vect-shift-2-big-arr

Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

On Wed, Jun 08, 2016 at 12:26:17PM +0200, Richard Biener wrote: > > So: should I change dg-options into dg-additional-options for all the > > tests for consistency, or only on the 3 ones where it makes them pass? > > (pr71259.c, vect-shift-2-big-array.c, vect-shift-2.c) > > I think all tests shoul

Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

On Wed, 8 Jun 2016, Christophe Lyon wrote: > On 7 June 2016 at 11:28, Jakub Jelinek wrote: > > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: > >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 > >> > 17:05:37.693475438 +0200 > >> > +++ gcc/testsuite/gcc.dg/vect/p

Re: Update probabilities in predict.def to match reality

Jan Hubicka writes: > Bootstrapped/regtested x86_64-linux, will commit it later today. FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?* " 7 Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "An

[PATCH] Improve optimize pragma/attribute diagnostics

As pointed out by Manu in BZ. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied as obvious. Richard. 2016-06-08 Richard Biener * c-common.c (parse_optimize_options): Improve diagnostic messages. Index: gcc/c-family/c-common.c =

Re: [v2][AArch64, 6/6] Reimplement vpadd intrinsics & extend rtl patterns to all modes

On Mon, Jun 06, 2016 at 02:40:55PM +0100, Jiong Wang wrote: > These intrinsics was implemented by inline assembly using "faddp" instruction. > There was a pattern "aarch64_addpv4sf" which supportsV4SF mode only while we > can > extend this pattern to support VDQF mode, then we can reimplement thes

Re: [v2][AArch64, 5/6] Reimplement fabd intrinsics & merge rtl patterns

On Mon, Jun 06, 2016 at 02:40:45PM +0100, Jiong Wang wrote: > These intrinsics were implemented before "fabd_3" introduces. > Meanwhile > the patterns "fabd_3" and "*fabd_scalar3" can be merged into a > single "fabd3" using VALLF. > > This patch migrate the implementation to builtins backed by thi

Re: [v2][AArch64, 4/6] Reimplement frsqrts intrinsics

On Mon, Jun 06, 2016 at 02:40:33PM +0100, Jiong Wang wrote: > Similar as [3/6], these intrinsics were implemented before the instruction > pattern "aarch64_rsqrts" added, that these intrinsics were implemented > through inline assembly. > > This mirgrate the implementation to builtin. OK. Thanks

Re: [v2][AArch64, 3/6] Reimplement frsqrte intrinsics

On Mon, Jun 06, 2016 at 02:40:22PM +0100, Jiong Wang wrote: > These intrinsics were implemented before the instruction pattern > "aarch64_rsqrte" added, that these intrinsics were implemented through > inline assembly. > > This mirgrate the implementation to builtin. OK. Thanks for the extra work

Re: [v2][AArch64, 2/6] Reimplement vector fixed-point intrinsics

On Mon, Jun 06, 2016 at 02:39:38PM +0100, Jiong Wang wrote: > Based on top of [1/6], this patch reimplement vector intrinsics for > conversion between floating-point and fixed-point. OK. Thanks, James > > gcc/ > 2016-06-06 Jiong Wang > > * config/aarch64/aarch64-builtins.def (scvtf):

Re: [v2][AArch64, 1/6] Reimplement scalar fixed-point intrinsics

On Mon, Jun 06, 2016 at 02:38:58PM +0100, Jiong Wang wrote: > On 27/05/16 17:52, Jiong Wang wrote: > > > > > >On 27/05/16 14:03, James Greenhalgh wrote: > >>On Tue, May 24, 2016 at 09:23:36AM +0100, Jiong Wang wrote: > >>> * config/aarch64/aarch64-simd-builtins.def: Rename to > >>>

Introduce param for copy loop headers pass

Hi, I think 20 insns to copy for loop header is way too much. The constant came from jump.c that was operating with quite different IL and compiler. This patch adds --param for it so we can fine tune it for new millenia. Bootstrapped/regtested x86_64-linux, OK? Honza * invoke.texi (max-l

Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

On 7 June 2016 at 11:28, Jakub Jelinek wrote: > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 >> > 17:05:37.693475438 +0200 >> > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 >> > @@ -

Re: [PATCH] Add selftest for pretty-print.c (v2)

On 06/08/2016 02:56 AM, David Malcolm wrote: Good idea. In the following I did it by adding 0x12345678 as a successor argument to each test. I chose that bit pattern on the grounds that each nybble is unique and non-zero. I printed them with %x to make it easier (I hope) to track down problems.

Re: [PATCH 5/9] regrename: Don't run if function was separately shrink-wrapped

On 06/08/2016 03:47 AM, Segher Boessenkool wrote: + /* regrename creates wrong code for exception handling, if used together + with separate shrink-wrapping. Disable for now, until we have +figured out what exactly is going on. */ That needs to be figured out now or it'll

Re: [Patch ARM/AArch64 09/11] Add missing vrnd{,a,m,n,p,x} tests.

On 8 June 2016 at 10:47, Christophe Lyon wrote: > On 8 June 2016 at 09:37, Christophe Lyon wrote: >> On 7 June 2016 at 19:05, Wilco Dijkstra wrote: >>> Hi, >>> >>> >>> These new tests cause failures due to running on non-ARMv8 hardware - the >>> target check should be arm_v8_neon_hw. Also they d

Re: [Patch ARM/AArch64 09/11] Add missing vrnd{,a,m,n,p,x} tests.

On 8 June 2016 at 09:37, Christophe Lyon wrote: > On 7 June 2016 at 19:05, Wilco Dijkstra wrote: >> Hi, >> >> >> These new tests cause failures due to running on non-ARMv8 hardware - the >> target check should be arm_v8_neon_hw. Also they don't run on AArch64 >> hardware as arm_v8_neon_ok/arm_v8_

Re: [PATCH 9/17][ARM] Add NEON FP16 arithmetic instructions.

On Thu, May 19, 2016 at 05:29:16PM +, Joseph Myers wrote: > On Thu, 19 May 2016, Jiong Wang wrote: > > > Then, > > > > * if we add scalar HF mode to standard patterns, vector HF modes operation > > will be > > turned into scalar HF operations instead of scalar SF operations. > > > >

Re: [C++ Patch/RFC] PR 70572 ("[4.9/5/6/7 Regression] ICE on code with decltype (auto) on x86_64-linux-gnu in digest_init_r")

.. shall we fix this in gcc-6-branch too or not? It's just an ICE on invalid but we don't emit any diagnostic before the crash. Thanks, Paolo.

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