On Mon, Jun 06, 2016 at 02:38:58PM +0100, Jiong Wang wrote: > On 27/05/16 17:52, Jiong Wang wrote: > > > > > >On 27/05/16 14:03, James Greenhalgh wrote: > >>On Tue, May 24, 2016 at 09:23:36AM +0100, Jiong Wang wrote: > >>> * config/aarch64/aarch64-simd-builtins.def: Rename to > >>> aarch64-builtins.def. > >>Why? We already have some number of intrinsics in here that are not > >>strictly SIMD, but I don't see the value in the rename? > > > >Mostly because this builtin infrastructure is handy that I want to > >implement some vfp builtins in this .def file instead of implement those > >raw structure inside aarch64-builtins.c. > > > >And there maybe more and more such builtins in the future, so I renamed > >this file. > > > > > >Is this OK? > > > >>>+(define_int_iterator FCVT_FIXED2F_SCALAR [UNSPEC_SCVTF_SCALAR > >>>UNSPEC_UCVTF_SCALAR]) > >>Again, do we need the "SCALAR" versions at all? > > > >That's because for scalar fixed-point conversion, we have two types of > >instructions to support this. > > > > * scalar instruction from vfp > > * scalar variant instruction from simd > > > >One is guarded by TARGET_FLOAT, the other is guarded by TARGET_SIMD, and > >their instruction format is different, so I want to keep them in > >aarch64.md and aarch64-simd.md seperately. > > > >The other reason is these two use different patterns: > > > > * vfp scalar support conversion between different size, for example, > > SF->DI, DF->SI, so it's using two mode iterators, GPI and GPF, and > > is utilizing the product of the two to cover all supported > > conversions, sfsi, sfdi, dfsi, dfdi, sisf, sidf, disf, didf. > > > > * simd scalar only support conversion between same size that single > > mode iterator is used to cover sfsi, sisf, dfdi, didf. > > > >For intrinsics implementation, I used builtins backed by vfp scalar > >instead of simd scalar which requires the input sitting inside > >vector register. > > > >I remember the simd scalar pattern was here because it's anyway needed > >by patch [2/6] which extends it's modes naturally to vector modes. I was > >thinking it's better to keep simd scalar variant with this scalar > >intrinsics enable patch. > > > >Is this OK?
This is OK. Just watch the length of some of your ChangeLog lines when you commit. Thanks, James > gcc/ > 2016-06-06 Jiong Wang<jiong.w...@arm.com> > > * config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New > (TYPES_BINOP_SUS): Likewise. > (aarch64_simd_builtin_data): Update include file name. > (aarch64_builtins): Likewise. > * config/aarch64/aarch64-simd-builtins.def (scvtf): New entries > for conversion between scalar float-point and fixed-point. > (ucvtf): Likewise. > (fcvtzs): Likewise. > (fcvtzu): Likewise. > * config/aarch64/aarch64.md > (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3: New > pattern for conversion between scalar float to fixed-pointer. > (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>: Likewise. > (UNSPEC_FCVTZS): New UNSPEC enumeration. > (UNSPEC_FCVTZU): Likewise. > (UNSPEC_SCVTF): Likewise. > (UNSPEC_UCVTF): Likewise. > * config/aarch64/arm_neon.h (vcvtd_n_f64_s64): Remove inline > assembly. Use > builtin. > (vcvtd_n_f64_u64): Likewise. > (vcvtd_n_s64_f64): Likewise. > (vcvtd_n_u64_f64): Likewise. > (vcvtd_n_f32_s32): Likewise. > (vcvts_n_f32_u32): Likewise. > (vcvtd_n_s32_f32): Likewise. > (vcvts_n_u32_f32): Likewise. > * config/aarch64/iterators.md (fcvt_target): Support integer to float > mapping. > (FCVT_TARGET): Likewise. > (FCVT_FIXED2F): New iterator. > (FCVT_F2FIXED): Likewise. > (fcvt_fixed_insn): New define_int_attr. >
