On February 27, 2016 2:07:43 AM GMT+01:00, Bill Schmidt
wrote:
>Also tested with powerpc64le-unknown-linux-gnu native bootstrap with no
>regressions, where it fixes this bug as well as the (reopened) PR69613.
>
>Bill
>
>On Sat, 2016-02-27 at 00:04 +0100, Jakub Jelinek wrote:
>> Hi!
>>
>> On ppc6
Also tested with powerpc64le-unknown-linux-gnu native bootstrap with no
regressions, where it fixes this bug as well as the (reopened) PR69613.
Bill
On Sat, 2016-02-27 at 00:04 +0100, Jakub Jelinek wrote:
> Hi!
>
> On ppc64, the widest (and only) supported vector mode for __int128
> element type
On 02/26/2016 07:54 AM, Renlin Li wrote:
Hi all,
I admit that, the title looks a little bit confusing.
The situation is like this,
To make insn_1 strict, lra generates a new insn_1_reload insn.
In insn_1_reload, there is a scratch operand with this form
clobber (match_scratch:MODE x "=&r")
Whe
On 02/26/16 17:42, Evandro Menezes wrote:
On 02/26/16 08:59, James Greenhalgh wrote:
On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote:
In preparation for the patch adding the Newton series also for
square root, I'd like to propose this patch changing the name of the
existing tuni
On 02/26/16 08:59, James Greenhalgh wrote:
On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote:
In preparation for the patch adding the Newton series also for
square root, I'd like to propose this patch changing the name of the
existing tuning flag for the reciprocal square root.
Th
Hi!
On ppc64, the widest (and only) supported vector mode for __int128
element type is V1TImode, and there is a V1TImode or opcode
and a couple of others, but IMNSHO it is highly undesirable to lower
BLKmode (say 2xTI, 4xTI etc.) generic vectors to V1TI instead of
TI, there are no advantages in do
On 02/26/16 06:37, Wilco Dijkstra wrote:
Evandro Menezes wrote:
I have a question though: is it necessary to add the "fp" and "simd"
attributes to both movsf_aarch64 and movdf_aarch64 as well?
You need at least the "simd" attribute, but providing "fp" as well is clearer
(in principle the TARGE
On Fri, Feb 26, 2016 at 02:45:38PM -0700, Jeff Law wrote:
> >2016-02-26 Jakub Jelinek
> >
> > PR c/69796
> > PR c/69974
> > * c-parser.c (c_parser_translation_unit): Don't change TREE_TYPE
> > of incomplete decls to error_mark_node.
> >
> > * gcc.dg/pr69796.c: New test.
> >
On Fri, Feb 26, 2016 at 1:44 PM, H.J. Lu wrote:
> On Fri, Feb 26, 2016 at 7:50 AM, James Greenhalgh
> wrote:
>> On Thu, Feb 25, 2016 at 09:25:45AM +, Kyrill Tkachov wrote:
>>> Hi all,
>>>
>>> In this wrong-code PR we get bad code when synthesising a TImode right shift
>>> by variable amount u
On Fri, Feb 26, 2016 at 01:35:10PM -0800, Richard Henderson wrote:
> On 02/26/2016 01:03 PM, Segher Boessenkool wrote:
> > On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote:
> >> + /* Perform rematerialization if only all operands are registers and
> >> + all operations
On 02/26/2016 07:43 AM, Jakub Jelinek wrote:
Hi!
Already PR69483 and these two further PRs show that it is really a bad idea
to set TREE_TYPE of decls with incomplete types to error_mark_node, there
are lots of places in the middle-end that don't expect error_mark_nodes
appearing so late.
I've
On Fri, Feb 26, 2016 at 7:50 AM, James Greenhalgh
wrote:
> On Thu, Feb 25, 2016 at 09:25:45AM +, Kyrill Tkachov wrote:
>> Hi all,
>>
>> In this wrong-code PR we get bad code when synthesising a TImode right shift
>> by variable amount using DImode shifts during expand.
>>
>> The expand_double_
On 02/26/2016 01:55 PM, Jakub Jelinek wrote:
On Fri, Feb 26, 2016 at 01:09:57PM -0700, Martin Sebor wrote:
On 02/26/2016 12:51 PM, Jakub Jelinek wrote:
I've noticed today:
../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A
../../gcc/doc/extend.texi:10764: warning: `.'
On Fri, Feb 26, 2016 at 01:10:17PM -0800, Richard Henderson wrote:
> On 02/26/2016 01:01 PM, Segher Boessenkool wrote:
> >> How do you imagine the rs6000 change will regress codegen?
> >
> > Combine of sequences with double-length adds.
>
> What sort of test case are you imagining here? The triv
On 02/26/2016 01:03 PM, Segher Boessenkool wrote:
> On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote:
>> + /* Perform rematerialization if only all operands are registers and
>> + all operations are PLUS. */
>> + for (i = 0; i < n_ops; i++)
>> +if (ops[i].neg
On Thu, 25 Feb 2016, Marek Polacek wrote:
> Now that -Wnonnull-comare has been split out of -Wnonnull, we should
> also update the porting_to text. Is this sufficient?
It is for me. :-)
Unless anyone else complains, go ahead and commit.
Thanks,
Gerald
Hi David,
On Thu, 11 Feb 2016, David Malcolm wrote:
> I've (mostly) ported gcc-python-plugin to gcc 6. The attached patch
> for the gcc website starts a new "Plugin issues" section, and covers
> the biggest issue I ran into (FWIW the suggested compatibility typedef
> is the one I committed to gcc
On 02/24/2016 07:10 AM, marxin wrote:
gcc/ada/ChangeLog:
2016-02-24 Martin Liska
* gcc-interface/utils.c (set_reverse_storage_order_on_pad_type):
Replace ENABLE_CHECKING macro with flag_checking.
OK.
jeff
On 02/26/2016 04:04 AM, JonY wrote:
Hi,
I've submitted a patch that was committed as r227962, it causes some
unintended side effects (namely libuuid on Cygwin). Can someone please
revert?
Kai still needs some time to setup his gcc development environment.
We'd need to have a better sense of why
On 02/26/2016 01:01 PM, Segher Boessenkool wrote:
>> How do you imagine the rs6000 change will regress codegen?
>
> Combine of sequences with double-length adds.
What sort of test case are you imagining here? The trivial tests I've looked
at have all been optimal (before and after).
> It failed
Ping
On Thu, 2016-02-18 at 10:44 -0500, David Malcolm wrote:
> Ping:
> https://gcc.gnu.org/ml/gcc-patches/2016-02/msg00765.html
>
>
> On Thu, 2016-02-11 at 10:12 -0500, David Malcolm wrote:
> > I've (mostly) ported gcc-python-plugin to gcc 6. The attached
> > patch
> > for the gcc website start
On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote:
> diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
> index 450fa8b..9d55e7b 100644
> --- a/gcc/simplify-rtx.c
> +++ b/gcc/simplify-rtx.c
> @@ -4421,9 +4421,17 @@ simplify_plus_minus (enum rtx_code code, machine_mode
> mode, rtx
On Fri, Feb 26, 2016 at 12:51:10PM -0800, Richard Henderson wrote:
> > What is the rs6000 ICE?
>
> The simplify-rtx.c patch causes (reg:M ca) to get sorted to a different spot
> in
> the (plus (plus r1 r2) r3) chain than the rs6000 backend expects, producing an
> ICE due to an unrecognizable insn
On Fri, Feb 26, 2016 at 01:09:57PM -0700, Martin Sebor wrote:
> On 02/26/2016 12:51 PM, Jakub Jelinek wrote:
> >I've noticed today:
> >../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A
> >../../gcc/doc/extend.texi:10764: warning: `.' or `,' must follow @xref, not A
> >
>
On 02/26/2016 12:41 PM, Segher Boessenkool wrote:
> On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote:
>> It's the simplify-rtx.c portion of the patch that fixes the i686 regression.
>>
>> In the PR, Alan raises some good points, but I don't believe that we can
>> address those for
On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote:
> It's the simplify-rtx.c portion of the patch that fixes the i686 regression.
>
> In the PR, Alan raises some good points, but I don't believe that we can
> address those for gcc6. A new rtl reassoc optimization that takes loop
On Wed, Feb 24, 2016 at 6:49 AM, Richard Biener wrote:
>
> The following fixes bogus SCEV analysis for expressions that are only
> executed conditionally [note: conditionally here doesn't include
> after a taken exit]. Basically we have to make sure further analysis
> does not attempt to use unde
On 02/26/2016 12:51 PM, Jakub Jelinek wrote:
Hi!
I've noticed today:
../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A
../../gcc/doc/extend.texi:10764: warning: `.' or `,' must follow @xref, not A
After reading info texinfo on @xref and @pxref, I believe it is invali
On Fri, Feb 26, 2016 at 2:27 PM, Jakub Jelinek wrote:
> Hi!
>
> Most of the errors and warnings in rs6000_option_override_internal
> are emitted only if the particular option is explicit, e.g.
> if (TARGET_P9_DFORM && !TARGET_P9_VECTOR)
> {
> if (rs6000_isa_flags_explicit & OPTION_MASK
alias templates are supposed to be transparent, so when we see
template
using wrapped2 = list>;
the size_for needs to be expanded into sizeof...(something).
There is no way to write this "something" in C++, but it's simple enough
to leave it as an *_ARGUMENT_PACK within the compiler.
Tested
Hi!
I've noticed today:
../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A
../../gcc/doc/extend.texi:10764: warning: `.' or `,' must follow @xref, not A
After reading info texinfo on @xref and @pxref, I believe it is invalid
to use @xref this way, in the middle of a sen
On Feb 26, 2016, at 10:58 AM, Martin Jambor wrote:
> I have asked HSA foundation
Thanks.
> The license is going to be:
>
> The MIT License (MIT)
Wonderful.
Hi!
Most of the errors and warnings in rs6000_option_override_internal
are emitted only if the particular option is explicit, e.g.
if (TARGET_P9_DFORM && !TARGET_P9_VECTOR)
{
if (rs6000_isa_flags_explicit & OPTION_MASK_P9_VECTOR)
error ("-mpower9-dform requires -mpower9-vector"
On Fri, Feb 26, 2016 at 1:52 PM, Segher Boessenkool
wrote:
> On Thu, Feb 25, 2016 at 10:52:29AM -0500, David Edelsohn wrote:
>> Please add a short comment explaining why rs6000_insn_for_shift_mask
>> doesn't need to match the logic in rs6000_is_valid_shift_mask
>> converting rotates to simple shif
Hi,
I hope I've got some good news:
On Thu, Jan 14, 2016 at 05:18:56PM -0800, Ian Lance Taylor wrote:
> Jakub Jelinek writes:
>
> > On Wed, Jan 13, 2016 at 06:39:33PM +0100, Martin Jambor wrote:
> >> the following patch adds a BRIG (binary representation of HSAIL)
> >> representation description
On Thu, Feb 25, 2016 at 10:52:29AM -0500, David Edelsohn wrote:
> Please add a short comment explaining why rs6000_insn_for_shift_mask
> doesn't need to match the logic in rs6000_is_valid_shift_mask
> converting rotates to simple shifts.
I added this comment:
--- trunk/gcc/config/rs6000/rs6000.c
Hi,
On Fri, Feb 26, 2016 at 06:51:34PM +0100, Jakub Jelinek wrote:
> On Fri, Feb 26, 2016 at 06:18:13PM +0100, Martin Jambor wrote:
> > > I'm a proponent of enabling as many useful warnings by default, or if not
> > > by default, then with -Wall. -Whsa is enabled by default, and has thus
> > > se
On 02/26/2016 08:41 AM, Bernd Schmidt wrote:
On 02/22/2016 03:37 PM, Richard Biener wrote:
Do calls properly clobber them even if they are not in the set of
call-clobbered regs?
Are asm()s properly using/clobbering them? I think you are allowed to
use them
in asm()s without adding constraints
Dear Alessandro,
Seconded! I saw your ping on my phone and was going to respond.
well, now :-)
Thanks for the patch
Paul
On 26 February 2016 at 18:29, Thomas Koenig wrote:
> Hi Allessandro,
>
>> * PING *
>
>
> Looks obvious and simple enough for me.
>
> OK.
>
> Thanks for the patch!
>
>
double-ping ...
2016-02-12 0:29 GMT+01:00 Janus Weil :
> ping!
>
> 2016-02-05 19:19 GMT+01:00 Janus Weil :
>> Hi all,
>>
>> I have slightly updated the patch now to avoid string-breaking issues
>> (even if it may not be a problem at all, as mentioned by Jospeh). Also
>> I removed the questionabl
On Fri, Feb 26, 2016 at 06:18:13PM +0100, Martin Jambor wrote:
> > I'm a proponent of enabling as many useful warnings by default, or if not
> > by default, then with -Wall. -Whsa is enabled by default, and has thus
> > set a precedent of doing that.
>
> I am not sure I'd go as far as "as many as
On February 26, 2016 5:15:43 PM GMT+01:00, Martin Jambor
wrote:
>Hi,
>
>my fix for PR 69666 has caused quite a few regressions accross the
>borad where SRA removed a SSA_NAME which however still was in the IL
>(and usually stumbled upon it itself straight away).
>
>The removal path should not be
This patch adds some Getsockopt functions to the syscall package.
These functions exist in the master library, but never made it into
gccgo's syscall package. This fixes GCC PR 69966. Bootstrapped and
ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/M
Hello,
I would like to update the gcc plugin API to include interfaces for
querying section size and alignment. The intent is to make it easier
for plugins to do link-time reordering of .bss/.data/.rodata sections
to reduce padding and/or improve cache utilization.
I've posted a patch to binutils
Hi Allessandro,
* PING *
Looks obvious and simple enough for me.
OK.
Thanks for the patch!
Thomas
Hi,
On Fri, Feb 26, 2016 at 05:46:33PM +0100, Thomas Schwinge wrote:
> Hi!
>
> In light of the -Whsa testsuite patches just posted, I think we first
> need to clarify the general policy questions I posted a month ago:
>
> On Tue, 26 Jan 2016 11:46:14 +0100, I wrote:
> > On Thu, 10 Dec 2015 18:51
Hi!
In light of the -Whsa testsuite patches just posted, I think we first
need to clarify the general policy questions I posted a month ago:
On Tue, 26 Jan 2016 11:46:14 +0100, I wrote:
> On Thu, 10 Dec 2015 18:51:48 +0100, Martin Jambor wrote:
> > On Mon, Dec 07, 2015 at 12:46:45PM +0100, Jakub
On Fri, Feb 26, 2016 at 11:02 AM, Jakub Jelinek wrote:
> Hi!
>
> Segher has added last year a few routines for the shift/rotate + mask
> patterns, insns always have one predicate which tests if PowerPC supports
> such pattern, and another that emits the instruction for it.
>
> The testcase in the
Hi,
my fix for PR 69666 has caused quite a few regressions accross the
borad where SRA removed a SSA_NAME which however still was in the IL
(and usually stumbled upon it itself straight away).
The removal path should not be executed when there is an SSA_NAME on
the LHS, the code clearly is not re
On Thu, Feb 25, 2016 at 02:49:10PM -0600, Joel Sherrill wrote:
> * contrib/config-list.mk: Add aarch64-rtems and x86_64-rtems
The AArch64 part of this is OK.
Thanks,
James
> ---
> contrib/config-list.mk | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
On Thu, Feb 25, 2016 at 02:49:08PM -0600, Joel Sherrill wrote:
> * gcc/config.gcc, libgcc/config.host: Add aarch64-*-rtems*.
> * gcc/config/aarch64/rtems.h: New file.
OK.
Thanks,
James
> ---
> gcc/config.gcc | 11 +--
> gcc/config/aarch64/rtems.h | 28 +++
On Fri, Feb 26, 2016 at 04:59:42PM +0100, Martin Jambor wrote:
> this patch has been written by Keith McDaniel when he was working at
> AMD (and so it should be covered by their blanket copyright
> assignment) and adds a libgomp testsuite effective target predicate
> offload_device_shared_as that a
On Fri, Feb 26, 2016 at 04:59:57PM +0100, Martin Jambor wrote:
> just like with the compiler gomp testsuite, we need to add -Wno-hsa to
> options when compiling libgomp testcases in order not to have "excess
> errors" failures when HSA is enabled. There are quite many of such
> testcases on the tr
On Fri, Feb 26, 2016 at 04:57:19PM +0100, Martin Jambor wrote:
> unfortunately, I have missed two execution failures when using HSA
> (teams-6.f90 and target1.f90), both of which are caused by not
> handling the simd part of combined target teams distribute parallel
> for simd construct. I have no
Hi!
Segher has added last year a few routines for the shift/rotate + mask
patterns, insns always have one predicate which tests if PowerPC supports
such pattern, and another that emits the instruction for it.
The testcase in the patch is miscompiled, we end up with an instruction
with out of boun
Hi,
we would like a place to have some HSA-specific tests, which would
only run not only when HSA is enabled at configuration time but also
when HSA hardware is present and used for offloading.
The only way to detect that situation I could think of is to run a
simple kernel with environment varia
Hi,
this patch avoids run-time failures in libgomp testsuite that
curtrently happen when HSA offloading is actually used. All of them
currently require the offload_device effective target which the patch
changes to offload_device_nonshared_as one.
For some tests, such as libgomp.c/examples-4/dev
Hi,
just like with the compiler gomp testsuite, we need to add -Wno-hsa to
options when compiling libgomp testcases in order not to have "excess
errors" failures when HSA is enabled. There are quite many of such
testcases on the trunk because I have disabled the dynamic parallelism
way of executi
Hi,
compilation of (some) target constructs in the following testcases
fails and the warning the compiler gives out by default are then
reported as excess errors. There are two options how to deal with
them. Either we can change the gomp.exp files to pass -Wno-hsa as the
default set of options a
Hello,
this patch has been written by Keith McDaniel when he was working at
AMD (and so it should be covered by their blanket copyright
assignment) and adds a libgomp testsuite effective target predicate
offload_device_shared_as that allows us to run tests only when target
constructs are run on a
Hi,
the patch below adds a DejaGNU effective target predicate (is that the
correct dejagnu term?) offload_hsa so that selected tests can be run
only if the hsa offloading is enabled. I hope it is fairly standard
stuff. Additionally, it adds one C/C++ and one Fortran testsuite to
check that gridi
Hi,
this is a fix for another type of HSA immediate operands that we got
wrong. Apparently, the immediate value that is to be used in an
operation on packed type must be unsigned (unless it is 128bit, then
it has to be bit-typed, which is however something we are handling
correctly even now).
Th
Hi,
the following wrong decision about HSA pointer type leads to hitting
an assert later in the out-of-ssa phase for 32bit targets. I have not
attempted to test HSA on a 32bit i686 yet, I believe there is no
functional runtime (although it should be possible to come up with
one) and we do not bui
Hi,
It turned out that we got the types of conditional move operands and
their immediate operands wrong in, partly because we missed a detail
in the specs, partly because the finalizer/verifier is even stricter
in one aspect. I'll commit the bootstrapped and tested fix below
shortly.
Thanks,
Ma
Hi,
the HSA does not allow atomic instructions operating on the private
segment because they are quite pointless. In the long term, we should
put addressable local variables in the global memory somewhere (I'm
going to look at the nvidia stack effort soon). But for now we need
to fail in the com
Hi,
unfortunately, I have missed two execution failures when using HSA
(teams-6.f90 and target1.f90), both of which are caused by not
handling the simd part of combined target teams distribute parallel
for simd construct. I have not really thought through how exactly
should GPUs teat the simd con
On Thu, Feb 25, 2016 at 11:04:21AM +, Kyrill Tkachov wrote:
> Hi all,
>
> Seems like aarch64 is suffering from something similar to PR 69245 as well.
> If a target pragma sets the target state to the same as the
> target_option_default_node the node is just a pointer to
> target_option_default
On Thu, Feb 25, 2016 at 09:25:45AM +, Kyrill Tkachov wrote:
> Hi all,
>
> In this wrong-code PR we get bad code when synthesising a TImode right shift
> by variable amount using DImode shifts during expand.
>
> The expand_double_word_shift function expands two paths: one where the
> variable
On Thu, Feb 25, 2016 at 12:00:58PM +0100, Yvan Roux wrote:
> Hi,
>
> On 26 January 2015 at 18:01, Matthew Wahab wrote:
> > Hello,
> >
> > The LEGITIMIZE_RELOAD_ADDRESS macro is only needed for reload. Since the
> > Aarch64 backend no longer supports reload, this macro is not needed and this
> > p
On 02/22/2016 03:37 PM, Richard Biener wrote:
Do calls properly clobber them even if they are not in the set of
call-clobbered regs?
Are asm()s properly using/clobbering them? I think you are allowed to use them
in asm()s without adding constraints for them?
Calls do, asms currently don't AFA
On 02/21/2016 11:27 AM, David Wohlferd wrote:
So now what? I have one Bernd who likes the sample, and one who
doesn't. Obviously I think what I'm proposing is better than what's
there now and I've done my best to say why. But me believing it to be
better doesn't get anything checked in.
I ha
This fixes a wrong code generation problem with the splitters introduced
with that patch: https://gcc.gnu.org/ml/gcc-patches/2015-07/msg01840.html
The target operand is used as temporary. This fails if it matches the
source of the left shift which is read after writing the temporary.
Thanks to D
On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote:
> In preparation for the patch adding the Newton series also for
> square root, I'd like to propose this patch changing the name of the
> existing tuning flag for the reciprocal square root.
This is fine, other names like sw_rsqrt, e
On Mon, Feb 22, 2016 at 03:07:09PM +, Alan Lawrence wrote:
> On 22/01/16 17:16, Alan Lawrence wrote:
> >
> >On 21/01/16 17:23, Alan Lawrence wrote:
> >>On 18/01/16 17:10, Eric Botcazou wrote:
> >>>
> >>>Could you post the list of files that differ? How do they differ exactly?
> >>
> >>Hmmm. We
On 26/02/16 14:25, Kyrill Tkachov wrote:
> Hi all,
>
> This patch adds a note to changes.html about the added support for
> Cortex-A32 and Cortex-A35.
>
> Ok to commit?
>
OK.
R.
> Thanks,
> Kyrill
>
> wwwdocs-a32-a35.patch
>
>
> Index: htdocs/gcc-6/changes.html
> ==
Hi!
Already PR69483 and these two further PRs show that it is really a bad idea
to set TREE_TYPE of decls with incomplete types to error_mark_node, there
are lots of places in the middle-end that don't expect error_mark_nodes
appearing so late.
I've bootstrapped/regtested on x86_64-linux and i686
The following fixes PR69720 where with nested reductions that require
unrolling the inner loop (and thus having multiple PHIs) we fail to
properly build the reduction epilogue. Existing testcases in the
testsuite are also affected but for them it doesn't matter as
adding zero can be omitted safel
On Fri, Feb 26, 2016 at 9:18 AM, Bill Schmidt
wrote:
> Hi,
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61397 was almost resolved a
> year ago, but had a proposed patch by Mike Meissner that was never
> vetted and committed. I've reviewed the patch and tested it on GCC 5
> and GCC 6, and with
Hi all,
This patch adds a note to changes.html about the added support for Cortex-A32
and Cortex-A35.
Ok to commit?
Thanks,
Kyrill
Index: htdocs/gcc-6/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retriev
Hi,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61397 was almost resolved a
year ago, but had a proposed patch by Mike Meissner that was never
vetted and committed. I've reviewed the patch and tested it on GCC 5
and GCC 6, and with the patch applied we see the test pass for both
32-bit and 64-bi
On 24/02/16 13:59, Richard Earnshaw (lists) wrote:
> After discussion with the ARM port maintainers we have decided that now
> is probably the right time to deprecate support for versions of the ARM
> Architecture prior to ARMv4t. This will allow us to clean up some of
> the code base going forwar
Hi Richard,
On 26/02/16 12:57, Richard Biener wrote:
On Fri, Feb 26, 2016 at 1:54 PM, Renlin Li wrote:
I have checked, x86, arm, aarch64, mips, arc all have such patterns. But
it's
not triggered. In my case, it's triggered by compiling glibc with local
change.
Please extract a testcase fro
On Fri, Feb 26, 2016 at 1:54 PM, Renlin Li wrote:
> Hi all,
>
> I admit that, the title looks a little bit confusing.
>
> The situation is like this,
> To make insn_1 strict, lra generates a new insn_1_reload insn.
> In insn_1_reload, there is a scratch operand with this form
> clobber (match_scra
Hi all,
I admit that, the title looks a little bit confusing.
The situation is like this,
To make insn_1 strict, lra generates a new insn_1_reload insn.
In insn_1_reload, there is a scratch operand with this form
clobber (match_scratch:MODE x "=&r")
When lra tries to reload insn_1_reload in lat
On Fri, 26 Feb 2016, Jakub Jelinek wrote:
> Hi!
>
> As analyzed by Eric, DSE mishandles memset calls if it can't figure out what
> the arguments to memset exactly are (it handles only register arguments
> right now), or if the second or third arguments are not CONST_INTs.
> In that case we don't
Evandro Menezes wrote:
>
> I have a question though: is it necessary to add the "fp" and "simd"
> attributes to both movsf_aarch64 and movdf_aarch64 as well?
You need at least the "simd" attribute, but providing "fp" as well is clearer
(in principle the TARGET_FLOAT check in the pattern condition
Ping?
On 26 January 2016 at 15:43, Christophe Lyon wrote:
> With the attachment
>
>
> On 26 January 2016 at 15:42, Christophe Lyon
> wrote:
>> Hi,
>>
>> This is a followup to PR63304.
>>
>> As discussed in bugzilla, this patch disables pcrelative_literal_loads
>> when -mfix-cortex-a53-84341
On Fri, Feb 26, 2016 at 12:08 AM, Richard Henderson wrote:
> It's the simplify-rtx.c portion of the patch that fixes the i686 regression.
>
> In the PR, Alan raises some good points, but I don't believe that we can
> address those for gcc6. A new rtl reassoc optimization that takes loop
> invaria
Hi!
As analyzed by Eric, DSE mishandles memset calls if it can't figure out what
the arguments to memset exactly are (it handles only register arguments
right now), or if the second or third arguments are not CONST_INTs.
In that case we don't call record_store, because we don't know what to call
i
On 02/26/2016 12:11 PM, Richard Biener wrote:
> Ok with also addign them to the @findex list above.
>
> Richard.
Thanks for review, updated version installed as r233738.
Martin
On Fri, Feb 26, 2016 at 12:04 PM, Jakub Jelinek wrote:
> On Fri, Feb 26, 2016 at 11:52:50AM +0100, Jan Hubicka wrote:
>> Hi,
>> while looking into the PR testcase I noticed that we detect wrong duplicate
>> types. This is because we compute DECL_ASSEMBLER_NAME of a type variant which
>> is not nec
On Fri, 26 Feb 2016, Jan Hubicka wrote:
> Hi,
> while looking into PR69589 I noticed that types are not merged when pragma
> visibility does not match. This is because C++ FE stores visibility into
> TYPE_DECL
> that is used by FE only. This patch clears the flag in free_lang_data.
>
> Bootstra
On Fri, Feb 26, 2016 at 11:05 AM, Martin Liška wrote:
> On 12/04/2015 10:45 AM, Martin Liška wrote:
>> Hello.
>>
>> I noticed that Builtins section of documentation does not mention
>> clog10{,f,l} functions.
>> I've tried to write a patch, however I'm not sure how should be these
>> functions d
On Fri, Feb 26, 2016 at 8:50 AM, Jeff Law wrote:
> On 02/25/2016 03:00 AM, Richard Biener wrote:
>>
>>
>> So I fail to see how only successor edges are relevant. Isn't the
>> important
>> case to catch whether we remove an edge marked EDGE_IRREDUCIBLE_LOOP?
>> Even if the BB persists we might hav
On Fri, Feb 26, 2016 at 4:02 AM, kugan
wrote:
>
>
> Hi,
>
> This is an attempt to fix missed optimization: x+x+x+x -> 4*x as reported in
> PR63586.
>
> Regression tested and bootstrapped on x86-64-linux-gnu with no new
> regressions.
>
> Is this OK for next stage1?
That looks better, but I think
Hi,
I've submitted a patch that was committed as r227962, it causes some
unintended side effects (namely libuuid on Cygwin). Can someone please
revert?
Kai still needs some time to setup his gcc development environment.
Thanks.
signature.asc
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On Fri, Feb 26, 2016 at 11:52:50AM +0100, Jan Hubicka wrote:
> Hi,
> while looking into the PR testcase I noticed that we detect wrong duplicate
> types. This is because we compute DECL_ASSEMBLER_NAME of a type variant which
> is not necessary.
>
> Bootstrapped/regested x86_64-linux and I checked
On Fri, Feb 26, 2016 at 4:02 AM, kugan
wrote:
>
>
> Hi,
>
> This is an attempt to fix missed optimization: x + (-y * z * z) => x - y * z
> * z as reported in PR40921.
>
> Regression tested and bootstrapped on x86-64-linux-gnu with no new
> regressions.
>
> Is this OK for next stage1?
Err. I thin
Hi,
while looking into the PR testcase I noticed that we detect wrong duplicate
types. This is because we compute DECL_ASSEMBLER_NAME of a type variant which
is not necessary.
Bootstrapped/regested x86_64-linux and I checked dumps of xalancbmk to verify
that nothing changes in ODR type merging exc
Hi,
while looking into PR69589 I noticed that types are not merged when pragma
visibility does not match. This is because C++ FE stores visibility into
TYPE_DECL
that is used by FE only. This patch clears the flag in free_lang_data.
Bootstrapped/regtested x86_64-linux and tested it makes no diff
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