On Fri, Jan 31, 2014 at 07:22:55AM +0100, Jan Hubicka wrote:
> --- ipa-devirt.c (revision 207287)
> +++ ipa-devirt.c (working copy)
> @@ -972,6 +972,120 @@ contains_type_p (tree outer_type, HOST_W
>return get_class_context (&context, otr_type);
> }
>
> +/* Proudce polymorphic call
Hi,
PR ipa/59831 has testcase with one virtual call that shows really interesting
sequence of events. First we speculatively identify the target of call. Next
ipa-cp correctly works out the target and decides to clone. While creating a
clone it however no longer identifies the direct edge. It is
Can someone review this please.
regards,
Venkat.
On 22 January 2014 22:27, Venkataramanan Kumar
wrote:
> Hi Marcus,
>
> After we changed the frame growing direction (downwards) in Aarch64,
> the back-end now generates stack smashing set and test based on
> generic code available in GCC.
>
> But
[resending with the patch - sorry about that]
Hi Jason,
On Tue, Feb 19, 2013 at 10:50:46PM -0500, Jason Merrill wrote:
> On 02/19/2013 10:42 PM, Joel Brobecker wrote:
> >This is useful when a DIE does not have a descriptive type attribute.
> >In that case, the debugger needs to determine whether
More code to support new libgloss features. This one lets the linker
leave out the call to exit() in crt0 (and thus all the exit() code
also) if main() doesn't exit. Committed.
* config/msp430/msp430.h (LIB_SPEC): Add -lcrt
* config/msp430/msp430.md (msp430_refsym_need_exit): Ne
On 01/30/2014 04:00 PM, Jason Merrill wrote:
Also, in the past we've had issues with nested functions in templates
being able to refer to static/const variables from the enclosing
context; we've dealt with that by forcing repeated lookup, but it would
be better to keep the local_specializations f
Hi Jason,
On Tue, Feb 19, 2013 at 10:50:46PM -0500, Jason Merrill wrote:
> On 02/19/2013 10:42 PM, Joel Brobecker wrote:
> >This is useful when a DIE does not have a descriptive type attribute.
> >In that case, the debugger needs to determine whether the unit
> >was compiled with a compiler that n
On Thu, 2014-01-30 at 20:42 -0600, Bill Schmidt wrote:
> Hi,
>
> This patch adds logic for -maltivec=be with a little endian target when
> generating code for the vec_sums builtin. This implements the vsumsws
> instruction, which adds the four elements in the first input vector
> operand to eleme
Hi,
This patch adds logic for -maltivec=be with a little endian target when
generating code for the vec_sums builtin. This implements the vsumsws
instruction, which adds the four elements in the first input vector
operand to element 3 of the second input vector operand, placing the
result in elem
This patch from Chris Manghane adds a conditional expression construct
to the Go frontend IR, for use in future conversion to the backend
interface. Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r cc4de9df6d88 go/expressions.cc
--- a/go/expressi
Wrong format. Send it again.
On Thu, Jan 30, 2014 at 4:57 PM, Cong Hou wrote:
>
> Hi
>
> PR6 (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6) is caused by GCC
> vectorizer. The bug appears when handling vectorization patterns. When a
> pattern statement has additional new statements sto
On Fri, 31 Jan 2014, Marek Polacek wrote:
> As promised, this patch improves column info for function arguments.
> It does so by creating a vec, that carries locations of
> function arguments, which is filled when parsing expression list and
> then this vec is passed down to build_function_call_ve
As promised, this patch improves column info for function arguments.
It does so by creating a vec, that carries locations of
function arguments, which is filled when parsing expression list and
then this vec is passed down to build_function_call_vec ->
convert_arguments. convert_arguments loops ov
On Jan 1, 2014, at 7:58 PM, Mike Stump wrote:
> On Nov 23, 2013, at 11:21 AM, Mike Stump wrote:
>> Richi has asked the we break the wide-int patch so that the individual port
>> and front end maintainers can review their parts without have to go through
>> the entire patch.This patch covers
Ping?
On Tue, Mar 26, 2013 at 3:27 AM, Hurugalawadi, Naveen
wrote:
> Hi,
>
> Please find attached the patch that implements load pair(ldp) and store
> pair(stp) peephole for aarch64 target.
>
> Please review the same and let me know if its okay.
>
> Build and tested on aarch64-thunder-elf (using
On 30 January 2014 15:28, Alex Velenko wrote:
> Hi,
> This patch fixes shift right pattern, as it failed on -O0 after shift
> right patch. The reason was unnecessary movement of immediate value to
> a register due to type mismatch.
> Patch is tested not to cause any additional regressions.
> Could
Committed to branch dmalcolm/jit:
gcc/jit/
* TODO.rst: Label-placement is now checked.
* internal-api.c (gcc::jit::recording::context::replay_into): Give
up if any errors occur during the playback.
(gcc::jit::recording::label::replay_into): Issue an error if the
On Thu, Jan 30, 2014 at 9:43 PM, Jakub Jelinek wrote:
> --- gcc/ifcvt.c.jj 2014-01-09 08:20:55.0 +0100
> +++ gcc/ifcvt.c 2014-01-29 17:16:29.912259159 +0100
> @@ -338,6 +338,10 @@ cond_exec_process_insns (ce_if_block *ce
>
>gcc_assert (NONJUMP_INSN_P (insn) || CALL_P (insn));
>
The following patch fixes
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59959
The patch was successfully bootstrapped and tested on x86/x86-64 and
ppc64.
Committed as rev. 207323.
2014-01-30 Vladimir Makarov
PR rtl-optimization/59959
* lra-constrains.c (simplify_operand_su
Comments are inlined. New patch attached to this email.
-Rong
On Thu, Jan 30, 2014 at 12:39 PM, Xinliang David Li wrote:
> On Wed, Jan 29, 2014 at 4:24 PM, Rong Xu wrote:
>> Hi,
>>
>> The attached patch adds some new features to gcov-tool. It aims to
>> rewrite LIPO profile for reuse, debug or
On 30/01/14 20:47, Jakub Jelinek wrote:
On Thu, Jan 30, 2014 at 08:27:47PM +, Paulo Matos wrote:
Yes, it looks strange but it was the way we came up with to
implement an instruction that loads from a pair of addresses.
From what I wrote previously to Richard.
"We have an instruction that l
On Thu, Jan 30, 2014 at 12:36 PM, Ilya Verbin wrote:
> 2014-01-30 H.J. Lu :
>>> + { OPTION_MASK_ISA_SSE2, CODE_FOR_sha256rnds2, 0,
>>> IX86_BUILTIN_SHA256RNDS2, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI },
>> ^ Is OPTION_MASK_ISA_SSE2
>> intentional?
>> Sh
On 01/29/2014 09:18 PM, Jonathan Wakely wrote:
On 29 January 2014 20:06, François Dumont wrote:
Here is the patch that simply consider 55083 as not supported except in
normal mode. This is a temporary workaround for 4.9 release so I prefer not
to introduce a dg-profile-mode-unsupported or
In this testcase, the problem was that one instantiation of
_Mu::operator() recursively calls another one, and we were finding a
specialization of the arg parameter in local_specializations from the
first instantiation, leading to a wrong result and infinite recursion.
This patch fixes the prob
On Thu, Jan 30, 2014 at 08:27:47PM +, Paulo Matos wrote:
> Yes, it looks strange but it was the way we came up with to
> implement an instruction that loads from a pair of addresses.
>
> From what I wrote previously to Richard.
> "We have an instruction that loads two 32 bit values into a lowe
Here is a release note item for big endian support on tilegx. Ok to
commit once that change is approved?
--- gcc-4.9/changes.html28 Jan 2014 23:57:49 - 1.54
+++ gcc-4.9/changes.html30 Jan 2014 20:46:32 -
@@ -494,6 +494,12 @@ auto incr = [](auto x) { return x++; };
This patch adds support for big endian on tilegx. It's been tested on
tilegx hardware.
Most of the changes are of course in target-specific files, but I have
to touch a few shared files to support the big endian triplets. I've
split up the changes to shared/non-shared files. Can someone approve
Hi!
The following testcase ICEs on arm, because ifcvt decides to conditionalize
a frame related instruction that restores a call saved register and adjusts
stack pointer (== CFA) in order to merge shrink-wrapped and
non-shrink-wrapped basic blocks. I don't see a way how to conditionalize
DW_CFA_r
On Wed, Jan 29, 2014 at 4:24 PM, Rong Xu wrote:
> Hi,
>
> The attached patch adds some new features to gcov-tool. It aims to
> rewrite LIPO profile for reuse, debug or performance tuning purpose.
>
> -l, --modu_list Only use the modules in this file
I think in verbose mode, the tool
Hi!
For -Os, apparently ARM backend sometimes decides to push (up to 8?) dummy
registers to stack in addition to the registers that actually need to be
saved, in order to avoid extra instruction to adjust stack pointer.
These registers shouldn't be mentioned for .debug_frame though (both because
i
2014-01-30 H.J. Lu :
>> + { OPTION_MASK_ISA_SSE2, CODE_FOR_sha256rnds2, 0,
>> IX86_BUILTIN_SHA256RNDS2, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI },
> ^ Is OPTION_MASK_ISA_SSE2 intentional?
> Should it be OPTION_MASK_ISA_SHA?
> --
> H.J.
This was done by an
On 30/01/14 17:10, Richard Sandiford wrote:
Right, in the context:
Just in case: the point I was trying to make in the second paragraph
was that the code in the patch only triggers (as you say) because the
address isn't seen as mode-dependent. But this kind of address does
look mod
On 30/01/14 14:01, Richard Biener wrote:
I'm curious on where you are seeing MEMs with a vector mode address.
What does that MEM even mean?
Yes, it looks strange but it was the way we came up with to implement an
instruction that loads from a pair of addresses.
From what I wrote previously
On Thu, Jan 30, 2014 at 11:34 AM, Bill Schmidt
wrote:
> Hi,
>
> When I implemented the mergeh/mergel code for -maltivec=be, I forgot to
> add DONE; at the end of the define_expands, leading to spurious "use"
> rtx's in the RTL stream. I discovered this while testing some other
> code, where a sim
On Thu, 30 Jan 2014, Richard Biener wrote:
/* Associate (p +p off1) +p off2 as (p +p (off1 + off2)). */
ptr = gimple_assign_rhs1 (stmt);
off1 = gimple_assign_rhs2 (stmt);
! if (TREE_CODE (ptr) != SSA_NAME
! || !has_single_use (ptr))
return false;
def_stmt = SSA_NAME_DEF
Committed to branch dmalcolm/jit:
gcc/jit/
* internal-api.c (gcc::jit::recording::type::get_pointer):
Ensure that repeated calls yield the same type.
(gcc::jit::recording::memento_of_get_pointer::
accepts_writes_from): New.
(gcc::jit::recording::context::new
OK.
Jason
On Mon, Dec 30, 2013 at 4:55 AM, Kirill Yukhin wrote:
> Hello,
> On 19 Nov 15:36, Uros Bizjak wrote:
>> Please also add new command options to g++.dg/other/sse-2.C and
>> g++.dg/other/sse-3.C
> Done (to i386-[23].C).
>> > --mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd @gol
>> > +-mavx2 -mavx51
On Thu, Jan 30, 2014 at 10:43 AM, Richard Sandiford
wrote:
> Hi H.J.,
>
> "H.J. Lu" writes:
>> diff --git a/gcc/testsuite/gcc.dg/pr59605.c b/gcc/testsuite/gcc.dg/pr59605.c
>> new file mode 100644
>> index 000..4556843
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.dg/pr59605.c
>> @@ -0,0 +1,55 @
Hi H.J.,
"H.J. Lu" writes:
> diff --git a/gcc/testsuite/gcc.dg/pr59605.c b/gcc/testsuite/gcc.dg/pr59605.c
> new file mode 100644
> index 000..4556843
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/pr59605.c
> @@ -0,0 +1,55 @@
> +/* { dg-do run } */
> +/* { dg-options "-O2" } */
> +/* { dg-addit
On Thu, Jan 30, 2014 at 07:25:03PM +0100, Richard Biener wrote:
> *** 8886,8891
> --- 8892,8932
> || TREE_ADDRESSABLE (desttype))
> return NULL_TREE;
>
> + /* Make sure we are not copying using a floating-point mode or
> + a type whose size possibly does no
The following attempts to provide a fix for PR59990 - the fact
that we shouldn't use FP modes to implement memcpy in the middle-end.
It consolidates the ubsan case for BOOLEAN and ENUMERAL types which
are desirable to avoid anyway.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
Does this l
On Thu, Jan 30, 2014 at 5:41 PM, Ilya Tocar wrote:
> This patch removes possible division by zero.
> Make check passes. Ok for trunk?
>
> 2014-01-30 Ilya Tocar
>
> * gcc.target/i386/m512-check.h: Use correct rounding values.
>
> ---
> gcc/testsuite/gcc.target/i386/m512-check.h | 3 ++-
The ivdep tests use int arrays but required vect_float rather than vect_int.
Tested on mipsisa64-sde-elf, where it fixes some spurious failures for
-mips32r2/-mfp64, and on mips64-linux-gnu. Applied as obvious.
There are still some other vect failures for mipsisa64-sde-elf but
I'll look at them
The patch for PR 58708 fixed wide strings being passed as argument packs
but it relied on the host and target having the same endianness.
The patch below uses double_int::from_buffer to handle the case
of differing endiannesses.
Tested on mips64-linux-gnu and mipsisa64-sde-elf (with both endiannes
On Wed, Jan 29, 2014 at 11:50 PM, Bill Schmidt
wrote:
> Hi,
>
> This continues the series of -maltivec=be patches, this one handling
> vec_splat. Since vec_splat is no longer treated as a true intrinsic,
> its default behavior for little endian is changed to use right-to-left
> element indexing f
On Thu, Jan 30, 2014 at 6:52 PM, Jakub Jelinek wrote:
> While looking at some other PR, I've stripped line notes and got
> pr59947.ii.bak:26330:74: error: ISO C++ forbids declaration of
> '_mm512_mask_cvtusepi64_storeu_epi32' with no type [-fpermissive]
> _mm512_mask_cvtusepi64_storeu_epi32 (vo
Hi!
While looking at some other PR, I've stripped line notes and got
pr59947.ii.bak:26330:74: error: ISO C++ forbids declaration of
‘_mm512_mask_cvtusepi64_storeu_epi32’ with no type [-fpermissive]
_mm512_mask_cvtusepi64_storeu_epi32 (void* __P, __mmask8 __M, __m512i __A)
On Thu, 30 Jan 2014, Andreas Krebbel wrote:
> @@ -81,6 +91,8 @@ __fixdfdi (double a1)
> l = (long long)1<<63;
> if (!SIGND(dl1))
> l--;
> + /* C99 Annex F.4 requires an "invalid" exception to be thrown. */
> + fexceptdiv (0.0, 0.0);
> return l;
My understandin
On 01/22/14 02:50, David Holsgrove wrote:
Hi Michael,
On 22 January 2014 13:43, David Holsgrove wrote:
-Original Message-
From: Michael Eager [mailto:ea...@eagerm.com]
Sent: Friday, 17 January 2014 4:36 am
To: David Holsgrove; gcc-patches@gcc.gnu.org
Cc: Edgar Iglesias; John Williams;
-Wcomment warns on this.
2014-01-30 Marek Polacek
testsuite/
* gcc.dg/Wconversion-real-integer.c: Properly end comment.
--- gcc/testsuite/gcc.dg/Wconversion-real-integer.c.mp3 2014-01-30
18:09:16.394658789 +0100
+++ gcc/testsuite/gcc.dg/Wconversion-real-integer.c 2014-01-30
18:0
Paulo Matos writes:
>> -Original Message-
>> From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
>> Sent: 30 January 2014 12:43
>> To: Paulo Matos
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH] Vector mode addresses
>>
>> Paulo Matos writes:
>> > As a followup of the thre
Hi,
This patch removes possible division by zero.
Make check passes. Ok for trunk?
2014-01-30 Ilya Tocar
* gcc.target/i386/m512-check.h: Use correct rounding values.
---
gcc/testsuite/gcc.target/i386/m512-check.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/g
Hi,
When I implemented the mergeh/mergel code for -maltivec=be, I forgot to
add DONE; at the end of the define_expands, leading to spurious "use"
rtx's in the RTL stream. I discovered this while testing some other
code, where a similar problem resulted in some missed optimizations.
This patch fix
On Thu, Jan 30, 2014 at 1:50 PM, Ilya Tocar wrote:
> I've found some problems with embedded rounding implementation.
> First constants are already defined in smmintrin.h, so we shouldn't
> redefine them.
> Second problem is bigger: currently rounding argument to intrinsic
> is one of _MM_FROUND_T
Hi Jeff,
Agreed, the naming seems awfully confusing right now. Feel free to go
forward with fixing that :-)
Done - thanks!
Cheers
Nick
On Thu, Jan 30, 2014 at 11:54 AM, Ilya Tocar wrote:
> Turns out that for Icc meaning of Yk and k constraints
> (exposed through inline asm) is opposite to current GCC implementation.
> As Icc with such behavior was already releases and GCC wasn't. I propose
> to swap meaning of Yk and k constrain
On 01/30/14 07:51, Richard Biener wrote:
This fixes an oversight with the (p + o1) + o2 association with
respect to abnormal-used SSA names. I've also added a single-use
test so we don't add extra computations.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
Richard.
2014-01-30 R
Hi,
This patch fixes shift right pattern, as it failed on -O0 after shift
right patch. The reason was unnecessary movement of immediate value to
a register due to type mismatch.
Patch is tested not to cause any additional regressions.
Could someone, please, approve and commit this patch, as I do n
This fixes PR59903, guarding the PHI stmt case similar to the regular
one.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
Thanks,
Richard.
2014-01-30 Richard Biener
PR tree-optimization/59903
* tree-vect-loop.c (vect_transform_loop): Guard multiple-types
Hi,
our IEEE float to int conversion routines in libgcc do not throw the
FE_INVALID exceptions according to C99 Annex F.
Fixed with the attached patch.
This fixes the Glibc test-ldouble tests on s390:
< Failure: llrint (inf): Exception "Invalid operation" not set
< Failure: llrint (-inf): Excepti
Hi,
we implement some of the IEEE float to int conversions in libgcc.
These have only been included for a native s390 32 bit build but not
for the biarch -m31 variant.
Fixed with the attached patch.
I'll commit the patch after a few days waiting for comments.
Bye,
-Andreas-
2014-01-30 Andre
This fixes an oversight with the (p + o1) + o2 association with
respect to abnormal-used SSA names. I've also added a single-use
test so we don't add extra computations.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
Richard.
2014-01-30 Richard Biener
PR tree-optimizati
Symbol classification logic intended to force symbols to memory in large
memory model is triggering in appropriately for all memory models, this
results in an unnecessary level of indirection in generated code.
Regressed aarch64-none-elf, committed.
/Marcus
2014-01-30 Marcus Shawcroft
Hi!
I've noticed that for the side-effects that adjust_insn emits
as extra sets in the PARALLEL we don't transform the SET_SRC parts
through adjust_mems. This means that a typical i?86 push is seen
by var-tracking as:
[(set (mem:SI ((plus:SI (reg:SI argp) (const_int -64 (something:SI))
(
The vector_size attribute changes an ENUM_TYPE into a VECTOR_TYPE, so it
is obviously unsuitable for a typedef that gives the enum a name for
linkage purposes. This patch allows the typedef, but makes it no longer
a name for linkage purposes.
Tested x86_64-pc-linux-gnu, applying to trunk (wal
On Wed, 29 Jan 2014, Joseph S. Myers wrote:
> On Wed, 29 Jan 2014, Richard Biener wrote:
>
> > testing reveals diagnostic regressions
> >
> > FAIL: gcc.dg/call-diag-2.c abort (test for warnings, line 12)
> > FAIL: gcc.dg/call-diag-2.c abort (test for warnings, line 15)
> > FAIL: gcc.dg/invalid-c
On Thu, Jan 30, 2014 at 1:51 PM, Paulo Matos wrote:
>> -Original Message-
>> From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
>> Sent: 30 January 2014 12:43
>> To: Paulo Matos
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH] Vector mode addresses
>>
>> Paulo Matos writes:
Hi all,
This patch wires up the aarch64 backend to use the Cortex-A57 rtx costs table
that is proposed at
http://gcc.gnu.org/ml/gcc-patches/2014-01/msg01954.html
It also sets the generic tuning to use the Cortex-A57 costs since they are more
sensible for aarch64 systems than the generic ones
OK.
Jason
On Thu, Jan 30, 2014 at 10:28 AM, Jakub Jelinek wrote:
> On Wed, Jan 29, 2014 at 04:27:48PM +0100, Richard Biener wrote:
>> Actually best would be to avoid generating so many useless values
>> in the first place ... still, quadraticness is a complete no-go.
>
> Filed as PR59992. Though, we have b
Hi all,
This patch adds the rtx costs table for Cortex-A57 and sets its issue rate
properly in the arm backend.
Tested on arm-none-eabi on a model.
Ok for trunk?
Thanks,
Kyrill
2014-01-30 Kyrylo Tkachov
* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): New table.
Remove
2014-01-30 H.J. Lu :
> On Thu, Jan 30, 2014 at 2:54 AM, Ilya Tocar wrote:
>> Hi,
>>
>> Turns out that for Icc meaning of Yk and k constraints
>> (exposed through inline asm) is opposite to current GCC implementation.
>> As Icc with such behavior was already releases and GCC wasn't. I propose
>> to
On Thu, Jan 30, 2014 at 4:45 AM, Jason Merrill wrote:
> If a parameter of a covariant virtual function is volatile, we can't just
> use the parameter directly in the call we build for the thunk, or the gimple
> verifier will complain. We need to copy it into a temporary first.
>
> Tested x86_64-p
OK.
Jason
On 01/29/2014 04:28 PM, Paolo Carlini wrote:
Interesting. If you like we can do now the below, as preparatory
clean-up for the above, which I would do when 4.9 branches.
OK.
Jason
On Thu, Jan 30, 2014 at 2:54 AM, Ilya Tocar wrote:
> Hi,
>
> Turns out that for Icc meaning of Yk and k constraints
> (exposed through inline asm) is opposite to current GCC implementation.
> As Icc with such behavior was already releases and GCC wasn't. I propose
> to swap meaning of Yk and k con
> -Original Message-
> From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
> Sent: 30 January 2014 12:43
> To: Paulo Matos
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] Vector mode addresses
>
> Paulo Matos writes:
> > As a followup of the thread:
> > http://gcc.gnu.org/ml/
Hi,
in this ICE on invalid regression if we don't check the return value of
start_enum we try to use SET_OPAQUE_ENUM_P on an error_mark_node. Tested
x86_64-linux, as usual.
Thanks,
Paolo.
//
/cp
2014-01-30 Paolo Carlini
PR c++/58649
* pt.c (lookup_temp
Paulo Matos writes:
> As a followup of the thread:
> http://gcc.gnu.org/ml/gcc/2014-01/msg00206.html
>
> consider the attached patch for submission. It fixes an ICE in case
> you try to use vector mode addresses and do not have it as mode
> dependent target hook. As discussed in the thread adding
>
> Thanks for your comments!
>
> I'll continue my experiments with with my initial early_local_passes
> splitting. Will just put there original functions bodies release to
> avoid overhead for their useless optimizations. So, it will be 3 IPA
> passes:
>
> 1. SSA build
> 2. Make instrumented versi
This fixes PR59951, a debug-compare failure where we didn't disregard
uses in debug stmts when accounting for SLP uses outside of the slp.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-01-30 Richard Biener
PR tree-optimization/59951
* tree-vect-
Hi,
Turns out that for Icc meaning of Yk and k constraints
(exposed through inline asm) is opposite to current GCC implementation.
As Icc with such behavior was already releases and GCC wasn't. I propose
to swap meaning of Yk and k constraints. Changes are pretty mechanical.
Bootstraps/passes make
Hi,
in this ICE on invalid regression the problem happens toward the end of
lookup_destructor when adjust_result_of_qualified_name_lookup (and
possibly the callar itself) tries to set BASELINK_QUALIFIED_P of an
error_mark_node. As explained in check_dtor_name too, error_mark_node
means we alr
As a followup of the thread:
http://gcc.gnu.org/ml/gcc/2014-01/msg00206.html
consider the attached patch for submission. It fixes an ICE in case you try to
use vector mode addresses and do not have it as mode dependent target hook.
As discussed in the thread adding VECTOR_MODE_P to the target hoo
On Wed, Jan 29, 2014 at 04:27:48PM +0100, Richard Biener wrote:
> Actually best would be to avoid generating so many useless values
> in the first place ... still, quadraticness is a complete no-go.
Filed as PR59992. Though, we have big issues in other parts of the compiler
too, before managing t
On Thu, 30 Jan 2014, Gerald Pfeifer wrote:
And thanks for your explanations. With those, I am fine.
Thanks, I'll commit shortly.
Might it make sense to add some of the background you shared to the
documentation to describe the limitations?
I guess so. I'll mark it somewhere, but no promis
87 matches
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