[gcc] Created branch 'majin/heads/master' in namespace 'refs/users'

The branch 'majin/heads/master' was created in namespace 'refs/users' pointing to: d0acb7b2b26d... PR modula2/118010 m2 libc lseek procedure interface correct

[gcc] Created branch 'majin/heads/dev' in namespace 'refs/users'

The branch 'majin/heads/dev' was created in namespace 'refs/users' pointing to: d0acb7b2b26d... PR modula2/118010 m2 libc lseek procedure interface correct

[gcc/majin/heads/master] (160 commits) Fortran: Fix PR 47485.

The branch 'majin/heads/master' was updated to point to: e41a5a2a0832... Fortran: Fix PR 47485. It previously pointed to: d0acb7b2b26d... PR modula2/118010 m2 libc lseek procedure interface correct Diff: Summary of changes (added commits): --- e41a5a2... Fo

[gcc] Deleted branch 'majin/heads/dev' in namespace 'refs/users'

The branch 'majin/heads/dev' in namespace 'refs/users' was deleted. It previously pointed to: d0acb7b2b26d... PR modula2/118010 m2 libc lseek procedure interface correct

[gcc r15-7367] MAINTAINERS: Add myself to write after approval

https://gcc.gnu.org/g:884893ae87ae9a562c38f997d9b332c3591b commit r15-7367-g884893ae87ae9a562c38f997d9b332c3591b Author: Jin Ma Date: Tue Dec 3 15:50:14 2024 +0800 MAINTAINERS: Add myself to write after approval ChangeLog: * MAINTAINERS: Add myself. Diff:

[gcc(refs/users/majin/heads/master)] MAINTAINERS: Add myself to write after approval

https://gcc.gnu.org/g:8cae77a5be9c59aa511cd957ea6ea700605a5d97 commit 8cae77a5be9c59aa511cd957ea6ea700605a5d97 Author: Jin Ma Date: Tue Dec 3 15:50:14 2024 +0800 MAINTAINERS: Add myself to write after approval ChangeLog: * MAINTAINERS: Add myself. Diff: --- MAIN

[gcc r15-7489] RISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c on 32bit targets

https://gcc.gnu.org/g:580f571be6ce80aa71fb80e7b16e01824f088229 commit r15-7489-g580f571be6ce80aa71fb80e7b16e01824f088229 Author: Jin Ma Date: Tue Feb 11 21:28:05 2025 +0800 RISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c on 32bit targets This is a follow-up to the patch

[gcc r15-7550] RISC-V: Bugfix ICE for RVV intrinisc when using no-extension parameters

https://gcc.gnu.org/g:25a103feb3056bc483a1558af315be452060035b commit r15-7550-g25a103feb3056bc483a1558af315be452060035b Author: Jin Ma Date: Fri Feb 14 14:58:49 2025 +0800 RISC-V: Bugfix ICE for RVV intrinisc when using no-extension parameters When using riscv_v_abi, the return a

[gcc r15-7601] RISC-V: Fix failed tests for regression due to fix ICE patch

https://gcc.gnu.org/g:b22f191b7c594b33fb4b4a07769dbf0ca45bc9e9 commit r15-7601-gb22f191b7c594b33fb4b4a07769dbf0ca45bc9e9 Author: Jin Ma Date: Mon Feb 17 10:43:22 2025 +0800 RISC-V: Fix failed tests for regression due to fix ICE patch Ref: https://github.com/ewlu/gcc-precommit-

[gcc r15-9266] RISC-V: Disable unsupported vsext/vzext patterns for XTheadVector.

https://gcc.gnu.org/g:196b45caca0aae57a95bffcdd5c188994317de08 commit r15-9266-g196b45caca0aae57a95bffcdd5c188994317de08 Author: Jin Ma Date: Mon Apr 7 14:21:50 2025 +0800 RISC-V: Disable unsupported vsext/vzext patterns for XTheadVector. XThreadVector does not support the vsext/v

[gcc r14-11581] [PATCH] RISC-V: Bugfix for unrecognizable insn for XTheadVector

https://gcc.gnu.org/g:07d4c264a000b6448d6b519110c05c3b8a64d23b commit r14-11581-g07d4c264a000b6448d6b519110c05c3b8a64d23b Author: Jin Ma Date: Wed Nov 13 15:19:29 2024 -0700 [PATCH] RISC-V: Bugfix for unrecognizable insn for XTheadVector error: unrecognizable insn: (insn

[gcc r14-11583] RISC-V: Add a new constraint to ensure that the vl of XTheadVector does not get a non-zero immediate

https://gcc.gnu.org/g:2631ac38d9b2a9def13a04c1e1fefb3871e420ab commit r14-11583-g2631ac38d9b2a9def13a04c1e1fefb3871e420ab Author: Jin Ma Date: Tue Jan 21 10:46:37 2025 -0700 RISC-V: Add a new constraint to ensure that the vl of XTheadVector does not get a non-zero immediate Altho

[gcc r14-11582] RISC-V: Enable and adjust the testsuite for XTheadVector.

https://gcc.gnu.org/g:319b9a385d42f529da49d2b90a98ea92bab54b39 commit r14-11582-g319b9a385d42f529da49d2b90a98ea92bab54b39 Author: Jin Ma Date: Tue Jan 21 10:43:47 2025 -0700 RISC-V: Enable and adjust the testsuite for XTheadVector. gcc/testsuite/ChangeLog: * gcc.t

[gcc r14-11585] RISC-V: Disable unsupported vsext/vzext patterns for XTheadVector.

https://gcc.gnu.org/g:51e041a9db714215d310bf69969de7b6f1c7c2bf commit r14-11585-g51e041a9db714215d310bf69969de7b6f1c7c2bf Author: Jin Ma Date: Mon Apr 7 14:21:50 2025 +0800 RISC-V: Disable unsupported vsext/vzext patterns for XTheadVector. XThreadVector does not support the vsext/

[gcc r14-11584] RISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c on 32bit targets

https://gcc.gnu.org/g:f2e2e255004dc35beef9d8b5800d69d228f7eec1 commit r14-11584-gf2e2e255004dc35beef9d8b5800d69d228f7eec1 Author: Jin Ma Date: Tue Feb 11 21:28:05 2025 +0800 RISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c on 32bit targets This is a follow-up to the patc

[gcc r14-11595] [PATCH v2] RISC-V: Fixbug for slli + addw + zext.w into sh[123]add + zext.w

https://gcc.gnu.org/g:889e40576fec9938bdc52fee7ccebe2e97ed28f5 commit r14-11595-g889e40576fec9938bdc52fee7ccebe2e97ed28f5 Author: Jin Ma Date: Wed Apr 2 13:37:07 2025 -0600 [PATCH v2] RISC-V: Fixbug for slli + addw + zext.w into sh[123]add + zext.w Assuming we have the following v

[gcc r13-9504] [PATCH v2] RISC-V: Fixbug for slli + addw + zext.w into sh[123]add + zext.w

https://gcc.gnu.org/g:372415181e4c6ab5bd1e32d60e7c2c96824e0cc8 commit r13-9504-g372415181e4c6ab5bd1e32d60e7c2c96824e0cc8 Author: Jin Ma Date: Wed Apr 2 13:37:07 2025 -0600 [PATCH v2] RISC-V: Fixbug for slli + addw + zext.w into sh[123]add + zext.w Assuming we have the following va