[gcc r15-2991] AVX10.2 ymm rounding: Support vadd{s, d, h} and vcmp{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:e22e3af1954469c40b139b7cfa8e7708592f4bfd commit r15-2991-ge22e3af1954469c40b139b7cfa8e7708592f4bfd Author: Hu, Lin1 Date: Mon Aug 19 10:08:51 2024 +0800 AVX10.2 ymm rounding: Support vadd{s,d,h} and vcmp{s,d,h} intrins gcc/ChangeLog: * config

[gcc r15-2992] AVX10.2 ymm rounding: Support vcvtdq2p{s, h} and vcvtpd2p{s, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:85e874d19548f0dcb9a3f14f9e4b1e3411c88c4b commit r15-2992-g85e874d19548f0dcb9a3f14f9e4b1e3411c88c4b Author: Hu, Lin1 Date: Mon Aug 19 10:08:53 2024 +0800 AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins gcc/ChangeLog: * co

[gcc r15-2993] AVX10.2 ymm rounding: Support vcvtpd2{, u}{dq, qq} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:508ac49e1a94c28346642bff512d0ed5f4f58b64 commit r15-2993-g508ac49e1a94c28346642bff512d0ed5f4f58b64 Author: Hu, Lin1 Date: Mon Aug 19 10:08:55 2024 +0800 AVX10.2 ymm rounding: Support vcvtpd2{,u}{dq,qq} intrins gcc/ChangeLog: * config/i386/avx

[gcc r15-2994] AVX10.2 ymm rounding: Support vcvtph2p{s, d, sx} and vcvtph2{, u}{dq, qq} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6f2eac53b6026836f3222961c32312e02c2c7dbc commit r15-2994-g6f2eac53b6026836f3222961c32312e02c2c7dbc Author: Hu, Lin1 Date: Mon Aug 19 10:08:56 2024 +0800 AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and vcvtph2{,u}{dq,qq} intrins gcc/ChangeLog:

[gcc r15-2995] AVX10.2 ymm rounding: Support vcvtph2{, u}w and vcvtps2p{d, hx} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b70bb94aca7bc10a54f744d793c32c51f91ce195 commit r15-2995-gb70bb94aca7bc10a54f744d793c32c51f91ce195 Author: Hu, Lin1 Date: Mon Aug 19 10:08:57 2024 +0800 AVX10.2 ymm rounding: Support vcvtph2{,u}w and vcvtps2p{d,hx} intrins gcc/ChangeLog: * co

[gcc r15-2996] AVX10.2 ymm rounding: Support vcvtps2{, u}{dq, qq} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:0f5a42d41b46b746c6f77374d76a3b918a1e2b57 commit r15-2996-g0f5a42d41b46b746c6f77374d76a3b918a1e2b57 Author: Hu, Lin1 Date: Mon Aug 19 10:08:58 2024 +0800 AVX10.2 ymm rounding: Support vcvtps2{,u}{dq,qq} intrins gcc/ChangeLog: * config/i386/avx

[gcc r15-2997] AVX10.2 ymm rounding: Support vcvtqq2p{s, d, h} and vcvttpd2{, u}{dq, qq} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6e231f8504874828b23bbe89f3ef4086dcc15a44 commit r15-2997-g6e231f8504874828b23bbe89f3ef4086dcc15a44 Author: Hu, Lin1 Date: Mon Aug 19 10:08:59 2024 +0800 AVX10.2 ymm rounding: Support vcvtqq2p{s,d,h} and vcvttpd2{,u}{dq,qq} intrins gcc/ChangeLog:

[gcc r15-2998] AVX10.2 ymm rounding: Support vcvttph2{, u}{dq, qq, w} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:493c5096050523ebc05e5fa21612683a996b97a7 commit r15-2998-g493c5096050523ebc05e5fa21612683a996b97a7 Author: Hu, Lin1 Date: Mon Aug 19 10:09:00 2024 +0800 AVX10.2 ymm rounding: Support vcvttph2{,u}{dq,qq,w} intrins gcc/ChangeLog: * config/i386/

[gcc r15-3000] AVX10.2 ymm rounding: Support vcvt{, u}w2ph and vdivp{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3d1b5530ea1d23e26dc5ab70aa4a2e7b9dc19b50 commit r15-3000-g3d1b5530ea1d23e26dc5ab70aa4a2e7b9dc19b50 Author: Hu, Lin1 Date: Mon Aug 19 10:09:03 2024 +0800 AVX10.2 ymm rounding: Support vcvt{,u}w2ph and vdivp{s,d,h} intrins gcc/ChangeLog: * conf

[gcc r15-2999] AVX10.2 ymm rounding: Support vcvttps2{, u}{dq, qq} and vcvtu{dq, qq}2p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b2754227139512adecb6fda067632b587ff4a017 commit r15-2999-gb2754227139512adecb6fda067632b587ff4a017 Author: Hu, Lin1 Date: Mon Aug 19 10:09:01 2024 +0800 AVX10.2 ymm rounding: Support vcvttps2{,u}{dq,qq} and vcvtu{dq,qq}2p{s,d,h} intrins gcc/ChangeLog:

[gcc r15-3001] AVX10.2 ymm rounding: Support vfc{madd, mul}cph, vfixupimmp{s, d} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:95980b292b24110d3f1dffb81926df23c61b4fe7 commit r15-3001-g95980b292b24110d3f1dffb81926df23c61b4fe7 Author: Hu, Lin1 Date: Mon Aug 19 10:09:04 2024 +0800 AVX10.2 ymm rounding: Support vfc{madd,mul}cph, vfixupimmp{s,d} intrins gcc/ChangeLog: *

[gcc r15-3002] AVX10.2 ymm rounding: Support vfmadd{132, 231, 213}p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:0683ca355a87fd36a2e7ae1721199204ceff4c4c commit r15-3002-g0683ca355a87fd36a2e7ae1721199204ceff4c4c Author: Hu, Lin1 Date: Mon Aug 19 10:09:05 2024 +0800 AVX10.2 ymm rounding: Support vfmadd{132,231,213}p{s,d,h} intrins gcc/ChangeLog: * config

[gcc r15-3003] AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132, 231, 213}p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:cfbc94eaf167ae7aecd21ee6054556e1cf9d7143 commit r15-3003-gcfbc94eaf167ae7aecd21ee6054556e1cf9d7143 Author: Hu, Lin1 Date: Mon Aug 19 10:09:06 2024 +0800 AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132,231,213}p{s,d,h} intrins gcc/ChangeLog:

[gcc r15-3005] AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132, 231, 213}p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6f0aa7add1d9177f60016b32ca9ca8b16b173a56 commit r15-3005-g6f0aa7add1d9177f60016b32ca9ca8b16b173a56 Author: Hu, Lin1 Date: Mon Aug 19 10:09:09 2024 +0800 AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132,231,213}p{s,d,h} intrins gcc/ChangeLog:

[gcc r15-3004] AVX10.2 ymm rounding: Support vfm{sub, subadd}{132, 231, 213}p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:dd48acbe85ca55dd23ffafbb917ffe559d13b6a3 commit r15-3004-gdd48acbe85ca55dd23ffafbb917ffe559d13b6a3 Author: Hu, Lin1 Date: Mon Aug 19 10:09:08 2024 +0800 AVX10.2 ymm rounding: Support vfm{sub,subadd}{132,231,213}p{s,d,h} intrins gcc/ChangeLog:

[gcc r15-3006] AVX10.2 ymm rounding: Support vfnmsub{132, 231, 213}p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:0983d406ae2e84394b25248865f51c686b119a57 commit r15-3006-g0983d406ae2e84394b25248865f51c686b119a57 Author: Hu, Lin1 Date: Mon Aug 19 10:09:10 2024 +0800 AVX10.2 ymm rounding: Support vfnmsub{132,231,213}p{s,d,h} intrins gcc/ChangeLog: * confi

[gcc r15-3007] AVX10.2 ymm rounding: Support vgetexpp{s, d, h} and vgetmantp{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:8d4f542935c09f40bb7fd8fd863cc8df80cc970e commit r15-3007-g8d4f542935c09f40bb7fd8fd863cc8df80cc970e Author: Hu, Lin1 Date: Mon Aug 19 10:09:11 2024 +0800 AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h} intrins gcc/ChangeLog:

[gcc r15-3008] AVX10.2 ymm rounding: Support v{max, min}p{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:cc8a7596477e9d6ac972aadabbb2fd88baa1abf4 commit r15-3008-gcc8a7596477e9d6ac972aadabbb2fd88baa1abf4 Author: Hu, Lin1 Date: Mon Aug 19 10:09:13 2024 +0800 AVX10.2 ymm rounding: Support v{max,min}p{s,d,h} intrins gcc/ChangeLog: * config/i386/avx

[gcc r15-3009] AVX10.2 ymm rounding: Support vmulp{s, d, h} and vrangep{s, d} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:90cc5b0c4609a9fb3257d2cce7b7abc896c6faab commit r15-3009-g90cc5b0c4609a9fb3257d2cce7b7abc896c6faab Author: Hu, Lin1 Date: Mon Aug 19 10:09:14 2024 +0800 AVX10.2 ymm rounding: Support vmulp{s,d,h} and vrangep{s,d} intrins gcc/ChangeLog: * conf

[gcc r15-3010] AVX10.2 ymm rounding: Support vreducep{s, d, h} and vrndscalep{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:9afa5081212e1fc3cb2c4efc9b4f421eecf68810 commit r15-3010-g9afa5081212e1fc3cb2c4efc9b4f421eecf68810 Author: Hu, Lin1 Date: Mon Aug 19 10:09:18 2024 +0800 AVX10.2 ymm rounding: Support vreducep{s,d,h} and vrndscalep{s,d,h} intrins gcc/ChangeLog:

[gcc r15-3011] AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:1f86cf06c7897f6ab467443b5fe8789cc95fe0c4 commit r15-3011-g1f86cf06c7897f6ab467443b5fe8789cc95fe0c4 Author: Hu, Lin1 Date: Mon Aug 19 10:09:19 2024 +0800 AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins gcc/ChangeLog: * config/i386/avx10_

[gcc r15-3012] AVX10.2 ymm rounding: Support vsqrtp{s, d, h} and vsubp{s, d, h} intrins

2024-08-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:7f62e7104ebc11c4570745972a023579922ef265 commit r15-3012-g7f62e7104ebc11c4570745972a023579922ef265 Author: Hu, Lin1 Date: Mon Aug 19 10:09:20 2024 +0800 AVX10.2 ymm rounding: Support vsqrtp{s,d,h} and vsubp{s,d,h} intrins gcc/ChangeLog: * con

[gcc r15-3175] i386: Refactor m512-check.h

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:cba4566879192abdc54bdf76b010e22d67484129 commit r15-3175-gcba4566879192abdc54bdf76b010e22d67484129 Author: Haochen Jiang Date: Mon Aug 26 10:53:35 2024 +0800 i386: Refactor m512-check.h After AVX10 introduction, we still want to use AVX512 helper functions

[gcc r15-3176] [PATCH 1/2] AVX10.2: Support media instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:8db80b2735782d793a83a9ef7eb012d83be7660d commit r15-3176-g8db80b2735782d793a83a9ef7eb012d83be7660d Author: Hongyu Wang Date: Mon Aug 26 10:53:37 2024 +0800 [PATCH 1/2] AVX10.2: Support media instructions gcc/ChangeLog * config.gcc: Add avx10_

[gcc r15-3177] [PATCH 2/2] AVX10.2: Support media instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:af0a06274fce2ca64456f5b13b4bc8ff864a45e4 commit r15-3177-gaf0a06274fce2ca64456f5b13b4bc8ff864a45e4 Author: Haochen Jiang Date: Mon Aug 26 10:53:39 2024 +0800 [PATCH 2/2] AVX10.2: Support media instructions gcc/ChangeLog: * config/i386/avx10_2

[gcc r15-3179] [PATCH 1/2] AVX10.2: Support BF16 instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:9023662464ac7a0bbac72d94078ea0845bf99c86 commit r15-3179-g9023662464ac7a0bbac72d94078ea0845bf99c86 Author: konglin1 Date: Mon Aug 26 10:53:43 2024 +0800 [PATCH 1/2] AVX10.2: Support BF16 instructions gcc/ChangeLog: * config.gcc: Add avx10_2-5

[gcc r15-3180] [PATCH 2/2] AVX10.2: Support BF16 instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:5cb67ddd8240610f39c211b2f73070dc70b0230b commit r15-3180-g5cb67ddd8240610f39c211b2f73070dc70b0230b Author: konglin1 Date: Mon Aug 26 10:53:45 2024 +0800 [PATCH 2/2] AVX10.2: Support BF16 instructions gcc/ChangeLog: * config/i386/avx10_2-512bf

[gcc r15-3181] [PATCH 1/2] AVX10.2: Support saturating convert instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:e2c80d237223f8524c2bd930b681aa891a13db99 commit r15-3181-ge2c80d237223f8524c2bd930b681aa891a13db99 Author: Hu, Lin1 Date: Mon Aug 26 10:53:47 2024 +0800 [PATCH 1/2] AVX10.2: Support saturating convert instructions gcc/ChangeLog: * config.gcc:

[gcc r15-3182] [PATCH 2/2] AVX10.2: Support saturating convert instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3a97ce179f75ec32b7f591422ba254c814567e4d commit r15-3182-g3a97ce179f75ec32b7f591422ba254c814567e4d Author: Hu, Lin1 Date: Mon Aug 26 10:53:49 2024 +0800 [PATCH 2/2] AVX10.2: Support saturating convert instructions gcc/ChangeLog: * config/i386

[gcc r15-3183] AVX10.2: Support minmax instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:889f6dd0d8c7317f62578c900c0f662e919786a2 commit r15-3183-g889f6dd0d8c7317f62578c900c0f662e919786a2 Author: Mo, Zewei Date: Mon Aug 26 10:53:50 2024 +0800 AVX10.2: Support minmax instructions gcc/ChangeLog: * config.gcc: Add avx10_2-512minmaxi

[gcc r15-3184] AVX10.2: Support vector copy instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:f6fe2962daf7b8d8532c768c3b9eab00f99cce5b commit r15-3184-gf6fe2962daf7b8d8532c768c3b9eab00f99cce5b Author: Zhang, Jun Date: Mon Aug 26 10:53:52 2024 +0800 AVX10.2: Support vector copy instructions gcc/ChangeLog: * config.gcc: Add avx10_2copyi

[gcc r15-3185] AVX10.2: Support compare instructions

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:576bd309ded9dfe258023f26924c064a7bf12875 commit r15-3185-g576bd309ded9dfe258023f26924c064a7bf12875 Author: Zhang, Jun Date: Mon Aug 26 10:53:54 2024 +0800 AVX10.2: Support compare instructions gcc/ChangeLog: * config/i386/i386-expand.cc

[gcc r15-3186] i386: Add bf8 -> fp16 intrin

2024-08-25 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b4ac2c23d8745d98984954e88f02aa73f1c3594b commit r15-3186-gb4ac2c23d8745d98984954e88f02aa73f1c3594b Author: Haochen Jiang Date: Mon Aug 26 10:53:56 2024 +0800 i386: Add bf8 -> fp16 intrin Since BF8 and FP16 have same bits for exponent, the type conversion

[gcc r15-3358] i386: Support vectorized BF16 sqrt with AVX10.2 instruction

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:e19f65b0be1e91ff86689feb7695080dad4c9197 commit r15-3358-ge19f65b0be1e91ff86689feb7695080dad4c9197 Author: Levy Hsu Date: Mon Sep 2 10:24:48 2024 +0800 i386: Support vectorized BF16 sqrt with AVX10.2 instruction gcc/ChangeLog: * config/i386/s

[gcc r15-3359] i386: Support vec_cmp for V8BF/V16BF/V32BF in AVX10.2

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:f77435aa3911c437cba71991509eee57b333b3ce commit r15-3359-gf77435aa3911c437cba71991509eee57b333b3ce Author: Levy Hsu Date: Mon Sep 2 10:24:49 2024 +0800 i386: Support vec_cmp for V8BF/V16BF/V32BF in AVX10.2 gcc/ChangeLog: * config/i386/i386-ex

[gcc r15-3356] i386: Support vectorized BF16 FMA with AVX10.2 instructions

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6d294fb8ac9baf2624446deaa4c995b7a7719823 commit r15-3356-g6d294fb8ac9baf2624446deaa4c995b7a7719823 Author: Levy Hsu Date: Mon Sep 2 10:24:46 2024 +0800 i386: Support vectorized BF16 FMA with AVX10.2 instructions gcc/ChangeLog: * config/i386/s

[gcc r15-3353] i386: Optimize ordered and nonequal

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:86f5031c804220274a9bbebd26b8ebf47a2207ac commit r15-3353-g86f5031c804220274a9bbebd26b8ebf47a2207ac Author: Hu, Lin1 Date: Mon Sep 2 10:24:31 2024 +0800 i386: Optimize ordered and nonequal Currently, when we input !__builtin_isunordered (a, b) && (a != b), gcc

[gcc r15-3357] i386: Support vectorized BF16 smaxmin with AVX10.2 instructions

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:29ef601973d7b79338694e59581d4c24bcd07f69 commit r15-3357-g29ef601973d7b79338694e59581d4c24bcd07f69 Author: Levy Hsu Date: Mon Sep 2 10:24:47 2024 +0800 i386: Support vectorized BF16 smaxmin with AVX10.2 instructions gcc/ChangeLog: * config/i3

[gcc r15-3354] i386: Optimize generate insn for AVX10.2 compare

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3b1decef83003db9cf8667977c293435c0f3d024 commit r15-3354-g3b1decef83003db9cf8667977c293435c0f3d024 Author: Hu, Lin1 Date: Mon Sep 2 10:24:36 2024 +0800 i386: Optimize generate insn for AVX10.2 compare gcc/ChangeLog: * config/i386/i386-expand.

[gcc r15-3355] i386: Support vectorized BF16 add/sub/mul/div with AVX10.2 instructions

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:f82fa0da4d9e1fdaf5e4edd70364d5781534ce11 commit r15-3355-gf82fa0da4d9e1fdaf5e4edd70364d5781534ce11 Author: Levy Hsu Date: Mon Sep 2 10:24:45 2024 +0800 i386: Support vectorized BF16 add/sub/mul/div with AVX10.2 instructions AVX10.2 introduces several non-exce

[gcc r15-3352] i386: Auto vectorize sdot_prod, usdot_prod, udot_prod with AVX10.2 instructions

2024-09-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b1f9fbb6da1a3ced57c3668cecc9f9449e1b237e commit r15-3352-gb1f9fbb6da1a3ced57c3668cecc9f9449e1b237e Author: Haochen Jiang Date: Mon Sep 2 10:24:29 2024 +0800 i386: Auto vectorize sdot_prod, usdot_prod, udot_prod with AVX10.2 instructions gcc/ChangeLog:

[gcc r15-3410] i386: Fix vfpclassph non-optimizied intrin

2024-09-03 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:9b312595f9ac073f55d858b6f833097608b40bba commit r15-3410-g9b312595f9ac073f55d858b6f833097608b40bba Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, which

[gcc r12-10696] i386: Fix vfpclassph non-optimizied intrin

2024-09-03 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6e59b188c4a051d4f2de5220d30681e6963d96c0 commit r12-10696-g6e59b188c4a051d4f2de5220d30681e6963d96c0 Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, whic

[gcc r13-9002] i386: Fix vfpclassph non-optimizied intrin

2024-09-03 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:e152aee5709dd3e341ef965450500f754f8b0a46 commit r13-9002-ge152aee5709dd3e341ef965450500f754f8b0a46 Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, which

[gcc r14-10627] i386: Fix vfpclassph non-optimizied intrin

2024-09-03 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:59157c038d683e91c419a1fadd5f91f15218f57b commit r14-10627-g59157c038d683e91c419a1fadd5f91f15218f57b Author: Haochen Jiang Date: Mon Sep 2 15:00:22 2024 +0800 i386: Fix vfpclassph non-optimizied intrin The intrin for non-optimized got a typo in mask type, whic

[gcc r15-3539] doc: Enhance Intel CPU documentation

2024-09-08 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:91bc2ad28c58ca3f4c2f96601d8af51f570e08c4 commit r15-3539-g91bc2ad28c58ca3f4c2f96601d8af51f570e08c4 Author: Haochen Jiang Date: Fri Sep 6 11:19:26 2024 +0800 doc: Enhance Intel CPU documentation This patch will add those recent aliased CPU names into documenta

[gcc r14-10658] doc: Enhance Intel CPU documentation

2024-09-08 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3951efed1cce970a5c61eacbad7e5f5314a9fc17 commit r14-10658-g3951efed1cce970a5c61eacbad7e5f5314a9fc17 Author: Haochen Jiang Date: Fri Sep 6 11:19:26 2024 +0800 doc: Enhance Intel CPU documentation This patch will add those recent aliased CPU names into document

[gcc r13-9011] doc: Enhance Intel CPU documentation

2024-09-08 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:0a16b1b97c112e41a0d37235e83678a67abd9454 commit r13-9011-g0a16b1b97c112e41a0d37235e83678a67abd9454 Author: Haochen Jiang Date: Fri Sep 6 11:19:26 2024 +0800 doc: Enhance Intel CPU documentation This patch will add those recent aliased CPU names into documenta

[gcc r15-3594] i386: Fix incorrect avx512f-mask-type.h include

2024-09-11 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:5958279509c4601499ac22629512f1723e6744b4 commit r15-3594-g5958279509c4601499ac22629512f1723e6744b4 Author: Haochen Jiang Date: Tue Sep 3 13:38:36 2024 +0800 i386: Fix incorrect avx512f-mask-type.h include In avx512f-mask-type.h, we need SIZE being defined to

[gcc r15-1908] i386: Correct AVX10 CPUID emulation

2024-07-09 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:298a576f00c49b8f4529ea2f87b9943a32743250 commit r15-1908-g298a576f00c49b8f4529ea2f87b9943a32743250 Author: Haochen Jiang Date: Tue Jul 9 16:31:02 2024 +0800 i386: Correct AVX10 CPUID emulation AVX10 Documentaion has specified ecx value as 0 for AVX10 version

[gcc r14-10397] i386: Correct AVX10 CPUID emulation

2024-07-09 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:74c15cb93b3830fee79f75805329d4299ff4a2f0 commit r14-10397-g74c15cb93b3830fee79f75805329d4299ff4a2f0 Author: Haochen Jiang Date: Tue Jul 9 16:31:02 2024 +0800 i386: Correct AVX10 CPUID emulation AVX10 Documentaion has specified ecx value as 0 for AVX10 version

[gcc r15-2129] i386: Fix testcases generating invalid asm

2024-07-18 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:4b58697cecbd72fd7db5a0fcdf7af8deb3be2b14 commit r15-2129-g4b58697cecbd72fd7db5a0fcdf7af8deb3be2b14 Author: Haochen Jiang Date: Wed Jul 17 16:26:35 2024 +0800 i386: Fix testcases generating invalid asm For compile test, we should generate valid asm except for

[gcc r15-2213] i386: Change prefetchi output template

2024-07-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:062e46a813799684c6f900815fd22451d6294ae1 commit r15-2213-g062e46a813799684c6f900815fd22451d6294ae1 Author: Haochen Jiang Date: Mon Jul 22 14:06:18 2024 +0800 i386: Change prefetchi output template For prefetchi instructions, RIP-relative address is explicitly

[gcc r14-10500] i386: Change prefetchi output template

2024-07-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:81f356f9f72fc3159eeaa5a037cf6c3eb701224b commit r14-10500-g81f356f9f72fc3159eeaa5a037cf6c3eb701224b Author: Haochen Jiang Date: Mon Jul 22 14:06:18 2024 +0800 i386: Change prefetchi output template For prefetchi instructions, RIP-relative address is explicitl

[gcc r13-8935] i386: Change prefetchi output template

2024-07-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:dec571e95cf47e21a1a60ed337e68e3474f57f7d commit r13-8935-gdec571e95cf47e21a1a60ed337e68e3474f57f7d Author: Haochen Jiang Date: Mon Jul 22 14:06:18 2024 +0800 i386: Change prefetchi output template For prefetchi instructions, RIP-relative address is explicitly

[gcc r14-10072] i386: Fix Sierra Forest auto dispatch

2024-04-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6b5248d15c6d10325c6cbb92a0e0a9eb04e3f122 commit r14-10072-g6b5248d15c6d10325c6cbb92a0e0a9eb04e3f122 Author: Haochen Jiang Date: Mon Apr 22 16:57:36 2024 +0800 i386: Fix Sierra Forest auto dispatch gcc/ChangeLog: * common/config/i386/i386-comm

[gcc r13-8641] i386: Fix Sierra Forest auto dispatch

2024-04-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:d80c9df20ed77a26eb71457679dad2b564c5da60 commit r13-8641-gd80c9df20ed77a26eb71457679dad2b564c5da60 Author: Haochen Jiang Date: Mon Apr 22 16:57:36 2024 +0800 i386: Fix Sierra Forest auto dispatch gcc/ChangeLog: * common/config/i386/i386-commo

[gcc r14-10104] i386: Fix behavior for both using AVX10.1-256 in options and function attribute

2024-04-24 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:d279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 commit r14-10104-gd279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 Author: Haochen Jiang Date: Wed Apr 24 10:43:18 2024 +0800 i386: Fix behavior for both using AVX10.1-256 in options and function attribute When we are using -

[gcc r14-10137] i386: Fix array index overflow in pr105354-2.c

2024-04-26 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:4a2e55b3ada20fe6457466bb687a66c8d03e056e commit r14-10137-g4a2e55b3ada20fe6457466bb687a66c8d03e056e Author: Haochen Jiang Date: Fri Apr 26 16:48:29 2024 +0800 i386: Fix array index overflow in pr105354-2.c The array index should not be over 8 for v8hi, or it

[gcc r13-8652] i386: Fix array index overflow in pr105354-2.c

2024-04-26 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:7425436b5382a04f3eb28c7c7912f4d9a1cad0bd commit r13-8652-g7425436b5382a04f3eb28c7c7912f4d9a1cad0bd Author: Haochen Jiang Date: Fri Apr 26 16:48:29 2024 +0800 i386: Fix array index overflow in pr105354-2.c The array index should not be over 8 for v8hi, or it w

[gcc r15-2335] i386: Use BLKmode for {ld,st}tilecfg

2024-07-26 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:f145f5411609dca5493a6709e8139609b584622f commit r15-2335-gf145f5411609dca5493a6709e8139609b584622f Author: Haochen Jiang Date: Fri Jul 26 16:49:08 2024 +0800 i386: Use BLKmode for {ld,st}tilecfg Hi all, For AMX instructions related with memory, we wi

[gcc r15-2373] i386: Fix AVX512 intrin macro typo

2024-07-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:16daeb262af4566e665a941368cb15bc2cba3f07 commit r15-2373-g16daeb262af4566e665a941368cb15bc2cba3f07 Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct the

[gcc r12-10648] i386: Fix AVX512 intrin macro typo

2024-07-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:bd0fbdc30d831f8c84223f583bcb5e5f6d7d72fc commit r12-10648-gbd0fbdc30d831f8c84223f583bcb5e5f6d7d72fc Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct th

[gcc r13-8949] i386: Fix AVX512 intrin macro typo

2024-07-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:bb15c4cf21dbe76df5a225342d1fbe8ecd3c7971 commit r13-8949-gbb15c4cf21dbe76df5a225342d1fbe8ecd3c7971 Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct the

[gcc r13-8950] i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12

2024-07-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b2ab34b2bb292948bfe103f56b13e9911d143d74 commit r13-8950-gb2ab34b2bb292948bfe103f56b13e9911d143d74 Author: Haochen Jiang Date: Mon Jul 29 14:10:49 2024 +0800 i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12 In GCC13/12, there is no _

[gcc r12-10649] i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12

2024-07-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:77ad22e4eaa97bb10068c6170f53caca77c99392 commit r12-10649-g77ad22e4eaa97bb10068c6170f53caca77c99392 Author: Haochen Jiang Date: Mon Jul 29 14:10:49 2024 +0800 i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12 In GCC13/12, there is no

[gcc r14-10514] i386: Fix AVX512 intrin macro typo

2024-07-29 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:affb2e8f87e3982ee82b72dc3c44486daefd22e3 commit r14-10514-gaffb2e8f87e3982ee82b72dc3c44486daefd22e3 Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct th

[gcc r15-2394] i386: Add non-optimize prefetchi intrins

2024-07-29 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b4524c4430ba9771265bd9fc31e69a3f35dfe117 commit r15-2394-gb4524c4430ba9771265bd9fc31e69a3f35dfe117 Author: Haochen Jiang Date: Thu Jul 25 16:16:05 2024 +0800 i386: Add non-optimize prefetchi intrins Under -O0, with the "newly" introduced intrins, the variable

[gcc r13-8952] i386: Add non-optimize prefetchi intrins

2024-07-29 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:d80abba35edda7b508e29b723daebc0e475ddd87 commit r13-8952-gd80abba35edda7b508e29b723daebc0e475ddd87 Author: Haochen Jiang Date: Thu Jul 25 16:16:05 2024 +0800 i386: Add non-optimize prefetchi intrins Under -O0, with the "newly" introduced intrins, the variable

[gcc r14-10550] i386: Add non-optimize prefetchi intrins

2024-08-01 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:30f4fa3f53e4c1476b4cb771f8d006c03804788a commit r14-10550-g30f4fa3f53e4c1476b4cb771f8d006c03804788a Author: Haochen Jiang Date: Thu Jul 25 16:16:05 2024 +0800 i386: Add non-optimize prefetchi intrins Under -O0, with the "newly" introduced intrins, the variabl

[gcc r15-2881] Initial support for AVX10.2

2024-08-12 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:4bcb480d103b36c389daaf711f0f25d74379adb6 commit r15-2881-g4bcb480d103b36c389daaf711f0f25d74379adb6 Author: Haochen Jiang Date: Mon Aug 12 15:30:07 2024 +0800 Initial support for AVX10.2 gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_avail

[gcc] Created branch 'ix86/heads/avx10.2' in namespace 'refs/vendors'

2024-08-14 Thread Haochen Jiang via Gcc-cvs
The branch 'ix86/heads/avx10.2' was created in namespace 'refs/vendors' pointing to: 4d2e8fcdaf32... Daily bump.

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vadd{s, d, h} and vcmp{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:7eed0d3f707f4bade3edb3268d8d5b2c9b8ef8d8 commit 7eed0d3f707f4bade3edb3268d8d5b2c9b8ef8d8 Author: Hu, Lin1 Date: Thu Aug 15 09:38:15 2024 +0800 AVX10.2 ymm rounding: Support vadd{s,d,h} and vcmp{s,d,h} intrins gcc/ChangeLog: * config.gcc: Add

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvtpd2{, u}{dq, qq} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3c755fad847af4d38d06ed7c22fe6bfdf227b718 commit 3c755fad847af4d38d06ed7c22fe6bfdf227b718 Author: Hu, Lin1 Date: Thu Aug 15 09:38:17 2024 +0800 AVX10.2 ymm rounding: Support vcvtpd2{,u}{dq,qq} intrins gcc/ChangeLog: * config/i386/avx10_2roundi

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvtdq2p{s, h} and vcvtpd2p{s, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:33181163a09cb315cc8d19464cb1feca063c959c commit 33181163a09cb315cc8d19464cb1feca063c959c Author: Hu, Lin1 Date: Thu Aug 15 09:38:16 2024 +0800 AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins gcc/ChangeLog: * config/i386/

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvtph2p{s, d, sx} and vcvtph2{, u}{dq, qq} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6fc313aad25ad678e1d32f290edadc5ac2481c7d commit 6fc313aad25ad678e1d32f290edadc5ac2481c7d Author: Hu, Lin1 Date: Thu Aug 15 09:38:18 2024 +0800 AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and vcvtph2{,u}{dq,qq} intrins gcc/ChangeLog: * con

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvtph2{, u}w and vcvtps2p{d, hx} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:a0e52c6dc21d8d2713e63e70e8bdbdc5dc536185 commit a0e52c6dc21d8d2713e63e70e8bdbdc5dc536185 Author: Hu, Lin1 Date: Thu Aug 15 09:38:18 2024 +0800 AVX10.2 ymm rounding: Support vcvtph2{,u}w and vcvtps2p{d,hx} intrins gcc/ChangeLog: * config/i386/

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvtps2{, u}{dq, qq} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:4d8dc583f64af45f4f0fd4c0cce5c40283b9f1cc commit 4d8dc583f64af45f4f0fd4c0cce5c40283b9f1cc Author: Hu, Lin1 Date: Thu Aug 15 09:38:19 2024 +0800 AVX10.2 ymm rounding: Support vcvtps2{,u}{dq,qq} intrins gcc/ChangeLog: * config/i386/avx10_2roundi

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvtqq2p{s, d, h} and vcvttpd2{, u}{dq, qq} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:76f880db8637df5fd682cb5e77854c4014b4c59f commit 76f880db8637df5fd682cb5e77854c4014b4c59f Author: Hu, Lin1 Date: Thu Aug 15 09:38:20 2024 +0800 AVX10.2 ymm rounding: Support vcvtqq2p{s,d,h} and vcvttpd2{,u}{dq,qq} intrins gcc/ChangeLog: * con

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvttph2{, u}{dq, qq, w} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:33714da7770ba84eb3afcedef5ea1406e7d218bf commit 33714da7770ba84eb3afcedef5ea1406e7d218bf Author: Hu, Lin1 Date: Thu Aug 15 09:38:20 2024 +0800 AVX10.2 ymm rounding: Support vcvttph2{,u}{dq,qq,w} intrins gcc/ChangeLog: * config/i386/avx10_2rou

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvttps2{, u}{dq, qq} and vcvtu{dq, qq}2p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:2434026e4bcc5bde764e97a964cdea6940e73413 commit 2434026e4bcc5bde764e97a964cdea6940e73413 Author: Hu, Lin1 Date: Thu Aug 15 09:38:21 2024 +0800 AVX10.2 ymm rounding: Support vcvttps2{,u}{dq,qq} and vcvtu{dq,qq}2p{s,d,h} intrins gcc/ChangeLog:

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vcvt{, u}w2ph and vdivp{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:d2cf76a13b5a513489c14e15faf0e722ab94d663 commit d2cf76a13b5a513489c14e15faf0e722ab94d663 Author: Hu, Lin1 Date: Thu Aug 15 09:38:22 2024 +0800 AVX10.2 ymm rounding: Support vcvt{,u}w2ph and vdivp{s,d,h} intrins gcc/ChangeLog: * config/i386/av

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vfmadd{132, 231, 213}p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:8194aafd95d05e5a49f730f5cf7c09b562fb7f95 commit 8194aafd95d05e5a49f730f5cf7c09b562fb7f95 Author: Hu, Lin1 Date: Thu Aug 15 09:38:23 2024 +0800 AVX10.2 ymm rounding: Support vfmadd{132,231,213}p{s,d,h} intrins gcc/ChangeLog: * config/i386/avx1

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132, 231, 213}p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3e30845566e8334c2e654f31bcd21ef4ac5f96cc commit 3e30845566e8334c2e654f31bcd21ef4ac5f96cc Author: Hu, Lin1 Date: Thu Aug 15 09:38:23 2024 +0800 AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132,231,213}p{s,d,h} intrins gcc/ChangeLog:

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vfc{madd, mul}cph, vfixupimmp{s, d} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:f39193494511bdfac24accf5da95388ac32bb272 commit f39193494511bdfac24accf5da95388ac32bb272 Author: Hu, Lin1 Date: Thu Aug 15 09:38:22 2024 +0800 AVX10.2 ymm rounding: Support vfc{madd,mul}cph, vfixupimmp{s,d} intrins gcc/ChangeLog: * config/i38

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vfm{sub, subadd}{132, 231, 213}p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:4d822f755a34ea5e5a3c891881f4ba0226151448 commit 4d822f755a34ea5e5a3c891881f4ba0226151448 Author: Hu, Lin1 Date: Thu Aug 15 09:38:24 2024 +0800 AVX10.2 ymm rounding: Support vfm{sub,subadd}{132,231,213}p{s,d,h} intrins gcc/ChangeLog: * config/

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132, 231, 213}p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:81f1bcf7c470d1797bfdddc17f3a9b7be50fa040 commit 81f1bcf7c470d1797bfdddc17f3a9b7be50fa040 Author: Hu, Lin1 Date: Thu Aug 15 09:38:24 2024 +0800 AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132,231,213}p{s,d,h} intrins gcc/ChangeLog: * c

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vfnmsub{132, 231, 213}p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:93c5a73e0ef33fa4ef46a3fe87225bd584830dc3 commit 93c5a73e0ef33fa4ef46a3fe87225bd584830dc3 Author: Hu, Lin1 Date: Thu Aug 15 09:38:25 2024 +0800 AVX10.2 ymm rounding: Support vfnmsub{132,231,213}p{s,d,h} intrins gcc/ChangeLog: * config/i386/avx

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vgetexpp{s, d, h} and vgetmantp{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:5da970fcb303434bc27d35a7ba9e6f5d4ee00e2d commit 5da970fcb303434bc27d35a7ba9e6f5d4ee00e2d Author: Hu, Lin1 Date: Thu Aug 15 09:38:26 2024 +0800 AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h} intrins gcc/ChangeLog: * config/

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vmulp{s, d, h} and vrangep{s, d} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:ef07d9e1195a7ba200b4c26194bcc17948cb97f1 commit ef07d9e1195a7ba200b4c26194bcc17948cb97f1 Author: Hu, Lin1 Date: Thu Aug 15 09:38:27 2024 +0800 AVX10.2 ymm rounding: Support vmulp{s,d,h} and vrangep{s,d} intrins gcc/ChangeLog: * config/i386/av

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support v{max, min}p{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:ce16fa99857c057ad95ad7cef8ce6f5ffbe9ef48 commit ce16fa99857c057ad95ad7cef8ce6f5ffbe9ef48 Author: Hu, Lin1 Date: Thu Aug 15 09:38:26 2024 +0800 AVX10.2 ymm rounding: Support v{max,min}p{s,d,h} intrins gcc/ChangeLog: * config/i386/avx10_2roundi

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vscalefp{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:144b9ca72a05d9f7235bf939821a3ff425a251c8 commit 144b9ca72a05d9f7235bf939821a3ff425a251c8 Author: Hu, Lin1 Date: Thu Aug 15 09:38:28 2024 +0800 AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins gcc/ChangeLog: * config/i386/avx10_2roundingi

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vreducep{s, d, h} and vrndscalep{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:2d78e6dbb4620da8e4c2e87ef14134f627559467 commit 2d78e6dbb4620da8e4c2e87ef14134f627559467 Author: Hu, Lin1 Date: Thu Aug 15 09:38:27 2024 +0800 AVX10.2 ymm rounding: Support vreducep{s,d,h} and vrndscalep{s,d,h} intrins gcc/ChangeLog: * config

[gcc(refs/vendors/ix86/heads/avx10.2)] AVX10.2 ymm rounding: Support vsqrtp{s, d, h} and vsubp{s, d, h} intrins

2024-08-14 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:bab0adf0069e69115aa984aa750a03fb3d1d0cdb commit bab0adf0069e69115aa984aa750a03fb3d1d0cdb Author: Hu, Lin1 Date: Thu Aug 15 09:38:29 2024 +0800 AVX10.2 ymm rounding: Support vsqrtp{s,d,h} and vsubp{s,d,h} intrins gcc/ChangeLog: * config/i386/a

[gcc r15-764] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW

2024-05-21 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:73a167cfa225d5ee7092d41596b9fea1719898ff commit r15-764-g73a167cfa225d5ee7092d41596b9fea1719898ff Author: Haochen Jiang Date: Tue May 21 14:10:43 2024 +0800 i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW Since vpermq is really slow, we should avo

[gcc r14-10229] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW

2024-05-21 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:1ad5c9d524d8fa99773045e75da04ae958012085 commit r14-10229-g1ad5c9d524d8fa99773045e75da04ae958012085 Author: Haochen Jiang Date: Tue May 21 14:10:43 2024 +0800 i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW Since vpermq is really slow, we should a

[gcc r14-10253] Adjust generic loop alignment from 16:11:8 to 16 for Intel processors

2024-05-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:80600352d1282f084900ab444f2d4c83986f2ae5 commit r14-10253-g80600352d1282f084900ab444f2d4c83986f2ae5 Author: Haochen Jiang Date: Wed May 29 11:12:37 2024 +0800 Adjust generic loop alignment from 16:11:8 to 16 for Intel processors Previously, we use 16:11:8 in

[gcc r14-10254] Align tight&hot loop without considering max skipping bytes.

2024-05-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b4d4ece0443433cd5c3078cfe03f18429e73b77a commit r14-10254-gb4d4ece0443433cd5c3078cfe03f18429e73b77a Author: liuhongt Date: Wed May 29 11:12:51 2024 +0800 Align tight&hot loop without considering max skipping bytes. When hot loop is small enough to fix into on

[gcc r15-887] Adjust generic loop alignment from 16:11:8 to 16 for Intel processors

2024-05-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:00ed5424b1d4dcccfa187f55205521826794898c commit r15-887-g00ed5424b1d4dcccfa187f55205521826794898c Author: Haochen Jiang Date: Wed May 29 11:13:55 2024 +0800 Adjust generic loop alignment from 16:11:8 to 16 for Intel processors Previously, we use 16:11:8 in ge

[gcc r15-888] Align tight&hot loop without considering max skipping bytes.

2024-05-28 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:b644126237a1aa8599f767a5e0bbada1d7286f44 commit r15-888-gb644126237a1aa8599f767a5e0bbada1d7286f44 Author: liuhongt Date: Wed May 29 11:14:26 2024 +0800 Align tight&hot loop without considering max skipping bytes. When hot loop is small enough to fix into one

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