[Bug tree-optimization/49857] [patch] Put constant switch-tables into flash

2025-09-10 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49857 --- Comment #22 from Georg-Johann Lay --- On v13.5, v14.4 and v15.3+ -ftree-switch-conversion is disabled by default now. A target hook to put the CSWTCH tables into a named address-space hase been rejected several times for non-technical reason

[Bug tree-optimization/81540] tree-switch-conversion leads to code bloat

2025-09-10 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81540 --- Comment #9 from Georg-Johann Lay --- On AVR v13.5, v14.4 and v15.3+ -ftree-switch-conversion is disabled by default.

[Bug target/121794] [avr] Use zero_reg less

2025-09-05 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121794 Georg-Johann Lay changed: What|Removed |Added Target Milestone|--- |15.3 Status|UNCONFIRMED

[Bug target/121794] New: [avr] Use zero_reg less

2025-09-04 Thread gjl at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Using zero_reg less can improve small ISRs. For example it may turn out that, SBCI Rx,0 is better than SBC Rx,__zero_reg__ since it doesn't invoke zero_reg.

[Bug lto/121747] Bus error with -flto on sun4v

2025-09-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121747 Georg-Johann Lay changed: What|Removed |Added Host||sparc-sun-solaris2.11 Ta

[Bug lto/121747] Bus error with -flto on sun4v

2025-09-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121747 Georg-Johann Lay changed: What|Removed |Added Keywords|ice-on-valid-code | --- Comment #3 from Georg-Johann La

[Bug lto/121747] New: Bus error with -flto on sun4v

2025-09-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- int main (void) { return 0; } Produces the bus error below on cfarm216 build=host=sparc-sun-solaris2.11 $ avr-ld --version GNU ld (GNU Binutils) 2.45 Apart from -flto, the compiler seems

[Bug target/44643] [4.6 Regression][avr] ICE in c-typeck.c

2025-08-23 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=44643 Georg-Johann Lay changed: What|Removed |Added CC||ledges_coeds_0p at icloud dot com --

[Bug target/49764] [avr-g++] Rejects attribute progmem

2025-08-23 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49764 Georg-Johann Lay changed: What|Removed |Added Resolution|FIXED |DUPLICATE --- Comment #20 from Georg-

[Bug target/121608] [avr] Don't link with --relax when -r is on (ld: --relax and -r may not be used together)

2025-08-20 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121608 Georg-Johann Lay changed: What|Removed |Added Target Milestone|--- |15.3 Status|UNCONFIRMED

[Bug target/121608] New: [avr] Don't link with --relax when -r is on

2025-08-20 Thread gjl at gcc dot gnu.org via Gcc-bugs
onent: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Relocatable linking with -r and --relax cannot be specified together. The link relax spec should be adjusted accordingly.

[Bug target/121608] [avr] Don't link with --relax when -r is on

2025-08-20 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121608 Georg-Johann Lay changed: What|Removed |Added Keywords||link-failure Priority|P3

[Bug rtl-optimization/121426] [hard-reg constraints] ICE: Spill fail from LRA for insn with hard-reg constraints

2025-08-11 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121426 --- Comment #5 from Georg-Johann Lay --- There are test cases with register pressure that are also failing: gcc.c-torture/execute/pr94412.c gcc.dg/tree-ssa/ssa-lim-23.c gcc.dg/loop-invariant-2.c

[Bug rtl-optimization/121426] New: [hard-reg constraints] ICE: Spill fail from LRA for insn with hard-reg constraints

2025-08-06 Thread gjl at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Created attachment 62066 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62066&action=edit patch

[Bug rtl-optimization/121426] [hard-reg constraints] ICE: Spill fail from LRA for insn with hard-reg constraints

2025-08-06 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121426 --- Comment #4 from Georg-Johann Lay --- Created attachment 62069 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62069&action=edit LRA dump

[Bug rtl-optimization/121426] [hard-reg constraints] ICE: Spill fail from LRA for insn with hard-reg constraints

2025-08-06 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121426 --- Comment #3 from Georg-Johann Lay --- Created attachment 62068 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62068&action=edit IRA dump

[Bug rtl-optimization/121426] [hard-reg constraints] ICE: Spill fail from LRA for insn with hard-reg constraints

2025-08-06 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121426 Georg-Johann Lay changed: What|Removed |Added Target||avr Keywords|

[Bug rtl-optimization/121426] [hard-reg constraints] ICE: Spill fail from LRA for insn with hard-reg constraints

2025-08-06 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121426 --- Comment #1 from Georg-Johann Lay --- Created attachment 62067 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62067&action=edit Tentative fix for PR121198

[Bug target/121359] [avr] Remove last remains of reload

2025-08-05 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121359 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/121343] [avr] Use hard-register constraints instead of explicit hard-regs in avr.md

2025-08-05 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121343 Bug 121343 depends on bug 121359, which changed state. Bug 121359 Summary: [avr] Remove last remains of reload https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121359 What|Removed |Added ---

[Bug tree-optimization/121391] hard-reg constraints: ICE for undeclared variable

2025-08-04 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121391 --- Comment #1 from Georg-Johann Lay --- Target: x86_64-pc-linux-gnu Configured with: ../../source/gcc-master/configure --enable-languages=c,c++ --disable-bootstrap Thread model: posix Supported LTO compression algorithms: zlib zstd gcc version

[Bug tree-optimization/121391] New: hard-reg constraints: ICE for undeclared variable

2025-08-04 Thread gjl at gcc dot gnu.org via Gcc-bugs
Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- The following test terminates with an ICE after the correct error message: int use_hrc (void) { __asm volatile ("" :: "{eax}" (var));

[Bug target/121359] [avr] Remove last remains of reload

2025-08-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121359 Georg-Johann Lay changed: What|Removed |Added Target||avr Target Milestone|---

[Bug target/121359] New: [avr] Remove last remains of reload

2025-08-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- There are still reload remains in the avr BE.

[Bug target/121343] New: [avr] Use hard-register constraints instead of explicit hard-regs in avr.md

2025-07-31 Thread gjl at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Many insns in avr.md can be simplified and be made more robust by using hard-register constraints, like ;; Swap Bytes (change

[Bug rtl-optimization/121340] [avr] Fix some fallout from insn combine

2025-07-31 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121340 Georg-Johann Lay changed: What|Removed |Added Target Milestone|--- |15.2 Resolution|---

[Bug rtl-optimization/121340] New: [avr] Fix some fallout from insn combine

2025-07-31 Thread gjl at gcc dot gnu.org via Gcc-bugs
-optimization Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Insn combine may come up with superfluous reg-reg moves, where the combine people say that these are no problem since reg-alloc is supposed to optimize them. The issue

[Bug target/121277] [avr] Wrong code for (const __flashx char*) NULL

2025-07-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121277 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |FIXED Target Milestone|---

[Bug rtl-optimization/121198] [avr][hreg-constraints] error: 'asm' operand has impossible constraints or there are not enough registers

2025-07-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121198 --- Comment #4 from Georg-Johann Lay --- (In reply to Stefan Schulze Frielinghaus from comment #3) > Since we already select via a filter the hard register, we could set the > class to ALL_REGS. Could you give the following a try: > > diff --g

[Bug target/121277] New: [avr] Wrong code for (const __flashx char*) NULL

2025-07-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Upcasting the NULL pointer to const __flashx* will load 0x80 since avr.cc uses the same logic like for __memx. Since __flashx doesn't cover generic space,

[Bug c++/120955] [15/16 Regression] 50 % increase in data segment size on avr-gcc for -Os

2025-07-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120955 Georg-Johann Lay changed: What|Removed |Added Depends on||43745 --- Comment #27 from Georg-Joh

[Bug rtl-optimization/121198] [avr][hreg-constraints] error: 'asm' operand has impossible constraints or there are not enough registers

2025-07-24 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121198 --- Comment #2 from Georg-Johann Lay --- Created attachment 61955 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61955&action=edit hrc-bswapsi.diff: Proposed patch to get rig of hard regs in avr.md This patch also runs into ICE. It tries

[Bug rtl-optimization/121198] [avr][hreg-constraints] error: 'asm' operand has impossible constraints or there are not enough registers

2025-07-21 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121198 Georg-Johann Lay changed: What|Removed |Added Keywords||inline-asm, rejects-valid

[Bug rtl-optimization/121198] New: [avr][hreg-constraints] error: 'asm' operand has impossible constraints or there are not enough registers

2025-07-21 Thread gjl at gcc dot gnu.org via Gcc-bugs
sion: 16.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- The following test case is a very common scenario wher

[Bug c++/120955] [15/16 Regression] 50 % increase in data segment size on avr-gcc for -Os

2025-07-17 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120955 --- Comment #14 from Georg-Johann Lay --- Just to make sure I am getting it right. With avr-gcc v15.1 / trunk, I am getting a data size of: $ avr-size -G b-ii-15.o text databss total filename 2688194

[Bug middle-end/87695] Arduino: ICE with avr and LTO

2025-07-16 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87695 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |INVALID Status|WAITING

[Bug other/117914] [reload][avr] In function __objc_add_class_to_hash class-i.c:2162:1: error: insn does not satisfy its constraints:

2025-07-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117914 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |DUPLICATE Status|UNCONFI

[Bug rtl-optimization/120423] ICE in avr-gcc extract_constrain_insn

2025-07-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120423 Georg-Johann Lay changed: What|Removed |Added CC||gjl at gcc dot gnu.org --- Comment

[Bug testsuite/120591] SARIF tests depend on (length of) directory name

2025-07-11 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120591 --- Comment #2 from Georg-Johann Lay --- One difference is that in my case (for avr) these tests were failing. hmmm, I tried to reproduce it with same source and same options for configure, build and testsuite, but with different length of buil

[Bug rtl-optimization/110093] [12/13/14 Regression][avr] Move frenzy leading to code bloat

2025-07-10 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110093 Georg-Johann Lay changed: What|Removed |Added Summary|[12/13/14/15/16 |[12/13/14 Regression][avr]

[Bug c++/120955] [15/16 Regression] 50 % increase in data segment size on avr-gcc for -Os

2025-07-10 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120955 --- Comment #9 from Georg-Johann Lay --- So when the issue goes away wihout LTO, then you can't drop -flto obviously.

[Bug c++/120955] [15/16 Regression] 50 % increase in data segment size on avr-gcc for -Os

2025-07-07 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120955 --- Comment #7 from Georg-Johann Lay --- (In reply to fiesh from comment #6) > Am I doing something wrong? Maybe it has to do with LTO. When you are still using -flto, then the object files only contain LTO byte code except with -ffat-lto-objec

[Bug c++/120955] [15/16 Regression] 50 % increase in data segment size on avr-gcc for -Os

2025-07-05 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120955 --- Comment #4 from Georg-Johann Lay --- (In reply to fiesh from comment #3) > Is there some other output, like nm or objdump, that could help? Not very helpful IMO. You can try the following steps: 1) It's unlikely that LTO is essential. Thu

[Bug target/120856] [avr] during RTL pass: split2: internal compiler error: Segmentation fault with -mno-lra

2025-06-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120856 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Target Milestone|---

[Bug target/120856] [avr] during RTL pass: split2: internal compiler error: Segmentation fault with -mno-lra

2025-06-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120856 --- Comment #1 from Georg-Johann Lay --- (In reply to Georg-Johann Lay from comment #0) > R22:DI. Should read R24:DI.

[Bug target/120856] New: [avr] during RTL pass: split2: internal compiler error: Segmentation fault with -mno-lra

2025-06-28 Thread gjl at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- unsigned long long _Fract func (long f) { return __builtin_avr_ullrbits (f < 0 ? 0 : f); } This test c

[Bug target/113932] [meta-bug] Targets which should be ported to LRA

2025-06-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113932 Bug 113932 depends on bug 113934, which changed state. Bug 113934 Summary: Switch avr to LRA https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113934 What|Removed |Added -

[Bug target/113934] Switch avr to LRA

2025-06-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113934 Georg-Johann Lay changed: What|Removed |Added Target Milestone|--- |16.0 Resolution|---

[Bug target/113934] Switch avr to LRA

2025-06-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113934 Bug 113934 depends on bug 118591, which changed state. Bug 118591 Summary: [lra][avr] Wrong code with -mlra in pr43879-3.c https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118591 What|Removed |Added ---

[Bug middle-end/56183] [meta-bug][avr] Problems with register allocation

2025-06-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56183 Bug 56183 depends on bug 118591, which changed state. Bug 118591 Summary: [lra][avr] Wrong code with -mlra in pr43879-3.c https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118591 What|Removed |Added -

[Bug rtl-optimization/118591] [lra][avr] Wrong code with -mlra in pr43879-3.c

2025-06-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118591 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug other/115893] AVR documentation in x86_64 build

2025-06-19 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115893 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/115893] AVR documentation in x86_64 build

2025-06-17 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115893 Georg-Johann Lay changed: What|Removed |Added Priority|P3 |P5

[Bug rtl-optimization/116389] [15/16 regression] [avr] ICE in extract_constrain_insn for avrtiny and -O2 with ext-dce

2025-06-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116389 Georg-Johann Lay changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug rtl-optimization/120423] ICE in avr-gcc extract_constrain_insn

2025-06-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120423 Georg-Johann Lay changed: What|Removed |Added Status|NEW |RESOLVED Target Milestone|---

[Bug middle-end/56183] [meta-bug][avr] Problems with register allocation

2025-06-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56183 Bug 56183 depends on bug 116389, which changed state. Bug 116389 Summary: [15/16 regression] [avr] ICE in extract_constrain_insn for avrtiny and -O2 with ext-dce https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116389 What|Removed

[Bug target/120424] [arm] -fnon-call-exceptions -fstack-clash-protection triggers lra-eliminations bug

2025-06-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120424 --- Comment #9 from Georg-Johann Lay --- (In reply to Sam James from comment #8) > See > https://inbox.sourceware.org/gcc-patches/ormsalbaic@lxoliva.fsfla.org/. Thanks for the pointer and sorry for the noise. I missed that it's 2 patches, a

[Bug target/120424] [arm] -fnon-call-exceptions -fstack-clash-protection triggers lra-eliminations bug

2025-06-14 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120424 --- Comment #7 from Georg-Johann Lay --- This patch turns the test cases for gcc.target/avr/torture/pr118591-1.c https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118591#c4 into ICEs: $ make -k check-gcc RUNTESTFLAGS="--target_board=atmega128-sim

[Bug testsuite/120591] New: sarif tests depend on (length of) directory name

2025-06-08 Thread gjl at gcc dot gnu.org via Gcc-bugs
: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- When doing regression tests, I found that a sarif test depends on the directory name of builddir, which leads to extra extra noise in the testsuite results: # Comparing

[Bug target/120423] ICE in avr-gcc extract_constrain_insn

2025-05-30 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120423 Georg-Johann Lay changed: What|Removed |Added Known to work||14.2.0 --- Comment #2 from Georg-Joh

[Bug target/120423] ICE in avr-gcc extract_constrain_insn

2025-05-30 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120423 --- Comment #1 from Georg-Johann Lay --- Created attachment 61553 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61553&action=edit Reduced C test case Here is a reduced C test case: struct data { int a; int b; }; unsigned char v

[Bug target/120423] ICE in avr-gcc extract_constrain_insn

2025-05-30 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120423 Georg-Johann Lay changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED

[Bug target/120442] [avr] fdim is missing from libgcc/avr/libf7

2025-05-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120442 Georg-Johann Lay changed: What|Removed |Added Target Milestone|--- |15.2 Status|UNCONFIRMED

[Bug target/120441] [avr] exp returns Inf for x>=512 and 0 for x<=-512 in libgcc/libf7

2025-05-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120441 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/120442] [avr] fdim is missing from libgcc/avr/libf7

2025-05-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120442 Georg-Johann Lay changed: What|Removed |Added Target||avr Priority|P3

[Bug target/120442] New: [avr] fdim is missing from libgcc/avr/libf7

2025-05-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- fdim is missing from libgcc/avr/libf7

[Bug target/120441] [avr] exp returns Inf for x>=512 and 0 for x<=-512 in libgcc/libf7

2025-05-26 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120441 Georg-Johann Lay changed: What|Removed |Added Keywords||wrong-code Target|

[Bug target/120441] New: [avr] exp returns Inf for x>=512 and 0 for x<=-512 in libgcc/libf7

2025-05-26 Thread gjl at gcc dot gnu.org via Gcc-bugs
normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- f7_exp returns Inf for x>=512 and 0 for x<=-512 in libgcc/libf7.

[Bug target/119989] [AVR] Incorrect code generation with __memx pointers when optimization is enabled (-O1 and above) on AVR (ATmega328P)

2025-04-30 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119989 --- Comment #6 from Georg-Johann Lay --- The issue was introduced by the cc0 -> CCmode conversion in r12-226 3ba781d3b5c8efadb60866c9743b657e8f0eb222

[Bug target/119989] [AVR] Incorrect code generation with __memx pointers when optimization is enabled (-O1 and above) on AVR (ATmega328P)

2025-04-30 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119989 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |FIXED Target|Avr

[Bug c/119568] New: [avr] ICE: in find_widening_optab_handler_and_mode, at optabs-query.cc:498

2025-04-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- unsigned _Fract p2m1_remez (unsigned _Fract x) { unsigned _Fract a0 = 3.704e-06ur; unsigned _Fract a1 = 6.929e-01ur; unsigned

[Bug c/119568] [avr] ICE: in find_widening_optab_handler_and_mode, at optabs-query.cc:498

2025-04-01 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119568 --- Comment #1 from Georg-Johann Lay --- So the ICE occurs with checking enabled, and otherwise it goes into hog mode: gcc_checking_assert (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode) && from_mode < to_mo

[Bug middle-end/119555] New: [avr] const _Fract: Wrong warning: variable 'f0' set but not used

2025-03-31 Thread gjl at gcc dot gnu.org via Gcc-bugs
ty: normal Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- This warning seems to only occur when const is specified, and when the variable f0 is a fixed-point type: #define T _Frac

[Bug tree-optimization/119532] [avr] ICE: in build_minus_one_cst with _Accum/_Fract types , at tree.cc:2698

2025-03-31 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119532 --- Comment #7 from Georg-Johann Lay --- (In reply to rguent...@suse.de from comment #6) > Is it a regression? You mean whether there is an older version where it did not ICE? Presumably not, at least with v8 it also ICEs, and with v5.4.0 there

[Bug tree-optimization/119532] [avr] ICE: in build_minus_one_cst with _Accum/_Fract types , at tree.cc:2698

2025-03-31 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119532 --- Comment #5 from Georg-Johann Lay --- It also occurs for current v13 and v14 at least.

[Bug middle-end/119532] New: [avr] ICE: in build_minus_one_cst, at tree.cc:2698

2025-03-29 Thread gjl at gcc dot gnu.org via Gcc-bugs
Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- extern _Fract sinuhk_deg (unsigned short _Accum); _Fract cosuhk_deg (unsigned short _Accum deg) { unsigned short _Accum _90_deg = 90uhk; __asm ("" : &qu

[Bug target/117596] avr support for BitInt

2025-03-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117596 --- Comment #2 from Georg-Johann Lay --- ...what I currently have for trying is this addition to avr.cc: static bool avr_c_bitint_type_info (int n, struct bitint_info *info) { info->abi_limb_mode = QImode; info->limb_mode = QImode; info->

[Bug target/117596] avr support for BitInt

2025-03-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117596 --- Comment #1 from Georg-Johann Lay --- All I can find is TARGET_C_BITINT_TYPE_INFO. * Where to specify that addition should be implemented by a libgcc function like addbitint3? * There are libgcc modules like _mulbitint3.o but they are empty

[Bug libgcc/119396] libgcc: Shared objects are being built for target that doesn't support shared libs

2025-03-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119396 Georg-Johann Lay changed: What|Removed |Added Last reconfirmed||2025-03-27 Status|UNCONF

[Bug libgcc/119396] libgcc: Shared objects are being built for target that doesn't support shared libs

2025-03-27 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119396 --- Comment #3 from Georg-Johann Lay --- As it seems, the following libgcc/Makefile.in rule injects dependencies: $(patsubst %,%.vis,$(LIB1ASMFUNCS)): %.vis: %_s$(objext) $(gen-hide-list) Since the *_s. objects are added to lib1asmfuncs-s-

[Bug target/119421] [avr] Better optimize some operations involving bits

2025-03-22 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119421 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Target Milestone|---

[Bug target/119421] [avr] Better optimize some operations involving bits

2025-03-21 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119421 Georg-Johann Lay changed: What|Removed |Added Severity|normal |enhancement Keywords|

[Bug target/119421] New: [avr] Better optimize some operations involving bits

2025-03-21 Thread gjl at gcc dot gnu.org via Gcc-bugs
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- There are occasions where knowledge about nonzero bits makes some optimizations possible. For example, Rd |= Rn << Off can be implemented as SBRC Rn, 0

[Bug libgcc/119396] libgcc: Shared objects are being built for target that doesn't support shared libs

2025-03-21 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119396 --- Comment #2 from Georg-Johann Lay --- What I have already tried is to set SHLIB_LINK := in t-avr, which should imply enable_shared=no. But it had no effect. Also I don't know where SHLIB_LINK should be set. In the top-level configure.ac ?

[Bug libgcc/119396] New: libgcc: Shared objects are being built for target that doesn't support shared libs

2025-03-20 Thread gjl at gcc dot gnu.org via Gcc-bugs
IRMED Severity: normal Priority: P3 Component: libgcc Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- On avr, there are libgcc modules build with -DSHARED even though that target doesn't support shared libra

[Bug target/119355] ICE / assertion in "during RTL pass: avr-fuse-move" for avr-linux cross-compiler

2025-03-18 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119355 Georg-Johann Lay changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/119225] avr-mmcu.texi:15: warning: @anchor should not appear on @item line

2025-03-12 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119225 --- Comment #2 from Georg-Johann Lay --- This is the texinfo commit that fixed the issue: https://git.savannah.gnu.org/cgit/texinfo.git/commit/?id=f536711c6286a974798affb366d1ba0cc72fa16e

[Bug target/119225] avr-mmcu.texi:15: warning: @anchor should not appear on @item line

2025-03-12 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119225 --- Comment #1 from Georg-Johann Lay --- This is a texinfo bug that has been fixed. Please leave the anchors where they are, they are correct and external links rely on them. See also https://lists.gnu.org/archive/html/help-texinfo/2024-03/msg

[Bug target/119077] gcc option -mint8 leads to undefined reference to `__builtin_avr_delay_cycles'

2025-03-08 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119077 --- Comment #7 from Georg-Johann Lay --- ...I can reproduce it with the following test case and v13: #include extern void __builtin_avr_delay_cycles (uint32_t); #include int main(void) { _delay_ms(100); } So the likely cause is that A

[Bug target/119077] gcc option -mint8 leads to undefined reference to `__builtin_avr_delay_cycles'

2025-03-08 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119077 --- Comment #6 from Georg-Johann Lay --- Still 2 issues: * Your are configuring the compiler in a way not supported by GCC (see my note above). * Pre-processed files are still missing. You can get the i files with -save-temps -g3. With -g3, t

[Bug target/115817] [AVR] Suboptimal code for zeroing SRAM byte from ISR

2025-03-07 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115817 Georg-Johann Lay changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug tree-optimization/119086] __builtin_constant_p is missing opportunities

2025-03-02 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119086 --- Comment #3 from Georg-Johann Lay --- (In reply to Andrew Pinski from comment #2) > See pr 26724 and others. > > *** This bug has been marked as a duplicate of bug 26724 *** Thanks for the pointer. Would you explain how that can be used for

[Bug tree-optimization/119086] New: __builtin_constant_p is missing opportunities

2025-03-02 Thread gjl at gcc dot gnu.org via Gcc-bugs
: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Created attachment 60634 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=60634&action=edit bic.c: C test case In the attached test case bic.c, there

[Bug target/119077] gcc option -mint8 leads to undefined reference to `__builtin_avr_delay_cycles'

2025-03-02 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119077 Georg-Johann Lay changed: What|Removed |Added Last reconfirmed||2025-03-02 Keywords|

[Bug rtl-optimization/101188] [12/13 Regression] [postreload] Uses content of a clobbered register

2025-02-21 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101188 --- Comment #21 from Georg-Johann Lay --- Back then, the patch has been reopened so it won't be forgotten for backporting. https://gcc.gnu.org/pipermail/gcc/2024-February/243300.html As is seems, no backport will happen?

[Bug middle-end/118889] attribute "common" ignored with -fdata-sections

2025-02-17 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118889 --- Comment #5 from Georg-Johann Lay --- ...the respective part of varasm.cc reads: get_variable_section (tree decl, bool prefer_noswitch_p) { ... if (ADDR_SPACE_GENERIC_P (as) && !DECL_THREAD_LOCAL_P (decl) && !DECL_NOINIT_P (

[Bug middle-end/118889] attribute "common" ignored with -fdata-sections

2025-02-17 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118889 --- Comment #4 from Georg-Johann Lay --- (In reply to rguent...@suse.de from comment #3) > On Mon, 17 Feb 2025, gjl at gcc dot gnu.org wrote: > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118889 > > --- Comment #2 from G

[Bug middle-end/118889] attribute "common" ignored with -fdata-sections

2025-02-17 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118889 --- Comment #2 from Georg-Johann Lay --- (In reply to Richard Biener from comment #1) > I think variables with 'static' linkage cannot be 'common'? Shouldn't they go into .lcomm, i.e. lcomm_section? What I am trying to achieve is to implement

[Bug target/115817] [AVR] Suboptimal code for zeroing SRAM byte from ISR

2025-02-16 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115817 --- Comment #9 from Georg-Johann Lay --- What can be used as a kind of work-around (and may be even better than the code with improved Binutils as proposed above), is to hide the value of 0 from the compiler: volatile uint8_t var; __attribute(

[Bug target/115817] [AVR] Suboptimal code for zeroing SRAM byte from ISR

2025-02-16 Thread gjl at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115817 --- Comment #8 from Georg-Johann Lay --- See https://sourceware.org/bugzilla/show_bug.cgi?id=32704

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