- Resolve 15+ bug reports
DDD's maintainers are Stefan Eickler and Michael Eager. Please
send questions or comments to mailto:d...@gnu.org.
Information about DDD, including how to download and build DDD sources,
can be found on the DDD project page: https://www.gnu.org/software/ddd/
--
Michael Eager
, improve the build process, fix a
number of bugs as well as make a number of enhancements.
DDD's maintainers are Stefan Eickler and Michael Eager. Please
send questions or comments to mailto:d...@gnu.org.
Information about DDD can be found on the DDD project page:
https://www.gnu.org/softwar
ead of being an odd singleton which doesn't share.
I'm asking because I've seen a number of projects run into this
issue (xz,
elfutils, libfuse, libkcapi, cryptsetup).
And RTEMS.
--joel
Joel -- do you have a patch to add elfos.h to MicroBlaze?
--
Michael Eager
On 7/21/21 5:22 PM, Joel Sherrill wrote:
On Wed, Jul 21, 2021, 7:12 PM Michael Eager <mailto:ea...@eagercon.com>> wrote:
On 7/21/21 2:28 PM, Joel Sherrill wrote:
> Hi
>
> We are in the process of porting RTEMS to the Microblaze and gcc does
>
e are very few defines for __ELF__ in the GCC target files.
Why don't you put this in rtems.h?
Alternately, you might put it in microblaze-s.c, wrapped with
#ifdef OBJECT_FORMAT_ELF/#endif.
--
Michael Eager
participating on the DWARF Committee please
contact me privately.
--
Michael Eager, DWARF Committee Chair
On 8/28/19 12:33 PM, Segher Boessenkool wrote:
Hi!
On Tue, Aug 27, 2019 at 09:37:59AM -0700, Michael Eager wrote:
Combine is complex, but I don't think that target descriptions should
conform to its behaviors;
But they have to, in some ways. If combine writes something that can be
wr
On 8/20/19 4:07 PM, Jeff Law wrote:
On 11/20/18 4:39 PM, Michael Eager wrote:
On 11/20/2018 03:10 PM, Jeff Law wrote:
On 11/20/18 11:07 AM, Michael Eager wrote:
On 11/18/2018 08:14 AM, Jeff Law wrote:
On 11/18/18 8:44 AM, Michael Eager wrote:
On 11/16/18 14:50, Segher Boessenkool wrote
On 11/29/18 10:28, Michael Eager wrote:
On 11/28/18 14:37, Andrew Pinski wrote:
On Wed, Nov 28, 2018 at 9:47 AM Michael Eager wrote:
On 11/28/18 09:10, Jeff Law wrote:
On 11/28/18 10:00 AM, Michael Eager wrote:
I have a small test case which generates poor quality code on my
target.
Here
On 11/28/18 14:37, Andrew Pinski wrote:
On Wed, Nov 28, 2018 at 9:47 AM Michael Eager wrote:
On 11/28/18 09:10, Jeff Law wrote:
On 11/28/18 10:00 AM, Michael Eager wrote:
I have a small test case which generates poor quality code on my target.
Here is the original:
if (cond1 == 2048
On 11/28/18 09:10, Jeff Law wrote:
On 11/28/18 10:00 AM, Michael Eager wrote:
I have a small test case which generates poor quality code on my target.
Here is the original:
if (cond1 == 2048 || cond2 == 8)
{
x = x + y;
}
return x;
This ends up generating a series of
option which I have overlooked or
maybe set incorrectly?
--
Michael Eagerea...@eagerm.com
1960 Park Blvd., Palo Alto, CA 94306
On 11/21/18 11:47, Segher Boessenkool wrote:
On Wed, Nov 21, 2018 at 08:52:21AM -0800, Michael Eager wrote:
On 11/21/2018 08:33 AM, Segher Boessenkool wrote:
On Tue, Nov 20, 2018 at 10:07:35AM -0800, Michael Eager wrote:
The internal RTL should not be dictating what the target arch can or
On 11/21/2018 08:33 AM, Segher Boessenkool wrote:
On Tue, Nov 20, 2018 at 10:07:35AM -0800, Michael Eager wrote:
The internal RTL should not be dictating what the target arch can or
cannot implement. Reload should insert any needed conversions,
especially ones which narrow the size.
Well
On 11/18/2018 08:14 AM, Jeff Law wrote:
On 11/18/18 8:44 AM, Michael Eager wrote:
On 11/16/18 14:50, Segher Boessenkool wrote:
Hi!
On Wed, Nov 14, 2018 at 11:22:58AM -0800, Michael Eager wrote:
The (mem:SI) is converted to (mem:QI).
The return from make_extract() is
(zero_extract:SI
of
(zero_extract:SI (mem:QI)...) over (zero_extract:SI (mem:SI)...).
3. What's the best way to fix this?
- Remove the down-sizing of MEM in make_extract()?
- Define patterns for extz*?
- Do something so zero_extend accepts QI?
--
Michael Eagerea...@eagerm.com
1960 Park Blvd., Palo Alto, CA 94306
On 05/27/2017 09:09 AM, Michael Eager wrote:
On 05/27/2017 01:51 AM, Waldemar Brodkorb wrote:
Hi,
Buildroot and OpenADK have samples to create a Linux system to be
bootup in Qemu system emulation for microblaze architecture.
With gcc 6.3 and 7.1 the samples are not working anymore,
because
.
What can we do about it?
I will revert this commit in GCC.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Format or the DWARF
Committee can be directed to the DWARF Committee Chair, Michael Eager at i...@dwarfstd.org.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
version will be published. Additional information about
DWARF, including how to subscribe to the DWARF mailing list, can also be found on the website.
Questions about the DWARF Debugging Information Format or the DWARF Committee can be directed to the
DWARF Committee Chair, Michael Eager at i
tectures.
As a first pass, maybe something like this:
...
> Drop
...
MicroBlaze—config/microblaze/constraints.md
MicroBlaze should continue to be supported.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
On 07/20/2015 09:55 AM, Nikolai Bozhenov wrote:
On 07/17/2015 08:31 PM, Michael Eager wrote:
A related issue is where the breakpoint is taken. GCC sets breakpoints
at the first instruction generated for a statement, which in this case,
appears to be before any of the arguments to bar are
NOTE_VAR_LOCATION_STATUS is taken into account (anyway,
there's no such notes for variables a, b, c in this case).
So, here are my questions:
1) Wouldn't it be nice if GCC marked such stack variables either as
uninitialized (with DW_OP_GNU_uninit) or as ?
2) Is it feasible t
http://gcc.gnu.org/wiki/HomePage.
Of course, you can always read the source code.
Let me know if you have specific questions about MicroBlaze.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
of
the DWARF Standard can be found here: http://dwarfstd.org/Download.php
Please feel free to forward this email to anyone or any list
where it seems appropriate.
--
Michael EagerChair, DWARF Standards Committee
ea...@eagercon.com
On 11/26/13 08:16, Jan-Benedict Glaw wrote:
On Tue, 2013-11-26 08:13:12 -0800, Michael Eager wrote:
On 11/26/13 08:08, Jan-Benedict Glaw wrote:
Thanks for looking into the issue anyways! (...and what do you
think about adding a microblazeel target to the list?)
Sounds OK to me.
Any
On 11/26/13 08:08, Jan-Benedict Glaw wrote:
On Tue, 2013-11-26 07:50:34 -0800, Michael Eager wrote:
On 11/25/13 19:26, Jan-Benedict Glaw wrote:
Build logs at
http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=39192
http://toolchain.lug-owl.de/buildbot/show_build_details.php?id
microblaze-rtems is almost identical to microblaze-elf.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
sion of gcc and investigate
this failure, but I won't be able to look at this for about two weeks.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
mittee get an appropriate tag into the next
version of DWARF?
(I've filed bug 59051 for the lack of use of DW_tag_restrict_type for
restricted pointers.)
Hi Joseph --
Can you go to http://dwarfstd.org/Comment.php and submit a description
of the change in C11 and a request that this be adde
bugger etc..) only work with
DWARF2. So I guess the OVERRIDE_OPTIONS hook is the way to go.
Or fix the tools to understand DWARF 4. (Sometimes easier said than done.)
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
On 02/13/2013 11:24 PM, Edgar E. Iglesias wrote:
On Thu, Feb 14, 2013 at 12:36:46AM +0100, Michael Eager wrote:
On 02/13/2013 02:38 PM, Vladimir Makarov wrote:
On 13-02-13 1:36 AM, Michael Eager wrote:
Hi --
I'm seeing register allocation problems and code size increases
with gcc-4.6.2
On 02/13/2013 02:38 PM, Vladimir Makarov wrote:
On 13-02-13 1:36 AM, Michael Eager wrote:
Hi --
I'm seeing register allocation problems and code size increases
with gcc-4.6.2 (and gcc-head) compared with older (gcc-4.1.2).
Both are compiled using -O3.
One test case that I have has a
hat is going on?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
#if 0
mb-gcc -O3 -mhard-float -fdump-rtl-all -c s.c -save-temps
#endif
typedef unsigned char uchar;
typedef struct {int x,y,info, dx, dy, I;} CORNER_LIST[15000];
susan_corners(in,r,bp,max_no,corner_lis
[gt ge lt le gtu geu ltu leu])
Using UNSPEC and code interators should be unrelated.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
that the DWARF registers map one-to-one to
hardware registers. You could define a DWARF register which represents
the FP register, spanning two hardware registers.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
gcc/dwarf*.[ch] and associated files in
the include directory.
I'd like the steering committee to consider this proposal.
I'm happy to recommend Cary as DWARF maintainer.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
inter, not
the stack pointer, so it will not tell you how the calling function modifies
the stack before or after the call.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
The general answer to the question "how much effort for someone who doesn't know GCC
internals"
is "lots".
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
you post a small program which creates output like this,
along with output from readelf -w or dwarfdump?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
urn' and does not define 'simple_return'.
My guess is that the #ifdef HAVE_return in function.c
which surrounds the undefined functions should be removed.
What is the correct model for the back end? Define only
'return' like ARM, define both 'return' and 'simple_retu
On 10/29/2011 11:55 PM, Michael Eager wrote:
On 10/29/2011 08:44 PM, Ian Lance Taylor wrote:
Michael Eager writes:
I'm seeing a build failure when building a bootstrap gcc
because it is attempting to build target-libiberty. This
is happening for --target=powerpc-linux with the gcc-
On 10/29/2011 08:44 PM, Ian Lance Taylor wrote:
Michael Eager writes:
I'm seeing a build failure when building a bootstrap gcc
because it is attempting to build target-libiberty. This
is happening for --target=powerpc-linux with the gcc-4.6.1
release and --target=microblaze-xilinx-elf
from the
top of tree. Configure parameters are the same.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
ing a link from libdecnumber/dpd/gstdint.h to libgcc/gstdint.h fixes the
problem.
Is there a better fix?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
., is described in the Dwarf Standard on page 166.
See http://dwarfstd.org.
If you are looking for translation between gcc register numbers
and the Dwarf register numbers, look in dwarf2out.c. Search for
DBX_REGISTER_NUMBER.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306
bug data in the
object files is localized in format-specific routines, actual collection
of the data is more implicit than explicit.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
d up in the awkward position of a language
standard being revised so that the DWARF definition no longer matched.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
e Fortran program into comparable C++ and
see what g++ generates, then try to match it with gfortran.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Ralf Wildenhues wrote:
Hello Michael,
* Michael Eager wrote on Fri, Oct 22, 2010 at 10:35:48PM CEST:
Paolo Carlini wrote:
On 10/22/2010 08:43 PM, Michael Eager wrote:
I'm seeing test suite failures in g++ caused by
linking with the wrong libstdc++.so.
It looks like g++.exp always ap
Paolo Carlini wrote:
On 10/22/2010 08:43 PM, Michael Eager wrote:
Hi --
I'm seeing test suite failures in g++ caused by
linking with the wrong libstdc++.so.
It looks like g++.exp always appends the default
directory
append flags -L${gccpath}/libstdc++-v3/src/.libs
instead of
append
this problem?
Is this supposed to work in a different way?
Anyone come up with a fix?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
garble the result. (This doesn't happen with soft-fp.)
int r = 0, s = 0;
float a = 1.0, x = NaN;
r = (a <= x);
s = (a > x);
should result in r == s == 0. CSE translates this (more
or less) into
r = (a <= x);
s = !r;
Is there a way to prevent CSE from optimizing FP
Joel Sherrill wrote:
On 09/28/2010 01:56 PM, Michael Eager wrote:
David Edelsohn wrote:
I am pleased to announce that the GCC Steering Committee has
accepted the Microblaze port for inclusion in GCC and appointed
Michael Eager as port maintainer.
Thanks!
Congratulations!
Does your
David Edelsohn wrote:
I am pleased to announce that the GCC Steering Committee has
accepted the Microblaze port for inclusion in GCC and appointed
Michael Eager as port maintainer.
Thanks!
Adding myself to maintainer list.
Index: MAINTAINERS
stics and see if I can make some
sense of what is going on.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
broad range of companies,
including Apple, ARM, CodeSourcery, Concurrent Computer, Eager Consulting,
Google, Hewlett-Packard, IBM, RedHat, SGI, Sun Microsystems, and TotalView, as
well as unaffiliated individuals with significant experience in compiler and
debugger development.
Michael Eager
Michael Eager wrote:
The final version of DWARF Version 4 is available
for download from http://dwarfstd.org.
A technical problem generating the PDF of the DWARF
Version 4 standard has been corrected. Please see
following announcement.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd
The final version of DWARF Version 4 is available
for download from http://dwarfstd.org.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
-04/msg01907.html
http://gcc.gnu.org/ml/gcc-patches/2010-04/msg01906.html
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
finalized version will be
published. Additional information about DWARF, including how to subscribe to the
DWARF mailing list, can also be found on the website. Questions about the DWARF
Debugging Information Format or the DWARF Committee can be directed to the DWARF
Committee Chair, Michael Eager, a
The microblaze branch has been synced with gcc-head and
updated to gcc-4.5.0.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
output? Is this a GNU
bug or just an unsupported feature?
It looks like a GCC bug to me. GCC does generate DW_TAG_typedef
for other typedefs.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
tter question might by why there is no DW_TAG_typedef
DIE which looks like
DW_TAG_typedef
DW_AT_name: BASE_UNION
DW_AT_type: <1279>
BTW gcc-4.3.2 generates
DW_AT_name:
which is also incorrect.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
I've updated the Microblaze branch to gcc-4.5.
It has passed gcc regression tests reasonably well.
I still have some minor cleanup to do -- updating
copyright notices, checking indents, and so forth.
What's the best process for merging this into head?
Should I submit a patch?
--
Mic
you do not need any CC mode:
Thanks. I'll take a look at this.
There are some other quirks with the MicroBlaze architecture.
The cmp/cmpu instructions only take a register. Other instructions
which can be used for equality or signed comparisons (xor or sub)
can take an immediate operand
Joern Rennecke wrote:
Quoting Michael Eager :
Hi --
I'm working on creating the cstore and cbranch templates
for the Xilinx MicroBlaze processor.
In theory cstore / cbranch should be the future, but the last time I tried
to use them, they didn't quite work right yet, particular
comparison results
in registers and require the condition?
Any suggestions on better ways to model the MicroBlaze
comparison operations?
Are there some restriction on using eq/ne/lt/... the
way I am?
Any suggestions on how to fix the problem in CSE?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
://lists.dwarfstd.org/listinfo.cgi/dwarf-announce-dwarfstd.org
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Jeff Law wrote:
On 11/30/09 14:48, Michael Eager wrote:
Jeff Law wrote:
On 11/30/09 14:17, Michael Eager wrote:
I've run into a situation where assign_hard_reg()
decides that there are no registers available.
That can certainly happen. It's also the case that assign_hard_reg
may d
Jeff Law wrote:
On 11/30/09 14:48, Michael Eager wrote:
Jeff Law wrote:
On 11/30/09 14:17, Michael Eager wrote:
I've run into a situation where assign_hard_reg()
decides that there are no registers available.
That can certainly happen. It's also the case that assign_hard_reg
may d
Jeff Law wrote:
On 11/30/09 14:17, Michael Eager wrote:
I've run into a situation where assign_hard_reg()
decides that there are no registers available.
That can certainly happen. It's also the case that assign_hard_reg may
decide that memory is cheaper than a register and refuse t
frequency;
The alternative doesn't allow memory, so I'm unclear why
mem_cost is being set. allows_mem[] is zero for all
operands in the insn.
Can anyone give me some guidance here?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
I've checked in patches to the microblaze branch
to bring it into sync with gcc-4.4.2. This has been
tagged with microblaze-4.4.2.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Gerald Pfeifer wrote:
On Sun, 2 Aug 2009, Michael Eager wrote:
Created gcc.gnu.org/svn/gcc/branches/microblaze. Here is the update
to svn.html:
Looks good to me, you just may want to add a closing .
Checked in with .
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA
Gerald Pfeifer wrote:
On Sat, 1 Aug 2009, Michael Eager wrote:
Paolo Bonzini suggested that I create a branch off the
gcc-4.1.2 tag and commit the original port to this branch.
Then move this branch up to 4.3.x and then head.
OK to create a microblaze branch?
If you have write access to the
sumanth wrote:
Hi,
How can I make sure the debugging information printed by my
compiler for extern variables is correct.
Make sure you compile with -g. If you don't generate
debug info for the variable, gdb will default to printing
it as an unknown symbol.
--
Michael Eager
Michael Eager wrote:
Hi --
This is just a heads-up that I'm working on GCC support
for the Xilinx MicroBlaze. It is currently based on
gcc-4.1.2 and I'm porting it to gcc-4.5.0.
Paolo Bonzini suggested that I create a branch off the
gcc-4.1.2 tag and commit the original port to t
Hi --
This is just a heads-up that I'm working on GCC support
for the Xilinx MicroBlaze. It is currently based on
gcc-4.1.2 and I'm porting it to gcc-4.5.0.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
GDB's side proved to be harder than in GCC's side (since we're
already assuming things, it would just be another workaround).
Luis
On Tue, 2009-07-21 at 08:38 -0500, Peter Bergner wrote:
On Thu, 2009-07-16 at 13:55 -0700, Michael Eager wrote:
I've tracked down a failure in
se of the .loc at (2). When the code is
executed, the branch (1) is taken, jumping over the the breakpoint.
I think that the .loc at (2) should not be generated, since it is
in the middle of the prologue code.
I'll file a bug report unless someone already has done so.
--
Michael Eagerea.
Olivier Hainque wrote:
Michael Eager wrote:
I'll reverse-engineer the table unless I can find something
more descriptive than the comments in gcc or gdb.
FWIW, I did a similar exercise long ago and synthesized my
understanding in ada/raise-gcc.c, where the Ada personality routin
Michael Matz wrote:
Hi,
On Sun, 17 May 2009, Michael Eager wrote:
But the _format_ of the LSDA is not specified. It's really an
implementation detail of the compiler/language and doesn't have to be
agreed upon for mixing .o files from different compilers, as every
compilation uni
Michael Matz wrote:
Hi,
On Fri, 15 May 2009, Michael Eager wrote:
Is there any documentation on the contents of .eh_frame
and the augmentations used?
.eh_frame simply contains normal unwinding information, in DWARF2(34)
format, you're familiar with that :)
And nothing more, specifi
Ian Lance Taylor wrote:
Michael Eager writes:
Is there any documentation on the contents of .eh_frame
and the augmentations used? IIRC, the data describes the
try blocks and the catch handlers, but I'm looking for
the gory details.
I don't know of any docs. Docs would be nice
Is there any documentation on the contents of .eh_frame
and the augmentations used? IIRC, the data describes the
try blocks and the catch handlers, but I'm looking for
the gory details.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Dave Korn wrote:
Michael Eager wrote:
Does anyone have any suggestions on how to get one of
these tests to fail consistently, or a different approach
to finding the cause of the intermittent failures?
Perhaps hack the testsuite to run the tests under gdb, setting a breakpoint
on abort
Dave Korn wrote:
Michael Eager wrote:
Does anyone have any suggestions on how to get one of
these tests to fail consistently, or a different approach
to finding the cause of the intermittent failures?
Perhaps hack the testsuite to run the tests under gdb, setting a breakpoint
on abort
ng that this is a problem only on powerpc
and perhaps only powerpc-eabi.
Does anyone have any suggestions on how to get one of
these tests to fail consistently, or a different approach
to finding the cause of the intermittent failures?
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo
()’:
.../build/powerpc-eabi/libstdc++-v3/include/powerpc-eabi/bits/ctype_noninline.h:43: error: ‘_ctype_’ was not declared in
this scope
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Jeff Law wrote:
Richard Henderson wrote:
Michael Eager wrote:
Another possibility is illegal rtl sharing.
If you mean that an rtx would be pointed to by two different
insn's, how would that happen? (Excluding someone mucking
things up deliberately or accidentally.)
Generally this so
Richard Henderson wrote:
Ian Lance Taylor wrote:
Michael Eager <[EMAIL PROTECTED]> writes:
I'm running into a situation where reload is replacing
a pseudo-register in an insn with a memory reference.
The problem is that this is happening in a memory ref.
The initial pattern is som
Ian Lance Taylor wrote:
Michael Eager <[EMAIL PROTECTED]> writes:
I'm running into a situation where reload is replacing
a pseudo-register in an insn with a memory reference.
The problem is that this is happening in a memory ref.
The initial pattern is something like
(set (reg/v
ate a load from reg-equiv to a reg
rather than replace the pseudo-reg with the reg-equiv?
--
Michael Eager[EMAIL PROTECTED]
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
psi2).
Try to avoid it.
--
Michael Eager[EMAIL PROTECTED]
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Richard Sandiford wrote:
Michael Eager <[EMAIL PROTECTED]> writes:
I have a processor which does not have hardware
register interlocks, somewhat like the MIPS I.
A register used in one instruction may not be
referenced for a certain number of instructions.
If I recall correctly, for the
register interlock.
Are there any targets with register interlock where
gcc handles moving instructions between conflicting
instructions?
Any suggestions on how this might be represented
in .md files? It doesn't seem that the pipeline
description would seem appropriate.
--
Michael Eager[
Joseph S. Myers wrote:
On Fri, 4 Apr 2008, Michael Eager wrote:
Xilinx has a PowerPC 405 processor with an attached
single precision floating point processor. I have a
patch which supports this FP unit, but want to clean
it up a bit before submitting it.
What do you propose as the function
Daniel Jacobowitz wrote:
On Sun, Apr 06, 2008 at 10:25:38AM -0700, Michael Eager wrote:
For an instruction supported on all variants (both BookE and E500)
with a double precision FPU.
I think you have your terminology switched. E500 is (very
approximately) an implementation of Book E; the
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