[EMAIL PROTECTED] wrote on 19/03/2008 06:01:19:
> The web page
>
> http://gcc.gnu.org/gcc-4.3/changes.html
>
> states that "The -ftree-vectorize option is now on by default under -
> O3.", but on
>
> http://gcc.gnu.org/onlinedocs/gcc-4.3.0/gcc/Optimize-Options.html
>
> -ftree-vectorize is not li
The web page
http://gcc.gnu.org/gcc-4.3/changes.html
states that "The -ftree-vectorize option is now on by default under -
O3.", but on
http://gcc.gnu.org/onlinedocs/gcc-4.3.0/gcc/Optimize-Options.html
-ftree-vectorize is not listed as one of the options enabled by -O3.
Is the first stateme
It appears that gcj in gcc 4.3.0 is broken on Darwin. If
one builds gcc 4.3.0 executing...
contrib/download_ecj
before running configure, the build succeeds in creating an
ecj1 but when gcj is used to compile an example like testme.java...
public class testme {
public static void main(Strin
Dave Korn wrote:
> Jakub Jelinek wrote on 17 March 2008 12:00:
>
>> On Mon, Mar 17, 2008 at 10:27:17AM -, Dave Korn wrote:
>>> Eric Botcazou wrote on :
>>>
> fixincludes/fixincl.x changed to GPLv3 on 4.1 branch a month ago.
By accident I presume?
>>>
>>> As an epiphenonmenal side-ef
On Tue, Mar 18, 2008 at 5:59 PM, Peter A. Felvegi
<[EMAIL PROTECTED]> wrote:
> hello,
> void vp(const char* fmt, va_list args)
> {
> vprintf(fmt, args);
> vprintf(fmt, args);
> }
You need va_copy there. Yes that is C99 only but it is required still.
-- Pinski
hello,
please try the little program at the end. my naive assumption was that
it will print "hello world" two times.
if compiled with gcc 3.4, 4.1, 4.2 or 4.3 for i386, it will print "hello
world" two times all right.
however, if compiled with 3.3, 3.4, 4.1 or 4.3 for amd64, the second
time it w
On Tue, 2008-03-18 at 16:23 -0700, David Daney wrote:
> James Murray wrote:
>
> > I have attempted to build gcc-4.3.0 with --target=m6812-elf and using
> > plain binutils-2.18 built with the same target, prefix and program
> > prefix as gcc, however gcc fails:
> > ../../../gcc-4.3.0/libgcc/../gcc
James Murray wrote:
I have attempted to build gcc-4.3.0 with --target=m6812-elf and using
plain binutils-2.18 built with the same target, prefix and program
prefix as gcc, however gcc fails:
../../../gcc-4.3.0/libgcc/../gcc/libgcc2.c: In function ‘__negdi2’:
../../../gcc-4.3.0/libgcc/../gcc/libg
(First post to gcc mailing list)
I have been making use of the Freescale (Motorola) HC11/12 functionality
within gcc and binutils on the 9S12C64 target.
I plan to extend gcc to cover the newer S12X CPU as the existing
compiler only utilises the S12 subset. Is anyone working on this
presently?
H
Hi Joern,
Thanks for the answer,
Joern Rennecke <[EMAIL PROTECTED]> writes:
>> 1) Is it possible to have a MODE_PARTIAL_INT inner register that is bigger
>> than a word?
>
> Yes. You might have a 20 bit register, which is considered Pmode == PHImode,
> with a lower half QImode (16 bit, word add
Hello All,
in gcc/Makefile.in there are many different *CFLAGS, notablye
ALL_CFLAGS = $(X_CFLAGS) $(T_CFLAGS) \
$(CFLAGS) $(INTERNAL_CFLAGS) $(COVERAGE_FLAGS) $(WARN_CFLAGS)
$(XCFLAGS) @DEFS@
Do anyone have a precise idea of what all these *CFLAGS are exactly for?
(I guessed a bit some of t
On Tue, Mar 18, 2008 at 6:40 PM, Boris Boesler <[EMAIL PROTECTED]> wrote:
> Am 18.03.2008 um 16:21 schrieb Jim Wilson:
>
> > Boris Boesler wrote:
> >> The following code generators use FOR_EACH_BB[_REVERSE] in the
> >> target machine dependent reorg pass:
> >> - bfin
> >> - frv
> >>
Am 18.03.2008 um 16:21 schrieb Jim Wilson:
Boris Boesler wrote:
The following code generators use FOR_EACH_BB[_REVERSE] in the
target machine dependent reorg pass:
- bfin
- frv
- ia64
- mt
- s390
The very first thing that ia64_reorg does is
compute_bb_for_insn ();
F
Bernd Schmidt <[EMAIL PROTECTED]> writes:
> Ian Lance Taylor wrote:
>> Boris Boesler <[EMAIL PROTECTED]> writes:
>>
>>> The following code generators use FOR_EACH_BB[_REVERSE] in the
>>> target machine dependent reorg pass:
>>> - bfin
>>> - frv
>>> - ia64
>>> - mt
>>> - s390
>
Ian Lance Taylor wrote:
Boris Boesler <[EMAIL PROTECTED]> writes:
The following code generators use FOR_EACH_BB[_REVERSE] in the
target machine dependent reorg pass:
- bfin
- frv
- ia64
- mt
- s390
Are these invalid code generators then? Or are we talki
Intel will publish spec for Intel AVX at IDF in April:
http://www.intel.com/pressroom/archive/releases/20080317fact.htm?iid=pr1_releasepri_20080317fact
Intel AVX: The next step in the Intel instruction set -- Gelsinger
also discussed Intel AVX (Advanced Vector Extensions) which, when used
by soft
Boris Boesler wrote:
The following code generators use FOR_EACH_BB[_REVERSE] in the target
machine dependent reorg pass:
- bfin
- frv
- ia64
- mt
- s390
The very first thing that ia64_reorg does is
compute_bb_for_insn ();
Just taking a quick look, I don't see any bb us
Boris Boesler <[EMAIL PROTECTED]> writes:
> The following code generators use FOR_EACH_BB[_REVERSE] in the
> target machine dependent reorg pass:
> - bfin
> - frv
> - ia64
> - mt
> - s390
> Are these invalid code generators then? Or are we talking about
> different
David Daney <[EMAIL PROTECTED]> writes:
> Ian Lance Taylor wrote:
>> GCC has been approved as a supported project for Google's Summer of
>> Code 2008. Summer of Code is a program in which Google pays students
>> to work on open source projects.
>>
> Perhaps a bit off topic, but on the GCC page
Ian Lance Taylor wrote:
GCC has been approved as a supported project for Google's Summer of
Code 2008. Summer of Code is a program in which Google pays students
to work on open source projects.
Perhaps a bit off topic, but on the GCC page:
http://code.google.com/soc/2008/gcc/about.html
The
NightStrike <[EMAIL PROTECTED]> writes:
> On 3/17/08, Ian Lance Taylor <[EMAIL PROTECTED]> wrote:
>> If you are interested, please sign up at
>>http://code.google.com/soc/mentor_step1.html
>> You will need to have a gmail.com account.
>
> How does someone become a student for the gcc project i
On 18/03/2008, NightStrike <[EMAIL PROTECTED]> wrote:
> On 3/17/08, Ian Lance Taylor <[EMAIL PROTECTED]> wrote:
> > If you are interested, please sign up at
> >http://code.google.com/soc/mentor_step1.html
> > You will need to have a gmail.com account.
>
> How does someone become a student f
[EMAIL PROTECTED] wrote on 17/03/2008 21:08:43:
> It might be nice to think about an option that automatically aligns large
> arrays without having to do the declaration (or even have the vectorizer
> override the alignment for statics/auto).
The vectorizer is already doing this.
Ira
>
> --
>
[EMAIL PROTECTED] wrote on 17/03/2008 19:33:23:
> I have looked more closely at the messages generated by the gcc 4.3
> vectorizer
> and it seems that they fall into two categories:
>
> 1) complaining about aligmnent.
>
> For example:
>
> Unknown alignment for access: D.33485
> Unknown alignment
Am 17.03.2008 um 17:45 schrieb Jim Wilson:
Boris Boesler wrote:
But some basic blocks seem to point to insns which are not in the
insn-list. I had a short look at dbr_schedule() in reorg.c and the
basic blocks are not updated. Are they evaluated in a later pass?
No. See pass_free_cfg, wh
On 3/17/08, Ian Lance Taylor <[EMAIL PROTECTED]> wrote:
> If you are interested, please sign up at
>http://code.google.com/soc/mentor_step1.html
> You will need to have a gmail.com account.
How does someone become a student for the gcc project instead of a mentor?
Eric Fisher wrote:
hi
I'm not clear why we have 'udiv', but don't have 'umul' for Standard
Pattern Names. Does I need to define a nameless pattern for it?
Because non-widening multiplication is the same for signed and unsigned.
We have:
mul3
mul3 (signed x signed)
umul3 (u
hi
I'm not clear why we have 'udiv', but don't have 'umul' for Standard
Pattern Names. Does I need to define a nameless pattern for it?
Thanks in advance.
eric
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