What is the canonical mapping between DWARF register numbers and MIPS32
CPU registers, please? The first 32 ones are the general purpose
registers, but what about beyond that (e. g. lo/hi)?
A link to an authoritative document would be most welcome. DWARF proper
doesn't document this kind of th
ually contains the code to handle various
targets, probably in a file named “gdb/mips*tdep.h”.
Cheers, John D.
*From:* Dwarf-discuss
*On
Behalf Of *Seva Alekseyev via Dwarf-discuss
*Sent:* Wednesday, August 16, 2023 11:23 AM
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*Subject:* [Dwarf-discuss]
