Thanks, better than nothing. Can't be complete though - it only has
space for 35 FP registers, while there is a flavor of MIPS out there
with 64.
On 8/16/2023 11:37 AM, John DelSignore wrote:
If you can’t find it in an ABI document… You might want to look at the
GDB sources, which usually contains the code to handle various
targets, probably in a file named “gdb/mips*tdep.h”.
Cheers, John D.
*From:* Dwarf-discuss
<dwarf-discuss-bounces+jdelsignore=perforce....@lists.dwarfstd.org>*On
Behalf Of *Seva Alekseyev via Dwarf-discuss
*Sent:* Wednesday, August 16, 2023 11:23 AM
*To:* dwarf-discuss@lists.dwarfstd.org
*Subject:* [Dwarf-discuss] DWARF register numbers on MIPS
What is the canonical mapping between DWARF register numbers and
MIPS32 CPU registers, please? The first 32 ones are the general
purpose registers, but what about beyond that (e. g. lo/hi)?
A link to an authoritative document would be most welcome. DWARF
proper doesn't document this kind of thing, it's usually a part of the
ABI, but the ABI handbook doesn't seem to mention DWARF.
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