What is the canonical mapping between DWARF register numbers and MIPS32
CPU registers, please? The first 32 ones are the general purpose
registers, but what about beyond that (e. g. lo/hi)?
A link to an authoritative document would be most welcome. DWARF proper
doesn't document this kind of thing, it's usually a part of the ABI, but
the ABI handbook doesn't seem to mention DWARF.
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