>### Section 2.5.1.7 Special Operations, p.37
>
>The first sentence of the description of DW_OP_entry_value reads:
>
>The DW_OP_entry_value operation pushes the value that the described
>location held upon entering the current subprogram.
>
>A DWARF expression does not describe a location,
Hello Ben,
An array type that refers to a vector or matrix type, shall be
denoted with DW_AT_tensor whose integer constant, will specify the
kind of tensor it is. The default type of tensor shall be the kind
used by the vector registers in the target architecture.
Table 5.
Hello Jakub, Ben,
>On Wed, Apr 05, 2023 at 07:16:35PM -0700, Ben Woodard via Dwarf-discuss wrote:
>> To distinguish these vector types from regular C arrays, GCC's DWARF
>> describes a vector type as an array with the DW_AT_GNU_vector
>> attribute. Clang also supports the GCC vector extensions, a
Hello Ben,
>This is version 2 of my vector types submission.
>
>Differences from V1:
>- Made the submission about vector types rather than vector registers.
>- Substituted Pedro's much better introduction for my own with minor edits.
>- Removed the modifications to the DWARF Stack. The AMD people
AFAIK the main reason to annotate a subprogram with a calling convention
is so that a debugger can manufacture a call correctly, in response to a
user command.
Right - and generally the debugger would expect to call this function using the
ABI - except that with internalized functions (either sta
Hello Michael,
Sorry for the late reply. I found the email in the spam folder today.
> >>> We'd also want an unbounded piece operator to describe partially
> registerized
> >>> unbounded arrays, but I have not worked that out in detail, yet, and
> >>> we're a
> bit
> >>> farther away from an im
Hello Michael,
> > I have a write-up ready but wanted to wait until we have a public
> implementation.
> > Is that the right order? Or would you rather want to review proposals right
> away.
>
> I'm not sure what a SIMD lane is. There are a number of architectures
> which support SIMD, such as
Hello Todd,
> They use DW_AT_address_class with a CUDA-specific enum of address spaces,
> with
> values for things like: global memory, shared memory, const memory, etc. They
> don't attach these attributes to subroutines, because all the code on that
> architecture is in a single "code" memory.
Hello Michael,
> https://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html
> >
> > AFAIK, these changes will be made to LLVM and there is interest in adding to
> the DWARF standard eventually.
>
> As mentioned in the past, I would be pleased to see proposals submitted
> for these ch
Hello Michael,
> > What would be the recommended way to model variables that are allocated
> > to different address spaces?
>
> Can you describe the architecture a bit?
It's a GPU. It uses a different address space for shared local memory.
> > I found DW_OPT_xderef for dereferencing address-s
Hello,
What would be the recommended way to model variables that are allocated to
different address spaces?
I found DW_OPT_xderef for dereferencing address-space qualified pointers but
the resulting memory location description wouldn’t have an address-space
qualifier.
I found DW_AT_address_cl
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