Hello Ben,
An array type that refers to a vector or matrix type, shall be
denoted with DW_AT_tensor whose integer constant, will specify the
kind of tensor it is. The default type of tensor shall be the kind
used by the vector registers in the target architecture.
Table 5.4: Tensor attribute values
------------------------------------------------------------------
Name | Meaning
------------------------------------------------------------------
DW_TENSOR_default | Default encoding and semantics used by target
| architecture's vector registers
DW_TENSOR_boolean | Boolean vectors map to vector mask registers.
DW_TENSOR_opencl | OpenCL vector encoding and semantics
DW_TENSOR_neon | NEON vector encoding and semantics
DW_TENSOR_sve | SVE vector encoding and semantics
------------------------------------------------------------------
The width and when applicable the number of rows of the type
shall be specified as array dimensions. The type contained
within the tensor array type must be a DW_TAG_base_type entry.
I don’t think this should refer to h/w registers, at all. It describes a
source language type.
Looking at the CLANG table, they may allow different notation, e.g. OpenCL, and
they seem
to allow different operations.
I’m also not clear what the default encoding and semantics of e.g. YMM
registers are.
Regards,
Markus.
Intel Deutschland GmbH
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