Hello Michael, > https://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html > > > > AFAIK, these changes will be made to LLVM and there is interest in adding to > the DWARF standard eventually. > > As mentioned in the past, I would be pleased to see proposals submitted > for these changes.
I also have a small proposal for describing locations as function of the SIMD lane by adding a DW_OP_push_simd_lane operator and introducing stack variants for piece operators. I have a write-up ready but wanted to wait until we have a public implementation. Is that the right order? Or would you rather want to review proposals right away. We'd also want an unbounded piece operator to describe partially registerized unbounded arrays, but I have not worked that out in detail, yet, and we're a bit farther away from an implementation. Regards, Markus. Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Gary Kershaw Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 _______________________________________________ Dwarf-Discuss mailing list Dwarf-Discuss@lists.dwarfstd.org http://lists.dwarfstd.org/listinfo.cgi/dwarf-discuss-dwarfstd.org
