Re: x86_64 port and BSP (GSoC 2018)

On Mon, May 14, 2018 at 9:37 PM, Joel Sherrill wrote: > > > On Mon, May 14, 2018 at 10:20 AM, Gedare Bloom wrote: >> >> On Mon, May 14, 2018 at 9:30 AM, Sebastian Huber >> wrote: >> > On 14/05/18 15:20, Amaan Cheval wrote: >> >> >> >> For now, do we all agree to x86_64 as the arch, and x86_64_ge

Re: x86_64 port and BSP (GSoC 2018)

On Mon, May 14, 2018 at 10:20 AM, Gedare Bloom wrote: > On Mon, May 14, 2018 at 9:30 AM, Sebastian Huber > wrote: > > On 14/05/18 15:20, Amaan Cheval wrote: > >> > >> For now, do we all agree to x86_64 as the arch, and x86_64_generic as > the > >> BSP? > > > > > > I would drop the _generic. I do

Re: x86_64 port and BSP (GSoC 2018)

On Mon, May 14, 2018 at 9:30 AM, Sebastian Huber wrote: > On 14/05/18 15:20, Amaan Cheval wrote: >> >> For now, do we all agree to x86_64 as the arch, and x86_64_generic as the >> BSP? > > > I would drop the _generic. I don't think there will be a non-generic BSP on > this architecture. > I agree

Re: x86_64 port and BSP (GSoC 2018)

On 14/05/18 15:20, Amaan Cheval wrote: For now, do we all agree to x86_64 as the arch, and x86_64_generic as the BSP? I would drop the _generic. I don't think there will be a non-generic BSP on this architecture. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puch

Re: x86_64 port and BSP (GSoC 2018)

On Mon, May 14, 2018 at 6:08 PM, Sebastian Huber wrote: > On 14/05/18 14:34, Joel Sherrill wrote: >> >> >> >> On Mon, May 14, 2018, 7:12 AM Sebastian Huber >> > > wrote: >> >> On 14/05/18 14:09, Joel Sherrill wrote: >> > On Mon, May 14, 2018, 7:07

Re: x86_64 port and BSP (GSoC 2018)

On 14/05/18 14:34, Joel Sherrill wrote: On Mon, May 14, 2018, 7:12 AM Sebastian Huber > wrote: On 14/05/18 14:09, Joel Sherrill wrote: > On Mon, May 14, 2018, 7:07 AM Sebastian Huber > mailto:sebastian.hu...@embedded-brains.de> >

Re: x86_64 port and BSP (GSoC 2018)

On Mon, May 14, 2018, 7:12 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 14/05/18 14:09, Joel Sherrill wrote: > > On Mon, May 14, 2018, 7:07 AM Sebastian Huber > > > > wrote: > > > > On 14/05/18 13:14, Amaan Cheval wrote: > >

Re: x86_64 port and BSP (GSoC 2018)

On 14/05/18 14:09, Joel Sherrill wrote: On Mon, May 14, 2018, 7:07 AM Sebastian Huber > wrote: On 14/05/18 13:14, Amaan Cheval wrote: > Regarding naming, how about we settle on something like > "bsps/amd64/amd64_generic", borrowing from how

Re: x86_64 port and BSP (GSoC 2018)

On Mon, May 14, 2018, 7:07 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 14/05/18 13:14, Amaan Cheval wrote: > > Regarding naming, how about we settle on something like > > "bsps/amd64/amd64_generic", borrowing from how the riscv target is > > structured? > > In case you wan

Re: x86_64 port and BSP (GSoC 2018)

On 14/05/18 13:14, Amaan Cheval wrote: Regarding naming, how about we settle on something like "bsps/amd64/amd64_generic", borrowing from how the riscv target is structured? In case you want to name the new architecture "amd64", then the tool chain should be renamed as well, currently we have

Re: x86_64 port and BSP (GSoC 2018)

Regarding naming, how about we settle on something like "bsps/amd64/amd64_generic", borrowing from how the riscv target is structured? On Tue, May 8, 2018 at 9:02 AM, Chris Johns wrote: > On 05/05/2018 04:07, Amaan Cheval wrote: >> On Fri, May 4, 2018 at 7:03 AM Chris Johns wrote: >> >>> On 03/0

Re: x86_64 port and BSP (GSoC 2018)

On 05/05/2018 04:07, Amaan Cheval wrote: > On Fri, May 4, 2018 at 7:03 AM Chris Johns wrote: > >> On 03/05/2018 17:09, Amaan Cheval wrote: >>> On Thu, May 3, 2018 at 5:56 AM Chris Johns wrote: >>> On 01/05/2018 23:09, Amaan Cheval wrote: > Quick update: My x86_64 stub port compiles and

Re: x86_64 port and BSP (GSoC 2018)

On Fri, May 4, 2018 at 7:03 AM Chris Johns wrote: > On 03/05/2018 17:09, Amaan Cheval wrote: > > On Thu, May 3, 2018 at 5:56 AM Chris Johns wrote: > > > >> On 01/05/2018 23:09, Amaan Cheval wrote: > >>> Quick update: My x86_64 stub port compiles and can be linked to all > > default > >>> tests n

Re: x86_64 port and BSP (GSoC 2018)

On 03/05/2018 17:09, Amaan Cheval wrote: > On Thu, May 3, 2018 at 5:56 AM Chris Johns wrote: > >> On 01/05/2018 23:09, Amaan Cheval wrote: >>> Quick update: My x86_64 stub port compiles and can be linked to all > default >>> tests now! _dance_ >>> >>> I've pushed the stub port for the x86_64 to m

Re: x86_64 port and BSP (GSoC 2018)

On Thu, May 3, 2018 at 5:56 AM Chris Johns wrote: > On 01/05/2018 23:09, Amaan Cheval wrote: > > Quick update: My x86_64 stub port compiles and can be linked to all default > > tests now! _dance_ > > > > I've pushed the stub port for the x86_64 to my fork on Github; the commits > > are horribly m

Re: x86_64 port and BSP (GSoC 2018)

On 01/05/2018 23:09, Amaan Cheval wrote: > Quick update: My x86_64 stub port compiles and can be linked to all default > tests now! _dance_ > > I've pushed the stub port for the x86_64 to my fork on Github; the commits > are horribly messy (I did most of the work aiming for the stub to be one > co

Re: x86_64 port and BSP (GSoC 2018)

Quick update: My x86_64 stub port compiles and can be linked to all default tests now! _dance_ I've pushed the stub port for the x86_64 to my fork on Github; the commits are horribly messy (I did most of the work aiming for the stub to be one commit, then later I realized several commits would mak

Re: GSoC 2018 project announced

gt; > Thank you for letting me have this wonderful opportunity to work with > RTEMS > > under the GSoC 2018 program!! > > > > I would like to ask about the instructions regarding the program that I > need > > to follow to get started properly, (like adding t

Re: GSoC 2018 project announced

All students should have received an email from me today about how to proceed. On Mon, Apr 23, 2018 at 5:43 PM, Vijay Kumar Banerjee wrote: > Hello mentors, > > Thank you for letting me have this wonderful opportunity to work with RTEMS > under the GSoC 2018 program!! > > I

GSoC 2018 project announced

Hello mentors, Thank you for letting me have this wonderful opportunity to work with RTEMS under the GSoC 2018 program!! I would like to ask about the instructions regarding the program that I need to follow to get started properly, (like adding the project to the GSoC tracking page ) -- vijay

Re: MMU was Re: Contribute to a project under GSOC 2018

at 12:47 AM, Gedare Bloom >>>> wrote: >>>> >>>>> high-level comments: >>>>> >>>>> * add citations to relevant literature that you used for inspiration. >>>>> * start to write a design plan for the bsp-level framework you

Re: x86_64 port and BSP (GSoC 2018)

That definitely makes sense, yes. I'll look into the parts we need for ACPI and how we can match them up to ACPICA. I've added it to my proposal as a reminder / roadmap item of sorts for something to evaluate in during phase 1, since I believe the essential bits of ACPI will be involved during init

Re: x86_64 port and BSP (GSoC 2018)

On Fri, Apr 6, 2018 at 3:09 PM, Amaan Cheval wrote: > Thanks for sharing your thoughts! I did have a brief look since it's > mentioned in the original ticket, but I've left it in the bonus features > since from what I understand, a lot of the ACPI features to be implemented > are not really essen

Re: x86_64 port and BSP (GSoC 2018)

Thanks for sharing your thoughts! I did have a brief look since it's mentioned in the original ticket, but I've left it in the bonus features since from what I understand, a lot of the ACPI features to be implemented are not really essential. It should definitely be a resource to consider for the f

Re: x86_64 port and BSP (GSoC 2018)

I hate to pile on late but following the link to osdev.org in an earlier message led me to Google for something like Intel's reference implementation. https://github.com/acpica This os_specific directory has adapters for Linux, BSD, and Windows. I don't think there are that many methods in the OS

Re: x86_64 port and BSP (GSoC 2018)

Status update time! # Completed: [x] Get my QEMU environment setup - Documented on the RTEMS wiki[1] [x] Read more of RTEMS' no_cpu code, and the BSP porting guide - Read most of the guide - things have been in flux with the refactorings, but I think most of it makes sense, especially af

Re: MMU was Re: Contribute to a project under GSOC 2018

RTEMS. >>> * link to this google doc as your "Draft" from your GSoC application, >>> and also upload an initial "Final" pdf, which you can continue to >>> revise. >>> >>> Gedare >>> >>> On Fri, Mar 16, 2018 at 2:48 PM

Fwd: GSoC 2018 Student Applications have closed

arded message -- From: 'Stephanie' via Google Summer of Code Discuss < google-summer-of-code-disc...@googlegroups.com> Date: Tue, Mar 27, 2018 at 11:45 AM Subject: GSoC 2018 Student Applications have closed To: Google Summer of Code Discuss < google-summer-of-code-disc...@go

Review My Gsoc 2018 Proposal

Hello Developers This is link to my proposal https://docs.google.com/document/d/15aUQShwRzIOQQoNAGV9jjeJ1Q2CHLcv_icamEqrTORE/edit?ts=5ab23139 As deadline is tomorrow so can you please review it for the last time and if needed suggest me the changes. Thanks & regards, Salil Sirotia, _

Re: x86_64 port and BSP (GSoC 2018)

Brilliant, I think that resolves it all. Let me know if you have any other questions I may have missed or anything is unclear, though! My next steps are: - Get my QEMU environment setup with OVMF and document it on the wiki - Continue to read Intel's manual on system programming (volume 3) - Read

Re: x86_64 port and BSP (GSoC 2018)

On 26/03/2018 14:49, Amaan Cheval wrote: > Hi! > > Thanks for your comments on the document, by the way. Regarding the > following comment: > >> We should support multiboot as well for legacy X86 BIOSes. There are > headers about that can do this. > > This is a great point - this way legacy BIOS

Re: x86_64 port and BSP (GSoC 2018)

Hi! Thanks for your comments on the document, by the way. Regarding the following comment: > We should support multiboot as well for legacy X86 BIOSes. There are headers about that can do this. This is a great point - this way legacy BIOSes only need something like GRUB (or a bootloader implemen

Re: x86_64 port and BSP (GSoC 2018)

On 20/03/2018 18:10, Amaan Cheval wrote: > On Tue, Mar 20, 2018 at 11:44 AM Chris Johns wrote: >> On 20/03/2018 16:21, Amaan Cheval wrote: >>> On Tue, Mar 20, 2018 at 8:23 AM Chris Johns wrote: On 19/03/2018 18:36, Amaan Cheval wrote: >>> (Assuming that by tables you meant the Local Vector T

Re: MMU was Re: Contribute to a project under GSOC 2018

>> and also upload an initial "Final" pdf, which you can continue to >> revise. >> >> Gedare >> >> On Fri, Mar 16, 2018 at 2:48 PM, Abhinav Jain >> wrote: >> > Sir, >> > >> > I have prepared a draft proposal for GSoC

Re: x86_64 port and BSP (GSoC 2018)

On Tue, Mar 20, 2018 at 11:44 AM Chris Johns wrote: > On 20/03/2018 16:21, Amaan Cheval wrote: > > On Tue, Mar 20, 2018 at 8:23 AM Chris Johns wrote: > > > >> On 19/03/2018 18:36, Amaan Cheval wrote: > >>> Thanks for checking the tool status! > >>> > >>> TLS support for the tool seems okay to me

Re: x86_64 port and BSP (GSoC 2018)

On 20/03/2018 16:21, Amaan Cheval wrote: > On Tue, Mar 20, 2018 at 8:23 AM Chris Johns wrote: > >> On 19/03/2018 18:36, Amaan Cheval wrote: >>> Thanks for checking the tool status! >>> >>> TLS support for the tool seems okay to me as well - I see the TLS > program header >>> and the "T" flag for

Re: x86_64 port and BSP (GSoC 2018)

On Tue, Mar 20, 2018 at 8:23 AM Chris Johns wrote: > On 19/03/2018 18:36, Amaan Cheval wrote: > > Thanks for checking the tool status! > > > > TLS support for the tool seems okay to me as well - I see the TLS program header > > and the "T" flag for the ".tbss" section header, as you'd expect in t

Re: x86_64 port and BSP (GSoC 2018)

On 19/03/2018 18:36, Amaan Cheval wrote: > Thanks for checking the tool status! > > TLS support for the tool seems okay to me as well - I see the TLS program > header > and the "T" flag for the ".tbss" section header, as you'd expect in the ELF. I > haven't looked into the run-time support for TL

Re: x86_64 port and BSP (GSoC 2018)

Thanks for checking the tool status! TLS support for the tool seems okay to me as well - I see the TLS program header and the "T" flag for the ".tbss" section header, as you'd expect in the ELF. I haven't looked into the run-time support for TLS in RTEMS yet - is there something I need to dig into

Re: x86_64 port and BSP (GSoC 2018)

On Mar 18, 2018 5:37 AM, "Gedare Bloom" wrote: On Sat, Mar 17, 2018 at 2:32 PM, Joel Sherrill wrote: > > > On Sat, Mar 17, 2018 at 1:09 PM, Gedare Bloom wrote: >> >> On Sat, Mar 17, 2018 at 11:58 AM, Amaan Cheval >> wrote: >> > First off, thank you so much for the prompt and detailed response!

Re: x86_64 port and BSP (GSoC 2018)

On Sat, Mar 17, 2018 at 2:32 PM, Joel Sherrill wrote: > > > On Sat, Mar 17, 2018 at 1:09 PM, Gedare Bloom wrote: >> >> On Sat, Mar 17, 2018 at 11:58 AM, Amaan Cheval >> wrote: >> > First off, thank you so much for the prompt and detailed response! I >> > really >> > appreciate the help! >> > >>

Re: x86_64 port and BSP (GSoC 2018)

On Sat, Mar 17, 2018 at 1:09 PM, Gedare Bloom wrote: > On Sat, Mar 17, 2018 at 11:58 AM, Amaan Cheval > wrote: > > First off, thank you so much for the prompt and detailed response! I > really > > appreciate the help! > > > > On Sat, Mar 17, 2018 at 6:46 PM Gedare Bloom wrote: > > > >> On Sat,

Re: x86_64 port and BSP (GSoC 2018)

On Sat, Mar 17, 2018 at 11:58 AM, Amaan Cheval wrote: > First off, thank you so much for the prompt and detailed response! I really > appreciate the help! > > On Sat, Mar 17, 2018 at 6:46 PM Gedare Bloom wrote: > >> On Sat, Mar 17, 2018 at 2:24 AM, Amaan Cheval > wrote: >> > Hey everyone! >> > >

Re: x86_64 port and BSP (GSoC 2018)

First off, thank you so much for the prompt and detailed response! I really appreciate the help! On Sat, Mar 17, 2018 at 6:46 PM Gedare Bloom wrote: > On Sat, Mar 17, 2018 at 2:24 AM, Amaan Cheval wrote: > > Hey everyone! > > > > Here's a link to a draft of my proposal (also shared through the

Re: x86_64 port and BSP (GSoC 2018)

On Sat, Mar 17, 2018 at 2:24 AM, Amaan Cheval wrote: > Hey everyone! > > Here's a link to a draft of my proposal (also shared through the GSoC > website, and linked to on the wiki): > https://docs.google.com/document/d/1X79Yj0DNqvaDFqpJMUX4gF3WC550GDvVDS5QufvAnFE/edit?usp=sharing > > I'd appreciat

Re: MMU was Re: Contribute to a project under GSOC 2018

t;Draft" from your GSoC application, > and also upload an initial "Final" pdf, which you can continue to > revise. > > Gedare > > On Fri, Mar 16, 2018 at 2:48 PM, Abhinav Jain > wrote: > > Sir, > > > > I have prepared a draft proposal for GSoC 2018 as

x86_64 port and BSP (GSoC 2018)

Hey everyone! Here's a link to a draft of my proposal (also shared through the GSoC website, and linked to on the wiki): https://docs.google.com/document/d/1X79Yj0DNqvaDFqpJMUX4gF3WC550GDvVDS5QufvAnFE/edit?usp=sharing I'd appreciate all comments - even if you're just skimming, let me know if you

Re: MMU was Re: Contribute to a project under GSOC 2018

architectures on the main site above. It would likely be a good source reference for MMU handling. It will be static after initialization. --joel Gedare On Fri, Mar 16, 2018 at 2:48 PM, Abhinav Jain wrote: > Sir, > > I have prepared a draft proposal for GSoC 2018 as suggested by you. >

Re: MMU was Re: Contribute to a project under GSOC 2018

your GSoC application, and also upload an initial "Final" pdf, which you can continue to revise. Gedare On Fri, Mar 16, 2018 at 2:48 PM, Abhinav Jain wrote: > Sir, > > I have prepared a draft proposal for GSoC 2018 as suggested by you. > I request you to please guide me whether

Re: Gsoc 2018

, should be a good start. On Mar 16, 2018 1:58 PM, "Aditya Upadhyay" wrote: > Hi Joel, > > I am sharing one spreadsheet to Salil what you had shared with me last > year. It will also help him to identify the works that need to be included > as a > part of GSoC-2018. >

Re: MMU was Re: Contribute to a project under GSOC 2018

Sir, I have prepared a draft proposal for GSoC 2018 as suggested by you. I request you to please guide me whether I have made it correctly or not, whether I have written some big plans or more things can be included. The link for the Proposal is: https://docs.google.com/document/d

Re: Gsoc 2018

any > library or some of the functions that is needed to port to newlib? Any > response from your side would be > greatly appreciated. > > That would be great and easy start for me towards GSoC-2018. > > Thanks & regards, > Salil Sirotia, &

Gsoc 2018

great and easy start for me towards GSoC-2018. Thanks & regards, Salil Sirotia, Mtech,CSE-IS(Final Year), IIT(ISM),Dhanbad ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

I like the sound of that! One quick question. > ...to get it running on qemu. Real HW would be a sanity check. What kind of real hardware would I need? I do have an x86 64-bit processor as my primary computer, and likely one on spare / abandoned devices too (though I'll need to confirm). Is there

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On Mar 13, 2018 1:36 AM, "Sebastian Huber" < sebastian.hu...@embedded-brains.de> wrote: On 12/03/18 21:20, Gedare Bloom wrote: > Since I'm pretty keen on RTEMS, I think I'll have a 2nd proposal too, which >> I'll decide and discuss with you guys soon, hopefully! (Perhaps the >> tracing >> or the

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On 12/03/18 21:20, Gedare Bloom wrote: Since I'm pretty keen on RTEMS, I think I'll have a 2nd proposal too, which I'll decide and discuss with you guys soon, hopefully! (Perhaps the tracing or the APA scheduling projects). That's fine. I don't think APA by itself is enough for the summer.

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On Mon, Mar 12, 2018 at 3:20 PM, Gedare Bloom wrote: > On Mon, Mar 12, 2018 at 12:41 PM, Amaan Cheval > wrote: > > On Mon, Mar 12, 2018 at 9:53 PM Gedare Bloom wrote: > > > >> On Mon, Mar 12, 2018 at 3:01 AM, Sebastian Huber > >> wrote: > >> > On 10/03/18 18:02, Amaan Cheval wrote: > >> >> > >

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On Mon, Mar 12, 2018 at 12:41 PM, Amaan Cheval wrote: > On Mon, Mar 12, 2018 at 9:53 PM Gedare Bloom wrote: > >> On Mon, Mar 12, 2018 at 3:01 AM, Sebastian Huber >> wrote: >> > On 10/03/18 18:02, Amaan Cheval wrote: >> >> >> >> - Improve RTEMS SMP[3] >> >> >> >> What kinds of improvements to SMP

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On Mon, Mar 12, 2018 at 9:53 PM Gedare Bloom wrote: > On Mon, Mar 12, 2018 at 3:01 AM, Sebastian Huber > wrote: > > On 10/03/18 18:02, Amaan Cheval wrote: > >> > >> - Improve RTEMS SMP[3] > >> > >> What kinds of improvements to SMP are we considering? > > > > > > The SMP support is quite complet

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On Mon, Mar 12, 2018 at 3:01 AM, Sebastian Huber wrote: > On 10/03/18 18:02, Amaan Cheval wrote: >> >> - Improve RTEMS SMP[3] >> >> What kinds of improvements to SMP are we considering? > > > The SMP support is quite complete now. In general, an independent review is > required, but this is probab

Re: GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

On 10/03/18 18:02, Amaan Cheval wrote: - Improve RTEMS SMP[3] What kinds of improvements to SMP are we considering? The SMP support is quite complete now. In general, an independent review is required, but this is probably not a GSoC project. Some areas in the implementation are a bit too co

GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

Hi! I've introduced myself in the past, but just to reiterate; I'm a final year Bachelor's in Engineering student at Thakur College of Engineering, in Mumbai. I work part-time on an Intel x86 emulator, written primarily in C and JavaScript (that's right :P) - we also have a JIT compiler for x86->W

Re: Gsoc 2018

h the RSB for every architecture you > add fenv.h support to. Because you have to know it compiles. :) > > --joel > > On Thu, Mar 8, 2018 at 2:20 PM, Joel Sherrill wrote: >> >> >> >> On Thu, Mar 8, 2018 at 1:27 PM, Salil Sirotia >> wrote: >>&

Re: Gsoc 2018

; Hello Developers, >> >> This is Salil Sirotia, Doing Masters from Indian Institute of >> Technology, Dhanbad. I want to participate in GSoC 2018 at your >> organization. >> > > Hi.. I assume you have been talking to Aditya. :) > >> >> >> I have

Re: Gsoc 2018

On Thu, Mar 8, 2018 at 1:27 PM, Salil Sirotia wrote: > > Hello Developers, > > This is Salil Sirotia, Doing Masters from Indian Institute of > Technology, Dhanbad. I want to participate in GSoC 2018 at your > organization. > Hi.. I assume you have been talking to Aditya.

Re: MMU was Re: Contribute to a project under GSOC 2018

eresting. I studied about POSIX, >> > MMU >> > support in various other architecture and the memory protection APIs in >> > various operating systems.I have been discussing the same on the mailing >> > list. >> > I also solved an issue (#2522) around a

Re: MMU was Re: Contribute to a project under GSOC 2018

> > support in various other architecture and the memory protection APIs in >> > various operating systems.I have been discussing the same on the mailing >> > list. >> > I also solved an issue (#2522) around a week ago to gain some hands-on >> > code. >

Re: MMU was Re: Contribute to a project under GSOC 2018

> I also solved an issue (#2522) around a week ago to gain some hands-on > code. > > > > > > Welcome aboard. > > > > > > I would like to work on the Memory Protection project under GSOC 2018, > so I > > request you to please guide me regarding the steps to be

Re: MMU was Re: Contribute to a project under GSOC 2018

ion APIs in > various operating systems.I have been discussing the same on the mailing > list. > I also solved an issue (#2522) around a week ago to gain some hands-on code. > > > Welcome aboard. > > > I would like to work on the Memory Protection project under GSOC 2018,

MMU was Re: Contribute to a project under GSOC 2018

sue (#2522) around a week ago to gain some hands-on code. Welcome aboard. I would like to work on the Memory Protection project under GSOC 2018, so I request you to please guide me regarding the steps to be followed. Gedare conceived of what's there be so I cc'ed him. My recollectio

Contribute to a project under GSOC 2018

would like to work on the Memory Protection project under GSOC 2018, so I request you to please guide me regarding the steps to be followed. Thanks and Regards Abhinav Jain ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: GSoC 2018 (was: Re: devel Digest, Vol 75, Issue 41)

ards Christian Mauderer > > Message: 1 > Date: Thu, 22 Feb 2018 15:48:52 +0100 > From: Christian Mauderer <mailto:christian.maude...@embedded-brains.de>> > To: devel@rtems.org <mailto:devel@rtems.org> > Subject: Re: GSOC 2018 > Message-ID: &

Re: GSOC 2018

Am 22.02.2018 um 03:35 schrieb Salil Sirotia: > Hi all, > > My name is Salil Sirotia and I'd like to be a part of RTEMS project for GSoC > 2018. > > As of now, I have gone through 'Getting Started documentation' > available on the devel.rteme.org <http://

Re: GSoC 2018 Candidate (Patch and screenshot for hello world example)

amples/hello/init.c 2018-01-07 22:57:48.503225287 > +0530 > @@ -22,7 +22,8 @@ static rtems_task Init( > { >rtems_print_printer_fprintf_putc(&rtems_test_printer); >TEST_BEGIN(); > - printf( "Hello World\n" ); > + printf( "Anshuman's Hello

GSoC 2018 Candidate (Patch and screenshot for hello world example)

-22,7 +22,8 @@ static rtems_task Init( { rtems_print_printer_fprintf_putc(&rtems_test_printer); TEST_BEGIN(); - printf( "Hello World\n" ); + printf( "Anshuman's Hello World (GSOC 2018!)\n" ); + printf( "github: anshuman23\n" ); TEST_END(); r