This patch performs following things:
- adds registers to appropriate header file
- Changes APIs to build RTEMS successful
I have tested PWM driver with RGB LED
https://youtu.be/jhjZO9amdSA
This code generate more accurate frequency compare to TI SW
This patch perform following things:
- adds original BBBIO PWM code as it is.
- not added to Makefile otherwise it will break build
- adds required registers
- adds declarations to BSP_HEADERS
This code is added from
https://github.com/Veget
Hello all,
I have tested that changes do not break build of next BSPs
altcycv_devkitc/src/lib/libbsp/arm/altera-cyclone-v
altcycv_devkit_smpc/src/lib/libbsp/arm/altera-cyclone-v
atsamvc/src/lib/libbsp/arm/atsam
beagleboneblack
There are architectures (for example some/many ARM Cortex-A) which have
different cache line sizes for data and instruction caches.
CPU kit and even BSP can be build for group of CPUs which differs
in cache line sizes as well and there are situations when maximum
alignment is not reported by rtems_
RTEMS CPU kit cache manager API and directives are implemented
by BSP library in shared cache_manager.c file.
If CPU_DATA_CACHE_ALIGNMENT is not defined by architecture/BSP
provided cache_.h file then most of these directives are mapped
to the dummy function. The concerned directives are for examp
Hello Deval Shah,
On Saturday 25 of June 2016 07:13:40 Deval Shah wrote:
> On Friday 24 June 2016, Pavel Pisa wrote:
> > Hello Deval Shah and others,
> >
> > On Friday 24 of June 2016 10:45:34 Deval Shah wrote:
> > > Hello all,
> > >
> > > I have successfully ported the bcm283x_dwcotg driver for
