[PATCH] D50979: Eliminate instances of `EmitScalarExpr(E->getArg(n))` in EmitX86BuiltinExpr().

t.p.northover added a comment. > EmitAArch64BuiltinExpr() also emits args into Ops before the big switch (with > some more subtlety around the last arg that I don't understand), but then > almost every switch case does EmitScalarExpr(E->getArg(n)). Took me a while to remember, but I can at leas

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. Looks good to me. Repository: rC Clang https://reviews.llvm.org/D51683 ___ cfe-commits mailing list cfe-commits@lists.llvm.org h

[PATCH] D33568: Fix crash when evaluating constant expressions involving nullptr

t.p.northover created this revision. Herald added a subscriber: mcrosier. For the simple casts in the test, we were crashing because the ZeroInitialization function created an LValue with an unexpected SubobjectDesignator: it was valid but didn't actually refer to a valid MostDerivedType. Sinc

[PATCH] D33568: Fix crash when evaluating constant expressions involving nullptr

t.p.northover updated this revision to Diff 100321. t.p.northover added a comment. Sounds very reasonable to me. I've uploaded a new diff. https://reviews.llvm.org/D33568 Files: clang/lib/AST/ExprConstant.cpp clang/test/SemaCXX/null-cast.cpp Index: clang/test/SemaCXX/null-cast.cpp ===

[PATCH] D33568: Fix crash when evaluating constant expressions involving nullptr

t.p.northover closed this revision. t.p.northover added a comment. Thanks Richard. I've committed this as r303957. https://reviews.llvm.org/D33568 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo

[PATCH] D33610: Stop asserting on constexpr explicit MS constructor calls.

t.p.northover created this revision. Herald added a subscriber: mcrosier. When trying to switch to C++14 by default, some extra expressions become constexpr and this is one case we can't handle. Technically I believe weakening the assert would be enough to fix the problem, but defaulted default

[PATCH] D44512: [AAch64] Tests for ACLE FP16 macros

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. These look right to me. https://reviews.llvm.org/D44512 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.o

[PATCH] D44561: [ARM] Add HasFloat16 to TargetInfo

t.p.northover added inline comments. Comment at: include/clang/Basic/TargetInfo.h:365 + /// \brief Determine whether _Float16 is supported on this target. + virtual bool hasFloat16Type() const { return HasFloat16; } `_Float16` doesn't seem to be supported any

[PATCH] D44561: [ARM] Add HasFloat16 to TargetInfo

t.p.northover added inline comments. Comment at: include/clang/Basic/TargetInfo.h:365 + /// \brief Determine whether _Float16 is supported on this target. + virtual bool hasFloat16Type() const { return HasFloat16; } SjoerdMeijer wrote: > t.p.northover wrote:

[PATCH] D44561: [ARM] Add HasFloat16 to TargetInfo

t.p.northover added inline comments. Comment at: include/clang/Basic/TargetInfo.h:365 + /// \brief Determine whether _Float16 is supported on this target. + virtual bool hasFloat16Type() const { return HasFloat16; } t.p.northover wrote: > SjoerdMeijer wrote:

[PATCH] D44561: [ARM] Pass half or i16 types for NEON intrinsics

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. Thanks. I think this looks reasonable now. https://reviews.llvm.org/D44561 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments

t.p.northover added a comment. I'm fine with the ABI changes, but I'm not very convinced by the "NaturalAlignment" name. Far from being a privileged alignment kind, it seems to take account of a pretty arbitrary set of modifiers. In fact, I can't help wondering if what's really happened is tha

[PATCH] D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments

t.p.northover added a comment. > I'd rather not put target names in API functions. The meaning of that field > is pretty target independent ("alignment of type, before alignment > adjustments") Except that rule only applies to aggregates. Scalar types get their alignment adjusted anyway I beli

[PATCH] D53348: [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. Looks reasonable. Repository: rC Clang https://reviews.llvm.org/D53348 ___ cfe-commits mailing list cfe-commits@lists.llvm.org h

[PATCH] D53514: os_log: make buffer size an integer constant expression.

t.p.northover created this revision. Herald added a subscriber: mcrosier. The size of an os_log buffer is known at any stage of compilation, so making it a constant expression means that the common idiom of declaring a buffer for it won't result in a VLA. That allows the compiler to skip saving

[PATCH] D53633: [AArch64] Implement FP16FML intrinsics

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. I think this is reasonable. Repository: rC Clang https://reviews.llvm.org/D53633 ___ cfe-commits mailing list cfe-commits@lists.

[PATCH] D53514: os_log: make buffer size an integer constant expression.

t.p.northover added a comment. Ping. Repository: rC Clang https://reviews.llvm.org/D53514 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D53514: os_log: make buffer size an integer constant expression.

t.p.northover closed this revision. t.p.northover added a comment. Thanks Eli. I committed it as r345828, and then had to fixup some linker dependencies on other platforms, which took me a couple of tries (r345833 and r345835). Repository: rC Clang https://reviews.llvm.org/D53514 ___

[PATCH] D53514: os_log: make buffer size an integer constant expression.

t.p.northover reopened this revision. t.p.northover added a comment. This revision is now accepted and ready to land. Turns out I neglected the layering between libclangAST and libclangAnalysis so I've reverted for now. For this to work I think we need to move the OSLog helpers into libclangAST.

[PATCH] D53514: os_log: make buffer size an integer constant expression.

t.p.northover updated this revision to Diff 172155. t.p.northover added a comment. Herald added a subscriber: mgorny. Same as previous patch except the OSLog helpers are moved to libclangAST to respect dependencies. Repository: rC Clang https://reviews.llvm.org/D53514 Files: clang/include

[PATCH] D54604: Automatic variable initialization

t.p.northover added a comment. > This isn't meant to change the semantics of C and C++. As I said in the cfe-dev thread, that's exactly what it does. Specifically I think this is essentially defining a new dialect of C++, which I have massive concerns about. Additionally, as much as we might cl

[PATCH] D55562: Atomics: support min/max orthogonally

t.p.northover created this revision. t.p.northover added reviewers: delena, yaxunl. Herald added subscribers: jfb, mcrosier. We seem to have been gradually growing support for atomic min/max operations (exposing longstanding IR atomicrmw instructions). But until now there have been gaps in the e

[PATCH] D55562: Atomics: support min/max orthogonally

t.p.northover added a comment. > What does it do with floating-point inputs? Same as all the other atomics: run screaming for the hills (or error out, in more reasonable terms). The only way to implement floating atomics in LLVM IR would be with a compare-exchange loop and Clang doesn't expose

[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

t.p.northover added a comment. Did you look into a scalar variant of the intrinsic call instead? These instructions have non-vector variants (e.g. `sqadd s0, s0, s0`), and that's actually why the intrinsics exist in the first place. It'd be a shame to always require this extra work. Repositor

[PATCH] D60485: [AArch64] Add support for MTE intrinsics

t.p.northover added inline comments. Comment at: include/clang/Basic/DiagnosticSemaKinds.td:9566 +def err_memtag_arg_null_or_pointer : Error< + "%0 argument must be a null or a pointer (%1 invalid)">; +def err_memtag_any2arg_pointer : Error< I think these diagno

[PATCH] D60485: [AArch64] Add support for MTE intrinsics

t.p.northover added inline comments. Comment at: include/clang/Basic/DiagnosticSemaKinds.td:9566 +def err_memtag_arg_null_or_pointer : Error< + "%0 argument must be a null or a pointer (%1 invalid)">; +def err_memtag_any2arg_pointer : Error< javed.absar wrote: >

[PATCH] D60709: [ARM] Support inline assembler constraints for MVE.

t.p.northover added a comment. Is this coordinated with GCC? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60709/new/ https://reviews.llvm.org/D60709 ___ cfe-commits mailing list cfe-commits@lists.llvm

[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

t.p.northover added a comment. Could you add some tests? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60710/new/ https://reviews.llvm.org/D60710 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D60691: [ARM] Replace fp-only-sp and d16 with fp64 and d32.

t.p.northover added a comment. I like the direction of this change, and the details look correct too. The one thing I wonder about is whether we should be upgrading .bc files too (or otherwise support fp-only-sp in legacy inputs). I think it's a specialized enough feature that there won't be mu

[PATCH] D60697: [ARM] Allow "-march=foo+fp" to vary with foo.

t.p.northover added a comment. This needs some tests. I'm also not quite sure when you'd use bare "+fp", if it's the default anyway. Comment at: llvm/lib/Support/ARMTargetParser.cpp:476 -StringRef ARM::getArchExtFeature(StringRef ArchExt) { - if (ArchExt.startswith("no")) {

[PATCH] D60699: [ARM] add CLI support for 8.1-M and MVE.

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. This looks good to me. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60699/new/ https://reviews.llvm.org/D60699 ___

[PATCH] D60709: [ARM] Support inline assembler constraints for MVE.

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. Excellent, looks good to me then. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60709/new/ https://reviews.llvm.org/D60709

[PATCH] D60697: [ARM] Allow "-march=foo+fp" to vary with foo.

t.p.northover added inline comments. Comment at: llvm/lib/Support/ARMTargetParser.cpp:476 -StringRef ARM::getArchExtFeature(StringRef ArchExt) { - if (ArchExt.startswith("no")) { -StringRef ArchExtBase(ArchExt.substr(2)); -for (const auto AE : ARCHExtNames) { - if

[PATCH] D60719: Demonstrate how to fix freestanding for memcpy

t.p.northover added a comment. I think it'd be pretty unpopular with the people I know who use freestanding. They're mostly working on microcontrollers and compiling -Oz so the extra code size would be untenable; they also have memcpy implementations anyway because they use it in their own code

[PATCH] D60719: Demonstrate how to fix freestanding for memcpy

t.p.northover added a comment. > IIUC freestanding environment should not rely on memcpy being present so my > take on it was that by "fixing" freestanding I could have my cake and eat it > too. The formal situation is that freestanding implementations are only required to provide language sup

[PATCH] D60485: [AArch64] Add support for MTE intrinsics

t.p.northover added inline comments. Comment at: include/clang/Sema/Sema.h:10762 bool AllowName); + bool SemaBuiltinARMMemoryTaggingCall(unsigned BuiltinID, CallExpr *TheCall); public: Slightly misaligned. Comm

[PATCH] D60485: [AArch64] Add support for MTE intrinsics

t.p.northover accepted this revision. t.p.northover added inline comments. This revision is now accepted and ready to land. Comment at: lib/CodeGen/CGBuiltin.cpp:7129-7131 +// Although it is possible to supply a different return +// address (first arg) to this intrinsic,

[PATCH] D55562: Atomics: support min/max orthogonally

t.p.northover updated this revision to Diff 198452. t.p.northover added a comment. Sorry, I managed to forget about this one somehow. I hadn't changed the 32-bit requirement, but I agree it shouldn't be there so this diff removes it and adds tests for the newly legal cases. Repository: rC Cl

[PATCH] D61939: AArch64: add support for arm64_23 (ILP32) IR generation

t.p.northover added a comment. Ping. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D61939/new/ https://reviews.llvm.org/D61939 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commit

[PATCH] D61939: AArch64: add support for arm64_23 (ILP32) IR generation

t.p.northover marked an inline comment as done. t.p.northover added a comment. Thanks for the suggestion Florian, and sorry it's taken so long to act on it. I've split the patch up as you suggest, I'll make this one cover the Triple bits. Comment at: clang/lib/Basic/Targets/A

[PATCH] D61939: AArch64: add support for arm64_23 (ILP32) IR generation

t.p.northover updated this revision to Diff 204009. t.p.northover added a comment. This diff now only covers the trivial additions so that "arm64_32" is understood by the driver and creates AArch64 instantiations of relevant classes. Code generated is still wildly incorrect (not even ILP32 yet).

[PATCH] D63131: arm64_32: implement the desired ABI for the ILP32 triple.

t.p.northover created this revision. t.p.northover added a reviewer: fhahn. Herald added subscribers: jfb, kristof.beyls, javed.absar, mcrosier. Herald added a project: clang. This adds all of the ABI tweaks we need to match the arm64_32 ABI as it exists in the wild. Most cirtically, of course, i

[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

t.p.northover added inline comments. Comment at: clang/test/Sema/aarch64-tme-errors.c:1 +// RUN: %clang_cc1 -triple aarch64-eabi -verify %s + I don't think the Sema checks need to be split over so many files. One for the whole of transactional seems enough. Simi

[PATCH] D65582: IR: accept and print numbered %N names for function args

t.p.northover accepted this revision. t.p.northover marked an inline comment as done. t.p.northover added a comment. Thanks Reid, committed as r367755. Comment at: llvm/utils/add_argument_names.py:5 +def fix_string(s): +TYPE = re.compile('\s*(i[0-9]+|float|double|x86_fp80|

[PATCH] D55562: Atomics: support min/max orthogonally

t.p.northover added a comment. Ping. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D55562/new/ https://reviews.llvm.org/D55562 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D61939: AArch64: add support for arm64_23 (ILP32) IR generation

t.p.northover created this revision. Herald added subscribers: jfb, kristof.beyls, javed.absar, mcrosier. Herald added a project: clang. This patch implements the arm64_32 ABI used in watchOS from the Clang side. It's mostly pretty straightforward since it's so close to normal AArch64: handle th

[PATCH] D61939: AArch64: add support for arm64_23 (ILP32) IR generation

t.p.northover updated this revision to Diff 200707. t.p.northover added a comment. During upstreaming we've changed from detecting an "arm64_32" ArchName to using a Triple::aarch64_32 Arch. We recently discovered a bug that meant only AArch32 NEON types were permitted, which is fixed in this new

[PATCH] D61939: AArch64: add support for arm64_23 (ILP32) IR generation

t.p.northover added a comment. Oops, yes. I'll leave it wrong though, the best that could come out of any attempt to change it would be to split the thread on llvm-commits. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D61939/new/ https://reviews.llvm.org/D61939 _

[PATCH] D55586: Basic: make `int_least64_t` and `int_fast64_t` match on Darwin

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. LGTM; well spotted! Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D55586/new/ https://reviews.llvm.org/D55586 _

[PATCH] D67436: CodeGen: set correct result for atomic compound expressions

t.p.northover created this revision. Herald added subscribers: jfb, mcrosier. Herald added a project: clang. Atomic compound expressions try to use atomicrmw if possible, but this path doesn't set the `Result` variable, leaving it to crash in later code if anything ever tries to use the result o

[PATCH] D67436: CodeGen: set correct result for atomic compound expressions

t.p.northover added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D67436/new/ https://reviews.llvm.org/D67436 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[PATCH] D45319: [Atomics] warn about misaligned atomic accesses using libcalls

t.p.northover added a comment. Ping. Repository: rC Clang https://reviews.llvm.org/D45319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D45319: [Atomics] warn about misaligned atomic accesses using libcalls

t.p.northover added inline comments. Comment at: clang/lib/CodeGen/CGAtomic.cpp:883 if (UseLibcall) { +CGM.getDiags().Report(E->getLocStart(), diag::warn_atomic_op_misaligned); + compnerd wrote: > It is kinda unfortunate that you need to look up 125 lines

[PATCH] D45319: [Atomics] warn about misaligned atomic accesses using libcalls

t.p.northover updated this revision to Diff 143506. t.p.northover added a comment. Moved diagnostic emission next to where the decision is made. Repository: rC Clang https://reviews.llvm.org/D45319 Files: clang/include/clang/Basic/DiagnosticSemaKinds.td clang/lib/CodeGen/CGAtomic.cpp c

[PATCH] D45319: [Atomics] warn about misaligned atomic accesses using libcalls

t.p.northover closed this revision. t.p.northover added a comment. Ah, I see you approved it before, presumably with the suggested changes. I've committed as r330566. Repository: rC Clang https://reviews.llvm.org/D45319 ___ cfe-commits mailing l

[PATCH] D63131: arm64_32: implement the desired ABI for the ILP32 triple.

t.p.northover added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D63131/new/ https://reviews.llvm.org/D63131 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[PATCH] D63131: arm64_32: implement the desired ABI for the ILP32 triple.

t.p.northover updated this revision to Diff 225259. t.p.northover added a comment. Updating diff. How target features are handled changed slightly upstream. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D63131/new/ https://reviews.llvm.org/D63131 F

[PATCH] D80910: AArch64+ARM: make LLVM consider system registers volatile to prevent unsound optimizations.

t.p.northover abandoned this revision. t.p.northover added a comment. Sorry. Keyboard decided to create diff before I'd filled everything in. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80910/new/ https://reviews.llvm.org/D80910 __

[PATCH] D80910: AArch64+ARM: make LLVM consider system registers volatile to prevent unsound optimizations.

t.p.northover created this revision. Herald added subscribers: llvm-commits, cfe-commits, danielkiss, jdoerfert, asbirlea, hiraditya, kristof.beyls, mcrosier. Herald added projects: clang, LLVM. t.p.northover abandoned this revision. t.p.northover added a comment. Sorry. Keyboard decided to creat

[PATCH] D80911: AArch64+ARM: make LLVM consider system registers volatile to prevent unsound optimizations.

t.p.northover created this revision. Herald added subscribers: danielkiss, jdoerfert, asbirlea, hiraditya, kristof.beyls, mcrosier. Herald added projects: clang, LLVM. Some of the system registers readable on AArch64 & ARM platforms return different values with each read (for example a timer cou

[PATCH] D80911: AArch64+ARM: make LLVM consider system registers volatile to prevent unsound optimizations.

t.p.northover added a comment. Herald added a reviewer: jdoerfert. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80911/new/ https://reviews.llvm.org/D80911 ___ cfe-commits mailing list cfe-commit

[PATCH] D80911: AArch64+ARM: make LLVM consider system registers volatile to prevent unsound optimizations.

t.p.northover closed this revision. t.p.northover added a comment. Thanks. Pushed to master as 5165b2b5fd5 . Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80911/new/ https://revi

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover created this revision. Herald added a subscriber: mcrosier. Hi all, So, I've finally managed to run all the tests I wanted and get this out for review. Sorry it's taken so long. This patch switches Clang's default C++ target to C++14 across all platforms and updates the test-suite

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover added inline comments. Comment at: clang/test/SemaCXX/new-array-size-conv.cpp:1 -// RUN: %clang_cc1 -fsyntax-only -pedantic -verify %s +// RUN: %clang_cc1 -fsyntax-only -pedantic -verify -std=gnu++98 %s // RUN: %clang_cc1 -fsyntax-only -pedantic -verify -std=c++98

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover added a comment. Thanks Richard. I'll file the bugs tomorrow for the issues you suggest. Do you see either of them blocking the change to C++14 as a default? On a scale of "no", "no but I want a commitment to fix them" and "yes" sort of thing. Tonight I've just got one comment tha

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover updated this revision to Diff 126129. t.p.northover added a comment. Updating with tentative fixes to review comments. Repository: rC Clang https://reviews.llvm.org/D40948 Files: clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGenCXX/new-overflow.cpp clang/test/C

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover added inline comments. Comment at: clang/test/CodeGenCXX/new-overflow.cpp:88 // CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32 - // CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[N]], 0 - // CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 -1, i32 [[N]] - // CHECK-NEX

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover added inline comments. Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1733 // The PS4 uses C++11 as the default C++ standard. - if (T.isPS4()) -LangStd = LangStandard::lang_gnucxx11; - else -LangStd = LangStandard::lang_gnucxx

[PATCH] D40948: Switch Clang's default C++ language target to C++14

t.p.northover closed this revision. t.p.northover added a comment. Thanks Richard, and all other reviewers. I committed this as r320250, with a couple of sanitizer test fixes as r320251 and r320284 (thanks Ahmed!). Repository: rC Clang https://reviews.llvm.org/D40948 _

[PATCH] D131153: AArch64: disable asynchronous unwind by default for MachO.

t.p.northover added a comment. > I don't think this is quite correct though? It'll turn off unwind tables for > AArch64 entirely, whereas we want to keep sync unwind tables. You're right, sorry about that. Hopefully this refactoring with MaskRay's suggestion gets it right. C

[PATCH] D131153: AArch64: disable asynchronous unwind by default for MachO.

t.p.northover updated this revision to Diff 458443. Herald added subscribers: abrachet, mstorsjo, emaste. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D131153/new/ https://reviews.llvm.org/D131153 Files: clang/include/clang/Driver/ToolChain.h clang/lib/Driver/ToolChain.cpp clang/li

[PATCH] D131153: AArch64: disable asynchronous unwind by default for MachO.

t.p.northover updated this revision to Diff 458444. t.p.northover added a comment. Herald added subscribers: bzcheeseman, sdasgup3, wenzhicui, wrengr, cota, teijeong, rdzhabarov, tatianashp, msifontes, jurahul, Kayjukh, grosul1, Joonsoo, stephenneuendorffer, liufengdb, aartbik, mgester, arpith-ja

[PATCH] D131153: AArch64: disable asynchronous unwind by default for MachO.

t.p.northover updated this revision to Diff 459004. t.p.northover marked an inline comment as done. t.p.northover added a comment. Switched to `enum class`. > You may want to split the patch, with refactoring as the first, and the > Mach-O specific change as the second one. I've got it split in

[PATCH] D131153: AArch64: disable asynchronous unwind by default for MachO.

t.p.northover created this revision. Herald added subscribers: kristof.beyls, mcrosier. Herald added a project: All. t.p.northover requested review of this revision. Herald added a subscriber: MaskRay. Herald added a project: clang. AArch64 MachO has a compact unwind format where most functions' u

[PATCH] D119788: [AArch64] Add support for -march=native for Apple M1 CPU

t.p.northover added a comment. Things have moved on since the ARM and (especially) PPC variants of that function were written. That field (despite the name) is now more of an ABI tag and not going to be updated with each CPU. I think the modern replacement for it is `hw.cpufamily` obtained from

[PATCH] D119788: [AArch64] Add support for -march=native for Apple M1 CPU

t.p.northover added a comment. Sorry, that was an old xnu version, the newest one is https://opensource.apple.com/source/xnu/xnu-7195.81.3/osfmk/mach/machine.h.auto.html which has | `CPUFAMILY_ARM_CYCLONE`| 0x37a09642 | `apple-a7` | | `CPUFAMILY_ARM_TYPHOON`

[PATCH] D34873: Fix miscompiled 32bit binaries by mingw

t.p.northover added inline comments. Comment at: lib/AST/ExprConstant.cpp:583 +uint64_t& GetArrayInitIndex() { +return reinterpret_cast(ArrayInitIndex[0]); +} rnk wrote: > Surely this will fault on SPARC or ARM or other ISAs that care about > ali

[PATCH] D35817: Ban implicit _Complex to scalar conversions in C++

t.p.northover added a comment. Ping. https://reviews.llvm.org/D35817 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D35817: Ban implicit _Complex to scalar conversions in C++

t.p.northover updated this revision to Diff 109149. t.p.northover added a comment. Sounds like an improvement, I've updated the diff. https://reviews.llvm.org/D35817 Files: clang/include/clang/Basic/DiagnosticSemaKinds.td clang/lib/Sema/SemaChecking.cpp clang/lib/Sema/SemaExpr.cpp clang

[PATCH] D36272: [CodeGen][x86_64] Enable 'force_align_arg_pointer' attribute at x86_64

t.p.northover added a comment. I've added "cfe-commits" as a subscriber since that's how we make sure the review request gets to the mailing list (which is still where review canonically takes place). Repository: rL LLVM https://reviews.llvm.org/D36272 ___

[PATCH] D35817: Ban implicit _Complex to scalar conversions in C++

t.p.northover added a comment. Pingy. https://reviews.llvm.org/D35817 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D35817: Ban implicit _Complex to scalar conversions in C++

t.p.northover added a comment. > What's going on with the OpenMP test changes? Compound assignment operators like "real /= complex" become illegal under the new rules (in C++) because somewhere there has to be an implicit conversion. I was pretty relieved to discover GCC also rejects the syntax

[PATCH] D70779: AArch64: add support for newer Apple CPUs

t.p.northover closed this revision. t.p.northover added a comment. Thanks Ahmed, pushed: To github.com:llvm/llvm-project.git 0a4daff6e26f..903e5c3028d6 master -> master CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70779/new/ https://reviews.llvm.org/D70779 _

[PATCH] D87095: [Triple][MachO] Define "arm64e", an AArch64 subarch for Pointer Auth.

t.p.northover added a comment. I had a look through this and everything seemed to be in place. I think the ABI versioning is probably sufficient to prevent surprises and land this now, to avoid churn in the rest of the code. If more is really needed, we could add a temporary warning ("incomplet

[PATCH] D89959: UBSAN: emit distinctive traps in trapping mode

t.p.northover closed this revision. t.p.northover added a comment. Committed: To github.com:llvm/llvm-project.git c54d827fdb12..c5978f42ec8e main -> main CHANGES SINCE LAST ACTION https://reviews.llvm.org/D89959/new/ https://reviews.llvm.org/D89959 __

[PATCH] D92930: [Clang] Add vcmla and rotated variants for Arm ACLE.

t.p.northover added a comment. Looks fine to me except for one weird quirk that I don't think should be there. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5237 NEONMAP1(vcaddq_rot90_v, arm_neon_vcadd_rot90, Add1ArgType), + NEONMAP1(vcaddq_rot90_v, arm_neon_vcadd_rot90, Add1

[PATCH] D92930: [Clang] Add vcmla and rotated variants for Arm ACLE.

t.p.northover accepted this revision. t.p.northover added a comment. This revision is now accepted and ready to land. That's a nice improvement. Still LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92930/new/ https://reviews.llvm.org/D92930 _

[PATCH] D89959: UBSAN: emit distinctive traps in trapping mode

t.p.northover added a comment. With current CodeGen by the time you reach the trap you have no idea what came before so I think you'd still need a separate trap instruction per failure kind. So the Clang and generic LLVM side would be unaffected. I suppose on X86 it could save a few bytes in .t

[PATCH] D89959: UBSAN: emit distinctive traps in trapping mode

t.p.northover marked an inline comment as done. t.p.northover added a comment. > Was this measured with all of -fsanitize=undefined enabled? If so, the actual > size overhead is likely lower, as only a subset of these checks get enabled > in production settings. Yes, I used `-fsanitize=undefine

[PATCH] D89959: UBSAN: emit distinctive traps in trapping mode

t.p.northover added inline comments. Comment at: llvm/include/llvm/IR/Intrinsics.td:1242 +def int_ubsantrap : Intrinsic<[], [llvm_i8_ty], + [IntrNoReturn, IntrCold, ImmArg>]>; jdoerfert wrote: > should this be readonly and inaccesib

[PATCH] D91147: AArch64: classify Triple::aarch64_32 as AArch64

t.p.northover created this revision. Herald added subscribers: dexonsmith, danielkiss, s.egerton, simoncook, hiraditya, kristof.beyls, mcrosier. Herald added a project: LLVM. t.p.northover requested review of this revision. We want `arm64_32` to omit leaf frame pointers. At the moment this is pr

[PATCH] D91157: [AArch64] Out-of-line atomics (-moutline-atomics) implementation.

t.p.northover added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:6366 + // Option -moutline-atomics supported for AArch64 target only. + if (Triple.getArch() != llvm::Triple::aarch64) { +D.Diag(diag::warn_drv_moutline_atomics_unsupported_op

[PATCH] D91157: [AArch64] Out-of-line atomics (-moutline-atomics) implementation.

t.p.northover added inline comments. Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2170 + SmallVector Ops; + if (TLI.getLibcallName(LC)) { +Ops.append(Node->op_begin() + 2, Node->op_end()); jyknight wrote: > t.p.northover wrote: > > I t

[PATCH] D91147: AArch64: classify Triple::aarch64_32 as AArch64

t.p.northover added inline comments. Comment at: clang/lib/Driver/ToolChain.cpp:1066 if (getTriple().getArch() == llvm::Triple::x86_64 || - getTriple().isAArch64() || getTriple().isRISCV()) + (getTriple().isAArch64() && getTriple().isArch64Bit()) || + getTriple(

[PATCH] D91147: AArch64: classify Triple::aarch64_32 as AArch64

t.p.northover updated this revision to Diff 305064. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91147/new/ https://reviews.llvm.org/D91147 Files: clang/lib/Driver/ToolChain.cpp clang/test/Driver/frame-pointer-elim.c llvm/include/llvm/ADT/Triple.h llvm/lib/BinaryFormat/MachO.cpp

[PATCH] D91147: AArch64: classify Triple::aarch64_32 as AArch64

t.p.northover closed this revision. t.p.northover added a comment. Thanks Gerolf. Committed: To github.com:llvm/llvm-project.git ae9d96a656a1..152df3add156 master -> master CHANGES SINCE LAST ACTION https://reviews.llvm.org/D91147/new/ https://reviews.llvm.org/D91147 ___

[PATCH] D95228: Add swift_async_context parameter attribute mapping to IR equivalent

t.p.northover closed this revision. t.p.northover marked an inline comment as done. t.p.northover added a comment. Thanks, committed as e94fada045fe with the extra tests. Comment at: clang/include/clang/Bas

[PATCH] D103165: Threading: use independent llvm::thread implementation on Apple platforms to increase stack size

t.p.northover updated this revision to Diff 348958. t.p.northover added a comment. Herald added subscribers: cfe-commits, usaxena95, kadircet, arphaman, hiraditya. Herald added a project: clang-tools-extra. - Add `llvm::thread` for all potential platforms, allowing stack size to be specified. - `

[PATCH] D103165: Threading: use independent llvm::thread implementation on Apple platforms to increase stack size

t.p.northover added inline comments. Comment at: llvm/include/llvm/Support/thread.h:168 +/// stack size request. +class thread { +public: An alternative here would have been to inherit from `std::thread` but that seemed a bit icky to me. Happy to switch if the c

[PATCH] D95228: Add swift_async_context parameter attribute mapping to IR equivalent

t.p.northover created this revision. Herald added subscribers: dexonsmith, jdoerfert, mcrosier. Herald added a reviewer: aaron.ballman. t.p.northover requested review of this revision. This adds `__attribute__((swift_async_context))` very much following the existing `swift_context` so that Swift'

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