[PATCH] D157269: [Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'

sdesmalen updated this revision to Diff 548130. sdesmalen added a comment. - (Clang) Added test-cases for indirect calls. - (LLVM) Moved the pseudo definition out of the 'let Predicates = [HasSME] {}' block as well. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://revi

[PATCH] D157270: [Clang][AArch64] Add diagnostic for calls from non-ZA to shared-ZA functions.

sdesmalen updated this revision to Diff 548131. sdesmalen added a comment. Added test-cases for indirect calls Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157270/new/ https://reviews.llvm.org/D157270 Files: clang/include/clang/Basic/Diagnostic

[PATCH] D157269: [Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'

sdesmalen updated this revision to Diff 548168. sdesmalen marked 10 inline comments as done. sdesmalen added a comment. Address further review comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157269/new/ https://reviews.llvm.org/D157269 Fil

[PATCH] D157269: [Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'

sdesmalen added inline comments. Comment at: clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp:13-17 +__attribute__((target("sme"))) void streaming_compatible_def_sme_attr() __arm_streaming_compatible {} // OK +__attribute__((target("sme"))) void streaming_def_s

[PATCH] D157269: [Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'

sdesmalen updated this revision to Diff 548526. sdesmalen added a comment. Updated LLVM MC tests which were failing because smstart/smstop are no longer predicated by 'sme'. Sorry, I only just noticed that I hadn't run all the tests yet. @paulwalker-arm could you give this another look? Reposi

[PATCH] D157269: [Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGecb7b9c5c589: [Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme' (authored by sdesmalen). Repository: rG LLVM Github

[PATCH] D157270: [Clang][AArch64] Add diagnostic for calls from non-ZA to shared-ZA functions.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. sdesmalen marked 4 inline comments as done. Closed by commit rG453c30e9e633: [Clang][AArch64] Add diagnostic for calls from non-ZA to shared-ZA functions. (authored by

[PATCH] D128648: [Clang][AArch64][SME] Add vector read/write (mova) intrinsics

sdesmalen added inline comments. Comment at: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c:13 +#else +#define ARM_STREAMING_ATTR __attribute__((arm_streaming)) +#endif The spelling has recently changed to the `__arm_streaming`. Also with the new attr

[PATCH] D134677: [Clang][AArch64][SME] Add ZA zeroing intrinsics

sdesmalen added a comment. Other than my comment on the test, the patch looks good to me. Comment at: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c:20 +// +ARM_SHARED_ZA_ATTR void test_svzero_mask_za() { + svzero_mask_za(0); The new keyword attribu

[PATCH] D142702: [Clang][AArch64][SME] Generate target features from +(no)sme.* options

sdesmalen added inline comments. Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:87-90 +if (Feature == "sme") { + Features.push_back("+sve"); + Features.push_back("+sve2"); + Features.push_back("+bf16"); SME shouldn't require SVE or SV

[PATCH] D128648: [Clang][AArch64][SME] Add vector read/write (mova) intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. Patch LGTM, thanks. Just a note that you'll need to remove the trailing `__arm_streaming` attribute from `acle_sme_read.c` in order to be able to land the patch without causing test failures. Comment at: clang/test

[PATCH] D134677: [Clang][AArch64][SME] Add ZA zeroing intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134677/new/ https://reviews.llvm.org/D134677 ___ cfe-commits mailing list cfe-com

[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)

sdesmalen added inline comments. Comment at: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c:24 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0

[PATCH] D128648: [Clang][AArch64][SME] Add vector read/write (mova) intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. Thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D128648/new/ https://reviews.llvm.org/D128648 ___ cfe-commits mailing list cfe-commits@li

[PATCH] D137556: [POC] Clang implementation for AArch64 SME and SME2 builtins

sdesmalen updated this revision to Diff 554399. sdesmalen added a comment. Herald added a subscriber: qcolombet. The latest patch contains a number of fixes and has been rebased to a more recent commit. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/

[PATCH] D159188: [AArch64][SME] Make the overloaded svreinterpret_* functions streaming-compatible.

sdesmalen created this revision. sdesmalen added reviewers: david-arm, paulwalker-arm. Herald added a subscriber: kristof.beyls. Herald added a reviewer: aaron.ballman. Herald added a project: All. sdesmalen requested review of this revision. Herald added a project: clang. Herald added a subscriber

[PATCH] D159188: [AArch64][SME] Make the overloaded svreinterpret_* functions streaming-compatible.

sdesmalen updated this revision to Diff 555402. sdesmalen marked an inline comment as done. sdesmalen added a comment. Added "aarch64_32" to TargetAArch64. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D159188/new/ https://reviews.llvm.org/D159188

[PATCH] D159188: [AArch64][SME] Make the overloaded svreinterpret_* functions streaming-compatible.

sdesmalen added inline comments. Comment at: clang/include/clang/Basic/Attr.td:418 def TargetARM : TargetArch<["arm", "thumb", "armeb", "thumbeb"]>; -def TargetAArch64 : TargetArch<["aarch64"]>; +def TargetAArch64 : TargetArch<["aarch64", "aarch64_be"]>; def TargetAnyArm : Targ

[PATCH] D159188: [AArch64][SME] Make the overloaded svreinterpret_* functions streaming-compatible.

This revision was automatically updated to reflect the committed changes. Closed by commit rG916415b83732: [AArch64][SME] Make the overloaded svreinterpret_* functions streaming… (authored by sdesmalen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D

[PATCH] D127762: [Clang][AArch64] Add ACLE attributes for SME.

sdesmalen updated this revision to Diff 477116. sdesmalen marked 10 inline comments as done. sdesmalen added a comment. Addressed review comments. These include: - Allow dropping the arm_preserves_za attribute. - Added tests for serializing/deserializing the AST. - Changed descriptions in documen

[PATCH] D127762: [Clang][AArch64] Add ACLE attributes for SME.

sdesmalen added inline comments. Comment at: clang/include/clang/AST/Type.h:3940 +/// on declarations and function pointers. +unsigned AArch64SMEAttributes : 8; + erichkeane wrote: > sdesmalen wrote: > > erichkeane wrote: > > > We seem to be missing all o

[PATCH] D138788: [SVE] Change some bfloat lane intrinsics to use i32 immediates

sdesmalen added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:2527 -def int_aarch64_sve_bfdot_lane : SVE_4Vec_BF16_Indexed; -def int_aarch64_sve_bfmlalb_lane : SVE_4Vec_BF16_Indexed; -def int_aarch64_sve_bfmlalt_lane : SVE_4Vec_BF16_Indexed; +def int_

[PATCH] D76617: [SveEmitter] Fix encoding/decoding of SVETypeFlags

sdesmalen created this revision. sdesmalen added reviewers: SjoerdMeijer, Andrzej. Herald added subscribers: cfe-commits, tschuett. Herald added a project: clang. This issue was introduced when reworking D75861 . The bug isn't actually hit with current unit tests

[PATCH] D76678: [SveEmitter] Add range checks for immediates and predicate patterns.

sdesmalen created this revision. sdesmalen added reviewers: efriedma, SjoerdMeijer, rovka. Herald added subscribers: mgrang, tschuett, mgorny. Herald added a project: clang. sdesmalen added a child revision: D76679: [SveEmitter] Add more immediate operand checks.. This patch adds a mechanism to e

[PATCH] D76679: [SveEmitter] Add more immediate operand checks.

sdesmalen created this revision. sdesmalen added reviewers: efriedma, SjoerdMeijer, rovka. Herald added a subscriber: tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. sdesmalen added a parent revision: D76678: [SveEmitter] Add range checks for immediates and predicate pa

[PATCH] D76680: [SveEmitter] Add immediate checks for lanes and complex imms

sdesmalen created this revision. sdesmalen added reviewers: efriedma, SjoerdMeijer, rovka. Herald added a subscriber: tschuett. Herald added a project: clang. sdesmalen added a parent revision: D76679: [SveEmitter] Add more immediate operand checks.. Adds another bunch of of intrinsics that take

[PATCH] D76617: [SveEmitter] Fix encoding/decoding of SVETypeFlags

sdesmalen added a comment. In D76617#1938787 , @SjoerdMeijer wrote: > Patches with functional changes but without tests are a bit "suspicious". In > this case, I see it might be tricky. You could argue that it should be > incorporated in the patch that

[PATCH] D76238: [SveEmitter] Implement builtins for contiguous loads/stores

sdesmalen added a comment. @SjoerdMeijer are you happy with the changes I've made to the tests? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D76238/new/ https://reviews.llvm.org/D76238 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D76617: [SveEmitter] Fix encoding/decoding of SVETypeFlags

sdesmalen updated this revision to Diff 254148. sdesmalen marked an inline comment as done. sdesmalen added a comment. - Made Flags `uint64_t` instead of `unsigned`. - Simplified encoding of flags in SveEmitter and moved encoding of properties into the `Flags` variable to the constructor of Intri

[PATCH] D76679: [SveEmitter] Add more immediate operand checks.

sdesmalen marked an inline comment as done. sdesmalen added a comment. (sorry, I wrote the comments earlier but forgot to click 'submit' :) ) Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_ext.c:1 +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -targ

[PATCH] D76678: [SveEmitter] Add range checks for immediates and predicate patterns.

sdesmalen marked 3 inline comments as done. sdesmalen added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:153 +} +def ImmCheckPredicatePattern: ImmCheckType<0>; // 0..31 +def ImmCheck1_16: ImmCheckType<1>; // 1..16 Sjoerd

[PATCH] D76238: [SveEmitter] Implement builtins for contiguous loads/stores

sdesmalen added a comment. In D76238#1954585 , @SjoerdMeijer wrote: > Thanks for the ping, hadn't noticed the updates. > > I may have also missed why you need the SVE_ACLE_FUNC macro. Can you quickly > comment why you need that? Just asking because in my

[PATCH] D76679: [SveEmitter] Add more immediate operand checks.

sdesmalen marked an inline comment as done. sdesmalen added a subscriber: rsandifo-arm. sdesmalen added inline comments. Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_ext.c:1 +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallo

[PATCH] D76679: [SveEmitter] Add more immediate operand checks.

sdesmalen marked an inline comment as done. sdesmalen added inline comments. Comment at: clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_ext.c:1 +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -

[PATCH] D74724: [AArch64][SVE] CodeGen of ACLE Builtin Types

This revision was automatically updated to reflect the committed changes. Closed by commit rG49b307e96d47: [AArch64][SVE] CodeGen of ACLE Builtin Types (authored by sdesmalen). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74724/new/ https://reviews

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

sdesmalen added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:1226 + // intrinsic currently, where NumVecs is always 2 + unsigned NumVecs = 2; + nit: You can just as well inline this value now. Comment at: llvm/

[PATCH] D74833: [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74833/new/ https://reviews.llvm.org/D74833

[PATCH] D74734: [AArch64][SVE] Add the SVE dupq_lane intrinsic

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7495 + // DUPQ can be used when idx is in range. + auto CIdx = dyn_cast(Idx128); + if (CIdx && (CId

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen created this revision. sdesmalen added reviewers: efriedma, rjmccall, rovka, rsandifo-arm. Herald added subscribers: psnobl, rkruppe, kristof.beyls, tschuett, mgorny. Herald added a reviewer: rengolin. Herald added a project: clang. This patch adds 'q' to mean 'scalable vector' in the bu

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen added a comment. In D75298#1898770 , @efriedma wrote: > Can we avoid a gigantic, expensive to parse arm_sve.h somehow? Given that > the compiler has to know the signatures for all these buitins anyway, can we > just make including arm_sve.h se

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen updated this revision to Diff 247659. sdesmalen marked an inline comment as done. sdesmalen added a comment. - Added comment describing `q` for scalable vectors to Builtins.def - Use `getKnownMinSize()` for calculating `LargestVectorWidth` CHANGES SINCE LAST ACTION https://reviews.ll

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen marked an inline comment as done. sdesmalen added inline comments. Comment at: clang/include/clang/Basic/AArch64SVETypeFlags.h:1 +//===- SveEmitter.cpp - Generate arm_sve.h for use with clang -*- C++ -*-===// +// I just see that this comment will need u

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen created this revision. sdesmalen added reviewers: efriedma, rovka, SjoerdMeijer, rsandifo-arm. Herald added subscribers: psnobl, rkruppe, mgrang, kristof.beyls, tschuett, mgorny. Herald added a reviewer: rengolin. Herald added a project: clang. sdesmalen added a parent revision: D75298:

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen added a comment. In D75298#1901578 , @efriedma wrote: > How are you planning to handle them with your current approach? Each prototype will get a `arm_sve_alias` attribute that specifies which builtin it relates to. For example: __attribute

[PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. Nice one! LGTM! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69378/new/ https://reviews.llvm.org/D69378 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm

[PATCH] D69657: [AArch64][SVE] Implement several floating-point arithmetic intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thanks @kmclaughlin, LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69657/new/ https://reviews.llvm.org/D69657 ___

[PATCH] D69800: [AArch64][SVE] Implement remaining floating-point arithmetic intrinsics

sdesmalen added inline comments. Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll:767 ; -; FSCALE +; FNEG ; Why are you moving this test and changing fscale -> fneg here? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https

[PATCH] D69858: [AArch64][SVE] Implement floating-point comparison & reduction intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thanks, LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69858/new/ https://reviews.llvm.org/D69858

[PATCH] D69707: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics

sdesmalen added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:10064 + SDNodeXFormgetTargetConstant((N->getSExtValue() / 90), SDLoc(N), MVT::i64); +}]>> { should the target constant not

[PATCH] D69800: [AArch64][SVE] Implement remaining floating-point arithmetic intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll:767 ; -; FSCALE +; FNEG ; kmclaughlin wrote: > sdesmalen wrote: > > Why are you

[PATCH] D69707: [AArch64][SVE] Implement additional floating-point arithmetic intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thanks, LGTM! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69707/new/ https://reviews.llvm.org/D69707 ___ cfe-commits mailing lis

[PATCH] D70180: [AArch64][SVE] Implement floating-point conversion intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Herald added a reviewer: efriedma. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70180/new/ https://reviews.llvm.org/D70180 _

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

sdesmalen added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:898 + llvm_i32_ty], +[IntrNoMem]>; + I'd expect the `llvm_i32_ty` to be an immediate for these instructions, right? If so you'll need to add `I

[PATCH] D70437: [AArch64][SVE] Implement shift intrinsics

sdesmalen added a comment. Herald added a reviewer: efriedma. Two small comments, but overall looks good! Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:835 + LLVMMatchType<0>, + llvm_i32_ty], +[IntrNoMem]>; ---

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

sdesmalen added inline comments. Herald added a reviewer: efriedma. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:898 + llvm_i32_ty], +[IntrNoMem]>; + efriedma wrote: > kmclaughlin wrote: > > sdesmalen wrote: > > > I'd expe

[PATCH] D70253: [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thanks @kmclaughlin , LGTM. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:898 + llvm_i32_ty], +[IntrNoMem]>; +

[PATCH] D70437: [AArch64][SVE] Implement shift intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70437/new/ https://reviews.llvm.org/D70437 ___ cfe-commits mailing list cfe-co

[PATCH] D71167: [Driver] Default to -momit-leaf-frame-pointer for AArch64

sdesmalen added a comment. The patch looks structurally fine, but I'm missing the argumentation for changing the default and related, the history of why the default is to //not// omit the frame pointer on leaf functions. Can you provide some insight here? Repository: rG LLVM Github Monorepo

[PATCH] D71556: [AArch64][SVE] Implement intrinsic for non-faulting loads

sdesmalen added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:329 + +def non_faulting_load : + PatFrag<(ops node:$ptr, node:$pred, node:$def), This duplicates a lot of code, maybe it makes sense to combine this into a multiclass. I'm

[PATCH] D71556: [AArch64][SVE] Implement intrinsic for non-faulting loads

sdesmalen added a comment. In D71556#1786465 , @efriedma wrote: > I'm not sure it's legal to transform a non-faulting load to a load with a > non-faulting flag? At least, we'd need to consider the implications of that > very carefully. In particular, I

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen updated this revision to Diff 248432. sdesmalen marked 11 inline comments as done. sdesmalen added a comment. - Renamed CK and BaseTS - Refactored switch statementsd in SVEType::getTypeFlags() CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75470/new/ https://reviews.llvm.org/D7

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:121 +// Load one vector (scalar base) +def SVLD1 : MInst<"svld1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad]>; SjoerdMeijer wrote: > This encoding, e.g, this is "csilUcUsUiUlhfd",

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen added a subscriber: simon_tatham. sdesmalen added a comment. Herald added a subscriber: danielkiss. In D75298#1904561 , @efriedma wrote: > > Do you happen to know which method in Sema does this? I had a look before, > > but couldn't find where w

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen marked an inline comment as done. sdesmalen added a comment. Herald added a subscriber: danielkiss. In D75470#1907562 , @SjoerdMeijer wrote: > Adding @simon_tatham in case he feels wants to have a look too. Thanks Sjoerd! @simon_tatham and I h

[PATCH] D75861: [SVE] Generate overloaded functions for ACLE intrinsics.

sdesmalen created this revision. sdesmalen added reviewers: SjoerdMeijer, miyuki, efriedma, simon_tatham. Herald added subscribers: cfe-commits, danielkiss, dmgreen, psnobl, rkruppe, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. The SVE ACLE allows usi

[PATCH] D75850: [ARM, CDE] Generalize MVE intrinsics infrastructure to support CDE

sdesmalen added a comment. In D75850#1912685 , @simon_tatham wrote: > > Renames the 'clang_arm_mve_alias' attribute into 'clang_arm_builtin_alias' > > (it will be used with CDE intrinsics as well as MVE intrinsics) > > You might talk to @sdesmalen, who m

[PATCH] D75858: [AArch64][SVE] Add SVE intrinsics for address calculations

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75858/new/ https://reviews.llvm.org/D75858

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen updated this revision to Diff 249312. sdesmalen added a comment. s/NeonIntrinsicInfo/ARMVectorIntrinsicInfo/ s/findNeonIntrinsicInMap/findARMVectorIntrinsicInMap/ CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75470/new/ https://reviews.llvm.org/D75470 Files: clang/include/c

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen marked an inline comment as done. sdesmalen added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5292 + { #NameBase, SVE::BI__builtin_sve_##NameBase, 0, 0, TypeModifier } +static const NeonIntrinsicInfo AArch64SVEIntrinsicMap[] = { +#define GET_SVE_LLVM_I

[PATCH] D75861: [SVE] Generate overloaded functions for ACLE intrinsics.

sdesmalen updated this revision to Diff 249370. sdesmalen edited the summary of this revision. sdesmalen added a comment. - Rebased patch on top of D75850 . - Removed `__clang_arm_sve_alias` in favour of `__clang_arm_builtin_alias` CHANGES SINCE LAST ACTION htt

[PATCH] D75861: [SVE] Generate overloaded functions for ACLE intrinsics.

sdesmalen updated this revision to Diff 249404. sdesmalen added a comment. - Refactored condition to check for valid builtins (split up checks for Arm and AArch64) CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75861/new/ https://reviews.llvm.org/D75861 Files: clang/include/clang/Bas

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen added a comment. In D75298#1918489 , @efriedma wrote: > Changing the way we expose the builtins isn't going to affect most of the > code related to the SVE intrinsics. I'm fine sticking with a known working > approach, and trying to address th

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen updated this revision to Diff 249966. sdesmalen added a comment. - Updated license header for the arm_sve.h file to use the LLVM license instead of MIT. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75298/new/ https://reviews.llvm.org/D75298 Files: clang/include/clang/AST/

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

sdesmalen marked 2 inline comments as done. sdesmalen added inline comments. Comment at: clang/utils/TableGen/SveEmitter.cpp:86 + OS << "#ifndef __cplusplus\n"; + OS << "#include \n"; + OS << "#endif\n\n"; efriedma wrote: > I'd prefer to avoid depending on st

[PATCH] D75298: [Clang][SVE] Parse builtin type string for scalable vectors

This revision was automatically updated to reflect the committed changes. Closed by commit rG5087ace65197: [Clang][SVE] Parse builtin type string for scalable vectors (authored by sdesmalen). Changed prior to commit: https://reviews.llvm.org/D75298?vs=249966&id=250421#toc Repository: rG LLVM

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

This revision was automatically updated to reflect the committed changes. Closed by commit rG8b409eabaf75: [SVE] Auto-generate builtins and header for svld1. (authored by sdesmalen). Changed prior to commit: https://reviews.llvm.org/D75470?vs=249312&id=250509#toc Repository: rG LLVM Github M

[PATCH] D75470: [SVE] Auto-generate builtins and header for svld1.

sdesmalen marked 2 inline comments as done. sdesmalen added inline comments. Comment at: clang/utils/TableGen/SveEmitter.cpp:32 #include "llvm/TableGen/Error.h" +#include "clang/Basic/AArch64SVETypeFlags.h" #include thakis wrote: > Including stuff from `clang/

[PATCH] D76297: [clang][AArch64] readd support for 'p' inline asm constraint

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Comment at: clang/lib/Basic/Targets/AArch64.h:97 Constraint += 2; break; } nit: does this need a `default: break`? Repositor

[PATCH] D76297: [clang][AArch64] readd support for 'p' inline asm constraint

sdesmalen accepted this revision. sdesmalen added a comment. In D76297#1927053 , @nickdesaulniers wrote: > @sdesmalen sorry, would you mind re-reviewing. I'm not comfortable landing > with the previous version being reviewed and not the current one. Su

[PATCH] D75861: [SVE] Generate overloaded functions for ACLE intrinsics.

This revision was automatically updated to reflect the committed changes. sdesmalen marked 4 inline comments as done. Closed by commit rG981f0802b375: [SVE] Generate overloaded functions for ACLE intrinsics. (authored by sdesmalen). Changed prior to commit: https://reviews.llvm.org/D75861?vs=24

[PATCH] D75861: [SVE] Generate overloaded functions for ACLE intrinsics.

sdesmalen added a comment. Addressed review comments before commititng. Thanks for the review @miyuki and @SjoerdMeijer! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75861/new/ https://reviews.llvm.org/D75861 _

[PATCH] D76238: [SveEmitter] Implement builtins for contiguous loads/stores

sdesmalen marked 2 inline comments as done. sdesmalen added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:7467 + + return IsZxtReturn ? Builder.CreateZExt(Load, VectorTy) + : Builder.CreateSExt(Load, VectorTy); SjoerdMeijer wro

[PATCH] D75661: Remove SequentialType from the type heirarchy.

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thank you for this patch! Personally I find the code more readable without the SequentialType abstraction and the use of the GEP interface (getTypeAtIndex(Type, Idx)) you added in D75660

[PATCH] D76238: [SveEmitter] Implement builtins for contiguous loads/stores

sdesmalen marked 4 inline comments as done. sdesmalen added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:128 def SVLD1 : MInst<"svld1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad]>; +def SVLD1SB : MInst<"svld1sb_{d}", "dPS", "silUsUiUl", [IsLoad],

[PATCH] D73636: [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic

sdesmalen added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1758 +def int_aarch64_sve_sqcadd_x : AdvSIMD_2VectorArgIndexed_Intrinsic; +def int_aarch64_sve_cmla_x : AdvSIMD_3VectorArgIndexed_Intrinsic; +def int_aarch64_sve_cmla_lane_x

[PATCH] D73719: [AArch64][SVE] Add SVE2 intrinsics for widening DSP operations

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73719/new/ https://reviews.llvm.org/D73719

[PATCH] D73903: [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations

sdesmalen added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1852 -// SVE2 MLA LANE. -def int_aarch64_sve_smlalb_lane : SVE2_3VectorArg_Indexed_Intrinsic; nit: why are you moving these? Repository: rG LLVM Github Monorepo CHANGE

[PATCH] D73636: [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thanks @kmclaughlin , LGTM. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1115 class AdvSIMD_SVE_LOGB_Intrinsic : AdvSIMD_SVE_CNT_Intrinsic; + class SVE2_C

[PATCH] D74222: [AArch64][SVE] Add mul/mla/mls lane & dup intrinsics

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74222/new/ https://reviews.llvm.org/D74222

[PATCH] D74550: [AArch64][SVE] Add SVE index intrinsic

sdesmalen added inline comments. Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll:35 +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.index.nxv2i64(i64 -14, i64 15) + ret %out Is there a reason you're not testing for -16, 15 for all of these i

[PATCH] D74550: [AArch64][SVE] Add SVE index intrinsic

sdesmalen added a comment. Nice, thanks for adding those tests @kmclaughlin. LGTM! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74550/new/ https://reviews.llvm.org/D74550 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://list

[PATCH] D74724: [AArch64][SVE] CodeGen of ACLE Builtin Types

sdesmalen created this revision. sdesmalen added reviewers: rsandifo-arm, rovka, rjmccall, efriedma. Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added projects: clang, LLVM. This patch adds codegen support for the ACLE builtin types added in

[PATCH] D73903: [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM! Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1100 [IntrNoMem]>; + class SVE2_2VectorArg_Narrowing_Intrinsic nit: unn

[PATCH] D74724: [AArch64][SVE] CodeGen of ACLE Builtin Types

sdesmalen updated this revision to Diff 245127. sdesmalen added a comment. - Inlined function into switch statement - Removed changes to IRTranslator.cpp from this patch. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74724/new/ https://reviews.llvm.org/D74724 Files: clang/lib/CodeGen

[PATCH] D71698: [AArch64][SVE] Add intrinsic for non-faulting loads

sdesmalen added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:12460 - if ((SignExtSrcVT != GLD1SrcMemVT) || !Src.hasOneUse()) + unsigned OpNum = NewOpc == AArch64ISD::LDNF1S ? 3 : 4; + EVT LD1SrcMemVT = cast(Src->getOperand(OpNum))->getVT(); --

[PATCH] D71698: [AArch64][SVE] Add intrinsic for non-faulting loads

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM [with the caveat that we need to revisit the modelling of the `FFR` register and get rid fo the `PseudoInstExpansion` at a later point, as discussed during the previous sync-up call

[PATCH] D73025: [AArch64][SVE] Add first-faulting load intrinsic

sdesmalen accepted this revision. sdesmalen added inline comments. This revision is now accepted and ready to land. Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11248 -static SDValue performLDNF1Combine(SDNode *N, SelectionDAG &DAG) { +static SDValue performLDNF1

[PATCH] D72467: Remove "mask" operand from shufflevector.

sdesmalen added a comment. Thanks @efriedma for working on this. The overall approach seems good to me! Mostly added some nits, with the exception of one question on what to do with a shufflevector with fixed-width mask and scalable source vectors. Comment at: llvm/include/llv

[PATCH] D73551: [AArch64][SVE] Add remaining SVE2 intrinsics for uniform DSP operations

sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D73551/new/ https://reviews.llvm.org/D73551 _

[PATCH] D73636: [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic

sdesmalen added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1116 + LLVMMatchType<0>, + llvm_i32_ty], +[IntrNoMem]>; missing ImmArg Comment at: llvm/include/llvm/IR/Intri

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