[PATCH] D125170: [Headers][X86] Replace \operation with \code{.operation}

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM, thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125170/new/ https://reviews.llvm.org/D125170

[PATCH] D125222: [X86] Replace avx512f integer mul reduction builtins with generic builtin

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125222/new/ https://reviews.llvm.org/D125222

[PATCH] D125084: [test, x86] Fix spurious x86-target-features.c failure

pengfei added inline comments. Comment at: clang/test/Driver/x86-target-features.c:173 // LVIHARDENING: "-target-feature" "+lvi-load-hardening" "-target-feature" "+lvi-cfi" -// NO-LVIHARDENING-NOT: lvi +// NO-LVIHARDENING-NOT: "-target-feature" "+lvi How abou

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 430019. pengfei added a comment. Herald added subscribers: armkevincheng, eric-k256, javed.absar. Herald added a reviewer: sjarus. Rebased on the avx512fp16 implementation. Still WIP for optimizations and a fast RA issue. Repository: rG LLVM Github Monore

[PATCH] D125084: [test, x86] Fix spurious x86-target-features.c failure

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Thanks! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125084/new/ https://reviews.llvm.org/D125084

[PATCH] D125789: Fix release note typo from 6da3d66f

pengfei added a comment. I guess a lot of lines of tests need to update $ grep -rn " {z}" llvm/test/CodeGen/X86/ | wc -l 7797 Comment at: clang/docs/ReleaseNotes.rst:368 unsigned character literals. This fixes `Issue 54886

[PATCH] D125789: FIX the assembly format of the x86 backend to make both clang and gcc happy

pengfei added a comment. I think another way is to report the issue to GCC. From the perspective of the user, GCC should support both `{%k1} {z}` and `{%k1}{z}`. Then we don't need the clange on LLVM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D

[PATCH] D125789: FIX the assembly format of the x86 backend to make both clang and gcc happy

pengfei added a comment. In D125789#3519433 , @sheisc wrote: > In D125789#3519411 , @pengfei wrote: > >> I think another way is to report the issue to GCC. From the perspective of >> the user, GCC should support

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 430314. pengfei added a comment. Use 32-bit spill slot for half type. Others still on going. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107082/new/ https://reviews.llvm.org/D107082 Files: llvm/docs/Releas

[PATCH] D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 430349. pengfei added a comment. Replace __gnu_f2h_ieee/__gnu_h2f_ieee with __truncsfhf2/__extendhfsf2 to match with GCC. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107082/new/ https://reviews.llvm.org/D107

[PATCH] D107082: [X86][RFC][WIP] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 430897. pengfei added a comment. Adjust libcall lowering according to GCC code generation. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107082/new/ https://reviews.llvm.org/D107082 Files: llvm/docs/ReleaseN

[PATCH] D107082: [X86][RFC][WIP] Enable `_Float16` type support on X86 following the psABI

pengfei updated this revision to Diff 430985. pengfei retitled this revision from "[X86][RFC] Enable `_Float16` type support on X86 following the psABI" to "[X86][RFC][WIP] Enable `_Float16` type support on X86 following the psABI". pengfei added a comment. Fix a few minor issues. I think it's m

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei created this revision. pengfei added reviewers: nickdesaulniers, craig.topper, LuoYuanke. Herald added subscribers: StephenFan, hiraditya, kristof.beyls. Herald added a project: All. pengfei requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, MaskRay. Her

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86AsmPrinter.cpp:341 + MCInst TmpInst; + TmpInst.setOpcode(X86::INT3); + AsmPrinter::emitBasicBlockEnd(MBB); craig.topper wrote: > Why is TmpInst created unconditionally and not in the if? Good ca

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei updated this revision to Diff 431193. pengfei added a comment. Address Craig's comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126137/new/ https://reviews.llvm.org/D126137 Files: clang/docs/ReleaseNotes.rst clang/lib/Driver/Tool

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei updated this revision to Diff 431322. pengfei added a comment. Replaced `isIndirectBranch` with `isUnconditionalBranch` + `isReturn`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126137/new/ https://reviews.llvm.org/D126137 Files: clang

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei added a comment. In D126137#3530777 , @kristof.beyls wrote: > See https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html, documentation > for "mharden-sls": For AArch64, the options available on the command line are > "retbr", "blr", "none" an

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei updated this revision to Diff 431607. pengfei marked 5 inline comments as done. pengfei added a comment. Address @nickdesaulniers 's comments. Thanks for the thorough review and suggestions! > So we pessimize tail calls. Please fix and add a test case for that. This > might be an uninte

[PATCH] D126137: [X86] Add support for `-mharden-sls=all`

pengfei added inline comments. Comment at: clang/docs/ReleaseNotes.rst:371 +- Support ``-mharden-sls=all`` for X86. + nickdesaulniers wrote: > This should be updated if additional options are supported. > > You should also update `clang/docs/ClangCommandLineRe

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei added a comment. In D112143#3089072 , @nickdesaulniers wrote: > Fixes https://bugs.llvm.org/show_bug.cgi?id=51498? Yes. I mentioned pr51498 in commit message :) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

pengfei added a comment. In D112413#3089073 , @nickdesaulniers wrote: > Fixes https://bugs.llvm.org/show_bug.cgi?id=23258? Yes. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112413/new/ https://reviews.l

[PATCH] D110869: [X86] Implement -fzero-call-used-regs option

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86FrameLowering.cpp:540 + if (STI.hasSSE1()) +AddRegs(CallUsedRegs, X86::VR128RegClass); + if (STI.hasAVX()) Do we need to consider VR128XRegClass and VR256XRegClass when `hasVLX()`?

[PATCH] D112777: [X86][FP16] add alias for *_fmul_pch intrinsics

pengfei added a comment. > *_mul_pch is to align with *_mul_ps annd *_mul_pd And *_mul_ph? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112777/new/ https://reviews.llvm.org/D112777 ___ cfe-commits mail

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

pengfei added a comment. How about the GV is function pointer? I believe @xiangzhangllvm has lots of experience on it :) Comment at: clang/test/CodeGen/ms-inline-asm-static-variable.c:8 + // CHECK: @arr = internal global [10 x i32] + // CHECK: call void asm sideeffect inteld

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

pengfei added inline comments. Comment at: clang/test/CodeGen/ms-inline-asm-static-variable.c:8 + // CHECK: @arr = internal global [10 x i32] + // CHECK: call void asm sideeffect inteldialect "mov dword ptr $0[edx * $$4],edx", "=*m,{{.*}}([10 x i32]* @arr) + __asm mov dword

[PATCH] D112777: [X86][FP16] add alias for *_fmul_pch intrinsics

pengfei added inline comments. Comment at: clang/lib/Headers/avx512fp16intrin.h:3174 + #define _mm512_fmul_round_pch(A, B, R) \ ((__m512h)__builtin_ia32_vfmulcph512_mask( \ Missing th

[PATCH] D112777: [X86][FP16] add alias for *_fmul_pch intrinsics

pengfei added a comment. Also missing *_sch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112777/new/ https://reviews.llvm.org/D112777 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lis

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

pengfei updated this revision to Diff 387147. pengfei marked 3 inline comments as done. pengfei added a comment. Herald added a subscriber: dexonsmith. Address review comments. 1. Add support for `-mno-skip-rax-setup` and its test; 2. Use module flag metadata instead of command line option in bac

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

pengfei added inline comments. Comment at: clang/include/clang/Driver/Options.td:3193 +def mskip_rax_setup : Flag<["-"], "mskip-rax-setup">, Group, Flags<[NoXarchOption]>, + HelpText<"Skip setting up RAX register when passing variable arguments (x86 only)">; def mstackrealign

[PATCH] D112777: [X86][FP16] add alias for f*mul_*ch intrinsics

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Please wait one or two days for other comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112777/new/ https://reviews.llvm.org/D1127

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei added inline comments. Comment at: clang/test/Driver/x86-target-features.c:5 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-80387 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-X87 %s +// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-fp-

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:1313 + !CGF.getContext().getTargetInfo().hasFeature("avx512fp16") && + (TT.isX32() || TT.isX86()); + if ((SrcType->isHalfType() || iSFloat16Allowed) && We don't need to check

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:1315 + if ((SrcType->isHalfType() || iSFloat16Allowed) && + !CGF.getContext().getLangOpts().NativeHalfType) { // Cast to FP using the intrinsic if the half type itself isn't supported. --

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:1315 + if ((SrcType->isHalfType() || iSFloat16Allowed) && + !CGF.getContext().getLangOpts().NativeHalfType) { // Cast to FP using the intrinsic if the half type itself isn't supported. --

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:1315 + if ((SrcType->isHalfType() || iSFloat16Allowed) && + !CGF.getContext().getLangOpts().NativeHalfType) { // Cast to FP using the intrinsic if the half type itself isn't supported. --

[PATCH] D98895: [X86][clang] Disable long double type for -mno-x87 option

pengfei added a comment. > Disabled double or float return for x86 targets Sorry, I think we still need to match GCC's behavior. I.e., we shouldn't diagnosticate any FP type (float, double, long double) on 32-bits. https://godbolt.org/z/KrbhfWc9o We have users who require of that. Noticed this

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei updated this revision to Diff 387855. pengfei added a comment. 1. Add support for f80. 2. Add test case for 3 return values. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112143/new/ https://reviews.llvm.org/D112143 Files: clang/include/

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86CallingConv.td:279 + CCIfNotSubtarget<"hasX87()", +CCIfType<[f32], CCAssignToReg<[EAX, EDX, ECX]>>>, CCIfType<[f16], CCAssignToReg<[XMM0,XMM1,XMM2]>>, nickdesaulniers wrote: > Is there a te

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

pengfei updated this revision to Diff 387874. pengfei marked 3 inline comments as done. pengfei added a comment. Address review comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112413/new/ https://reviews.llvm.org/D112413 Files: clang/inc

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

pengfei added a comment. > It might be nice to add an llvm-link test that produces an error when this > module metadata doesn't match. Basically, it would be nice to error if during > LTO we link together two modules that differ in their use of -mskip-rax-setup > since that has ABI implications

[PATCH] D114099: Enable `_Float16` type support on X86 without the avx512fp16 flag

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:371 } + // Turn on _float16 for x86 (feature sse+) + HasFloat16 = SSELevel >= SSE2; sse2? Comment at: clang/lib/Basic/Targets/X86.cpp:372 + // Turn on _float16 for

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added a comment. Thanks for @rjmccall 's summary and @scanon 's information. They are exactly the backgrounds I know for the requirment. Sorry I didn't and couldn't say it clearly in this way. @zahiraam , I took `__fp16` for example to illustrate the case for `a + b + c`, but didn't emp

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

pengfei added a comment. Thanks @nickdesaulniers for the review! I found another problem with `SimpleMFlag`, to which `MarshallingInfoFlag` cannot be assigned separately. I'll land it as is then. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D11241

[PATCH] D112413: [X86] Add -mskip-rax-setup support to align with GCC

This revision was automatically updated to reflect the committed changes. Closed by commit rGde34a940ae72: [X86] Add -mskip-rax-setup support to align with GCC (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112413/new/ https://

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei added a comment. Thanks for the review! Comment at: llvm/test/CodeGen/X86/no-ret-in-x87-reg.ll:147-150 +; NOX87-NEXT:fldt {{[0-9]+}}(%esp) +; NOX87-NEXT:fldt {{[0-9]+}}(%esp) +; NOX87-NEXT:faddp %st, %st(1) +; NOX87-NEXT:fstpt (%esp) nic

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

This revision was automatically updated to reflect the committed changes. Closed by commit rGa9fba2be35db: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.o

[PATCH] D114162: [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits

pengfei created this revision. pengfei added reviewers: asavonic, erichkeane, nickdesaulniers. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. We should match GCC's behavior which allows floating-point type for -mno-x87 option on 3

[PATCH] D98895: [X86][clang] Disable long double type for -mno-x87 option

pengfei added a comment. @asavonic , I put a patch D114162 to enable it on 32-bits. Could you help to review it? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D98895/new/ https://reviews.llvm.org/D98895 _

[PATCH] D114162: [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:385 - if (!HasX87) { -if (LongDoubleFormat == &llvm::APFloat::x87DoubleExtended()) - HasLongDouble = false; -if (getTriple().getArch() == llvm::Triple::x86) - HasFPReturn = false; - }

[PATCH] D114318: [clang] Add missing CPUID feature bit masks

pengfei added a comment. In D114318#3144721 , @adamdb5 wrote: > ran clang-format I think we'd better to keep the existing format. It's in good readability. Comment at: clang/lib/Headers/cpuid.h:110 +#define bit_RDRND 0x4000 +#defi

[PATCH] D114318: [clang] Add missing CPUID feature bit masks

pengfei added a subscriber: hjl.tools. pengfei added a comment. > bit_HYPERVISOR: This seems to be standardized. See the following links: I'm not sure what are these bits defined according to. From PV of HW, I think this shouldn't be added. This bit is set by hypervisor rather than CPU like oth

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added a comment. > Should also generate this same IR right? For `a + b + c`, yes, they are the same. For `a + b`, no. That's the difference between approaches #3 and #4, which I didn't emphasize before :) https://godbolt.org/z/onbGeqdYv CHANGES SINCE LAST ACTION https://reviews.llvm

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added inline comments. Comment at: clang/test/CodeGen/X86/Float16-aritmetic.c:8-9 + // CHECK: alloca half + // CHECK: store half {{.*}}, half* + // CHECK: store half {{.*}}, half* + // CHECK: load half, half* zahiraam wrote: > pengfei wrote: > > This

[PATCH] D114162: [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits

pengfei updated this revision to Diff 389914. pengfei added a comment. Emit diagnostic for long double for i386 target too. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114162/new/ https://reviews.llvm.org/D114162 Files: clang/lib/Basic/Targets

[PATCH] D114162: [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:385 - if (!HasX87) { -if (LongDoubleFormat == &llvm::APFloat::x87DoubleExtended()) - HasLongDouble = false; -if (getTriple().getArch() == llvm::Triple::x86) - HasFPReturn = false; - }

[PATCH] D114162: [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits

This revision was automatically updated to reflect the committed changes. Closed by commit rG42c15c7edf17: [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114

[PATCH] D114782: [X86][clang] Emit diagnostic for float and double when we have features -x87 and -sse on 64-bits

pengfei created this revision. pengfei added reviewers: asavonic, erichkeane, nickdesaulniers. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. A follow up of D114162 . Repository: rG LLVM Github

[PATCH] D114782: [X86][clang] Emit diagnostic for float and double when we have features -x87 and -sse on 64-bits

pengfei updated this revision to Diff 390632. pengfei added a comment. Fix a lit fail. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114782/new/ https://reviews.llvm.org/D114782 Files: clang/include/clang/Basic/DiagnosticSemaKinds.td clang/lib

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

pengfei added a comment. @skan This change seems don't work for -fpic, see https://godbolt.org/z/h3nWoerPe I don't have any idea to handle these cases, I suggest we should revert this patch first. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D1130

[PATCH] D136145: [IR][RFC] Restrict read only when cache type of llvm.prefetch is instruction

pengfei created this revision. pengfei added reviewers: craig.topper, uweigand, lenary, efriedma. Herald added subscribers: StephenFan, jdoerfert, hiraditya. Herald added a project: All. pengfei requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-co

[PATCH] D136040: [X86] Support PREFETCHI instructions

pengfei added a comment. In D136040#3862551 , @uweigand wrote: > In D136040#3862386 , @pengfei wrote: > >> Sure, it is possible. But at least for now, there's no real target requires >> it. Checked with `grep -rw

[PATCH] D136040: [X86] Support PREFETCHI instructions

pengfei updated this revision to Diff 468463. pengfei added a comment. Rebased on D136145 and split RIP optimization. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136040/new/ https://reviews.llvm.org/D136040 Fi

[PATCH] D136145: [IR][RFC] Restrict read only when cache type of llvm.prefetch is instruction

pengfei added a comment. In D136145#3864584 , @lenary wrote: > The Arm changes (for tests) here are reasonable, and indeed both arm > architectures do not allocate encoding space for instruction write. Thanks @lenary for confirmation! Repository: rG

[PATCH] D136145: [IR][RFC] Restrict read only when cache type of llvm.prefetch is instruction

pengfei updated this revision to Diff 468486. pengfei marked an inline comment as done. pengfei added a comment. Remove instruction write prefetch test from SystemZ. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136145/new/ https://reviews.llvm.org

[PATCH] D136040: [X86][1/2] Support PREFETCHI instructions

pengfei updated this revision to Diff 468806. pengfei added a comment. Remove the dependence to D136145 . Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136040/new/ https://reviews.llvm.org/D136040 Files: clang/d

[PATCH] D136040: [X86][1/2] Support PREFETCHI instructions

pengfei added inline comments. Comment at: clang/lib/Headers/prfchiintrin.h:16 +/// Loads an instruction sequence containing the specified memory address into +///all level cache. +/// craig.topper wrote: > craig.topper wrote: > > It looks old that this inden

[PATCH] D136145: [IR][RFC] Restrict read only when cache type of llvm.prefetch is instruction

pengfei added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:7574 - if (NumArgs > 3) + if (NumArgs > 4) return Diag(TheCall->getEndLoc(), craig.topper wrote: > craig.topper wrote: > > Not clear to me that we should be changing the definitio

[PATCH] D132329: [X86][RFC] Using `__bf16` for AVX512_BF16 intrinsics

pengfei added inline comments. Comment at: clang/lib/Headers/avx512bf16intrin.h:13 +#ifdef __SSE2__ + LuoYuanke wrote: > What is this macro check used for? `__bf16` is not available without SSE2. This is to make sure no error generated if user include

[PATCH] D136040: [X86][1/2] Support PREFETCHI instructions

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG62ca79102cf9: [X86][1/2] Support PREFETCHI instructions (authored by pengfei). Changed prior to commit: https://reviews.llvm.org/D136040?vs=468806

[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/CMakeLists.txt:146 avxvnniintrin.h + avxvnniint8intrin.h bmi2intrin.h Move it before `avxvnniintrin.h` for the order? Comment at: llvm/lib/Support/X86TargetParser.cpp:584 +st

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/immintrin.h:257 +/* FIXME: Change these When _Float16 type is supported */ +#if defined(__AVXNECONVERT__) && defined(__AVX512FP16__) FreddyYe wrote: > pengfei wrote: > > craig.topper wrote: > > > Is t

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added inline comments. Comment at: clang/test/CodeGen/X86/avxneconvert-builtins.c:2 +// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +avx2 -target-feature +avxneconvert \ +// RUN: -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werr

[PATCH] D120395: [X86] Prohibit arithmetic operations on type `__bfloat16`

pengfei abandoned this revision. pengfei added a comment. This is not needed anymore, thanks @RKSimon Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120395/new/ https://reviews.llvm.org/D120395 ___ cfe-co

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:5643-5653 +case Intrinsic::x86_cmpccxadd32: +case Intrinsic::x86_cmpccxadd64: { + Info.opc = ISD::INTRINSIC_W_CHAIN; + Info.ptrVal = I.getArgOperand(0); + unsigned Size = I.g

[PATCH] D135951: [X86][1/2] SUPPORT RAO-INT

pengfei updated this revision to Diff 469642. pengfei added a comment. Add intrinsic support first. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135951/new/ https://reviews.llvm.org/D135951 Files: clang/docs/ReleaseNotes.rst clang/include/cla

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

pengfei added inline comments. Comment at: clang/test/Driver/x86-target-features.c:313 +// RUN: %clang -target i686-unknown-linux-gnu -mcmpccxadd %s -### -o %t.o 2>&1 | FileCheck -check-prefix=CMPCCXADD %s +// RUN: %clang -target i686-unknown-linux-gnu -mno-cmpccxadd %s -### -

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Comment at: llvm/lib/Target/X86/X86InstrInfo.td:3024 +// +let Predicates = [HasCMPCCXADD, In64BitMode], Defs = [EFLAGS], +Constraints = "$dstsrc2 = $dst" in { ---

[PATCH] D135932: [X86] Add AVX-IFMA instructions.

pengfei added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86.def:1335-1338 TARGET_BUILTIN(__builtin_ia32_vpmadd52huq128, "V2OiV2OiV2OiV2Oi", "ncV:128:", "avx512ifma,avx512vl") TARGET_BUILTIN(__builtin_ia32_vpmadd52huq256, "V4OiV4OiV4OiV4Oi", "ncV:256:", "a

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86.def:2106-2107 +TARGET_BUILTIN(__builtin_ia32_vcvtneoph2ps256, "V8fV16xC*", "nV:256:", "avxneconvert") +TARGET_BUILTIN(__builtin_ia32_vcvtneps2bf16128, "V8sV4f", "nV:128:", "avxneconvert") +TARGET_B

[PATCH] D135932: [X86] Add AVX-IFMA instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/avxifmaintrin.h:36 +/// __m128i +/// _mm_madd52hi_avx_epu64 (__m128i __X, __m128i __Y, __m128i __Z) +/// \endcode FreddyYe wrote: > pengfei wrote: > > Should we provide unified intrinsic `_mm_madd52hi_e

[PATCH] D135951: [X86][1/2] SUPPORT RAO-INT

pengfei updated this revision to Diff 471040. pengfei added a comment. Address review comments; Change intrinsics name from *_si* to *_i*. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135951/new/ https://reviews.llvm.org/D135951 Files: clang/do

[PATCH] D135932: [X86] Add AVX-IFMA instructions.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135932/new/ https://reviews.llvm.org/D135932

[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135938/new/ https://reviews.llvm.org/D135938

[PATCH] D135951: [X86][1/2] SUPPORT RAO-INT

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGb51b90d6e25c: [X86][1/2] SUPPORT RAO-INT (authored by pengfei). Changed prior to commit: https://reviews.llvm.org/D135951?vs=471040&id=471093#toc

[PATCH] D136919: [X86][RFC] Change mangle name of __bf16 from u6__bf16 to DF16b

pengfei created this revision. pengfei added reviewers: RKSimon, ldionne, bkramer. Herald added a project: All. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. GCC folks decided to make the mangling of __bf16 the same as std::bfloat

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/avx512vlbf16intrin.h:164 +#define _mm_cvtneps_pbh(A) \ + ((__m128bh)__builtin_ia32_vcvtneps2bf16128((__v4sf)(A))) RKSimon wrote: > Is there no way for __attribute__ to allow different attribute permu

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added inline comments. Comment at: clang/include/clang/Driver/Options.td:4595-4596 def mno_avxvnniint8 : Flag<["-"], "mno-avxvnniint8">, Group; +def mavxneconvert : Flag<["-"], "mavxneconvert">, Group; +def mno_avxneconvert : Flag<["-"], "mno-avxneconvert">, Group; de

[PATCH] D137036: [X86] Enable EVEX GFNI instructions without avx512bw.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM, thanks for the patch! Comment at: llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll:29 +; +; X86NOBW-LABEL: test_vgf2p8affineinvqb_128: +; X86NOBW: # %bb.0: -

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added inline comments. Comment at: clang/lib/Headers/avx512vlbf16intrin.h:164 +#define _mm_cvtneps_pbh(A) \ + ((__m128bh)__builtin_ia32_vcvtneps2bf16128((__v4sf)(A))) FreddyYe wrote: > pengfei wrote: > > pengfei wrote: > > > RKSimon wrote: > > > > Is t

[PATCH] D135930: [X86] Add AVX-NE-CONVERT instructions.

pengfei added a comment. LGTM. Comment at: clang/lib/Headers/avx512vlbf16intrin.h:164 +#define _mm_cvtneps_pbh(A) \ + ((__m128bh)__builtin_ia32_vcvtneps2bf16128((__v4sf)(A))) FreddyYe wrote: > pengfei wrote: > > FreddyYe wrote: > > > pengfei wrote: > > > > p

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

pengfei added a comment. In D131134#3714860 , @craig.topper wrote: > Yes AMX is only supported in 64-bit mode but I doubt CPUID checks which mode > the program is running in. I guess `HasAMXSave` is `false` on 32-bit mode https://github.com/llvm/llvm-

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

pengfei added a comment. In D131134#3715024 , @pengfei wrote: > In D131134#3714860 , @craig.topper > wrote: > >> Yes AMX is only supported in 64-bit mode but I doubt CPUID checks which mode >> the program is run

[PATCH] D131134: [X86] Report error if the amx enabled on the non-64-bits target

pengfei added a comment. In D131134#3715079 , @craig.topper wrote: > In D131134#3715062 , @pengfei wrote: > >> In D131134#3715024 , @pengfei >> wrote: >> >>> In D131134#

[PATCH] D113107: Support of expression granularity for _Float16.

pengfei added inline comments. Comment at: clang/test/Sema/Float16.c:13 - -#ifdef HAVE _Complex _Float16 a; rjmccall wrote: > I don't know why these test changes are in this patch. My understanding is > that we already committed a patch to enable `_Float16`, a

[PATCH] D132329: [X86][RFC] Using `__bf16` for AVX512_BF16 intrinsics

pengfei created this revision. pengfei added reviewers: LuoYuanke, craig.topper, andrew.w.kaylor, RKSimon, FreddyYe, skan. Herald added subscribers: StephenFan, hiraditya. Herald added a project: All. pengfei requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, j

[PATCH] D132342: [X86][AVX512FP16] Relax limitation to AVX512FP16 intrinsics. NFCI

pengfei created this revision. pengfei added reviewers: LuoYuanke, craig.topper, yubing, RKSimon, skan, FreddyYe. Herald added a subscriber: StephenFan. Herald added a project: All. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. S

[PATCH] D132342: [X86][AVX512FP16] Relax limitation to AVX512FP16 intrinsics. NFCI

pengfei updated this revision to Diff 454362. pengfei added a comment. Don't know why, but check `!defined(__SSE2__)` leads to compiler_builtins_x86.c fails like below. Move the check into avx512[vl]fp16intrin.h instead. error: 'error' diagnostics seen but not expected: File /export/users

[PATCH] D132372: [X86][AVX512FP16] Add the missing const modifiers. NFCI

pengfei created this revision. pengfei added reviewers: craig.topper, yubing, LuoYuanke, RKSimon, skan, FreddyYe. Herald added a subscriber: StephenFan. Herald added a project: All. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. T

[PATCH] D132342: [X86][AVX512FP16] Relax limitation to AVX512FP16 intrinsics. NFCI

pengfei updated this revision to Diff 454475. pengfei added a comment. Rebased on D132372 . > Should the const change be a separate patch? They feel unrelated. Done. The change results in lit test fails. Repository: rG LLVM Github Monorepo CHANGES SINCE LAS

[PATCH] D132372: [X86][AVX512FP16] Add the missing const modifiers. NFCI

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGdf23fc4f7fe7: [X86][AVX512FP16] Add the missing const modifiers. NFCI (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LA

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