[PATCH] D52320: AMDGPU: add __builtin_amdgcn_update_dpp

arsenm added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:11313-11315 + case AMDGPU::BI__builtin_amdgcn_update_dpp: { +llvm::SmallVector Args; +for (unsigned I = 0; I != 6; ++I) b-sumner wrote: > arsenm wrote: > > The only difference between th

[PATCH] D52412: OpenCL: Mark printf format string argument

arsenm added a comment. ping https://reviews.llvm.org/D52412 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D52412: OpenCL: Mark printf format string argument

arsenm closed this revision. arsenm added a comment. r343653 https://reviews.llvm.org/D52412 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D52891: [AMDGPU] Add -fvisibility-amdgpu-non-kernel-functions

arsenm added a comment. I think the name needs work, but I'm not sure what it should be. I think it should avoid using "non" and "amdgpu" https://reviews.llvm.org/D52891 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/

[PATCH] D52891: [AMDGPU] Add -fvisibility-amdgpu-non-kernel-functions

arsenm added a comment. Tests should also include some global variables https://reviews.llvm.org/D52891 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D52891: [AMDGPU] Add -fvisibility-amdgpu-non-kernel-functions

arsenm added a comment. Use of the word kernel might confuse general people. Maybe it needs to specify OpenCL, but it also applies to HIP/CUDA https://reviews.llvm.org/D52891 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm

[PATCH] D57835: Fix -ftime-report with -x ir

arsenm created this revision. Herald added a subscriber: wdng. This was only printing the clang frontend timer, and none of the backend timers. Set the llvm global for enabling the backend time report when creating the frontend timers, rather than in the BackendConsumer constructor. There

[PATCH] D57835: Fix -ftime-report with -x ir

arsenm added a comment. I partially solved the problem with double printing the reports. It's from this in cc1_main: // If any timers were active but haven't been destroyed yet, print theirp // results now. This happens in -disable-free mode. llvm::TimerGroup::printAll(llvm::errs()); On

[PATCH] D57977: [HIP] compile option code-object-v3 propagate to llc

arsenm added a comment. I think this breaks the attributes already listed in the functions on the IR since -mattr overrides those. I think we need to stop using subtarget features to communicate this Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57977/new/ http

[PATCH] D58449: Junk: Add assert to find GCCBuiltins with constant arguments missing

arsenm created this revision. arsenm added a reviewer: atanasyan. Herald added subscribers: jdoerfert, fedor.sergeev, aheejin, wdng, dschuff. Don't bother reviewing this, I have no intention of committing this hack to find builtins missing immarg https://reviews.llvm.org/D58449 Files: lib/Se

[PATCH] D58526: AMDGPU: Don't emit debugger subtarget features

arsenm created this revision. arsenm added reviewers: yaxunl, kzhuravl, t-tye. Herald added subscribers: jdoerfert, tpr, dstuttard, nhaehnle, wdng, jvesely. Keep the flag around for compatability. https://reviews.llvm.org/D58526 Files: lib/Driver/ToolChains/AMDGPU.cpp test/Driver/amdgpu-fea

[PATCH] D58526: AMDGPU: Don't emit debugger subtarget features

arsenm updated this revision to Diff 187849. arsenm added a comment. Undelete run line CHANGES SINCE LAST ACTION https://reviews.llvm.org/D58526/new/ https://reviews.llvm.org/D58526 Files: lib/Driver/ToolChains/AMDGPU.cpp test/Driver/amdgpu-features.c Index: test/Driver/amdgpu-features

[PATCH] D58526: AMDGPU: Don't emit debugger subtarget features

arsenm closed this revision. arsenm added a comment. r354624 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D58526/new/ https://reviews.llvm.org/D58526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D57835: Fix -ftime-report with -x ir

arsenm added a comment. Herald added a subscriber: jdoerfert. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57835/new/ https://reviews.llvm.org/D57835 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-b

[PATCH] D16351: [FIX] Bug 25404 - Crash on typedef in OpenCL 2.0

arsenm added a comment. Herald added subscribers: jdoerfert, jfb, yaxunl, wdng. Is this still needed? The bug is still open CHANGES SINCE LAST ACTION https://reviews.llvm.org/D16351/new/ https://reviews.llvm.org/D16351 ___ cfe-commits mailing lis

[PATCH] D37568: [AMDGPU] Allow flexible register names in inline asm constraints

arsenm added inline comments. Comment at: test/Sema/inline-asm-validate-amdgpu.cl:38 +__asm("v_add_f32_e32 v1, v2, v3" : "=v1"(ci) : "v2"(ai), "v3"(bi) : ); /// expected-error {{invalid output constraint '=v1' in asm}} +__asm("v_add_f32_e32 v1, v2, v3" : "=v1:2"(ci) : "v

[PATCH] D37568: [AMDGPU] Allow flexible register names in inline asm constraints

arsenm added inline comments. Comment at: test/Sema/inline-asm-validate-amdgpu.cl:38 +__asm("v_add_f32_e32 v1, v2, v3" : "=v1"(ci) : "v2"(ai), "v3"(bi) : ); /// expected-error {{invalid output constraint '=v1' in asm}} +__asm("v_add_f32_e32 v1, v2, v3" : "=v1:2"(ci) : "v

[PATCH] D37568: [AMDGPU] Allow flexible register names in inline asm constraints

arsenm added inline comments. Comment at: lib/Basic/Targets/AMDGPU.h:124 + /// {sn}, {s[n]} + /// {S} , wheere S is a special register name + {v[n:m]} Typo wheere Comment at: lib/Basic/Targets/AMDGPU.h:194 +Info.setAllowsRegister();

[PATCH] D38113: OpenCL: Assume functions are convergent

arsenm created this revision. Herald added a subscriber: wdng. This was done for CUDA functions in r261779, and for the same reason this also needs to be done for OpenCL. An arbitrary function could have a barrier() call in it, which in turn requires the calling function to be convergent. https:

[PATCH] D38113: OpenCL: Assume functions are convergent

arsenm updated this revision to Diff 116125. arsenm added a comment. Herald added a subscriber: nhaehnle. Missed test update https://reviews.llvm.org/D38113 Files: include/clang/Basic/LangOptions.h lib/CodeGen/CGCall.cpp test/CodeGenOpenCL/amdgpu-attrs.cl test/CodeGenOpenCL/convergent.c

[PATCH] D62696: AMDGPU: Use AMDGPU toolchain for other OSes

arsenm created this revision. arsenm added a reviewer: yaxunl. Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, kzhuravl. This would need more work to actually support them, but this is less wrong than the default. https://reviews.llvm.org/D62696 Files: lib/Driver/Dr

[PATCH] D62697: AMDGPU: Disable errno by default

arsenm created this revision. arsenm added a reviewer: yaxunl. Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, kzhuravl. https://reviews.llvm.org/D62697 Files: lib/Driver/ToolChains/AMDGPU.h test/Driver/fast-math.c Index: test/Driver/fast-math.c ==

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm created this revision. arsenm added reviewers: t-tye, b-sumner. Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl. The backend default maximum should be the hardware maximum, so the frontend should set the implementation defined default maximum. https://

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm marked an inline comment as done. arsenm added inline comments. Comment at: lib/CodeGen/TargetInfo.cpp:7885 +// By default, restrict the maximum size to 256. +F->addFnAttr("amdgpu-flat-work-group-size", "128,256"); } b-sumner wrote: > Theoretica

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm marked an inline comment as done. arsenm added inline comments. Comment at: lib/CodeGen/TargetInfo.cpp:7885 +// By default, restrict the maximum size to 256. +F->addFnAttr("amdgpu-flat-work-group-size", "128,256"); } yaxunl wrote: > arsenm wrote

[PATCH] D62697: AMDGPU: Disable errno by default

arsenm added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62697/new/ https://reviews.llvm.org/D62697 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D62696: AMDGPU: Use AMDGPU toolchain for other OSes

arsenm added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62696/new/ https://reviews.llvm.org/D62696 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62739/new/ https://reviews.llvm.org/D62739 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D62697: AMDGPU: Disable errno by default

arsenm added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62697/new/ https://reviews.llvm.org/D62697 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. In D62739#1536390 , @yaxunl wrote: > My concern is that this essentially forcing user to add > amdgpu_flat_work_group_size attribute to all kernels that are executed > outside of (128,256). Potentially this can cause lots of regre

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. In D62739#1536428 , @b-sumner wrote: > We need to communicate with anyone generating IR to ensure this is being > generated before we change the default. clang is only one of those > generators. This change will also need to be

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. In D62739#1543437 , @arsenm wrote: > In D62739#1536390 , @yaxunl wrote: > > > My concern is that this essentially forcing user to add > > amdgpu_flat_work_group_size attribute to all kernels

[PATCH] D62696: AMDGPU: Use AMDGPU toolchain for other OSes

arsenm closed this revision. arsenm added a comment. r363390 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62696/new/ https://reviews.llvm.org/D62696 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. In D62739#1543578 , @b-sumner wrote: > In D62739#1543438 , @arsenm wrote: > > > In D62739#1536428 , @b-sumner > > wrote: > > > > > We need to communi

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm updated this revision to Diff 204795. arsenm added a comment. Rebase CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62739/new/ https://reviews.llvm.org/D62739 Files: lib/CodeGen/TargetInfo.cpp test/CodeGenOpenCL/amdgpu-attrs.cl Index: test/CodeGenOpenCL/amdgpu-attrs.cl

[PATCH] D63366: AMDGPU: Add GWS instruction builtins

arsenm created this revision. arsenm added reviewers: rampitec, b-sumner, yaxunl. Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, kzhuravl. https://reviews.llvm.org/D63366 Files: include/clang/Basic/BuiltinsAMDGPU.def test/CodeGenOpenCL/builtins-amdgcn.cl Index: t

[PATCH] D62697: AMDGPU: Disable errno by default

arsenm closed this revision. arsenm added a comment. r363682 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62697/new/ https://reviews.llvm.org/D62697 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D63366: AMDGPU: Add GWS instruction builtins

arsenm closed this revision. arsenm added a comment. r363684 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D63366/new/ https://reviews.llvm.org/D63366 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D63578: AMDGPU: Add DS GWS sema builtins

arsenm created this revision. arsenm added reviewers: rampitec, b-sumner, yaxunl. Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, kzhuravl. arsenm added a parent revision: D63576: AMDGPU: Add intrinsics for DS GWS semaphore instructions. https://reviews.llvm.org/D63578

[PATCH] D64828: AMDGPU: Add some missing builtins

arsenm created this revision. arsenm added reviewers: rampitec, yaxunl, kzhuravl, b-sumner. Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely. https://reviews.llvm.org/D64828 Files: include/clang/Basic/BuiltinsAMDGPU.def lib/CodeGen/CGBuiltin.cpp test/CodeGenOpenCL/bu

[PATCH] D64828: AMDGPU: Add some missing builtins

arsenm updated this revision to Diff 210216. arsenm added a comment. Drop one and fix missing test CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64828/new/ https://reviews.llvm.org/D64828 Files: include/clang/Basic/BuiltinsAMDGPU.def lib/CodeGen/CGBuiltin.cpp test/CodeGenOpenCL/b

[PATCH] D64828: AMDGPU: Add some missing builtins

arsenm closed this revision. arsenm added a comment. r366286 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64828/new/ https://reviews.llvm.org/D64828 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D64563: Updated the signature for some stack related intrinsics (CLANG)

arsenm added a comment. Can you add AMDGPU tests for these showing the correct address space is used CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64563/new/ https://reviews.llvm.org/D64563 ___ cfe-commits mailing list cfe-commits@lists.llv

[PATCH] D64563: Updated the signature for some stack related intrinsics (CLANG)

arsenm accepted this revision. arsenm added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64563/new/ https://reviews.llvm.org/D64563 ___ cfe-commits mailing list cfe-commits@l

[PATCH] D62731: [RFC] Add support for options -fp-model= and -fp-speculation= : specify floating point behavior

arsenm added inline comments. Comment at: llvm/include/llvm/IR/FPState.h:1 +#ifndef LLVM_FPSTATE_H +#define LLVM_FPSTATE_H Missing license header and c++ mode comment Comment at: llvm/lib/IR/FPState.cpp:1 +#include "llvm/IR/FPState.h" +#include

[PATCH] D65454: AMDGPU: Add missing builtin declarations

arsenm created this revision. arsenm added reviewers: yaxunl, rampitec, b-sumner, kzhuravl. Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely. https://reviews.llvm.org/D65454 Files: include/clang/Basic/BuiltinsAMDGPU.def test/CodeGenOpenCL/builtins-amdgcn.cl Index: te

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62739/new/ https://reviews.llvm.org/D62739 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D65454: AMDGPU: Add missing builtin declarations

arsenm closed this revision. arsenm added a comment. r367431 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D65454/new/ https://reviews.llvm.org/D65454 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D65597: WIP: Builtins: Start adding half versions of math builtins

arsenm created this revision. arsenm added reviewers: rsmith, rjmccall, Anastasia, yaxunl. Herald added a subscriber: wdng. The implementation of the OpenCL builtin currently library uses 2 different hacks to get to the corresponding IR intrinsics from the source. This will allow removal of thos

[PATCH] D65597: WIP: Builtins: Start adding half versions of math builtins

arsenm updated this revision to Diff 213276. arsenm added a comment. Change naming scheme, add more and tests CHANGES SINCE LAST ACTION https://reviews.llvm.org/D65597/new/ https://reviews.llvm.org/D65597 Files: include/clang/Basic/Builtins.def lib/CodeGen/CGBuiltin.cpp test/CodeGenOpe

[PATCH] D65753: Builtins: Add some v2f16 variants

arsenm created this revision. arsenm added reviewers: rjmccall, Anastasia, yaxunl, rsmith. Herald added a subscriber: wdng. arsenm added a parent revision: D65597: WIP: Builtins: Start adding half versions of math builtins. This will avoid hacks in the OpenCL builtin library. https://reviews.ll

[PATCH] D65597: WIP: Builtins: Start adding half versions of math builtins

arsenm closed this revision. arsenm added a comment. r367973 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D65597/new/ https://reviews.llvm.org/D65597 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D64931: Change X86 datalayout for three address spaces that specify pointer sizes.

arsenm added a comment. In D64931#1622039 , @lebedev.ri wrote: > In D64931#1622038 , @akhuang wrote: > > > @lebedev.ri The test case datalayout strings were changed because somewhere > > llvm asserts that the strin

[PATCH] D66198: AMDGPU: Add builtins for is_local/is_private

arsenm created this revision. arsenm added reviewers: rampitec, b-sumner. Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl. arsenm added a parent revision: D66197: AMDGPU: Add intrinsics for address space identification. https://reviews.llvm.org/D66198

[PATCH] D66198: AMDGPU: Add builtins for is_local/is_private

arsenm updated this revision to Diff 215168. arsenm added a comment. rename CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66198/new/ https://reviews.llvm.org/D66198 Files: include/clang/Basic/BuiltinsAMDGPU.def lib/Basic/Targets/AMDGPU.cpp test/CodeGenOpenCL/builtins-amdgcn-ci.cl

[PATCH] D64931: Change X86 datalayout for three address spaces that specify pointer sizes.

arsenm added a comment. In D64931#1633669 , @akhuang wrote: > > Address space have backend defined semantics, and aren’t really reserved > > for front end use. I think the fact that non-0 address spaces on X86 > > codegen the same as address space 0 and

[PATCH] D63578: AMDGPU: Add DS GWS sema builtins

arsenm closed this revision. arsenm added a comment. r363986 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D63578/new/ https://reviews.llvm.org/D63578 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D63649: AMDGPU: Fix target builtins for gfx10

arsenm created this revision. arsenm added a reviewer: rampitec. Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl. This wasn't setting some of the features from older generations. https://reviews.llvm.org/D63649 Files: lib/Basic/Targets/AMDGPU.cpp

[PATCH] D63649: AMDGPU: Fix target builtins for gfx10

arsenm closed this revision. arsenm added a comment. r364123 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D63649/new/ https://reviews.llvm.org/D63649 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[PATCH] D62739: AMDGPU: Always emit amdgpu-flat-work-group-size

arsenm added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62739/new/ https://reviews.llvm.org/D62739 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D47154: Try to make builtin address space declarations not useless

arsenm added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:3500 +if (auto *PtrTy = dyn_cast(PTy)) { + if (PtrTy->getAddressSpace() != + ArgValue->getType()->getPointerAddressSpace()) { Anastasia wrote: > arsenm wrote: > > An

[PATCH] D47154: Try to make builtin address space declarations not useless

arsenm updated this revision to Diff 154561. arsenm added a comment. Add sema test for numbered address spaces https://reviews.llvm.org/D47154 Files: include/clang/AST/ASTContext.h include/clang/Basic/BuiltinsAMDGPU.def include/clang/Basic/TargetInfo.h lib/AST/ASTContext.cpp lib/Basic

[PATCH] D47154: Try to make builtin address space declarations not useless

arsenm added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:3500 +if (auto *PtrTy = dyn_cast(PTy)) { + if (PtrTy->getAddressSpace() != + ArgValue->getType()->getPointerAddressSpace()) { Anastasia wrote: > arsenm wrote: > > An

[PATCH] D46871: [AMDGPU] Add interpolation builtins

arsenm accepted this revision. arsenm added a comment. This revision is now accepted and ready to land. LGTM. Checking the full operands wouldn't hurt though. Repository: rC Clang https://reviews.llvm.org/D46871 ___ cfe-commits mailing list cfe-c

[PATCH] D53768: Add VerboseOutputStream to CompilerInstance

arsenm accepted this revision. arsenm added a comment. This revision is now accepted and ready to land. Herald added a subscriber: wdng. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D53768/new/ https://reviews.llvm.org/D53768 ___ cfe-c

[PATCH] D69494: OpenMP: Add helper function for convergent runtime calls

arsenm added a comment. In D69494#1722853 , @ABataev wrote: > Tests? In D69494#1722853 , @ABataev wrote: > Tests? This is NFC and doesn't change any behavior. The test for the convergent attribute is already

[PATCH] D69494: OpenMP: Add helper function for convergent runtime calls

arsenm added a comment. In D69494#1722868 , @ABataev wrote: > In D69494#1722867 , @arsenm wrote: > > > In D69494#1722853 , @ABataev wrote: > > > > > Tests? > > > > > > > > >

[PATCH] D69493: Add -fconvergent-functions flag

arsenm added a comment. In D69493#1722894 , @jlebar wrote: > I'm confused about "The CUDA builtin library is apparently compiled in C++ > mode". By...whom, and for what purposes? > > No objections from me, this seems reasonable regardless, but I'd also l

[PATCH] D69494: OpenMP: Add helper function for convergent runtime calls

arsenm closed this revision. arsenm added a comment. r40ab8ae9fb70f1550815bf0f867148b5101a4f66 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69494/new/ https://reviews.llvm.org/D69494 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D69495: OpenMP: Add convergent to more runtime functions

arsenm closed this revision. arsenm added a comment. 56a503bdba9c33fce4d8fe86494cfd9c0b62c88a CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69495/new/ https://reviews.llvm.org/D69495 ___ cfe-commits mailing list cfe-commits@lists.llvm.org h

[PATCH] D69498: IR: Invert convergent attribute handling

arsenm marked an inline comment as done. arsenm added a comment. In D69498#1723606 , @rjmccall wrote: > A note on spelling: the no prefix seems to be used largely with verbs; it's > weird to use it here with an adjective, especially since noncovergent is

[PATCH] D69498: IR: Invert convergent attribute handling

arsenm added a comment. I think the question should be what the IR policy is for properties that are required for correctness and not necessarily what most users will use. There's a general trend towards functions being correct by default, and attributes adding optimization possibilities. conve

[PATCH] D79744: clang: Add address space to indirect abi info and use it for kernels

arsenm added a comment. In D79744#2040731 , @rjmccall wrote: > In D79744#2040434 , @jdoerfert wrote: > > > In D79744#2040380 , @rjmccall > > wrote: > > > > > In D79744#20403

[PATCH] D80416: [RFC][OpenCL] Set fp contract flag on -cl-mad-enable

arsenm added a comment. The langref wording makes me think this isn't quite right. This depends on your definition of floating point contraction. I've always assumed it meant allow FMA, potentially increasing precision. Is contracting into something less precise allowed? If not, that's stricter

[PATCH] D80416: [RFC][OpenCL] Set fp contract flag on -cl-mad-enable

arsenm added a comment. I think the contract flag needs clarification. I would interpret an instruction with only a contract flag as meaning allow precision increasing FMA formation, and contract+afn to mean combining while reducing precision CHANGES SINCE LAST ACTION https://reviews.llvm.or

[PATCH] D80461: HIP: Try to deal with more llvm package layouts

arsenm created this revision. arsenm added reviewers: yaxunl, scchan. Herald added subscribers: kerbowa, nhaehnle, wdng, jvesely. The various HIP builds are all inconsistent. The default llvm install goes to ${INSTALL_PREFIX}/bin/clang, but the rocm packaging scripts move this under ${INS

[PATCH] D80461: HIP: Try to deal with more llvm package layouts

arsenm closed this revision. arsenm added a comment. 1d96dca9491e3d75c11c3cd1acff5fcda8c2f613 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80461/new/ https://reviews.llvm.org/D80461 __

[PATCH] D80237: [hip] Ensure pointer in struct argument has proper `addrspacecast`.

arsenm added a comment. In D80237#2051933 , @rjmccall wrote: > Okay. Can you explain why we need to coerce in the first place, though? > Especially if the representation is the same, why is your target-lowering > requiring parameters to be coerced to i

[PATCH] D80440: [OpenCL] Prevent fused mul and add by default

arsenm requested changes to this revision. arsenm added a comment. This revision now requires changes to proceed. I think the current handling is correct. As you said, the specified default is FP_CONTRACT ON. The description of the mad function in the table is unrelated, since that's the definit

[PATCH] D80727: AMDGPU: Add intrinsic for s_setreg

arsenm created this revision. arsenm added reviewers: rampitec, yaxunl, kerbowa. Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, kzhuravl. Herald added a project: LLVM. This will be more useful with fenv access implemented. https://reviews.llvm.org/D80727 F

[PATCH] D80727: AMDGPU: Add intrinsic for s_setreg

arsenm closed this revision. arsenm added a comment. 97f3f0bab0982f84745c7ac5ce8fb6b0918ff718 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80727/new/ https://reviews.llvm.org/D80727 __

[PATCH] D80237: [hip] Ensure pointer in struct argument has proper `addrspacecast`.

arsenm added a comment. In D80237#2058108 , @rjmccall wrote: > In D80237#2055902 , @arsenm wrote: > > > In D80237#2051933 , @rjmccall > > wrote: > > > > > Okay. Can you exp

[PATCH] D80804: [AMDGPU] Expose llvm atomic inc/dec instructions as clang builtins for AMDGPU target

arsenm added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14524 +BuiltinAtomicOp, +{Ptr->getType()->getPointerElementType(), Ptr->getType()}); Should not rely on pointer element type, these are always i32 I think ==

[PATCH] D80804: [AMDGPU] Introduce Clang builtins to be mapped to AMDGCN atomic inc/dec intrinsics

arsenm added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14524 +BuiltinAtomicOp, +{Ptr->getType()->getPointerElementType(), Ptr->getType()}); arsenm wrote: > Should not rely on pointer element type, these are always i32 I think

[PATCH] D80931: AMDGPU: Fix clang side null pointer value for private

arsenm created this revision. arsenm added reviewers: cfe-commits, cdevadas. Herald added subscribers: kerbowa, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl. The change to fold_priv_arith looks strange to me, but this was already the untested behavior for local. https://revi

[PATCH] D80917: [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 2

arsenm added inline comments. Comment at: clang/include/clang/Basic/OpenMPGridValues.h:96 +256, // GV_Slot_Size +64, // GV_Warp_Size +6,// GV_Warp_Size_Log2 What about wave32? Comment at: clang/include/clang/Basic

[PATCH] D80897: [OpenMP] Initial support for std::complex in target regions

arsenm added inline comments. Comment at: clang/lib/Headers/__clang_cuda_complex_builtins.h:136-137 + __d = _COPYSIGNf(_ISINFf(__d) ? 1 : 0, __d); + if (_ISNANf(__a)) +__a = _COPYSIGNf(0, __a); + if (_ISNANf(__b)) Why does this try to prese

[PATCH] D80952: [FPEnv][Clang][Driver][WIP] Disable constrained floating point on targets lacking support.

arsenm requested changes to this revision. arsenm added a comment. This revision now requires changes to proceed. Herald added a subscriber: wdng. If this chooses to just blindly ignore the setting, how is development supposed to be done on other targets? I'd prefer if this behaved more like -fg

[PATCH] D80952: [FPEnv][Clang][Driver][WIP] Disable constrained floating point on targets lacking support.

arsenm added a comment. In D80952#2067563 , @efriedma wrote: > The problem for the command-line arguments in particular is that they aren't > really new; clang has been eating them for a long time, without any warning. > So if -frounding-math crashes th

[PATCH] D80931: AMDGPU: Fix clang side null pointer value for private

arsenm closed this revision. arsenm added a comment. 301a6da8c24a09052e3bda10e90b450b7b39ffea CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80931/new/ https://reviews.llvm.org/D80931 __

[PATCH] D80996: [AMDGPU][OpenMP] Fix duplicate copies of arguments in commands

arsenm added inline comments. Comment at: clang/lib/Driver/ToolChains/HIP.cpp:389 - for (Arg *A : Args) { -DAL->append(A); + if (DeviceOffloadKind != Action::OFK_OpenMP) { +for (Arg *A : Args) { Needs a comment? I don't understand why openmp is any di

[PATCH] D79744: clang: Add address space to indirect abi info and use it for kernels

arsenm added a comment. In D79744#2047788 , @jdoerfert wrote: > In D79744#2047482 , @arsenm wrote: > > > For the purpose here, only the callee exists. This is essentially a > > freestanding function, the entry poin

[PATCH] D79744: clang: Add address space to indirect abi info and use it for kernels

arsenm added a comment. In D79744#2050498 , @rjmccall wrote: > > For the purpose here, only the callee exists. This is essentially a > > freestanding function, the entry point to the program. > > I'm definitely not going to let you add a new "generic" arg

[PATCH] D79744: clang: Add address space to indirect abi info and use it for kernels

arsenm added a comment. In D79744#2069620 , @rjmccall wrote: > In D79744#2069324 , @arsenm wrote: > > > In D79744#2050498 , @rjmccall > > wrote: > > > > > > For the purpose

[PATCH] D79744: clang: Add address space to indirect abi info and use it for kernels

arsenm added a comment. In D79744#2069774 , @arsenm wrote: > I think this is converging to adding a new IR attribute that essentially just > provides the pointee type for ABI purposes. I guess my name ideas for this > would be "indirect", "value", "memo

[PATCH] D80947: Add to the Coding Standard our that single-line bodies omit braces

arsenm added inline comments. Comment at: llvm/docs/CodingStandards.rst:1573 +Don't Use Braces on Simple Single-Statement Bodies of if/else/loop Statements +^ I would rather just ban si

[PATCH] D83088: Introduce CfgTraits abstraction

arsenm added inline comments. Comment at: llvm/include/llvm/CodeGen/MachineCfgTraits.h:44 +// use on a 32-bit architecture. +assert(wrapped != (uintptr_t)-1 && wrapped != (uintptr_t)-2); + I feel like there should be a better way to do this; we should pro

[PATCH] D84068: AMDGPU/clang: Search resource directory for device libraries

arsenm created this revision. arsenm added reviewers: yaxunl, tra. Herald added subscribers: kerbowa, t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely, kzhuravl. This should be the preferred way of locating the libraries, and it's a packaging problem to ensure the libraries are symlinked into the r

[PATCH] D81311: [RFC] LangRef: Define byref parameter attribute

arsenm closed this revision. arsenm added a comment. Merged with D83518 as 5e999cbe8db0b50dc9828a1c062b4ffe84c5b137 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81311/new/ https://

[PATCH] D79744: clang: Use byref for kernel arguments

arsenm updated this revision to Diff 279635. arsenm retitled this revision from "clang: Add address space to indirect abi info and use it for kernels" to "clang: Use byref for kernel arguments". arsenm edited the summary of this revision. arsenm added a comment. Switch to byref. Doesn't handle th

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