arsenm added a comment.

In D80237#2051933 <https://reviews.llvm.org/D80237#2051933>, @rjmccall wrote:

> Okay.  Can you explain why we need to coerce in the first place, though?  
> Especially if the representation is the same, why is your target-lowering 
> requiring parameters to be coerced to involve pointers in a different address 
> space?


It's not a requirement, but an optimization. The pointer representation is the 
same, but there's a penalty to using the generic pointer. From the language 
context here, we know the flat pointer can never alias the non-global address 
spaces. InferAddressSpaces won't be able to infer this (maybe it could, but it 
might break a theoretical language that allows passing some valid 32-bit 
address in 64-bit flat pointers).

I think the real problem here is the IR is missing a no-op cast between 
pointers with different address spaces. With the current promotion, GVN sees 
the bits of the addrspace(0) ptr get reinterpreted as addrspace(1), and doesn't 
have a better option than a ptrtoint/inttoptr pair. When addrspacecast was 
added, pointer bitcasts between different address spaces were disallowed (I 
think mostly for reasons that no longer apply). If we reallowed pointer bitcast 
between equivalent sized address spaces as known no-op cast, we wouldn't need 
to change the argument promotion in the frontend.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80237/new/

https://reviews.llvm.org/D80237



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