[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

topperc wrote: > > SiFive's AME proposal locates in OP-V/OP-VE category > > Yes, this is a good point. I do think we should also remove other vendor > instruction sets which abused the standard op fields. The RISC-V specification does not take a hard stance on non-conforming extensions. It sh

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

https://github.com/topperc edited https://github.com/llvm/llvm-project/pull/133031 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/133031 >From bb123ff9401b517d877de4ed6fd9ea61edf49dbb Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 18 Mar 2025 20:53:19 -0700 Subject: [PATCH 1/4] [RISCV] Add MC layer support for XSfmm*. This adds assembler

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

preames wrote: We have discussed whether to accept non-conforming vendor extensions in the past. Our consensus was clearly documented in RISCVUsage.rst in the statement " In particular, we expect to eventually accept both custom extensions and non-conforming extensions." This is a non-confor

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

topperc wrote: > > > but won't merge them until they are ratified just like Zvzip/Zvabd/Zibimm > > > > > > I think this patch is supported to be the vendor instruction set of `SiFive > > Xsfmm* Attached Matrix Extensions` if I understand correctly of this PR. > > AME is another issue that we d

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

sequencer wrote: > but won't merge them until they are ratified just like Zvzip/Zvabd/Zibimm I think this patch is supported to be the vendor instruction set of `SiFive Xsfmm* Attached Matrix Extensions` if I understand correctly of this PR. AME is another issue that we don’t have ratified AM

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

sequencer wrote: > SiFive's AME proposal locates in OP-V/OP-VE category Yes, this is a good point. I do think we should also remove other vendor instruction sets which abused the standard op fields. https://github.com/llvm/llvm-project/pull/133031 _

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

wangpc-pp wrote: > > but won't merge them until they are ratified just like Zvzip/Zvabd/Zibimm > > I think this patch is supported to be the vendor instruction set of `SiFive > Xsfmm* Attached Matrix Extensions` if I understand correctly of this PR. > > AME is another issue that we don’t have

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

@@ -830,3 +830,16 @@ def : RISCVRegisterClass<[XLenVT], 32, (add SF_VCIX_STATE)> { let RegInfos = XLenRI; let isAllocatable = 0; } + +//===--===// +// XSfmmbase tiles +//===

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

sequencer wrote: Thanks for the tests on the `rv32i`! https://github.com/llvm/llvm-project/pull/133031 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits