[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei planned changes to this revision. pengfei added a comment. In D157485#4597603 , @e-kud wrote: > Just curious, in RFC we have `-mavx10.x-256/-mavx10.x-512` but here we refer > to `-mavx10.x/-mavx10.x,-mavx10-512bit`. Is it compliant with GCC, or t

[PATCH] D157485: [X86][RFC] Support new feature AVX10

e-kud added a comment. Just curious, in RFC we have `-mavx10.x-256/-mavx10.x-512` but here we refer to `-mavx10.x/-mavx10.x,-mavx10-512bit`. Is it compliant with GCC, or the revision is just for the illustrative purpose? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https:

[PATCH] D157485: [X86][RFC] Support new feature AVX10

MaskRay added inline comments. Comment at: clang/lib/Driver/ToolChains/Arch/X86.cpp:261 +if (AVXVecSize == 256) + D.Diag(diag::warn_drv_overriding_flag_option) << "AVX10-256" +<< "AVX10-512"; ---

[PATCH] D157485: [X86][RFC] Support new feature AVX10

MaskRay added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:739 + if (HasAVX10_512BIT) +Builder.defineMacro("__AVX10_512BIT__"); + This is untested? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157485/new/ https://reviews.llvm.org/D157485 ___ cfe

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:2581 + unsigned VectorWidth) { + if (!getTarget().getTriple().isX86() || VectorWidth < 512) +return; skan wrote: > Minor suggestion.

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei updated this revision to Diff 550669. pengfei marked an inline comment as done. pengfei added a comment. Address comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157485/new/ https://reviews.llvm.org/D157485 Files: clang/docs/Releas

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:927 + !STI.hasFeature(X86::FeatureAVX10_512bit)) +report_fatal_error("ZMM registers are not supported without AVX10-512BIT"); switch (TSFlags & X86II::OpPrefixMask) { ---

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:2581 + unsigned VectorWidth) { + if (!getTarget().getTriple().isX86() || VectorWidth < 512) +return; Minor suggestion. The code here may

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei added a comment. Ping~ It looks to me there's no concern about this solution in the RFC . I think we can move forward to land it. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.h:99 + bool HasAVX10_1 = false; + bool HasAVX10_512BIT = false; bool HasAVX512CD = false; goldstein.w.n wrote: > Maybe should be HasAVX10_1_512? As brought up the rfc, there might be an

[PATCH] D157485: [X86][RFC] Support new feature AVX10

goldstein.w.n added inline comments. Comment at: clang/lib/Basic/Targets/X86.h:99 + bool HasAVX10_1 = false; + bool HasAVX10_512BIT = false; bool HasAVX512CD = false; Maybe should be HasAVX10_1_512? As brought up the rfc, there might be an avx10.2-512 Like

[PATCH] D157485: [X86][RFC] Support new feature AVX10

pengfei created this revision. pengfei added reviewers: RKSimon, craig.topper, skan, e-kud. Herald added a subscriber: hiraditya. Herald added a project: All. pengfei requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, MaskRay. Herald added projects: clang, LLVM.