Keenuts wrote:
Rebased, tests not pass (HLSL, and locally for the rest). The CI is quite busy
today so the rest is still pending.
Adding more reviewers for the final round
@llvm-beanz for the Microsoft side
@arsenm for the AMDGPU address space bit
https://github.com/llvm/llvm-project/pull/138
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/138530
From 085154ddedf3b0789a3908231d04f997e9e66ac4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Wed, 30 Apr 2025 11:06:55 +0200
Subject: [PATCH 1/7] [HLSL] Implement vk::ext_builtin_input attr
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/138530
From 04cabdd5cb1400ea6fe4e92cf99a44e3004f04c9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Wed, 30 Apr 2025 11:06:55 +0200
Subject: [PATCH 1/7] [HLSL] Implement vk::ext_builtin_input attr
Keenuts wrote:
Regarding the HLSL tests:
I cannot reproduce the broken test on my branch (the file was not in main yet),
so seems like the HLSL test is pulling main and doing something different.
Rebased on main and the test passes locally, weird.
https://github.com/llvm/llvm-project/pull/13853
Keenuts wrote:
Yes, I need to
https://github.com/llvm/llvm-project/pull/138530
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@@ -5759,9 +5761,18 @@ void CodeGenModule::EmitGlobalVarDefinition(const
VarDecl *D,
getCUDARuntime().internalizeDeviceSideVar(D, Linkage);
}
getCUDARuntime().handleVarRegistration(D, *GV);
+ } else if (LangOpts.HLSL &&
+ GetGlobalVarAddressSpace(D)
@@ -5636,6 +5636,8 @@ void CodeGenModule::EmitGlobalVarDefinition(const VarDecl
*D,
Init = llvm::UndefValue::get(getTypes().ConvertTypeForMem(ASTTy));
else if (D->hasAttr())
Init = llvm::UndefValue::get(getTypes().ConvertTypeForMem(ASTTy));
+ else if (GetGlobalVarAd
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/138530
Rate limit · GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sans-s
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/138530
From 8971ce70badbf1a7bdbe04f4ba94b03b56adacf5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Wed, 30 Apr 2025 11:06:55 +0200
Subject: [PATCH 1/4] [HLSL] Implement vk::ext_builtin_input attr
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/138530
From 8971ce70badbf1a7bdbe04f4ba94b03b56adacf5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Wed, 30 Apr 2025 11:06:55 +0200
Subject: [PATCH 1/2] [HLSL] Implement vk::ext_builtin_input attr
Keenuts wrote:
Adding Steven for an initial review before bothering more people
https://github.com/llvm/llvm-project/pull/138530
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https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/138530
This variable attribute is used in HLSL to add Vulkan specific builtins in a
shader.
The attribute is documented here:
https://github.com/microsoft/hlsl-specs/blob/17727e88fd1cb09013cb3a144110826af05f4dd5/propos
https://github.com/Keenuts approved this pull request.
https://github.com/llvm/llvm-project/pull/137985
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Keenuts wrote:
Closed in favor of https://github.com/llvm/llvm-project/pull/135794
https://github.com/llvm/llvm-project/pull/134844
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https://github.com/Keenuts closed
https://github.com/llvm/llvm-project/pull/134844
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https://github.com/Keenuts approved this pull request.
https://github.com/llvm/llvm-project/pull/127675
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@@ -6888,6 +6888,42 @@ static void SetNestedNameSpecifier(Sema &S,
DeclaratorDecl *DD, Declarator &D) {
DD->setQualifierInfo(SS.getWithLocInContext(S.Context));
}
+void Sema::deduceHLSLAddressSpace(VarDecl *Decl) {
+ // The variable already has an address space (groupshare
https://github.com/Keenuts closed
https://github.com/llvm/llvm-project/pull/133464
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https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/133464
From 12524667594d413c93a2c88a206a930cff638da3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/5] [SPIR-V] Add hlsl_private address space for
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/133464
From 12524667594d413c93a2c88a206a930cff638da3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/3] [SPIR-V] Add hlsl_private address space for
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/133464
From 12524667594d413c93a2c88a206a930cff638da3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/6] [SPIR-V] Add hlsl_private address space for
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/133464
From 12524667594d413c93a2c88a206a930cff638da3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/4] [SPIR-V] Add hlsl_private address space for
Keenuts wrote:
miss-typed enter, sent the comment above too early.
There are multiple ways to solve this issue:
- fix the FunctionAttr to run DCE again once the `convergent` attribute is
removed to make sure those invalid cases don't happen.
- fix the FunctionAttr to not remove `convergent` i
Keenuts wrote:
FYI: there is this PR which I think will replace this one:
https://github.com/llvm/llvm-project/pull/134863
> I didn't understand the validity part. Why is the caller required to be
> convergent in order to add a token to a callsite?
Given this example:
```llvm
declare i32 @fo
Keenuts wrote:
rebased on main, no change since the last review.
https://github.com/llvm/llvm-project/pull/133464
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Keenuts wrote:
> Turns out not really, I ran spec with this about 2 years ago and the only
> non-noise change was a mild improvement
Looking at the PR you linked, seems like there was still not a clear consensus
on the default change no? (And I'd assume consumers like llvm-translator won't
be
Keenuts wrote:
> These should not have side effects.
I agree I'm stretching the "hasSideEffect" definition here.
> Whatever is removing the convergent needs to consider the uses (or more
> likely, just leave it alone)
I suspect the long-term change to change the default IR to assume convergen
https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/134844
When a callee is marked as `convergent`, some targets like HLSL/SPIR-V add a
convergent token to the call.
This is valid if both functions are marked as `convergent`.
ADCE/BDCE and other DCE passes were allowed
@@ -386,13 +386,29 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(
if (ContainedTy.isNull())
return nullptr;
-assert(!ResAttrs.RawBuffer &&
- "Raw buffers handles are not implemented for SPIR-V yet");
assert(!ResAttrs.IsROV &&
@@ -711,13 +711,14 @@
BuiltinTypeDeclBuilder::addHandleAccessFunction(DeclarationName &Name,
using PH = BuiltinTypeMethodBuilder::PlaceHolder;
QualType ElemTy = getHandleElementType();
- // TODO: Map to an hlsl_device address space.
- QualType ElemPtrTy = AST.getPointer
@@ -386,13 +386,22 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(
if (ContainedTy.isNull())
return nullptr;
-assert(!ResAttrs.RawBuffer &&
- "Raw buffers handles are not implemented for SPIR-V yet");
assert(!ResAttrs.IsROV &&
@@ -57,22 +58,37 @@ void main(unsigned GI : SV_GroupIndex) {
// CHECK: define void @main()
// CHECK-NEXT: entry:
// Verify destructor is emitted
-// NOINLINE-NEXT: call void @_GLOBAL__sub_I_GlobalDestructors.hlsl()
-// NOINLINE-NEXT: %0 = call i32 @llvm.dx.flattened.th
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/133468
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@@ -386,13 +386,22 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(
if (ContainedTy.isNull())
return nullptr;
-assert(!ResAttrs.RawBuffer &&
- "Raw buffers handles are not implemented for SPIR-V yet");
assert(!ResAttrs.IsROV &&
https://github.com/Keenuts approved this pull request.
minor comments, otherwise OK
https://github.com/llvm/llvm-project/pull/133468
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https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/133469
Destructor calls were emitted without convergence
intrinsics when building for SPIR-V, which means invalid IR since we mixed
controlled and non-controlled convergence.
From 339d410e981b5172c57d9802e0a0fcc117575
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/133464
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Keenuts wrote:
> Is there a reason we can't do this in Sema? It would probably be ideal to
> have the AST represent the address spaces of values accurately.
Hello! So I didn't recalled the details on why, so I made another PR which
implements this in sema (https://github.com/llvm/llvm-project/
https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/133464
In SPIR-V, private global variables have the Private storage class. This PR
adds a new address space which allows frontend to emit variable with this
storage class when targeting this backend.
This is covered
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/122103
From c11ace708fab316f422e12cf9785a5a362d7250c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/3] [SPIR-V] Add hlsl_private address space for
@@ -5386,6 +5386,23 @@ LangAS CodeGenModule::GetGlobalVarAddressSpace(const
VarDecl *D) {
if (OpenMPRuntime->hasAllocateAttributeForGlobalVar(D, AS))
return AS;
}
+
+ if (LangOpts.HLSL) {
+if (D == nullptr)
+ return LangAS::hlsl_private;
+
+// Except
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -std=hlsl202x
-emit-llvm -o - -disable-llvm-passes %s | FileCheck %s --check-prefixes=CHECK
+// RUN: %clang_cc1 -triple spirv-pc-vulkan1.3-compute -std=hlsl202x -emit-llvm
-o - -disable-llvm-passes %s |
https://github.com/Keenuts approved this pull request.
https://github.com/llvm/llvm-project/pull/130672
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@@ -0,0 +1,501 @@
+//===- LowerGPUIntrinsic.cpp
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/122103
From c11ace708fab316f422e12cf9785a5a362d7250c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/2] [SPIR-V] Add hlsl_private address space for
Keenuts wrote:
Hi all!
This PR was dormant for a while because proposals had to be made & merged.
The HLSL proposal which covers `hlsl_private` is now merged:
https://github.com/llvm/wg-hlsl/commit/4c9e11aa50727c53b10d232195fb88fd5376f19c
https://github.com/llvm/llvm-project/pull/122103
__
@@ -58,6 +58,7 @@ enum class LangAS : unsigned {
// HLSL specific address spaces.
hlsl_groupshared,
+ hlsl_private,
Keenuts wrote:
Hi again! It's been a while, but this now went through an HLSL proposal.
https://github.com/llvm/wg-hlsl/commit/4c9e11aa507
@@ -5362,6 +5362,23 @@ LangAS CodeGenModule::GetGlobalVarAddressSpace(const
VarDecl *D) {
if (OpenMPRuntime->hasAllocateAttributeForGlobalVar(D, AS))
return AS;
}
+
+ if (LangOpts.HLSL) {
+if (D == nullptr)
+ return LangAS::hlsl_private;
+
+// Except
https://github.com/Keenuts approved this pull request.
https://github.com/llvm/llvm-project/pull/121961
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@@ -1468,9 +1468,14 @@ Compilation *Driver::BuildCompilation(ArrayRef ArgList) {
// Set specific Vulkan version if applicable.
if (const Arg *A = Args.getLastArg(options::OPT_fspv_target_env_EQ)) {
- const llvm::StringSet<> ValidValues = {"vulkan1.2",
@@ -83,6 +84,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
+llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
---
@@ -58,6 +58,7 @@ enum class LangAS : unsigned {
// HLSL specific address spaces.
hlsl_groupshared,
+ hlsl_private,
Keenuts wrote:
This being a small stepping stone for the larger change bringing
hlsl_input/hlsl_output, I haven't wrote a specific HLSL s
https://github.com/Keenuts approved this pull request.
SPIR-V failure is unrelated, known issue with ccache
https://github.com/llvm/llvm-project/pull/122105
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@@ -83,6 +84,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
+llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
---
@@ -83,6 +84,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
+llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
---
@@ -58,6 +58,7 @@ enum class LangAS : unsigned {
// HLSL specific address spaces.
hlsl_groupshared,
+ hlsl_private,
Keenuts wrote:
That's correct, slightly reworded the description.
The thing is, only SPIR-V will be using this for now (same as the few ot
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/122103
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https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/122103
In SPIR-V, private global variables have the `Private` storage class. This PR
adds a new address space which allows frontend to emit variable with this
storage class.
Before this change, global variable were e
@@ -1468,9 +1468,14 @@ Compilation *Driver::BuildCompilation(ArrayRef ArgList) {
// Set specific Vulkan version if applicable.
if (const Arg *A = Args.getLastArg(options::OPT_fspv_target_env_EQ)) {
- const llvm::StringSet<> ValidValues = {"vulkan1.2",
https://github.com/Keenuts approved this pull request.
Maybe the renaming shall be done in another PR for both DXIL and SPV, but if
it's a small change, might want to do it now no?
https://github.com/llvm/llvm-project/pull/121963
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@@ -118,6 +118,10 @@ let TargetPrefix = "spv" in {
: DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_any_ty, llvm_i8_ty],
[IntrInaccessibleMemOrArgMemOnly]>;
+ def int_spv_resource_getpointer
Keenuts wrote:
Shall it be `int_spv
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@@ -0,0 +1,59 @@
+//===- SemaSPIRV.cpp - Semantic Analysis for SPIRV constructs
+//---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
https://github.com/Keenuts approved this pull request.
https://github.com/llvm/llvm-project/pull/121598
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@@ -20440,6 +20442,26 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
}
}
+Value *CodeGenFunction::EmitSPIRVBuiltinExpr(unsigned BuiltinID,
+ const CallExpr *E) {
+ switch (BuiltinID) {
+ case SPIRV::BI__bui
https://github.com/Keenuts approved this pull request.
Thanks!
https://github.com/llvm/llvm-project/pull/121738
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@@ -1229,8 +1248,15 @@ FunctionPass *llvm::createSPIRVStructurizerPass() {
PreservedAnalyses SPIRVStructurizerWrapper::run(Function &F,
FunctionAnalysisManager &AF) {
- FunctionPass *StructurizerPass = createSPIRVStructurizerPas
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https://github.com/Keenuts approved this pull request.
LGTM on the SPIR-V side. Just a superfluous loop thing.
For the structurizer, seems like this is OK, worst case we might end-up with a
new condition which has no Flatten/Dontflatten attachment but should be fine.
https://github.com/llvm/llv
@@ -2776,19 +2776,35 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
}
return MIB.constrainAllUses(TII, TRI, RBI);
}
- case Intrinsic::spv_loop_merge:
- case Intrinsic::spv_selection_merge: {
-const auto Opcode = IID == Intrinsic::spv_select
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/116331
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@@ -0,0 +1,21 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm
-O3 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
+// RUN: %clang_cc1 -triple spirv-vulkan-compute -x hlsl -emit-llvm -O3 -o - %s
| FileCheck %s --check-prefixes=CHECK,CHECK
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/116331
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@@ -2694,19 +2694,49 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register
ResVReg,
}
return MIB.constrainAllUses(TII, TRI, RBI);
}
- case Intrinsic::spv_loop_merge:
- case Intrinsic::spv_selection_merge: {
-const auto Opcode = IID == Intrinsic::spv_select
https://github.com/Keenuts commented:
Thanks, answered the question for the intrinsic.
As Chris said, this would definitely needs to have some tests in the spir-v
backend.
Especially given that the structurizer assumes the selection control mask was
always `None`.
When splitting edges, or movin
https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/118651
Before this patch, there was a calling-convention mismatch between the
constructors and the actual call emitted for the entrypoint wrapper.
Such mismatch causes the InstCombine pass to replace this call with an
@@ -58,6 +58,7 @@ enum class LangAS : unsigned {
// HLSL specific address spaces.
hlsl_groupshared,
+ hlsl_private,
Keenuts wrote:
We hoped to split the PRs between back-end and FE, shall I land both at the
same time?
https://github.com/llvm/llvm-proje
@@ -58,6 +58,7 @@ enum class LangAS : unsigned {
// HLSL specific address spaces.
hlsl_groupshared,
+ hlsl_private,
Keenuts wrote:
Oh didn't knew I could modify the target's AS maps without also modifying this.
I'll revert/re-land this PR (given the othe
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/116636
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@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o -
| FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+@PrivInternal = internal addrspace(10) global i32 456
+; CHE
https://github.com/Keenuts created
https://github.com/llvm/llvm-project/pull/118312
This reverts commit aa7fe1c10e5d6d0d3aacdb345fed995de413e142.
From e8c3d6da73e95fd03e5ccdf8e08bdc99ff52e6f0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Mon, 2 Dec 2024 16:50:47 +0100
Su
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/116636
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https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/118312
From e8c3d6da73e95fd03e5ccdf8e08bdc99ff52e6f0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Mon, 2 Dec 2024 16:50:47 +0100
Subject: [PATCH 1/2] Revert "[SPIR-V] Fixup storage class for glo
https://github.com/Keenuts closed
https://github.com/llvm/llvm-project/pull/118312
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https://github.com/Keenuts closed
https://github.com/llvm/llvm-project/pull/116636
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https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/116636
From 30bdda1649c1c9480968f830c326554f76eabdb6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH 1/2] [SPIR-V] Add hlsl_private address space for
@@ -3388,6 +3398,13 @@ bool SPIRVInstructionSelector::selectGlobalValue(
GVType, MIRBuilder, SPIRV::AccessQualifier::ReadWrite, false);
}
+ const unsigned AddrSpace = GV->getAddressSpace();
+ SPIRV::StorageClass::StorageClass StorageClass =
+ addressSpaceToSto
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o -
| FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+@PrivInternal = internal addrspace(10) global i32 456
+; CHE
https://github.com/Keenuts updated
https://github.com/llvm/llvm-project/pull/116636
From 30bdda1649c1c9480968f830c326554f76eabdb6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nathan=20Gau=C3=ABr?=
Date: Thu, 28 Nov 2024 15:00:56 +0100
Subject: [PATCH] [SPIR-V] Add hlsl_private address space for SPI
Keenuts wrote:
@llvm-beanz : FYI for the added address space.
https://github.com/llvm/llvm-project/pull/116636
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Keenuts wrote:
Hello all!
Changed the PR to use a new AS emitted by the FE. This way there are no more
weird storage class switch.
However, this required to support a new `addrspacecast` operation from
`Function` to `Private` and the other way around.
The FE change will be in another PR (can b
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#bool:]] = OpTypeBool
+; CHECK-DAG: %[[#uint:]]
https://github.com/Keenuts edited
https://github.com/llvm/llvm-project/pull/115902
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@@ -86,6 +86,7 @@ let TargetPrefix = "spv" in {
def int_spv_dot4add_i8packed : DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_spv_dot4add_u8packed : DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_i32_ty, llvm_i32_ty, llvm_i3
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#bool:]] = OpTypeBool
+; CHECK-DAG: %[[#uint:]]
@@ -86,6 +86,7 @@ let TargetPrefix = "spv" in {
def int_spv_dot4add_i8packed : DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_spv_dot4add_u8packed : DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_i32_ty, llvm_i32_ty, llvm_i3
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