@@ -0,0 +1,57 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -o - | FileCheck %s
+
+
+// CHECK-LABEL: linkonce_odr noundef nofpclass(nan inf) <4 x float>
@_ZN4hlsl8__detail8dst
@@ -0,0 +1,57 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -o - | FileCheck %s
+
+
+// CHECK-LABEL: linkonce_odr noundef nofpclass(nan inf) <4 x float>
@_ZN4hlsl8__detail8dst
@@ -174,6 +174,31 @@ const inline float
distance(__detail::HLSL_FIXED_VECTOR X,
__detail::HLSL_FIXED_VECTOR Y) {
return __detail::distance_vec_impl(X, Y);
}
+//===--===//
@@ -174,6 +174,31 @@ const inline float
distance(__detail::HLSL_FIXED_VECTOR X,
__detail::HLSL_FIXED_VECTOR Y) {
return __detail::distance_vec_impl(X, Y);
}
+//===--===//
+// dst
@@ -174,6 +174,31 @@ const inline float
distance(__detail::HLSL_FIXED_VECTOR X,
__detail::HLSL_FIXED_VECTOR Y) {
return __detail::distance_vec_impl(X, Y);
}
+//===--===//
+// dst
@@ -19,3 +20,12 @@ entry:
%res = bitcast half %val2 to i16
ret i16 %res
}
+
+define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
+entry:
+ ; CHECK: %[[#arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
+ ; CHECK: %[[#Res1:]] = OpBitcast %[[#vec4_int_1
https://github.com/V-FEXrt closed
https://github.com/llvm/llvm-project/pull/131237
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@@ -390,6 +390,18 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
getDotProductIntrinsic(CGM.getHLSLRuntime(), VecTy0->getElementType()),
ArrayRef{Op0, Op1}, nullptr, "hlsl.dot");
}
+ case Builtin::BI__builtin_hlsl_dot2add: {
+llvm::Tr
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@@ -0,0 +1,78 @@
+// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \
+// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o
- | \
+// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
+// RUN: %clang_cc1 -finclude-default-header
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@@ -0,0 +1,96 @@
+//===--- HLSLBuiltinTypeDeclBuilder.h - HLSL Builtin Type Decl Builder
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
https://github.com/V-FEXrt commented:
LGTM but I'll let Farzon approve
https://github.com/llvm/llvm-project/pull/132315
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@@ -0,0 +1,52 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -verify
+
+uint16_t test_asuint16_less_argument()
+{
+return asuint16();
+ // expected-error@-1 {{no matching function for call to 'asuint16'}}
+ // ex
@@ -0,0 +1,8 @@
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s |
FileCheck %s
+
+define noundef float @dot2add_simple(<2 x half> noundef %a, <2 x half> noundef
%b, float %c) {
+entry:
+; CHECK: call float @dx.op.dot2AddHalf(i32 162, float %c, half %0, h
@@ -2472,6 +2472,33 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
break;
}
+ case Builtin::BI__builtin_hlsl_dot2add: {
+// Check number of arguments should be 3
V-FEXrt wrote:
Nit: imo this c
@@ -0,0 +1,11 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -emit-llvm-only -disable-llvm-passes -verify
+
+bool test_too_few_arg() {
+ return __builtin_hlsl_dot2add();
+ // expected-error@-1 {{too few arguments to function call, expe
@@ -19681,6 +19681,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
getDotProductIntrinsic(CGM.getHLSLRuntime(), VecTy0->getElementType()),
ArrayRef{Op0, Op1}, nullptr, "hlsl.dot");
}
+ case Builtin::BI__builtin_hlsl_dot2add: {
+llvm
@@ -19681,6 +19681,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
getDotProductIntrinsic(CGM.getHLSLRuntime(), VecTy0->getElementType()),
ArrayRef{Op0, Op1}, nullptr, "hlsl.dot");
}
+ case Builtin::BI__builtin_hlsl_dot2add: {
+llvm
@@ -19681,6 +19681,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
getDotProductIntrinsic(CGM.getHLSLRuntime(), VecTy0->getElementType()),
ArrayRef{Op0, Op1}, nullptr, "hlsl.dot");
}
+ case Builtin::BI__builtin_hlsl_dot2add: {
+llvm
https://github.com/V-FEXrt approved this pull request.
https://github.com/llvm/llvm-project/pull/131032
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V-FEXrt wrote:
I'm assuming this PR resolves an issue right? We typically add `Fixes #1234`
(without the `) as part of the description so it will close the issue when the
PR is merged
https://github.com/llvm/llvm-project/pull/131900
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https://github.com/llvm/llvm-project/pull/128991
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@@ -174,21 +176,51 @@ createBufferHandleType(const HLSLBufferDecl *BufDecl) {
return cast(QT.getTypePtr());
}
+// Iterates over all declarations in the HLSL buffer and based on the
+// packoffset or register(c#) annotations it fills outs the Layout
+// vector with the user-s
https://github.com/V-FEXrt closed
https://github.com/llvm/llvm-project/pull/128979
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@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -verify -DTEST_FUNC=__builtin_hlsl_or
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -verify -DTEST_FUNC=__builtin_hlsl_and
+
+
---
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -verify -DTEST_FUNC=__builtin_hlsl_or
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -verify -DTEST_FUNC=__builtin_hlsl_and
+
+
+bool t
@@ -0,0 +1,85 @@
+// RUN: %clang_cc1 -finclude-default-header -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s \
+// RUN: -emit-llvm -O1 -o - | FileCheck %s
+
+//CHECK-LABEL: define noundef i1 @_Z15test_and_scalarbb(
+//CHECK-SAME: i1 noundef [[X:%.*]], i1 noundef [[Y:%.*]
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -verify -DTEST_FUNC=__builtin_hlsl_or
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -verify -DTEST_FUNC=__builtin_hlsl_and
+
+
---
@@ -0,0 +1,85 @@
+// RUN: %clang_cc1 -finclude-default-header -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s \
+// RUN: -emit-llvm -O1 -o - | FileCheck %s
+
+//CHECK-LABEL: define noundef i1 @_Z15test_and_scalarbb(
+//CHECK-SAME: i1 noundef [[X:%.*]], i1 noundef [[Y:%.*]
@@ -290,6 +290,28 @@ _HLSL_BUILTIN_ALIAS(__builtin_hlsl_and)
bool4 and(bool4 x, bool4 y);
// clang-format on
+//===--===//
+// or builtins
+//===
https://github.com/V-FEXrt closed
https://github.com/llvm/llvm-project/pull/128086
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https://github.com/V-FEXrt updated
https://github.com/llvm/llvm-project/pull/128086
>From bebfc20fac6b27d02bca9af328d0568018672c71 Mon Sep 17 00:00:00 2001
From: Ashley Coleman
Date: Thu, 20 Feb 2025 16:16:16 -0700
Subject: [PATCH 1/5] [hlsl][Sema] Fix Struct Size Calculation containing 16
and
@@ -172,6 +172,23 @@ Decl *SemaHLSL::ActOnStartBuffer(Scope *BufferScope, bool
CBuffer,
return Result;
}
+static unsigned calculateLegacyCbufferFieldAlign(const ASTContext &Context,
+ QualType T) {
+ // Arrays and Structs are
@@ -172,6 +172,23 @@ Decl *SemaHLSL::ActOnStartBuffer(Scope *BufferScope, bool
CBuffer,
return Result;
}
+static unsigned calculateLegacyCbufferFieldAlign(const ASTContext &Context,
+ QualType T) {
+ // Arrays and Structs are
V-FEXrt wrote:
@tex3d @hekota Okay PTAL when you have a moment!
https://github.com/llvm/llvm-project/pull/128086
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>From bebfc20fac6b27d02bca9af328d0568018672c71 Mon Sep 17 00:00:00 2001
From: Ashley Coleman
Date: Thu, 20 Feb 2025 16:16:16 -0700
Subject: [PATCH 1/4] [hlsl][Sema] Fix Struct Size Calculation containing 16
and
@@ -0,0 +1,60 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s
--check-prefix=CHECK-HALF
+
+// RUN: %clang_cc1 -std=hlsl
https://github.com/V-FEXrt updated
https://github.com/llvm/llvm-project/pull/128086
>From bebfc20fac6b27d02bca9af328d0568018672c71 Mon Sep 17 00:00:00 2001
From: Ashley Coleman
Date: Thu, 20 Feb 2025 16:16:16 -0700
Subject: [PATCH 1/3] [hlsl][Sema] Fix Struct Size Calculation containing 16
and
@@ -172,6 +172,27 @@ Decl *SemaHLSL::ActOnStartBuffer(Scope *BufferScope, bool
CBuffer,
return Result;
}
+static unsigned calculateLegacyCbufferFieldAlign(const ASTContext &Context,
+ QualType T) {
+ // Aggregate types are al
@@ -172,6 +172,27 @@ Decl *SemaHLSL::ActOnStartBuffer(Scope *BufferScope, bool
CBuffer,
return Result;
}
+static unsigned calculateLegacyCbufferFieldAlign(const ASTContext &Context,
+ QualType T) {
+ // Aggregate types are al
https://github.com/V-FEXrt edited
https://github.com/llvm/llvm-project/pull/128086
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@@ -172,6 +172,27 @@ Decl *SemaHLSL::ActOnStartBuffer(Scope *BufferScope, bool
CBuffer,
return Result;
}
+static unsigned calculateLegacyCbufferFieldAlign(const ASTContext &Context,
+ QualType T) {
+ // Aggregate types are al
https://github.com/V-FEXrt created
https://github.com/llvm/llvm-project/pull/128086
Fixes #119641
Update SemaHLSL to correctly calculate the alignment barrier for scalars that
are not 4 bytes wide
>From bebfc20fac6b27d02bca9af328d0568018672c71 Mon Sep 17 00:00:00 2001
From: Ashley Coleman
Da
@@ -20681,7 +20681,8 @@ ExprResult
RebuildUnknownAnyExpr::VisitCallExpr(CallExpr *E) {
const FunctionType *FnType = CalleeType->castAs();
// Verify that this is a legal result type of a function.
- if (DestType->isArrayType() || DestType->isFunctionType()) {
+ if ((Dest
https://github.com/V-FEXrt approved this pull request.
https://github.com/llvm/llvm-project/pull/127896
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@@ -3173,9 +3173,18 @@ bool SemaHLSL::TransformInitList(const InitializedEntity
&Entity,
BuildFlattenedTypeList(InitTy, DestTypes);
llvm::SmallVector ArgExprs;
- for (Expr *Arg : Init->inits())
-if (!BuildInitializerList(SemaRef, Ctx, Arg, ArgExprs, DestTypes))
+ fo
@@ -1730,6 +1731,16 @@ void AggExprEmitter::VisitCXXParenListOrInitListExpr(
}
#endif
+ // HLSL initialization lists in the AST are an expansion which can contain
+ // side-effecting expressions wrapped in opaque value expressions. To
properly
+ // emit these we need to
https://github.com/V-FEXrt approved this pull request.
https://github.com/llvm/llvm-project/pull/118992
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@@ -0,0 +1,87 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s
| FileCheck %s
+
+// array splat
+// CHECK-LABEL: define void {{.*}}call4
+// CHECK: [[B:%.*]] = alloca [2 x i32], align 4
+// CHE
@@ -2804,6 +2804,42 @@ bool SemaHLSL::ContainsBitField(QualType BaseTy) {
return false;
}
+// Can perform an HLSL splat cast if the Dest is an aggregate and the
+// Src is a scalar or a vector of length 1
+// Or if Dest is a vector and Src is a vector of length 1
+bool SemaH
@@ -2804,6 +2804,42 @@ bool SemaHLSL::ContainsBitField(QualType BaseTy) {
return false;
}
+// Can perform an HLSL splat cast if the Dest is an aggregate and the
+// Src is a scalar or a vector of length 1
+// Or if Dest is a vector and Src is a vector of length 1
+bool SemaH
@@ -491,6 +491,31 @@ static bool isTrivialFiller(Expr *E) {
return false;
}
+static void EmitHLSLSplatCast(CodeGenFunction &CGF, Address DestVal,
+ QualType DestTy, llvm::Value *SrcVal,
+ QualType SrcTy, SourceLocatio
@@ -0,0 +1,133 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,153 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
+// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o
- | \
+// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-defaul
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
+// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o
- | \
+// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-defaul
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@@ -0,0 +1,153 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -0,0 +1,133 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,133 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/V-FEXrt approved this pull request.
Personally happy with the code at a high level, though it would be best to have
someone with domain knowledge also approve
https://github.com/llvm/llvm-project/pull/122981
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@@ -0,0 +1,130 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
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@@ -0,0 +1,152 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsPreprocessorNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -0,0 +1,152 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsPreprocessorNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -0,0 +1,130 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,152 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsPreprocessorNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -0,0 +1,152 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsPreprocessorNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -0,0 +1,152 @@
+#include "clang/Parse/ParseHLSLRootSignature.h"
+
+namespace llvm {
+namespace hlsl {
+namespace root_signature {
+
+// Lexer Definitions
+
+static bool IsPreprocessorNumberChar(char C) {
+ // TODO: extend for float support with or without hexadecimal/exponent
@@ -2412,6 +2412,102 @@ bool SemaHLSL::CheckCompatibleParameterABI(FunctionDecl
*New,
return HadError;
}
+// Generally follows PerformScalarCast, with cases reordered for
+// clarity of what types are supported
+bool SemaHLSL::CanPerformScalarCast(QualType SrcTy, QualType D
@@ -6358,3 +6359,89 @@ RValue CodeGenFunction::EmitPseudoObjectRValue(const
PseudoObjectExpr *E,
LValue CodeGenFunction::EmitPseudoObjectLValue(const PseudoObjectExpr *E) {
return emitPseudoObjectExpr(*this, E, true, AggValueSlot::ignored()).LV;
}
+
+void CodeGenFunction::Fl
V-FEXrt wrote:
Yeah I figured they weren't broken by me but I had assumed I needed all green
before merging so was waiting for the fix to make it into main but happy to
merge as is if that's acceptable
https://github.com/llvm/llvm-project/pull/116858
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https://github.com/llvm/llvm-project/pull/122977
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@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
https://github.com/V-FEXrt edited
https://github.com/llvm/llvm-project/pull/116858
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@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
https://github.com/V-FEXrt edited
https://github.com/llvm/llvm-project/pull/116858
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@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
@@ -3139,136 +3151,269 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3139,136 +3151,269 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
https://github.com/V-FEXrt updated
https://github.com/llvm/llvm-project/pull/117245
>From 1156d98a0ba25a92b4edbacb7c17e5ad6bb2b522 Mon Sep 17 00:00:00 2001
From: Ashley Coleman
Date: Thu, 21 Nov 2024 08:42:31 -0700
Subject: [PATCH 1/2] [HLSL] Implement WaveActiveAllTrue Intrinsic
---
clang/in
https://github.com/V-FEXrt edited
https://github.com/llvm/llvm-project/pull/116858
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@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
https://github.com/V-FEXrt updated
https://github.com/llvm/llvm-project/pull/116858
>From a63e05d2e090edf7834fb62296bccd071a8e38b8 Mon Sep 17 00:00:00 2001
From: Ashley Coleman
Date: Thu, 14 Nov 2024 11:53:39 -0700
Subject: [PATCH 1/7] [HLSL] Implement elementwise firstbitlow builtin
---
clan
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