[llvm-branch-commits] [llvm] dc041f7 - Revert "Revert "[MachinePipeliner] Fix constraints aren't considered in certa…"
Author: Ryotaro KASUGA
Date: 2024-07-01T16:06:24+09:00
New Revision: dc041f77964ed3a93bae5568e18f9186acc265b4
URL:
https://github.com/llvm/llvm-project/commit/dc041f77964ed3a93bae5568e18f9186acc265b4
DIFF:
https://github.com/llvm/llvm-project/commit/dc041f77964ed3a93bae5568e18f9186acc265b4.diff
LOG: Revert "Revert "[MachinePipeliner] Fix constraints aren't considered in
certa…"
This reverts commit e6a961dbef773b16bda2cebc4bf9f3d1e0da42fc.
Added:
llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
Modified:
llvm/include/llvm/CodeGen/MachinePipeliner.h
llvm/lib/CodeGen/MachinePipeliner.cpp
Removed:
diff --git a/llvm/include/llvm/CodeGen/MachinePipeliner.h
b/llvm/include/llvm/CodeGen/MachinePipeliner.h
index 94913f534fb77..7fe5581faa183 100644
--- a/llvm/include/llvm/CodeGen/MachinePipeliner.h
+++ b/llvm/include/llvm/CodeGen/MachinePipeliner.h
@@ -599,8 +599,8 @@ class SMSchedule {
/// chain.
int latestCycleInChain(const SDep &Dep);
- void computeStart(SUnit *SU, int *MaxEarlyStart, int *MinLateStart,
-int *MinEnd, int *MaxStart, int II, SwingSchedulerDAG
*DAG);
+ void computeStart(SUnit *SU, int *MaxEarlyStart, int *MinLateStart, int II,
+SwingSchedulerDAG *DAG);
bool insert(SUnit *SU, int StartCycle, int EndCycle, int II);
/// Iterators for the cycle to instruction map.
@@ -658,6 +658,9 @@ class SMSchedule {
bool isLoopCarried(const SwingSchedulerDAG *SSD, MachineInstr &Phi) const;
bool isLoopCarriedDefOfUse(const SwingSchedulerDAG *SSD, MachineInstr *Def,
MachineOperand &MO) const;
+
+ bool onlyHasLoopCarriedOutputOrOrderPreds(SUnit *SU,
+SwingSchedulerDAG *DAG) const;
void print(raw_ostream &os) const;
void dump() const;
};
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp
b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 7ff14a6cf36bf..515c7f89b4bed 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -2461,47 +2461,43 @@ bool SwingSchedulerDAG::schedulePipeline(SMSchedule
&Schedule) {
// upon the scheduled time for any predecessors/successors.
int EarlyStart = INT_MIN;
int LateStart = INT_MAX;
- // These values are set when the size of the schedule window is limited
- // due to chain dependences.
- int SchedEnd = INT_MAX;
- int SchedStart = INT_MIN;
- Schedule.computeStart(SU, &EarlyStart, &LateStart, &SchedEnd,
&SchedStart,
-II, this);
+ Schedule.computeStart(SU, &EarlyStart, &LateStart, II, this);
LLVM_DEBUG({
dbgs() << "\n";
dbgs() << "Inst (" << SU->NodeNum << ") ";
SU->getInstr()->dump();
dbgs() << "\n";
});
- LLVM_DEBUG({
-dbgs() << format("\tes: %8x ls: %8x me: %8x ms: %8x\n", EarlyStart,
- LateStart, SchedEnd, SchedStart);
- });
+ LLVM_DEBUG(
+ dbgs() << format("\tes: %8x ls: %8x\n", EarlyStart, LateStart));
- if (EarlyStart > LateStart || SchedEnd < EarlyStart ||
- SchedStart > LateStart)
+ if (EarlyStart > LateStart)
scheduleFound = false;
- else if (EarlyStart != INT_MIN && LateStart == INT_MAX) {
-SchedEnd = std::min(SchedEnd, EarlyStart + (int)II - 1);
-scheduleFound = Schedule.insert(SU, EarlyStart, SchedEnd, II);
- } else if (EarlyStart == INT_MIN && LateStart != INT_MAX) {
-SchedStart = std::max(SchedStart, LateStart - (int)II + 1);
-scheduleFound = Schedule.insert(SU, LateStart, SchedStart, II);
- } else if (EarlyStart != INT_MIN && LateStart != INT_MAX) {
-SchedEnd =
-std::min(SchedEnd, std::min(LateStart, EarlyStart + (int)II - 1));
-// When scheduling a Phi it is better to start at the late cycle and go
-// backwards. The default order may insert the Phi too far away from
-// its first dependence.
-if (SU->getInstr()->isPHI())
- scheduleFound = Schedule.insert(SU, SchedEnd, EarlyStart, II);
+ else if (EarlyStart != INT_MIN && LateStart == INT_MAX)
+scheduleFound =
+Schedule.insert(SU, EarlyStart, EarlyStart + (int)II - 1, II);
+ else if (EarlyStart == INT_MIN && LateStart != INT_MAX)
+scheduleFound =
+Schedule.insert(SU, LateStart, LateStart - (int)II + 1, II);
+ else if (EarlyStart != INT_MIN && LateStart != INT_MAX) {
+LateStart = std::min(LateStart, EarlyStart + (int)II - 1);
+// When scheduling a Phi it is better to start at the late cycle and
+// go backwards. The default order may insert the Phi too far away
+// from its first dependence.
+// Also, do backward search when all scheduled predecessors are
+// loop-carried output/order depe
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for 64 bit divergent values (PR #96934)
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
vikramRH wrote:
Any better suggestions ?
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/96934 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (Ty->getIntegerBitWidth() == 32 || Ty->getIntegerBitWidth() == 64)
+ return true;
+ default:
vikramRH wrote:
I feel pointers should be handled as a follow up too since I intend this patch
to reflect current requirements (changed the title since it was misleading)
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (Ty->getIntegerBitWidth() == 32 || Ty->getIntegerBitWidth() == 64)
+ return true;
+ default:
vikramRH wrote:
Also enabling for half, bfloat etc would require additional legalization
support for intrinsics such as update.dpp , set.incactive.lane
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigned size = Ty->getIntegerBitWidth();
+if (size == 32 || size == 64)
pravinjagtap wrote:
just
```
return (TyBitWidth == 32 || TyBitWidth == 64)
```
?
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang][OpenMP] Update flang with changes to the OpenMP dialect (PR #92524)
https://github.com/skatrak updated
https://github.com/llvm/llvm-project/pull/92524
>From 95d6f3446201d2b3162b694887e3fd888b628e96 Mon Sep 17 00:00:00 2001
From: Sergio Afonso
Date: Fri, 17 May 2024 11:38:36 +0100
Subject: [PATCH] [Flang][OpenMP] Update flang with changes to the OpenMP
dialect
This patch applies fixes after the updates to OpenMP clause operands, as well
as updating some tests that were impacted by changes to the ordering or
assembly format of some clauses in MLIR.
---
flang/lib/Lower/OpenMP/ClauseProcessor.cpp| 4 ++--
flang/lib/Lower/OpenMP/ClauseProcessor.h | 4 ++--
flang/lib/Lower/OpenMP/OpenMP.cpp | 19 ---
flang/test/Lower/OpenMP/atomic-capture.f90| 2 +-
flang/test/Lower/OpenMP/copyin-order.f90 | 2 +-
flang/test/Lower/OpenMP/parallel-wsloop.f90 | 2 +-
flang/test/Lower/OpenMP/parallel.f90 | 24 +--
flang/test/Lower/OpenMP/simd.f90 | 2 +-
flang/test/Lower/OpenMP/target.f90| 24 +--
.../use-device-ptr-to-use-device-addr.f90 | 2 +-
10 files changed, 43 insertions(+), 42 deletions(-)
diff --git a/flang/lib/Lower/OpenMP/ClauseProcessor.cpp
b/flang/lib/Lower/OpenMP/ClauseProcessor.cpp
index f78cd0f9df1a1..d507e58b164dd 100644
--- a/flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+++ b/flang/lib/Lower/OpenMP/ClauseProcessor.cpp
@@ -1073,7 +1073,7 @@ bool ClauseProcessor::processEnter(
}
bool ClauseProcessor::processUseDeviceAddr(
-mlir::omp::UseDeviceClauseOps &result,
+mlir::omp::UseDeviceAddrClauseOps &result,
llvm::SmallVectorImpl &useDeviceTypes,
llvm::SmallVectorImpl &useDeviceLocs,
llvm::SmallVectorImpl &useDeviceSyms) const {
@@ -1085,7 +1085,7 @@ bool ClauseProcessor::processUseDeviceAddr(
}
bool ClauseProcessor::processUseDevicePtr(
-mlir::omp::UseDeviceClauseOps &result,
+mlir::omp::UseDevicePtrClauseOps &result,
llvm::SmallVectorImpl &useDeviceTypes,
llvm::SmallVectorImpl &useDeviceLocs,
llvm::SmallVectorImpl &useDeviceSyms) const {
diff --git a/flang/lib/Lower/OpenMP/ClauseProcessor.h
b/flang/lib/Lower/OpenMP/ClauseProcessor.h
index 53571ae5abc20..43795d5c25399 100644
--- a/flang/lib/Lower/OpenMP/ClauseProcessor.h
+++ b/flang/lib/Lower/OpenMP/ClauseProcessor.h
@@ -129,12 +129,12 @@ class ClauseProcessor {
mlir::omp::ReductionClauseOps &result) const;
bool processTo(llvm::SmallVectorImpl &result)
const;
bool processUseDeviceAddr(
- mlir::omp::UseDeviceClauseOps &result,
+ mlir::omp::UseDeviceAddrClauseOps &result,
llvm::SmallVectorImpl &useDeviceTypes,
llvm::SmallVectorImpl &useDeviceLocs,
llvm::SmallVectorImpl &useDeviceSyms) const;
bool processUseDevicePtr(
- mlir::omp::UseDeviceClauseOps &result,
+ mlir::omp::UseDevicePtrClauseOps &result,
llvm::SmallVectorImpl &useDeviceTypes,
llvm::SmallVectorImpl &useDeviceLocs,
llvm::SmallVectorImpl &useDeviceSyms) const;
diff --git a/flang/lib/Lower/OpenMP/OpenMP.cpp
b/flang/lib/Lower/OpenMP/OpenMP.cpp
index 22c41fce31723..d8679fb693659 100644
--- a/flang/lib/Lower/OpenMP/OpenMP.cpp
+++ b/flang/lib/Lower/OpenMP/OpenMP.cpp
@@ -244,7 +244,8 @@ createAndSetPrivatizedLoopVar(lower::AbstractConverter
&converter,
// clause. Support for such list items in a use_device_ptr clause
// is deprecated."
static void promoteNonCPtrUseDevicePtrArgsToUseDeviceAddr(
-mlir::omp::UseDeviceClauseOps &clauseOps,
+llvm::SmallVectorImpl &useDeviceAddrVars,
+llvm::SmallVectorImpl &useDevicePtrVars,
llvm::SmallVectorImpl &useDeviceTypes,
llvm::SmallVectorImpl &useDeviceLocs,
llvm::SmallVectorImpl &useDeviceSymbols) {
@@ -256,10 +257,9 @@ static void promoteNonCPtrUseDevicePtrArgsToUseDeviceAddr(
// Iterate over our use_device_ptr list and shift all non-cptr arguments into
// use_device_addr.
- for (auto *it = clauseOps.useDevicePtrVars.begin();
- it != clauseOps.useDevicePtrVars.end();) {
+ for (auto *it = useDevicePtrVars.begin(); it != useDevicePtrVars.end();) {
if (!fir::isa_builtin_cptr_type(fir::unwrapRefType(it->getType( {
- clauseOps.useDeviceAddrVars.push_back(*it);
+ useDeviceAddrVars.push_back(*it);
// We have to shuffle the symbols around as well, to maintain
// the correct Input -> BlockArg for use_device_ptr/use_device_addr.
// NOTE: However, as map's do not seem to be included currently
@@ -267,11 +267,11 @@ static void promoteNonCPtrUseDevicePtrArgsToUseDeviceAddr(
// future alterations. I believe the reason they are not currently
// is that the BlockArg assign/lowering needs to be extended
// to a greater set of types.
- auto idx = std::distance(clauseOps.useDevicePtrVars.begin(), it);
+ auto idx = std::distance(useDevicePtrVars.begin(), it);
moveElementToBack(idx, useDeviceTypes);
moveElementToBack(idx, useDeviceLocs);
moveEl
[llvm-branch-commits] [llvm] DAG: Call SimplifyDemandedBits on fcopysign sign value (PR #97151)
https://github.com/jayfoad edited https://github.com/llvm/llvm-project/pull/97151 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] DAG: Call SimplifyDemandedBits on fcopysign sign value (PR #97151)
@@ -17565,6 +17565,12 @@ SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
if (CanCombineFCOPYSIGN_EXTEND_ROUND(N))
return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1.getOperand(0));
+ // We only take the sign bit from the sign operand.
+ EVT SignVT = N1.getValueType();
+ if (SimplifyDemandedBits(N1,
jayfoad wrote:
I think this should be able to subsume some of the optimizations above, e.g.
`copysign(x, abs(y)) -> abs(x)` would fall out if SimplifyDemandedBits knew
about extracting the sign bit from `abs(x)`.
https://github.com/llvm/llvm-project/pull/97151
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] DAG: Call SimplifyDemandedBits on fcopysign sign value (PR #97151)
https://github.com/jayfoad approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/97151 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] DAG: Call SimplifyDemandedBits on fcopysign sign value (PR #97151)
arsenm wrote: ### Merge activity * **Jul 1, 6:08 AM EDT**: @arsenm started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/97151). https://github.com/llvm/llvm-project/pull/97151 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] DAG: Call SimplifyDemandedBits on copysign value operand (PR #97180)
arsenm wrote: ### Merge activity * **Jul 1, 6:08 AM EDT**: @arsenm started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/97180). https://github.com/llvm/llvm-project/pull/97180 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -313,8 +327,7 @@ void
AMDGPUAtomicOptimizerImpl::visitIntrinsicInst(IntrinsicInst &I) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent &&
- (!ST->hasDPP() || DL->getTypeSizeInBits(I.getType()) != 32)) {
+ if (ValDivergent && (!ST->hasDPP() || !isOptimizableAtomic(I.getType( {
jayfoad wrote:
Same here.
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -230,8 +245,7 @@ void
AMDGPUAtomicOptimizerImpl::visitAtomicRMWInst(AtomicRMWInst &I) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent &&
- (!ST->hasDPP() || DL->getTypeSizeInBits(I.getType()) != 32)) {
+ if (ValDivergent && (!ST->hasDPP() || !isOptimizableAtomic(I.getType( {
jayfoad wrote:
Pre-existing problem: this `hasDPP` check is in the wrong place. It should only
be tested if we're using the DPP strategy.
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigned size = Ty->getIntegerBitWidth();
jayfoad wrote:
```suggestion
unsigned Size = Ty->getIntegerBitWidth();
```
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
jayfoad wrote: > [AMDGPU] Enable atomic optimizer for divergent i64 and double values Needs some i64 tests https://github.com/llvm/llvm-project/pull/96934 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
@@ -1700,19 +1725,30 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo &CI,
case 8:
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
- case S_LOAD_IMM:
+ case S_LOAD_IMM: {
+// If XNACK is enabled, use the constrained opcodes when the first load is
+// under-aligned.
+const MachineMemOperand *MMO = *CI.I->memoperands_begin();
+auto NeedsConstrainedOpc = [&MMO, Width](const GCNSubtarget &ST) {
+ return ST.isXNACKEnabled() && MMO->getAlign().value() < Width;
jayfoad wrote:
This doesn't look right since `Width` is in units of dwords here.
https://github.com/llvm/llvm-project/pull/96162
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
@@ -1212,8 +1228,17 @@ void SILoadStoreOptimizer::copyToDestRegs( // Copy to the old destination registers. const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY); - const auto *Dest0 = TII->getNamedOperand(*CI.I, OpName); - const auto *Dest1 = TII->getNamedOperand(*Paired.I, OpName); + auto *Dest0 = TII->getNamedOperand(*CI.I, OpName); + auto *Dest1 = TII->getNamedOperand(*Paired.I, OpName); + + // The constrained sload instructions in S_LOAD_IMM class will have + // `early-clobber` flag in the dst operand. Remove the flag before using the + // MOs in copies. + if (Dest0->isEarlyClobber()) +Dest0->setIsEarlyClobber(false); + + if (Dest1->isEarlyClobber()) +Dest1->setIsEarlyClobber(false); jayfoad wrote: ```suggestion Dest0->setIsEarlyClobber(false); Dest1->setIsEarlyClobber(false); ``` https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
@@ -1700,19 +1725,30 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo &CI,
case 8:
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
- case S_LOAD_IMM:
+ case S_LOAD_IMM: {
+// If XNACK is enabled, use the constrained opcodes when the first load is
+// under-aligned.
+const MachineMemOperand *MMO = *CI.I->memoperands_begin();
+auto NeedsConstrainedOpc = [&MMO, Width](const GCNSubtarget &ST) {
jayfoad wrote:
This doesn't need to be a lambda. It is always called, with identical
arguments. Just calculate the result as a `bool` here.
https://github.com/llvm/llvm-project/pull/96162
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ // Returns true if it is a naturally aligned multi-dword load.
+ LoadSDNode *Ld = cast(N);
+ unsigned Size = Ld->getMemoryVT().getStoreSize();
+ return Size <= 4 || Ld->getAlign().value() >= Size;
+}]> {
+ let GISelPredicateCode = [{
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ auto &Ld = cast(MI);
+ TypeSize Size = Ld.getMMO().getSize().getValue();
+ return Size <= 4 || Ld.getMMO().getAlign().value() >= Size;
+ }];
+}
+
+class SMRDUnalignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Do the alignment check if XNACK support is enabled.
+ if (!Subtarget->isXNACKEnabled())
+return false;
+
+ // Returns true if it is an under aligned multi-dword load.
+ LoadSDNode *Ld = cast(N);
+ unsigned Size = Ld->getMemoryVT().getStoreSize();
+ return Size > 4 && (Ld->getAlign().value() < Size);
jayfoad wrote:
Don't need the parens
https://github.com/llvm/llvm-project/pull/96163
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ // Returns true if it is a naturally aligned multi-dword load.
jayfoad wrote:
... or if it's a non-multi-dword load.
https://github.com/llvm/llvm-project/pull/96163
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ // Returns true if it is a naturally aligned multi-dword load.
+ LoadSDNode *Ld = cast(N);
+ unsigned Size = Ld->getMemoryVT().getStoreSize();
+ return Size <= 4 || Ld->getAlign().value() >= Size;
+}]> {
+ let GISelPredicateCode = [{
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ auto &Ld = cast(MI);
+ TypeSize Size = Ld.getMMO().getSize().getValue();
+ return Size <= 4 || Ld.getMMO().getAlign().value() >= Size;
+ }];
+}
+
+class SMRDUnalignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Do the alignment check if XNACK support is enabled.
+ if (!Subtarget->isXNACKEnabled())
+return false;
+
+ // Returns true if it is an under aligned multi-dword load.
+ LoadSDNode *Ld = cast(N);
+ unsigned Size = Ld->getMemoryVT().getStoreSize();
+ return Size > 4 && (Ld->getAlign().value() < Size);
+}]> {
+ let GISelPredicateCode = [{
+ if (!Subtarget->isXNACKEnabled())
+return false;
+
+ auto &Ld = cast(MI);
+ TypeSize Size = Ld.getMMO().getSize().getValue();
+ return Size > 4 && (Ld.getMMO().getAlign().value() < Size);
jayfoad wrote:
Don't need the parens
https://github.com/llvm/llvm-project/pull/96163
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(loc, 1);
+ Value output = getOutput();
+ SmallVector loopBounds(6);
+ for (unsigned dim = 0; dim < 6; ++dim) {
+loopBounds[dim].offset = zero;
+loopBounds[dim].size = getDimValue(builder, loc, output, dim);
+loopBounds[dim].stride = one;
+ }
+ return loopBounds;
+}
+
+SmallVector
+WinogradFilterTransformOp::getLoopIteratorTypes() {
+ SmallVector iteratorTypes(6,
+
utils::IteratorType::parallel);
+ return iteratorTypes;
+}
+
+Value getValueFromOpFoldResult(OpFoldResult opFoldResult, OpBuilder &builder,
+ Location loc) {
+ if (auto val = opFoldResult.dyn_cast()) {
+return val;
+ } else if (auto attr = opFoldResult.dyn_cast()) {
+auto intAttr = cast(attr);
+return builder.create(loc, intAttr);
+ }
Hsiangkai wrote:
I only find a similar one in `mlir/lib/Dialect/Vector/IR/VectorOps.cpp` under
`vector` namespace. It is to convert an array of `OpFoldResult` to an array of
`Value`.
https://github.com/llvm/llvm-project/pull/96184
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)
@@ -2638,4 +2638,41 @@ def WinogradConv2DOp : Op {
+ let description = [{
+Decompose winograd operators. It will convert filter, input and output
+transform operators into a combination of scf, tensor, and linalg
Hsiangkai wrote:
Done.
https://github.com/llvm/llvm-project/pull/96184
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(loc, 1);
Hsiangkai wrote:
Done.
https://github.com/llvm/llvm-project/pull/96184
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(loc, 1);
+ Value output = getOutput();
+ SmallVector loopBounds(6);
+ for (unsigned dim = 0; dim < 6; ++dim) {
+loopBounds[dim].offset = zero;
+loopBounds[dim].size = getDimValue(builder, loc, output, dim);
+loopBounds[dim].stride = one;
+ }
+ return loopBounds;
+}
+
+SmallVector
+WinogradFilterTransformOp::getLoopIteratorTypes() {
+ SmallVector iteratorTypes(6,
+
utils::IteratorType::parallel);
+ return iteratorTypes;
+}
+
+Value getValueFromOpFoldResult(OpFoldResult opFoldResult, OpBuilder &builder,
+ Location loc) {
+ if (auto val = opFoldResult.dyn_cast()) {
+return val;
+ } else if (auto attr = opFoldResult.dyn_cast()) {
+auto intAttr = cast(attr);
+return builder.create(loc, intAttr);
+ }
+ // This should never happen if OpFoldResult is correctly formed.
Hsiangkai wrote:
I updated the implementation.
https://github.com/llvm/llvm-project/pull/96184
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (Ty->getIntegerBitWidth() == 32 || Ty->getIntegerBitWidth() == 64)
+ return true;
+ default:
arsenm wrote:
I thought those all supported 16-bit values already
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)
@@ -3480,6 +3480,31 @@ DiagnosedSilenceableFailure
transform::MapCopyToThreadsOp::applyToOne(
return DiagnosedSilenceableFailure::success();
}
+//===--===//
+// WinogradConv2DOp
+//===--===//
+
+DiagnosedSilenceableFailure transform::WinogradConv2DOp::applyToOne(
+transform::TransformRewriter &rewriter, linalg::LinalgOp target,
+transform::ApplyToEachResultList &results,
+transform::TransformState &state) {
+ rewriter.setInsertionPoint(target);
+ auto maybeTransformed =
+ TypeSwitch>(target)
+ .Case([&](linalg::Conv2DNhwcFhwcOp op) {
+return winogradConv2D(rewriter, op, getM(), getR());
+ })
+ .Default([&](Operation *op) {
+return rewriter.notifyMatchFailure(op, "not supported");
+ });
+
+ if (failed(maybeTransformed))
+return emitDefaultSilenceableFailure(target);
Hsiangkai wrote:
I have avoided a default message here.
https://github.com/llvm/llvm-project/pull/96182
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enable atomic optimizer for divergent i64 and double values (PR #96934)
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
arsenm wrote:
How about isLegalCrossLaneType?
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in terms of leafs (PR #97110)
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/97110
>From 2d25e0d32672ecae3dc3ad42c50446e651eceb06 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 28 Jun 2024 15:27:42 -0500
Subject: [PATCH] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in term of
leafs
Replace the switch in `getOpenMPCaptureRegions` with a loop collecting
capture regions based on the constituent directives.
---
clang/lib/Basic/OpenMPKinds.cpp | 170 ++--
1 file changed, 72 insertions(+), 98 deletions(-)
diff --git a/clang/lib/Basic/OpenMPKinds.cpp b/clang/lib/Basic/OpenMPKinds.cpp
index 30c34c207ae23..152891dfa27dc 100644
--- a/clang/lib/Basic/OpenMPKinds.cpp
+++ b/clang/lib/Basic/OpenMPKinds.cpp
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind));
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(OMPD_metadirective);
-break;
- case OMPD_parallel:
- case OMPD_parallel_for:
- case OMPD_parallel_for_simd:
- case OMPD_parallel_master:
- case OMPD_parallel_masked:
- case OMPD_parallel_sections:
- case OMPD_distribute_parallel_for:
- case OMPD_distribute_parallel_for_simd:
- case OMPD_parallel_loop:
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_teams:
- case OMPD_target_teams_distribute:
- case OMPD_target_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_teams:
- case OMPD_teams_distribute:
- case OMPD_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_target:
- case OMPD_target_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-break;
- case OMPD_teams_loop:
- case OMPD_teams_distribute_parallel_for:
- case OMPD_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_parallel:
- case OMPD_target_parallel_for:
- case OMPD_target_parallel_for_simd:
- case OMPD_target_parallel_loop:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_task:
- case OMPD_target_enter_data:
- case OMPD_target_exit_data:
- case OMPD_target_update:
-CaptureRegions.push_back(OMPD_task);
-break;
- case OMPD_taskloop:
- case OMPD_taskloop_simd:
- case OMPD_master_taskloop:
- case OMPD_master_taskloop_simd:
- case OMPD_masked_taskloop:
- case OMPD_masked_taskloop_simd:
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_parallel_masked_taskloop:
- case OMPD_parallel_masked_taskloop_simd:
- case OMPD_parallel_master_taskloop:
- case OMPD_parallel_master_taskloop_simd:
-CaptureRegions.push_back(OMPD_parallel);
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_target_teams_loop:
- case OMPD_target_teams_distribute_parallel_for:
- case OMPD_target_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_nothing:
-CaptureRegions.push_back(OMPD_nothing);
-break;
- case OMPD_loop:
-// TODO: 'loop' may require different capture regions depending on the bind
-// clause or the parent directive when there is no bind clause. Use
-// OMPD_unknown for now.
- case OMPD_simd:
- case OMPD_for:
- case OMPD_for_simd:
- case OMPD_sections:
- case OMPD_single:
- case OMPD_taskgroup:
- case OMPD_distribute:
- case OMPD_ordered:
- case OMPD_target_data:
- case OMPD_distribute_simd:
- case OMPD_scope:
- case OMPD_dispatch:
+ auto getRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
+assert(isLeafConstruct(LKind) && "Epecting leaf directive");
+switch (LKind) {
+case OMPD_metadirective:
+ CaptureRegions.push_back(OMPD_metadirective);
+ break;
+case OMPD_nothing:
+ CaptureRegions.push_back(OMPD_nothing);
+ break;
+case OMPD_parallel:
+ CaptureRegions.push_back(OMPD_parallel);
+ break;
+case OMPD_target:
+ CaptureRegions.push_back(OMPD_task);
+ CaptureRegions.push_back(OMPD_target);
+ break;
+case OMPD_task:
+case OMPD_target_enter_data:
+case OMPD_target_exit_data:
+case OMPD_target_update:
+ CaptureRegions.push_back(OMPD_task);
+ break;
+case OMPD_teams:
+ CaptureRegions.push_back(OMPD_teams);
+ break;
+case OMPD_taskloop:
+ CaptureRegions.push_back(OMPD_taskloop);
+ break;
+case OMPD_loop:
+ // TODO: 'loop' may require different capture regions depending on the
+ // bind clause or the parent dire
[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90267 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90267 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [llvm] [BOLT] Match functions with calls as anchors (PR #96596)
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/6] Added call to matchWithCallsAsAnchors
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index aafffac3d4b1c..1a0e5d239d252 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -479,6 +479,9 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
if (!YamlBF.Used && BF && !ProfiledFunctions.count(BF))
matchProfileToFunction(YamlBF, *BF);
+ uint64_t MatchedWithCallsAsAnchors = 0;
+ matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
errs() << "BOLT-WARNING: profile ignored for function " << YamlBF.Name
>From 77ef0008f4f5987719555e6cc3e32da812ae0f31 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:11:43 -0700
Subject: [PATCH 2/6] Changed CallHashToBF representation
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 1a0e5d239d252..91b01a99c7485 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -29,6 +29,10 @@ static llvm::cl::opt
cl::desc("ignore hash while reading function profile"),
cl::Hidden, cl::cat(BoltOptCategory));
+llvm::cl::opt MatchWithCallsAsAnchors("match-with-calls-as-anchors",
+ cl::desc("Matches with calls as anchors"),
+ cl::Hidden, cl::cat(BoltOptCategory));
+
llvm::cl::opt ProfileUseDFS("profile-use-dfs",
cl::desc("use DFS order for YAML profile"),
cl::Hidden, cl::cat(BoltOptCategory));
@@ -353,7 +357,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
llvm_unreachable("Unhandled HashFunction");
};
- std::unordered_map CallHashToBF;
+ std::unordered_map CallHashToBF;
for (BinaryFunction *BF : BC.getAllBinaryFunctions()) {
if (ProfiledFunctions.count(BF))
@@ -375,12 +379,12 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
for (const std::string &FunctionName : FunctionNames)
HashString.append(FunctionName);
}
-CallHashToBF.emplace(ComputeCallHash(HashString), BF);
+CallHashToBF[ComputeCallHash(HashString)] = BF;
}
std::unordered_map ProfiledFunctionIdToName;
- for (const yaml::bolt::BinaryFunctionProfile YamlBF : YamlBP.Functions)
+ for (const yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
ProfiledFunctionIdToName[YamlBF.Id] = YamlBF.Name;
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions) {
@@ -401,7 +405,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
auto It = CallHashToBF.find(Hash);
if (It == CallHashToBF.end())
continue;
-matchProfileToFunction(YamlBF, It->second);
+matchProfileToFunction(YamlBF, *It->second);
++MatchedWithCallsAsAnchors;
}
}
@@ -480,7 +484,8 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
matchProfileToFunction(YamlBF, *BF);
uint64_t MatchedWithCallsAsAnchors = 0;
- matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+ if (opts::MatchWithCallsAsAnchors)
+matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
>From ea7cb68ab9e8e158412c2e752986968968a60d93 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Tue, 25 Jun 2024 09:28:39 -0700
Subject: [PATCH 3/6] Changed BF called FunctionNames to multiset
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 91b01a99c7485..3b3d73f7af023 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -365,7 +365,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string HashString;
for (const auto &BB : BF->blocks()) {
- std::set FunctionNames;
+ std::multiset FunctionNames;
for (const MCInst &Instr : BB) {
// Skip non-call instructions.
if (!BC.MIB->isCall(Instr))
@@ -397,9 +397,8 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string &FunctionName = ProfiledFunctionIdToName[CallSite.DestId];
FunctionNames.insert(FunctionName);
[llvm-branch-commits] [clang] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in terms of leafs (PR #97110)
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(OMPD_metadirective);
-break;
- case OMPD_parallel:
- case OMPD_parallel_for:
- case OMPD_parallel_for_simd:
- case OMPD_parallel_master:
- case OMPD_parallel_masked:
- case OMPD_parallel_sections:
- case OMPD_distribute_parallel_for:
- case OMPD_distribute_parallel_for_simd:
- case OMPD_parallel_loop:
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_teams:
- case OMPD_target_teams_distribute:
- case OMPD_target_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_teams:
- case OMPD_teams_distribute:
- case OMPD_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_target:
- case OMPD_target_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-break;
- case OMPD_teams_loop:
- case OMPD_teams_distribute_parallel_for:
- case OMPD_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_parallel:
- case OMPD_target_parallel_for:
- case OMPD_target_parallel_for_simd:
- case OMPD_target_parallel_loop:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_task:
- case OMPD_target_enter_data:
- case OMPD_target_exit_data:
- case OMPD_target_update:
-CaptureRegions.push_back(OMPD_task);
-break;
- case OMPD_taskloop:
- case OMPD_taskloop_simd:
- case OMPD_master_taskloop:
- case OMPD_master_taskloop_simd:
- case OMPD_masked_taskloop:
- case OMPD_masked_taskloop_simd:
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_parallel_masked_taskloop:
- case OMPD_parallel_masked_taskloop_simd:
- case OMPD_parallel_master_taskloop:
- case OMPD_parallel_master_taskloop_simd:
-CaptureRegions.push_back(OMPD_parallel);
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_target_teams_loop:
- case OMPD_target_teams_distribute_parallel_for:
- case OMPD_target_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_nothing:
-CaptureRegions.push_back(OMPD_nothing);
-break;
- case OMPD_loop:
-// TODO: 'loop' may require different capture regions depending on the bind
-// clause or the parent directive when there is no bind clause. Use
-// OMPD_unknown for now.
- case OMPD_simd:
- case OMPD_for:
- case OMPD_for_simd:
- case OMPD_sections:
- case OMPD_single:
- case OMPD_taskgroup:
- case OMPD_distribute:
- case OMPD_ordered:
- case OMPD_target_data:
- case OMPD_distribute_simd:
- case OMPD_scope:
- case OMPD_dispatch:
+ auto getRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
+assert(isLeafConstruct(LKind) && "Epecting leaf directive");
+switch (LKind) {
+case OMPD_metadirective:
+ CaptureRegions.push_back(OMPD_metadirective);
+ break;
+case OMPD_nothing:
+ CaptureRegions.push_back(OMPD_nothing);
+ break;
+case OMPD_parallel:
+ CaptureRegions.push_back(OMPD_parallel);
+ break;
+case OMPD_target:
+ CaptureRegions.push_back(OMPD_task);
+ CaptureRegions.push_back(OMPD_target);
+ break;
+case OMPD_task:
+case OMPD_target_enter_data:
+case OMPD_target_exit_data:
+case OMPD_target_update:
+ CaptureRegions.push_back(OMPD_task);
+ break;
+case OMPD_teams:
+ CaptureRegions.push_back(OMPD_teams);
+ break;
+case OMPD_taskloop:
+ CaptureRegions.push_back(OMPD_taskloop);
+ break;
+case OMPD_loop:
+ // TODO: 'loop' may require different capture regions depending on the
+ // bind clause or the parent directive when there is no bind clause.
+ // If any of the directives that push regions here are parents of 'loop',
+ // assume 'parallel'. Otherwise do nothing.
+ if (!CaptureRegions.empty() &&
+ !llvm::is_contained(CaptureRegions, OMPD_parallel))
+CaptureRegions.push_back(OMPD_parallel);
+ break;
+case OMPD_dispatch:
+case OMPD_distribute:
+case OMPD_for:
+case OMPD_masked:
+case OMPD_master:
+case OMPD_ordered:
+case OMPD_scope:
+case OMPD_sections:
+case OMPD_simd:
+case OMPD_single:
+case OMPD_target_data:
+case OMPD_taskgroup:
+ // These directives (when standalone) use OMPD_unknown as the region,
+ //
[llvm-branch-commits] [clang] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in terms of leafs (PR #97110)
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(OMPD_metadirective);
-break;
- case OMPD_parallel:
- case OMPD_parallel_for:
- case OMPD_parallel_for_simd:
- case OMPD_parallel_master:
- case OMPD_parallel_masked:
- case OMPD_parallel_sections:
- case OMPD_distribute_parallel_for:
- case OMPD_distribute_parallel_for_simd:
- case OMPD_parallel_loop:
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_teams:
- case OMPD_target_teams_distribute:
- case OMPD_target_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_teams:
- case OMPD_teams_distribute:
- case OMPD_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_target:
- case OMPD_target_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-break;
- case OMPD_teams_loop:
- case OMPD_teams_distribute_parallel_for:
- case OMPD_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_parallel:
- case OMPD_target_parallel_for:
- case OMPD_target_parallel_for_simd:
- case OMPD_target_parallel_loop:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_task:
- case OMPD_target_enter_data:
- case OMPD_target_exit_data:
- case OMPD_target_update:
-CaptureRegions.push_back(OMPD_task);
-break;
- case OMPD_taskloop:
- case OMPD_taskloop_simd:
- case OMPD_master_taskloop:
- case OMPD_master_taskloop_simd:
- case OMPD_masked_taskloop:
- case OMPD_masked_taskloop_simd:
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_parallel_masked_taskloop:
- case OMPD_parallel_masked_taskloop_simd:
- case OMPD_parallel_master_taskloop:
- case OMPD_parallel_master_taskloop_simd:
-CaptureRegions.push_back(OMPD_parallel);
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_target_teams_loop:
- case OMPD_target_teams_distribute_parallel_for:
- case OMPD_target_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_nothing:
-CaptureRegions.push_back(OMPD_nothing);
-break;
- case OMPD_loop:
-// TODO: 'loop' may require different capture regions depending on the bind
-// clause or the parent directive when there is no bind clause. Use
-// OMPD_unknown for now.
- case OMPD_simd:
- case OMPD_for:
- case OMPD_for_simd:
- case OMPD_sections:
- case OMPD_single:
- case OMPD_taskgroup:
- case OMPD_distribute:
- case OMPD_ordered:
- case OMPD_target_data:
- case OMPD_distribute_simd:
- case OMPD_scope:
- case OMPD_dispatch:
+ auto getRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
alexey-bataev wrote:
```suggestion
auto GetRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
```
https://github.com/llvm/llvm-project/pull/97110
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in terms of leafs (PR #97110)
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/97110
>From 2d25e0d32672ecae3dc3ad42c50446e651eceb06 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 28 Jun 2024 15:27:42 -0500
Subject: [PATCH 1/2] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in term
of leafs
Replace the switch in `getOpenMPCaptureRegions` with a loop collecting
capture regions based on the constituent directives.
---
clang/lib/Basic/OpenMPKinds.cpp | 170 ++--
1 file changed, 72 insertions(+), 98 deletions(-)
diff --git a/clang/lib/Basic/OpenMPKinds.cpp b/clang/lib/Basic/OpenMPKinds.cpp
index 30c34c207ae23..152891dfa27dc 100644
--- a/clang/lib/Basic/OpenMPKinds.cpp
+++ b/clang/lib/Basic/OpenMPKinds.cpp
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind));
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(OMPD_metadirective);
-break;
- case OMPD_parallel:
- case OMPD_parallel_for:
- case OMPD_parallel_for_simd:
- case OMPD_parallel_master:
- case OMPD_parallel_masked:
- case OMPD_parallel_sections:
- case OMPD_distribute_parallel_for:
- case OMPD_distribute_parallel_for_simd:
- case OMPD_parallel_loop:
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_teams:
- case OMPD_target_teams_distribute:
- case OMPD_target_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_teams:
- case OMPD_teams_distribute:
- case OMPD_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_target:
- case OMPD_target_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-break;
- case OMPD_teams_loop:
- case OMPD_teams_distribute_parallel_for:
- case OMPD_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_parallel:
- case OMPD_target_parallel_for:
- case OMPD_target_parallel_for_simd:
- case OMPD_target_parallel_loop:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_task:
- case OMPD_target_enter_data:
- case OMPD_target_exit_data:
- case OMPD_target_update:
-CaptureRegions.push_back(OMPD_task);
-break;
- case OMPD_taskloop:
- case OMPD_taskloop_simd:
- case OMPD_master_taskloop:
- case OMPD_master_taskloop_simd:
- case OMPD_masked_taskloop:
- case OMPD_masked_taskloop_simd:
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_parallel_masked_taskloop:
- case OMPD_parallel_masked_taskloop_simd:
- case OMPD_parallel_master_taskloop:
- case OMPD_parallel_master_taskloop_simd:
-CaptureRegions.push_back(OMPD_parallel);
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_target_teams_loop:
- case OMPD_target_teams_distribute_parallel_for:
- case OMPD_target_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_nothing:
-CaptureRegions.push_back(OMPD_nothing);
-break;
- case OMPD_loop:
-// TODO: 'loop' may require different capture regions depending on the bind
-// clause or the parent directive when there is no bind clause. Use
-// OMPD_unknown for now.
- case OMPD_simd:
- case OMPD_for:
- case OMPD_for_simd:
- case OMPD_sections:
- case OMPD_single:
- case OMPD_taskgroup:
- case OMPD_distribute:
- case OMPD_ordered:
- case OMPD_target_data:
- case OMPD_distribute_simd:
- case OMPD_scope:
- case OMPD_dispatch:
+ auto getRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
+assert(isLeafConstruct(LKind) && "Epecting leaf directive");
+switch (LKind) {
+case OMPD_metadirective:
+ CaptureRegions.push_back(OMPD_metadirective);
+ break;
+case OMPD_nothing:
+ CaptureRegions.push_back(OMPD_nothing);
+ break;
+case OMPD_parallel:
+ CaptureRegions.push_back(OMPD_parallel);
+ break;
+case OMPD_target:
+ CaptureRegions.push_back(OMPD_task);
+ CaptureRegions.push_back(OMPD_target);
+ break;
+case OMPD_task:
+case OMPD_target_enter_data:
+case OMPD_target_exit_data:
+case OMPD_target_update:
+ CaptureRegions.push_back(OMPD_task);
+ break;
+case OMPD_teams:
+ CaptureRegions.push_back(OMPD_teams);
+ break;
+case OMPD_taskloop:
+ CaptureRegions.push_back(OMPD_taskloop);
+ break;
+case OMPD_loop:
+ // TODO: 'loop' may require different capture regions depending on the
+ // bind clause or the parent
[llvm-branch-commits] [clang] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in terms of leafs (PR #97110)
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(OMPD_metadirective);
-break;
- case OMPD_parallel:
- case OMPD_parallel_for:
- case OMPD_parallel_for_simd:
- case OMPD_parallel_master:
- case OMPD_parallel_masked:
- case OMPD_parallel_sections:
- case OMPD_distribute_parallel_for:
- case OMPD_distribute_parallel_for_simd:
- case OMPD_parallel_loop:
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_teams:
- case OMPD_target_teams_distribute:
- case OMPD_target_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_teams:
- case OMPD_teams_distribute:
- case OMPD_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_target:
- case OMPD_target_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-break;
- case OMPD_teams_loop:
- case OMPD_teams_distribute_parallel_for:
- case OMPD_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_parallel:
- case OMPD_target_parallel_for:
- case OMPD_target_parallel_for_simd:
- case OMPD_target_parallel_loop:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_task:
- case OMPD_target_enter_data:
- case OMPD_target_exit_data:
- case OMPD_target_update:
-CaptureRegions.push_back(OMPD_task);
-break;
- case OMPD_taskloop:
- case OMPD_taskloop_simd:
- case OMPD_master_taskloop:
- case OMPD_master_taskloop_simd:
- case OMPD_masked_taskloop:
- case OMPD_masked_taskloop_simd:
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_parallel_masked_taskloop:
- case OMPD_parallel_masked_taskloop_simd:
- case OMPD_parallel_master_taskloop:
- case OMPD_parallel_master_taskloop_simd:
-CaptureRegions.push_back(OMPD_parallel);
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_target_teams_loop:
- case OMPD_target_teams_distribute_parallel_for:
- case OMPD_target_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_nothing:
-CaptureRegions.push_back(OMPD_nothing);
-break;
- case OMPD_loop:
-// TODO: 'loop' may require different capture regions depending on the bind
-// clause or the parent directive when there is no bind clause. Use
-// OMPD_unknown for now.
- case OMPD_simd:
- case OMPD_for:
- case OMPD_for_simd:
- case OMPD_sections:
- case OMPD_single:
- case OMPD_taskgroup:
- case OMPD_distribute:
- case OMPD_ordered:
- case OMPD_target_data:
- case OMPD_distribute_simd:
- case OMPD_scope:
- case OMPD_dispatch:
+ auto getRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
kparzysz wrote:
Done
https://github.com/llvm/llvm-project/pull/97110
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in terms of leafs (PR #97110)
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(OMPD_metadirective);
-break;
- case OMPD_parallel:
- case OMPD_parallel_for:
- case OMPD_parallel_for_simd:
- case OMPD_parallel_master:
- case OMPD_parallel_masked:
- case OMPD_parallel_sections:
- case OMPD_distribute_parallel_for:
- case OMPD_distribute_parallel_for_simd:
- case OMPD_parallel_loop:
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_teams:
- case OMPD_target_teams_distribute:
- case OMPD_target_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_teams:
- case OMPD_teams_distribute:
- case OMPD_teams_distribute_simd:
-CaptureRegions.push_back(OMPD_teams);
-break;
- case OMPD_target:
- case OMPD_target_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-break;
- case OMPD_teams_loop:
- case OMPD_teams_distribute_parallel_for:
- case OMPD_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_target_parallel:
- case OMPD_target_parallel_for:
- case OMPD_target_parallel_for_simd:
- case OMPD_target_parallel_loop:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_task:
- case OMPD_target_enter_data:
- case OMPD_target_exit_data:
- case OMPD_target_update:
-CaptureRegions.push_back(OMPD_task);
-break;
- case OMPD_taskloop:
- case OMPD_taskloop_simd:
- case OMPD_master_taskloop:
- case OMPD_master_taskloop_simd:
- case OMPD_masked_taskloop:
- case OMPD_masked_taskloop_simd:
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_parallel_masked_taskloop:
- case OMPD_parallel_masked_taskloop_simd:
- case OMPD_parallel_master_taskloop:
- case OMPD_parallel_master_taskloop_simd:
-CaptureRegions.push_back(OMPD_parallel);
-CaptureRegions.push_back(OMPD_taskloop);
-break;
- case OMPD_target_teams_loop:
- case OMPD_target_teams_distribute_parallel_for:
- case OMPD_target_teams_distribute_parallel_for_simd:
-CaptureRegions.push_back(OMPD_task);
-CaptureRegions.push_back(OMPD_target);
-CaptureRegions.push_back(OMPD_teams);
-CaptureRegions.push_back(OMPD_parallel);
-break;
- case OMPD_nothing:
-CaptureRegions.push_back(OMPD_nothing);
-break;
- case OMPD_loop:
-// TODO: 'loop' may require different capture regions depending on the bind
-// clause or the parent directive when there is no bind clause. Use
-// OMPD_unknown for now.
- case OMPD_simd:
- case OMPD_for:
- case OMPD_for_simd:
- case OMPD_sections:
- case OMPD_single:
- case OMPD_taskgroup:
- case OMPD_distribute:
- case OMPD_ordered:
- case OMPD_target_data:
- case OMPD_distribute_simd:
- case OMPD_scope:
- case OMPD_dispatch:
+ auto getRegionsForLeaf = [&](OpenMPDirectiveKind LKind) {
+assert(isLeafConstruct(LKind) && "Epecting leaf directive");
+switch (LKind) {
+case OMPD_metadirective:
+ CaptureRegions.push_back(OMPD_metadirective);
+ break;
+case OMPD_nothing:
+ CaptureRegions.push_back(OMPD_nothing);
+ break;
+case OMPD_parallel:
+ CaptureRegions.push_back(OMPD_parallel);
+ break;
+case OMPD_target:
+ CaptureRegions.push_back(OMPD_task);
+ CaptureRegions.push_back(OMPD_target);
+ break;
+case OMPD_task:
+case OMPD_target_enter_data:
+case OMPD_target_exit_data:
+case OMPD_target_update:
+ CaptureRegions.push_back(OMPD_task);
+ break;
+case OMPD_teams:
+ CaptureRegions.push_back(OMPD_teams);
+ break;
+case OMPD_taskloop:
+ CaptureRegions.push_back(OMPD_taskloop);
+ break;
+case OMPD_loop:
+ // TODO: 'loop' may require different capture regions depending on the
+ // bind clause or the parent directive when there is no bind clause.
+ // If any of the directives that push regions here are parents of 'loop',
+ // assume 'parallel'. Otherwise do nothing.
+ if (!CaptureRegions.empty() &&
+ !llvm::is_contained(CaptureRegions, OMPD_parallel))
+CaptureRegions.push_back(OMPD_parallel);
+ break;
+case OMPD_dispatch:
+case OMPD_distribute:
+case OMPD_for:
+case OMPD_masked:
+case OMPD_master:
+case OMPD_ordered:
+case OMPD_scope:
+case OMPD_sections:
+case OMPD_simd:
+case OMPD_single:
+case OMPD_target_data:
+case OMPD_taskgroup:
+ // These directives (when standalone) use OMPD_unknown as the region,
+ //
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
https://github.com/ilovepi created https://github.com/llvm/llvm-project/pull/97347 This patch adds support for merging the atomic_abi attribute, specifid in https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version, to LLD. The atomics_abi tag merging is conducted as follows: UNKNOWN is safe to merge with all other values. A6C is compatible with A6S, and results in the A6C ABI. A6C is incompatible with A7, and results in an error. A6S and A7 are compatible, and merging results in the A7 ABI. Note: the A7 is not yet supported in either LLVM or in any current hardware, and is therefore omitted from attribute generation in RISCVTargetStreamer. LLD support was split from https://github.com/llvm/llvm-project/pull/90266 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
llvmbot wrote:
@llvm/pr-subscribers-lld
@llvm/pr-subscribers-lld-elf
Author: Paul Kirth (ilovepi)
Changes
This patch adds support for merging the atomic_abi attribute, specifid in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version,
to LLD.
The atomics_abi tag merging is conducted as follows:
UNKNOWN is safe to merge with all other values.
A6C is compatible with A6S, and results in the A6C ABI.
A6C is incompatible with A7, and results in an error.
A6S and A7 are compatible, and merging results in the A7 ABI.
Note: the A7 is not yet supported in either LLVM or in any current hardware,
and is therefore omitted from attribute generation in RISCVTargetStreamer.
LLD support was split from https://github.com/llvm/llvm-project/pull/90266
---
Full diff: https://github.com/llvm/llvm-project/pull/97347.diff
2 Files Affected:
- (modified) lld/ELF/Arch/RISCV.cpp (+78)
- (modified) lld/test/ELF/riscv-attributes.s (+203)
``diff
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index e4d63250135e0..aa11aaa61a532 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+ auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+ };
+
+ switch (static_cast(oldTag)) {
+ case RISCVAtomicAbiTag::UNKNOWN:
+it->getSecond() = static_cast(newTag);
+return;
+ case RISCVAtomicAbiTag::A6C:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ return;
+case RISCVAtomicAbiTag::A7:
+ reportAbiError();
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6C:
+ return;
+};
+
+ case RISCVAtomicAbiTag::A6S:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6C:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ return;
+case RISCVAtomicAbiTag::A7:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6S:
+ return;
+};
+
+ case RISCVAtomicAbiTag::A7:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ return;
+case RISCVAtomicAbiTag::A6C:
+ reportAbiError();
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A7:
+ return;
+};
+ };
+ llvm_unreachable("unknown AtomicABI");
+}
+
static RISCVAttributesSection *
mergeAttributesSection(const SmallVector §ions) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
RISCVISAUtils::OrderedExtensionMap exts;
const InputSectionBase *firstStackAlign = nullptr;
+ const InputSectionBase *firstAtomicAbi = nullptr;
unsigned firstStackAlignValue = 0, xlen = 0;
bool hasArch = false;
@@ -1134,6 +1200,18 @@ mergeAttributesSection(const
SmallVector §ions) {
case RISCVAttrs::PRIV_SPEC_MINOR:
case RISCVAttrs::PRIV_SPEC_REVISION:
break;
+
+ case llvm::RISCVAttrs::AttrType::ATOMIC_ABI:
+if (auto i = parser.getAttributeValue(tag.attr)) {
+ auto r = merged.intAttr.try_emplace(tag.attr, *i);
+ if (r.second)
+firstAtomicAbi = sec;
+ else
+mergeAtomic(r.first, firstAtomicAbi, sec,
+static_cast(r.first->getSecond()),
+static_cast(*i));
+}
+continue;
}
// Fallback for deprecated priv_spec* and other unknown attributes:
retain
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 68534d0fb6b75..38b0fe8e7797e 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -44,6 +44,40 @@
# RUN: not ld.lld a.o b.o c.o diff_stack_align.o -o /dev/null 2>&1 | FileCheck
%s --check-prefix=STACK_ALIGN --implicit-check-not=error:
# STACK_ALIGN: error: diff_stack_align.o:(.riscv.attributes) has
stack_align=32 but a.o:(.riscv.attributes) has stack_align=16
+## RISC-V tag merging for atomic_abi values A6
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/97347 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/97347 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [llvm] [BOLT] Match functions with calls as anchors (PR #96596)
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/7] Added call to matchWithCallsAsAnchors
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index aafffac3d4b1c..1a0e5d239d252 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -479,6 +479,9 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
if (!YamlBF.Used && BF && !ProfiledFunctions.count(BF))
matchProfileToFunction(YamlBF, *BF);
+ uint64_t MatchedWithCallsAsAnchors = 0;
+ matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
errs() << "BOLT-WARNING: profile ignored for function " << YamlBF.Name
>From 77ef0008f4f5987719555e6cc3e32da812ae0f31 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:11:43 -0700
Subject: [PATCH 2/7] Changed CallHashToBF representation
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 1a0e5d239d252..91b01a99c7485 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -29,6 +29,10 @@ static llvm::cl::opt
cl::desc("ignore hash while reading function profile"),
cl::Hidden, cl::cat(BoltOptCategory));
+llvm::cl::opt MatchWithCallsAsAnchors("match-with-calls-as-anchors",
+ cl::desc("Matches with calls as anchors"),
+ cl::Hidden, cl::cat(BoltOptCategory));
+
llvm::cl::opt ProfileUseDFS("profile-use-dfs",
cl::desc("use DFS order for YAML profile"),
cl::Hidden, cl::cat(BoltOptCategory));
@@ -353,7 +357,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
llvm_unreachable("Unhandled HashFunction");
};
- std::unordered_map CallHashToBF;
+ std::unordered_map CallHashToBF;
for (BinaryFunction *BF : BC.getAllBinaryFunctions()) {
if (ProfiledFunctions.count(BF))
@@ -375,12 +379,12 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
for (const std::string &FunctionName : FunctionNames)
HashString.append(FunctionName);
}
-CallHashToBF.emplace(ComputeCallHash(HashString), BF);
+CallHashToBF[ComputeCallHash(HashString)] = BF;
}
std::unordered_map ProfiledFunctionIdToName;
- for (const yaml::bolt::BinaryFunctionProfile YamlBF : YamlBP.Functions)
+ for (const yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
ProfiledFunctionIdToName[YamlBF.Id] = YamlBF.Name;
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions) {
@@ -401,7 +405,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
auto It = CallHashToBF.find(Hash);
if (It == CallHashToBF.end())
continue;
-matchProfileToFunction(YamlBF, It->second);
+matchProfileToFunction(YamlBF, *It->second);
++MatchedWithCallsAsAnchors;
}
}
@@ -480,7 +484,8 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
matchProfileToFunction(YamlBF, *BF);
uint64_t MatchedWithCallsAsAnchors = 0;
- matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+ if (opts::MatchWithCallsAsAnchors)
+matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
>From ea7cb68ab9e8e158412c2e752986968968a60d93 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Tue, 25 Jun 2024 09:28:39 -0700
Subject: [PATCH 3/7] Changed BF called FunctionNames to multiset
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 91b01a99c7485..3b3d73f7af023 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -365,7 +365,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string HashString;
for (const auto &BB : BF->blocks()) {
- std::set FunctionNames;
+ std::multiset FunctionNames;
for (const MCInst &Instr : BB) {
// Skip non-call instructions.
if (!BC.MIB->isCall(Instr))
@@ -397,9 +397,8 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string &FunctionName = ProfiledFunctionIdToName[CallSite.DestId];
FunctionNames.insert(FunctionName);
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/97347 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/97347 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp| 70 ---
lld/test/ELF/riscv-attributes.s | 4 +-
llvm/include/llvm/Support/RISCVAttributes.h | 4 +-
.../MCTargetDesc/RISCVTargetStreamer.cpp | 15 ++--
4 files changed, 39 insertions(+), 54 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
const InputSectionBase *oldSection,
const InputSectionBase *newSection, unsigned int
oldTag,
unsigned int newTag) {
- using RISCVAttrs::RISCVAtomicAbiTag;
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
return;
- auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
- };
-
- switch (static_cast(oldTag)) {
- case RISCVAtomicAbiTag::UNKNOWN:
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
it->getSecond() = newTag;
return;
- case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- reportAbiError();
+case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
};
-break;
- case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
return;
-case RISCVAtomicAbiTag::A7:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
};
-break;
- case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
- it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
return;
-case RISCVAtomicAbiTag::A6C:
- reportAbiError();
+case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
};
+ default:
+llvm_unreachable("unknown AtomicABI");
};
- llvm_unreachable("unknown AtomicABI");
}
static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o
atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o
atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 |
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o
atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git a/llvm/include/llvm/Sup
[llvm-branch-commits] [BOLT] Drop macro-fusion alignment (PR #97358)
https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/97358 9d0754ada5dbbc0c009bcc2f7824488419cc5530 dropped MC support required for macro-fusion alignment in BOLT. Remove the support in BOLT. Test Plan: macro-fusion alignment was never upstreamed, so no upstream tests are affected. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+ auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+ };
+
+ switch (static_cast(oldTag)) {
MaskRay wrote:
unneeded cast?
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+ auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+ };
+
+ switch (static_cast(oldTag)) {
+ case RISCVAtomicAbiTag::UNKNOWN:
+it->getSecond() = static_cast(newTag);
+return;
+ case RISCVAtomicAbiTag::A6C:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ return;
+case RISCVAtomicAbiTag::A7:
+ reportAbiError();
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6C:
+ return;
+};
+
+ case RISCVAtomicAbiTag::A6S:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6C:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ return;
+case RISCVAtomicAbiTag::A7:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6S:
+ return;
+};
+
+ case RISCVAtomicAbiTag::A7:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ return;
+case RISCVAtomicAbiTag::A6C:
+ reportAbiError();
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A7:
+ return;
+};
+ };
+ llvm_unreachable("unknown AtomicABI");
MaskRay wrote:
If a potentially-corrupted object file may contain an unknown tag, it's
inappropriate to use unreachable.
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+ auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+ };
+
+ switch (static_cast(oldTag)) {
ilovepi wrote:
yes. Looks like I missed one. Thanks.
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+ auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+ };
+
+ switch (static_cast(oldTag)) {
+ case RISCVAtomicAbiTag::UNKNOWN:
+it->getSecond() = static_cast(newTag);
+return;
+ case RISCVAtomicAbiTag::A6C:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ return;
+case RISCVAtomicAbiTag::A7:
+ reportAbiError();
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6C:
+ return;
+};
+
+ case RISCVAtomicAbiTag::A6S:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6C:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+ return;
+case RISCVAtomicAbiTag::A7:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6S:
+ return;
+};
+
+ case RISCVAtomicAbiTag::A7:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+ it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+ return;
+case RISCVAtomicAbiTag::A6C:
+ reportAbiError();
+ return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A7:
+ return;
+};
+ };
+ llvm_unreachable("unknown AtomicABI");
ilovepi wrote:
Ah, fair point. I'll update w/ an error instead.
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [BOLT] Drop macro-fusion alignment (PR #97358)
https://github.com/aaupov ready_for_review https://github.com/llvm/llvm-project/pull/97358 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [BOLT] Drop macro-fusion alignment (PR #97358)
llvmbot wrote:
@llvm/pr-subscribers-bolt
Author: Amir Ayupov (aaupov)
Changes
9d0754ada5dbbc0c009bcc2f7824488419cc5530 dropped MC support required for
macro-fusion alignment in BOLT. Remove the support in BOLT.
Test Plan:
macro-fusion alignment was never upstreamed, so no upstream tests are
affected.
---
Full diff: https://github.com/llvm/llvm-project/pull/97358.diff
11 Files Affected:
- (modified) bolt/include/bolt/Core/BinaryBasicBlock.h (-9)
- (modified) bolt/include/bolt/Core/BinaryContext.h (-4)
- (modified) bolt/include/bolt/Core/BinaryFunction.h (-4)
- (modified) bolt/include/bolt/Core/MCPlusBuilder.h (-7)
- (modified) bolt/lib/Core/BinaryBasicBlock.cpp (-39)
- (modified) bolt/lib/Core/BinaryEmitter.cpp (-37)
- (modified) bolt/lib/Core/BinaryFunction.cpp (-25)
- (modified) bolt/lib/Passes/BinaryPasses.cpp (-20)
- (modified) bolt/lib/Rewrite/RewriteInstance.cpp (-22)
- (modified) bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp (-4)
- (modified) bolt/lib/Target/X86/X86MCPlusBuilder.cpp (-34)
``diff
diff --git a/bolt/include/bolt/Core/BinaryBasicBlock.h
b/bolt/include/bolt/Core/BinaryBasicBlock.h
index a57b70714fe38..9a9d7b8735d71 100644
--- a/bolt/include/bolt/Core/BinaryBasicBlock.h
+++ b/bolt/include/bolt/Core/BinaryBasicBlock.h
@@ -842,15 +842,6 @@ class BinaryBasicBlock {
bool analyzeBranch(const MCSymbol *&TBB, const MCSymbol *&FBB,
MCInst *&CondBranch, MCInst *&UncondBranch);
- /// Return true if iterator \p I is pointing to the first instruction in
- /// a pair that could be macro-fused.
- bool isMacroOpFusionPair(const_iterator I) const;
-
- /// If the basic block has a pair of instructions suitable for macro-fusion,
- /// return iterator to the first instruction of the pair.
- /// Otherwise return end().
- const_iterator getMacroOpFusionPair() const;
-
/// Printer required for printing dominator trees.
void printAsOperand(raw_ostream &OS, bool PrintType = true) {
if (PrintType)
diff --git a/bolt/include/bolt/Core/BinaryContext.h
b/bolt/include/bolt/Core/BinaryContext.h
index 4ec3de3da1bf8..73932c4ca2fb3 100644
--- a/bolt/include/bolt/Core/BinaryContext.h
+++ b/bolt/include/bolt/Core/BinaryContext.h
@@ -698,10 +698,6 @@ class BinaryContext {
/// Binary-wide aggregated stats.
struct BinaryStats {
-/// Stats for macro-fusion.
-uint64_t MissedMacroFusionPairs{0};
-uint64_t MissedMacroFusionExecCount{0};
-
/// Stats for stale profile matching:
/// the total number of basic blocks in the profile
uint32_t NumStaleBlocks{0};
diff --git a/bolt/include/bolt/Core/BinaryFunction.h
b/bolt/include/bolt/Core/BinaryFunction.h
index 3c641581e247a..d318dfbcbabe7 100644
--- a/bolt/include/bolt/Core/BinaryFunction.h
+++ b/bolt/include/bolt/Core/BinaryFunction.h
@@ -835,10 +835,6 @@ class BinaryFunction {
/// them.
void calculateLoopInfo();
- /// Calculate missed macro-fusion opportunities and update BinaryContext
- /// stats.
- void calculateMacroOpFusionStats();
-
/// Returns if BinaryDominatorTree has been constructed for this function.
bool hasDomTree() const { return BDT != nullptr; }
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index a5fb3901428d9..584848a8601fd 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -917,13 +917,6 @@ class MCPlusBuilder {
/// Return true if the instruction is encoded using EVEX (AVX-512).
virtual bool hasEVEXEncoding(const MCInst &Inst) const { return false; }
- /// Return true if a pair of instructions represented by \p Insts
- /// could be fused into a single uop.
- virtual bool isMacroOpFusionPair(ArrayRef Insts) const {
-llvm_unreachable("not implemented");
-return false;
- }
-
struct X86MemOperand {
unsigned BaseRegNum;
int64_t ScaleImm;
diff --git a/bolt/lib/Core/BinaryBasicBlock.cpp
b/bolt/lib/Core/BinaryBasicBlock.cpp
index a4b9a7f558cd8..2a2192b79bb4b 100644
--- a/bolt/lib/Core/BinaryBasicBlock.cpp
+++ b/bolt/lib/Core/BinaryBasicBlock.cpp
@@ -404,45 +404,6 @@ bool BinaryBasicBlock::analyzeBranch(const MCSymbol *&TBB,
const MCSymbol *&FBB,
CondBranch, UncondBranch);
}
-bool BinaryBasicBlock::isMacroOpFusionPair(const_iterator I) const {
- auto &MIB = Function->getBinaryContext().MIB;
- ArrayRef Insts = Instructions;
- return MIB->isMacroOpFusionPair(Insts.slice(I - begin()));
-}
-
-BinaryBasicBlock::const_iterator
-BinaryBasicBlock::getMacroOpFusionPair() const {
- if (!Function->getBinaryContext().isX86())
-return end();
-
- if (getNumNonPseudos() < 2 || succ_size() != 2)
-return end();
-
- auto RI = getLastNonPseudo();
- assert(RI != rend() && "cannot have an empty block with 2 successors");
-
- BinaryContext &BC = Function->getBinaryContext();
-
- // Skip instruction if it's an unconditional branch following
- // a conditional one.
- if (BC.MIB->is
[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)
https://github.com/MaskRay created https://github.com/llvm/llvm-project/pull/97382 The decoder code is similar to that for llvm-readelf -r (#91280). Because the section representation of LLVMObject (`SectionRef`) is 64-bit, insufficient to hold all decoder states, `section_rel_begin` is modified to decode CREL eagerly and hold the decoded relocations inside ELFObjectFile. The test is adapted from llvm/test/tools/llvm-readobj/ELF/crel.test. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)
llvmbot wrote: @llvm/pr-subscribers-llvm-binary-utilities Author: Fangrui Song (MaskRay) Changes The decoder code is similar to that for llvm-readelf -r (#91280). Because the section representation of LLVMObject (`SectionRef`) is 64-bit, insufficient to hold all decoder states, `section_rel_begin` is modified to decode CREL eagerly and hold the decoded relocations inside ELFObjectFile. The test is adapted from llvm/test/tools/llvm-readobj/ELF/crel.test. --- Full diff: https://github.com/llvm/llvm-project/pull/97382.diff 6 Files Affected: - (modified) llvm/include/llvm/Object/ELFObjectFile.h (+87-6) - (modified) llvm/lib/Object/ELFObjectFile.cpp (+11) - (added) llvm/test/tools/llvm-objdump/ELF/crel.test (+213) - (modified) llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test (+4) - (modified) llvm/tools/llvm-objdump/ELFDump.cpp (+5-1) - (modified) llvm/tools/llvm-objdump/llvm-objdump.cpp (+9) ``diff diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h index 8cc09e7fd7d55..665d848d5b607 100644 --- a/llvm/include/llvm/Object/ELFObjectFile.h +++ b/llvm/include/llvm/Object/ELFObjectFile.h @@ -29,6 +29,7 @@ #include "llvm/Support/ELFAttributes.h" #include "llvm/Support/Error.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/LEB128.h" #include "llvm/Support/MemoryBufferRef.h" #include "llvm/Support/ScopedPrinter.h" #include "llvm/TargetParser/SubtargetFeature.h" @@ -122,6 +123,8 @@ class ELFObjectFileBase : public ObjectFile { Expected> readBBAddrMap(std::optional TextSectionIndex = std::nullopt, std::vector *PGOAnalyses = nullptr) const; + + StringRef getCrelError(SectionRef Sec) const; }; class ELFSectionRef : public SectionRef { @@ -292,6 +295,11 @@ template class ELFObjectFile : public ELFObjectFileBase { const Elf_Shdr *DotSymtabSec = nullptr; // Symbol table section. const Elf_Shdr *DotSymtabShndxSec = nullptr; // SHT_SYMTAB_SHNDX section. + // Hold CREL relocations for SectionRef::relocations(). + mutable SmallVector, 0> Crels; + // Hold CREL decoding errors. + mutable SmallVector CrelErrs; + Error initContent() override; void moveSymbolNext(DataRefImpl &Symb) const override; @@ -446,6 +454,7 @@ template class ELFObjectFile : public ELFObjectFileBase { const Elf_Rel *getRel(DataRefImpl Rel) const; const Elf_Rela *getRela(DataRefImpl Rela) const; + Elf_Crel getCrel(DataRefImpl Crel) const; Expected getSymbol(DataRefImpl Sym) const { return EF.template getEntry(Sym.d.a, Sym.d.b); @@ -499,6 +508,8 @@ template class ELFObjectFile : public ELFObjectFileBase { bool isRelocatableObject() const override; void createFakeSections() { EF.createFakeSections(); } + + StringRef getCrelError(DataRefImpl Sec) const; }; using ELF32LEObjectFile = ELFObjectFile; @@ -1022,6 +1033,47 @@ ELFObjectFile::section_rel_begin(DataRefImpl Sec) const { uintptr_t SHT = reinterpret_cast((*SectionsOrErr).begin()); RelData.d.a = (Sec.p - SHT) / EF.getHeader().e_shentsize; RelData.d.b = 0; + if (reinterpret_cast(Sec.p)->sh_type == ELF::SHT_CREL) { +if (RelData.d.a + 1 > Crels.size()) { + Crels.resize(RelData.d.a + 1); + CrelErrs.resize(RelData.d.a + 1); +} +if (Crels[RelData.d.a].empty()) { + // Decode SHT_CREL. See ELFFile::decodeCrel. + ArrayRef Content = cantFail(getSectionContents(Sec)); + DataExtractor Data(Content, ELFT::Endianness == endianness::little, + sizeof(typename ELFT::Addr)); + DataExtractor::Cursor Cur(0); + const uint64_t Hdr = Data.getULEB128(Cur); + const size_t Count = Hdr / 8; + const size_t FlagBits = Hdr & ELF::CREL_HDR_ADDEND ? 3 : 2; + const size_t Shift = Hdr % ELF::CREL_HDR_ADDEND; + uintX_t Offset = 0, Addend = 0; + uint32_t Symidx = 0, Type = 0; + for (size_t i = 0; i != Count; ++i) { +const uint8_t B = Data.getU8(Cur); +Offset += B >> FlagBits; +if (B >= 0x80) + Offset += + (Data.getULEB128(Cur) << (7 - FlagBits)) - (0x80 >> FlagBits); +if (B & 1) + Symidx += Data.getSLEB128(Cur); +if (B & 2) + Type += Data.getSLEB128(Cur); +if (B & 4 && FlagBits == 3) + Addend += Data.getSLEB128(Cur); +if (!Cur) + break; +Crels[RelData.d.a].push_back( +Elf_Crel{Offset << Shift, uint32_t(Symidx), Type, + std::make_signed_t(Addend)}); + } + if (!Cur) { +Crels[RelData.d.a].assign(1, Elf_Crel{0, 0, 0, 0}); +CrelErrs[RelData.d.a] = toString(Cur.takeError()); + } +} + } return relocation_iterator(RelocationRef(RelData, this)); } @@ -1030,9 +1082,13 @@ relocation_iterator ELFObjectFile::section_rel_end(DataRefImpl Sec) const { const Elf_Shdr *S = reinterpret_cast(Sec.p); relocation_iterator Begin = section_rel_begin(Sec); + Da
[llvm-branch-commits] [NFC][RISCV] Simplify the dynamic linker construction logic (PR #97383)
https://github.com/wangpc-pp created
https://github.com/llvm/llvm-project/pull/97383
The format of dynamic linker is `ld-linux-{arch}-{abi}.so.1`, so
we can just get the arch name from arch type.
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][RISCV] Simplify the dynamic linker construction logic (PR #97383)
llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-driver
Author: Pengcheng Wang (wangpc-pp)
Changes
The format of dynamic linker is `ld-linux-{arch}-{abi}.so.1`, so
we can just get the arch name from arch type.
---
Full diff: https://github.com/llvm/llvm-project/pull/97383.diff
1 Files Affected:
- (modified) clang/lib/Driver/ToolChains/Linux.cpp (+3-7)
``diff
diff --git a/clang/lib/Driver/ToolChains/Linux.cpp
b/clang/lib/Driver/ToolChains/Linux.cpp
index 49e029e7c9ab7..98a878e1d764d 100644
--- a/clang/lib/Driver/ToolChains/Linux.cpp
+++ b/clang/lib/Driver/ToolChains/Linux.cpp
@@ -568,16 +568,12 @@ std::string Linux::getDynamicLinker(const ArgList &Args)
const {
Loader =
(tools::ppc::hasPPCAbiArg(Args, "elfv1")) ? "ld64.so.1" : "ld64.so.2";
break;
- case llvm::Triple::riscv32: {
-StringRef ABIName = tools::riscv::getRISCVABI(Args, Triple);
-LibDir = "lib";
-Loader = ("ld-linux-riscv32-" + ABIName + ".so.1").str();
-break;
- }
+ case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
+StringRef ArchName = llvm::Triple::getArchTypeName(Arch);
StringRef ABIName = tools::riscv::getRISCVABI(Args, Triple);
LibDir = "lib";
-Loader = ("ld-linux-riscv64-" + ABIName + ".so.1").str();
+Loader = ("ld-linux-" + ArchName + "-" + ABIName + ".so.1").str();
break;
}
case llvm::Triple::sparc:
``
https://github.com/llvm/llvm-project/pull/97383
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][RISCV] Simplify the dynamic linker construction logic (PR #97383)
https://github.com/MaskRay approved this pull request. https://github.com/llvm/llvm-project/pull/97383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
