[Lldb-commits] [PATCH] D157846: [lldb][AArch64] Add SME's tests for SVE register state to TestArm64DynamicRegsets

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid added a comment.

In D157846#4644241 , @DavidSpickett 
wrote:

>> In this test can we figure out whether SVE was read from Streaming mode or 
>> normal SVE mode?? and if yes may be add a check for that.
>
> Not sure what you mean.
>
> If you mean:
>
> - write non-streaming SVE with one set of values
> - write streaming SVE with another
> - assert that lldb read the correct one
>
> There are a couple of issues there:
>
> - If lldb read the inactive mode, it would fail with unavailable register due 
> to a failure down in lldb-sever. These tests would already catch that.
> - The kernel and the architecture say that the values of the registers for 
> the mode you are coming from are wiped out on mode switch. So we wouldn't be 
> able to truly read those values even if we were able to make the ptrace call 
> and get some data.
>
> So it's covered, but does not/ can not be covered by checking values. It'll 
> be correct values, or a complete failure to read.

Thanks for the detailed clarification.

I was actually curious if LLDB user can distinguish whether we are reading SVE 
registers from streaming mode or normal SVE mode. But yes only config registers 
like vg can tell that registers  are read in non-SVE(FPSIMD), normal SVE, or 
streaming modes.


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[Lldb-commits] [PATCH] D159502: [lldb][AArch64] Add SME's Array Storage (ZA) register

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid added a comment.

This looks good overall thanks for doing the patch split makes the review way 
less overwhelming.




Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp:342
+  // header itself.
+  m_za_ptrace_payload.resize(((m_za_header.vl) * (m_za_header.vl)) +
+ GetZAHeaderSize());

In case of ZA inactive can we avoid having to transfer these zeros over gdb 
protocol and construct this register on the user side without even doing the 
transfer?


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Re: [Lldb-commits] [lldb] [lldb] Format Python files in scripts and utils (PR #66053)

[David Spickett via lldb-commits]

> I would never never write Python code that ugly.

As usual with formatting the conclusions were as long as the same strange
decisions are made consistently, it's worth doing.

Discussion:
https://discourse.llvm.org/t/python-code-style-and-reformatting-status-update/70641/13
Overall project docs:
https://llvm.org/docs/CodingStandards.html#python-version-and-source-code-formatting

Github PRs will also check formatting, but it's not a blocking check.

lldb has the  "the style is llvm but also not" page:
https://lldb.llvm.org/resources/contributing.html. Which hasn't felt the
need to mention clang-format either, so it wouldn't be any worse not
mentioning this.

The llvm page links to black's github which starts with how to install it.
Could do with a one liner to format the changes from the last commit ala
clang-format-diff.

Also we should link to llvm's standards from our page, I'll fix that.

On Tue, 12 Sept 2023 at 17:13, Jim Ingham  wrote:

> Is there any chance we can use something other than black.  I would never
> never write Python code that ugly.
>
> Jim
>
>
> > On Sep 12, 2023, at 8:47 AM, Adrian Prantl via lldb-commits <
> lldb-commits@lists.llvm.org> wrote:
> >
> >
> > adrian-prantl wrote:
> >
> > Have (should we) we documented that we format all python code with black
> somewhere and how to install the tool?
> >
> > https://github.com/llvm/llvm-project/pull/66053
> > ___
> > lldb-commits mailing list
> > lldb-commits@lists.llvm.org
> > https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
>
>
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[Lldb-commits] [PATCH] D157846: [lldb][AArch64] Add SME's tests for SVE register state to TestArm64DynamicRegsets

[David Spickett via Phabricator via lldb-commits]

DavidSpickett added a comment.

> I was actually curious if LLDB user can distinguish whether we are reading 
> SVE registers from streaming mode or normal SVE mode. But yes only config 
> registers like vg can tell that registers are read in non-SVE(FPSIMD), normal 
> SVE, or streaming modes.

Right, good point and yes they can but not until 
https://reviews.llvm.org/D154927. In that I also update the tests to check that 
svcr has the correct value for the expected mode the test is running in.

They'll be able to check SVCR.SM (bit 0) to know if they are in streaming mode 
(which will eventually be nicely printed `M = 1` but that's unrelated to this 
series).

They can also see if SVG and VG match, but vector lengths can overlap so this 
won't always work, so SVCR is the official way to do it.


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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[via lldb-commits]

https://github.com/CarolineConcatto updated 
https://github.com/llvm/llvm-project/pull/65582:

>From ae2f1bee2d912895cecb002c2434ef11da7ba3a7 Mon Sep 17 00:00:00 2001
From: Caroline Concatto 
Date: Wed, 6 Sep 2023 14:16:17 +
Subject: [PATCH] [AArch64][SME]Update intrinsic interface for ld1/st1

The new ACLE PR#225[1] now combines the slice parameters for some builtins.
This patch is the #1 of 3 patches to update the interface.

Slice specifies the ZA slice number directly and needs to be
explicity implemented by the "user" with the base register plus the
immediate offset

[1]https://github.com/ARM-software/acle/pull/225/files
---
 clang/include/clang/Basic/arm_sme.td  |  36 +++
 clang/lib/CodeGen/CGBuiltin.cpp   |  16 +--
 .../aarch64-sme-intrinsics/acle_sme_ld1.c |  58 ++
 .../acle_sme_ld1_vnum.c   |  58 ++
 .../aarch64-sme-intrinsics/acle_sme_st1.c |  58 ++
 .../acle_sme_st1_vnum.c   |  58 ++
 .../aarch64-sme-intrinsics/acle_sme_imm.cpp   | 102 +-
 .../aarch64-sme-intrinsics/acle_sme_target.c  |   8 +-
 8 files changed, 211 insertions(+), 183 deletions(-)

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index f747ccde38a3a15..58471c3dc8dd0d5 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -20,29 +20,29 @@ include "arm_sve_sme_incl.td"
 
 multiclass ZALoad 
ch> {
   let TargetGuard = "sme" in {
-def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimiPQ", t,
+def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimPQ", t,
   [IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
   MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimiPQl", t,
+def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimPQl", t,
[IsLoad, IsOverloadNone, IsStreaming, 
IsSharedZA],
MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimiPQ", t,
+def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimPQ", t,
   [IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
   MemEltTyDefault, i_prefix # "_vert", ch>;
 
-def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimiPQl", t,
+def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimPQl", t,
[IsLoad, IsOverloadNone, IsStreaming, 
IsSharedZA],
MemEltTyDefault, i_prefix # "_vert", ch>;
   }
 }
 
-defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, 
ImmCheck0_0>, ImmCheck<2, ImmCheck0_15>]>;
-defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, 
ImmCheck0_1>, ImmCheck<2, ImmCheck0_7>]>;
-defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, 
ImmCheck0_3>, ImmCheck<2, ImmCheck0_3>]>;
-defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, 
ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>;
-defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, 
ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>;
+defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, 
ImmCheck0_0>]>;
+defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, 
ImmCheck0_1>]>;
+defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, 
ImmCheck0_3>]>;
+defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, 
ImmCheck0_7>]>;
+defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, 
ImmCheck0_15>]>;
 
 def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmiQ", "",
   [IsOverloadNone, IsStreamingCompatible, IsSharedZA],
@@ -54,29 +54,29 @@ def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmiQ", "",
 
 multiclass ZAStore 
ch> {
   let TargetGuard = "sme" in {
-def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimiP%", t,
+def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimP%", t,
   [IsStore, IsOverloadNone, IsStreaming, IsSharedZA, 
IsPreservesZA],
   MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimiP%l", t,
+def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimP%l", t,
[IsStore, IsOverloadNone, IsStreaming, 
IsSharedZA, IsPreservesZA],
MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimiP%", t,
+def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimP%", t,
   [IsStore, IsOverloadNone, IsStreaming, IsSharedZA, 
IsPreservesZA],
   MemEltTyDefault, i_prefix # "_vert", ch>;
 
-def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffix, "

[Lldb-commits] [PATCH] D159502: [lldb][AArch64] Add SME's Array Storage (ZA) register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett added inline comments.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp:342
+  // header itself.
+  m_za_ptrace_payload.resize(((m_za_header.vl) * (m_za_header.vl)) +
+ GetZAHeaderSize());

omjavaid wrote:
> In case of ZA inactive can we avoid having to transfer these zeros over gdb 
> protocol and construct this register on the user side without even doing the 
> transfer?
You could but you'd still need a way to signal to the user side that ZA is in 
fact inactive. Most obvious way is to send a single 0 and know that if you get 
that but the streaming vector length is provided too, we must extend the value.

However, that bumps up against a lot of checks in lldb's client side. I know 
there's at least one that fails if the data received is < the assumed size of 
the register (for more we just truncate it seems). Bypassing these for 1 target 
specific register is effort and more importantly, potentially hiding issues. 
The register size check was actually very useful developing ZA support, so I 
wouldn't like to subvert it.

GDB also doesn't do anything like this, so we would be compatible with a 
gdbserver that sent us all the data but an lldb-server wouldn't be compatible 
with a gdb because it only sends a bit of the data.

You're right that there's scope to compress the data here but it seems better 
done at a protocol level or by adding some kind of new way to describe 
registers overall.


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[Lldb-commits] [lldb] 11de4c7 - [lldb][AArch64] Add tests for SME's SVE register state to TestArm64DynamicRegsets

[David Spickett via lldb-commits]

Author: David Spickett
Date: 2023-09-13T10:07:36+01:00
New Revision: 11de4c724c8e875f75c2d1c733c38051bc818601

URL: 
https://github.com/llvm/llvm-project/commit/11de4c724c8e875f75c2d1c733c38051bc818601
DIFF: 
https://github.com/llvm/llvm-project/commit/11de4c724c8e875f75c2d1c733c38051bc818601.diff

LOG: [lldb][AArch64] Add tests for SME's SVE register state to 
TestArm64DynamicRegsets

SME reuses SVE's register state but adds new modes to it. Therefore
we can't check all those in the same test as the existing SVE
checks.

SME's ZA, SVG and SVCR register checks will be added to this test
in later patches.

Prior to this we didn't have any testing of writing streaming mode
SVE registers from lldb, only writing SVE registers in normal
(non-streaming) SVE mode.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D157846

Added: 


Modified: 

lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c

Removed: 




diff  --git 
a/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
 
b/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
index 1decdd43969ef2a..e91eeba2a601ebc 100644
--- 
a/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
+++ 
b/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
@@ -120,3 +120,37 @@ def test_aarch64_dynamic_regset_config(self):
 )
 self.expect("register read data_mask", substrs=["data_mask = 
0x"])
 self.expect("register read code_mask", substrs=["code_mask = 
0x"])
+
+@no_debug_info_test
+@skipIf(archs=no_match(["aarch64"]))
+@skipIf(oslist=no_match(["linux"]))
+def test_aarch64_dynamic_regset_config_sme(self):
+"""Test AArch64 Dynamic Register sets configuration, but only SME
+   registers."""
+if not self.isAArch64SME():
+self.skipTest("SME must be present.")
+
+self.build()
+self.line = line_number("main.c", "// Set a break point here.")
+
+exe = self.getBuildArtifact("a.out")
+self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(
+self, "main.c", self.line, num_expected_locations=1
+)
+self.runCmd("settings set target.run-args sme")
+self.runCmd("run", RUN_SUCCEEDED)
+
+self.expect(
+"thread backtrace",
+STOPPED_DUE_TO_BREAKPOINT,
+substrs=["stop reason = breakpoint 1."],
+)
+
+register_sets = self.thread().GetSelectedFrame().GetRegisters()
+
+ssve_registers = register_sets.GetFirstValueByName(
+"Scalable Vector Extension Registers")
+self.assertTrue(ssve_registers.IsValid())
+self.sve_regs_read_dynamic(ssve_registers)

diff  --git 
a/lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c 
b/lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
index 6ed25c4eb6a098f..b8db8852b8ed51a 100644
--- a/lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
+++ b/lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
@@ -1,5 +1,9 @@
 #include 
 
+#ifndef HWCAP2_SME
+#define HWCAP2_SME (1 << 23)
+#endif
+
 void set_sve_registers() {
   // AArch64 SVE extension ISA adds a new set of vector and predicate 
registers:
   // 32 Z registers, 16 P registers, and 1 FFR register.
@@ -64,8 +68,14 @@ void set_sve_registers() {
   asm volatile("cpy  z31.b, p15/z, #32\n\t");
 }
 
-int main() {
-  if (getauxval(AT_HWCAP) & HWCAP_SVE) // check if SVE is present
+int main(int argc, char *argv[]) {
+  if (argc > 1) {
+// Enable streaming mode SVE and the ZA array storage.
+asm volatile("msr  s0_3_c4_c7_3, xzr" /*smstart*/);
+  }
+
+  // If we have SVE or SME, set the SVE registers.
+  if ((getauxval(AT_HWCAP) & HWCAP_SVE) || (getauxval(AT_HWCAP2) & HWCAP2_SME))
 set_sve_registers();
 
   return 0; // Set a break point here.



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[Lldb-commits] [PATCH] D157846: [lldb][AArch64] Add tests for SME's SVE register state to TestArm64DynamicRegsets

[David Spickett via Phabricator via lldb-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG11de4c724c8e: [lldb][AArch64] Add tests for SME's SVE 
register state to… (authored by DavidSpickett).

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Files:
  
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
  lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c


Index: lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
===
--- lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
+++ lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
@@ -1,5 +1,9 @@
 #include 
 
+#ifndef HWCAP2_SME
+#define HWCAP2_SME (1 << 23)
+#endif
+
 void set_sve_registers() {
   // AArch64 SVE extension ISA adds a new set of vector and predicate 
registers:
   // 32 Z registers, 16 P registers, and 1 FFR register.
@@ -64,8 +68,14 @@
   asm volatile("cpy  z31.b, p15/z, #32\n\t");
 }
 
-int main() {
-  if (getauxval(AT_HWCAP) & HWCAP_SVE) // check if SVE is present
+int main(int argc, char *argv[]) {
+  if (argc > 1) {
+// Enable streaming mode SVE and the ZA array storage.
+asm volatile("msr  s0_3_c4_c7_3, xzr" /*smstart*/);
+  }
+
+  // If we have SVE or SME, set the SVE registers.
+  if ((getauxval(AT_HWCAP) & HWCAP_SVE) || (getauxval(AT_HWCAP2) & HWCAP2_SME))
 set_sve_registers();
 
   return 0; // Set a break point here.
Index: 
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
===
--- 
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
+++ 
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
@@ -120,3 +120,37 @@
 )
 self.expect("register read data_mask", substrs=["data_mask = 
0x"])
 self.expect("register read code_mask", substrs=["code_mask = 
0x"])
+
+@no_debug_info_test
+@skipIf(archs=no_match(["aarch64"]))
+@skipIf(oslist=no_match(["linux"]))
+def test_aarch64_dynamic_regset_config_sme(self):
+"""Test AArch64 Dynamic Register sets configuration, but only SME
+   registers."""
+if not self.isAArch64SME():
+self.skipTest("SME must be present.")
+
+self.build()
+self.line = line_number("main.c", "// Set a break point here.")
+
+exe = self.getBuildArtifact("a.out")
+self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(
+self, "main.c", self.line, num_expected_locations=1
+)
+self.runCmd("settings set target.run-args sme")
+self.runCmd("run", RUN_SUCCEEDED)
+
+self.expect(
+"thread backtrace",
+STOPPED_DUE_TO_BREAKPOINT,
+substrs=["stop reason = breakpoint 1."],
+)
+
+register_sets = self.thread().GetSelectedFrame().GetRegisters()
+
+ssve_registers = register_sets.GetFirstValueByName(
+"Scalable Vector Extension Registers")
+self.assertTrue(ssve_registers.IsValid())
+self.sve_regs_read_dynamic(ssve_registers)


Index: lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
===
--- lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
+++ lldb/test/API/commands/register/register/aarch64_dynamic_regset/main.c
@@ -1,5 +1,9 @@
 #include 
 
+#ifndef HWCAP2_SME
+#define HWCAP2_SME (1 << 23)
+#endif
+
 void set_sve_registers() {
   // AArch64 SVE extension ISA adds a new set of vector and predicate registers:
   // 32 Z registers, 16 P registers, and 1 FFR register.
@@ -64,8 +68,14 @@
   asm volatile("cpy  z31.b, p15/z, #32\n\t");
 }
 
-int main() {
-  if (getauxval(AT_HWCAP) & HWCAP_SVE) // check if SVE is present
+int main(int argc, char *argv[]) {
+  if (argc > 1) {
+// Enable streaming mode SVE and the ZA array storage.
+asm volatile("msr  s0_3_c4_c7_3, xzr" /*smstart*/);
+  }
+
+  // If we have SVE or SME, set the SVE registers.
+  if ((getauxval(AT_HWCAP) & HWCAP_SVE) || (getauxval(AT_HWCAP2) & HWCAP2_SME))
 set_sve_registers();
 
   return 0; // Set a break point here.
Index: lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
===
--- lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
+++ lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
@@ -120,3 +120,37 @@
 )
 self.expect("register read data_mask", substrs=["data_mask = 0x"])
 self.

[Lldb-commits] [lldb] 461f859 - [lldb] Treat user aliases the same as built-ins when tab completing (#65974)

[via lldb-commits]

Author: David Spickett
Date: 2023-09-13T10:12:12+01:00
New Revision: 461f859a722fb80103d437005bb14deb215f8260

URL: 
https://github.com/llvm/llvm-project/commit/461f859a722fb80103d437005bb14deb215f8260
DIFF: 
https://github.com/llvm/llvm-project/commit/461f859a722fb80103d437005bb14deb215f8260.diff

LOG: [lldb] Treat user aliases the same as built-ins when tab completing 
(#65974)

Previously we would check all built-ins first for suggestions,
then check built-ins and aliases. This meant that if you had
an alias brkpt -> breakpoint, "br" would complete to "breakpoint".

Instead of giving you the choice of "brkpt" or "breakpoint".

Added: 


Modified: 
lldb/source/Interpreter/CommandInterpreter.cpp
lldb/test/API/functionalities/completion/TestCompletion.py

Removed: 




diff  --git a/lldb/source/Interpreter/CommandInterpreter.cpp 
b/lldb/source/Interpreter/CommandInterpreter.cpp
index 6d1ad799f2d10fb..dcff53ff843f328 100644
--- a/lldb/source/Interpreter/CommandInterpreter.cpp
+++ b/lldb/source/Interpreter/CommandInterpreter.cpp
@@ -508,6 +508,11 @@ void CommandInterpreter::Initialize() {
   if (cmd_obj_sp) {
 AddAlias("history", cmd_obj_sp);
   }
+
+  cmd_obj_sp = GetCommandSPExact("help");
+  if (cmd_obj_sp) {
+AddAlias("h", cmd_obj_sp);
+  }
 }
 
 void CommandInterpreter::Clear() {
@@ -1227,36 +1232,11 @@ CommandObject *
 CommandInterpreter::GetCommandObject(llvm::StringRef cmd_str,
  StringList *matches,
  StringList *descriptions) const {
-  CommandObject *command_obj =
-  GetCommandSP(cmd_str, false, true, matches, descriptions).get();
-
-  // If we didn't find an exact match to the command string in the commands,
-  // look in the aliases.
-
-  if (command_obj)
-return command_obj;
-
-  command_obj = GetCommandSP(cmd_str, true, true, matches, descriptions).get();
-
-  if (command_obj)
-return command_obj;
-
-  // If there wasn't an exact match then look for an inexact one in just the
-  // commands
-  command_obj = GetCommandSP(cmd_str, false, false, nullptr).get();
-
-  // Finally, if there wasn't an inexact match among the commands, look for an
-  // inexact match in both the commands and aliases.
-
-  if (command_obj) {
-if (matches)
-  matches->AppendString(command_obj->GetCommandName());
-if (descriptions)
-  descriptions->AppendString(command_obj->GetHelp());
-return command_obj;
-  }
-
-  return GetCommandSP(cmd_str, true, false, matches, descriptions).get();
+  // Try to find a match among commands and aliases. Allowing inexact matches,
+  // but perferring exact matches.
+  return GetCommandSP(cmd_str, /*include_aliases=*/true, /*exact=*/false,
+ matches, descriptions)
+.get();
 }
 
 CommandObject *CommandInterpreter::GetUserCommandObject(

diff  --git a/lldb/test/API/functionalities/completion/TestCompletion.py 
b/lldb/test/API/functionalities/completion/TestCompletion.py
index 302b461b61d0d4d..f71bc73928f0f4e 100644
--- a/lldb/test/API/functionalities/completion/TestCompletion.py
+++ b/lldb/test/API/functionalities/completion/TestCompletion.py
@@ -618,19 +618,15 @@ def test_command_unalias(self):
 
 def test_command_aliases(self):
 self.runCmd("command alias brkpt breakpoint")
-# If there is an unambiguous completion from the built-in commands,
-# we choose that.
-self.complete_from_to("br", "breakpoint")
-# Only if there is not, do we then look for an unambiguous completion
-# from the user defined aliases.
+# Exact matches are chosen if possible, even if there are longer
+# completions we could use.
+self.complete_from_to("b", "b ")
+# Aliases are included in possible completions.
+self.complete_from_to("br", ["breakpoint", "brkpt"])
+# An alias can be the chosen completion.
 self.complete_from_to("brk", "brkpt")
 
-# Aliases are included when there's no exact match.
-self.runCmd("command alias play breakpoint")
-self.complete_from_to("pl", ["plugin", "platform", "play"])
-
-# That list can also contain only aliases if there's no built-ins to
-# match.
+# The list can contain only aliases if there's no built-ins to match.
 self.runCmd("command alias test_1 breakpoint")
 self.runCmd("command alias test_2 breakpoint")
 self.complete_from_to("test_", ["test_1", "test_2"])



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[Lldb-commits] [lldb] [lldb] Treat user aliases the same as built-ins when tab completing (PR #65974)

[David Spickett via lldb-commits]

https://github.com/DavidSpickett closed 
https://github.com/llvm/llvm-project/pull/65974
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[Lldb-commits] [lldb] f8b2544 - [lldb] Link to LLVM code style in LLDB's contributing page

[David Spickett via lldb-commits]

Author: David Spickett
Date: 2023-09-13T10:48:48+01:00
New Revision: f8b2544c422404b0c8d1225d9240301f50de1cdb

URL: 
https://github.com/llvm/llvm-project/commit/f8b2544c422404b0c8d1225d9240301f50de1cdb
DIFF: 
https://github.com/llvm/llvm-project/commit/f8b2544c422404b0c8d1225d9240301f50de1cdb.diff

LOG: [lldb] Link to LLVM code style in LLDB's contributing page

So folks at least know what we are differing from.

Added: 


Modified: 
lldb/docs/resources/contributing.rst

Removed: 




diff  --git a/lldb/docs/resources/contributing.rst 
b/lldb/docs/resources/contributing.rst
index 26320f6353438ef..54917f1ce8175b3 100644
--- a/lldb/docs/resources/contributing.rst
+++ b/lldb/docs/resources/contributing.rst
@@ -23,7 +23,8 @@ Policy in the following respects.
`test documentation `_ for more details and the ``lldb/test``
folder on disk for examples.
 
- - **Coding Style**: LLDB's code style 
diff ers from LLVM's coding style.
+ - **Coding Style**: LLDB's code style 
diff ers from
+   `LLVM's coding style `_.
Unfortunately there is no document describing the 
diff erences. Please be
consistent with the existing code.
 



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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[via lldb-commits]

https://github.com/CarolineConcatto resolved 
https://github.com/llvm/llvm-project/pull/65582
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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[Sander de Smalen via lldb-commits]

@@ -84,8 +76,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t 
slice_base, svbool_t pg, co
 //
 ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, 
const void *ptr) {
   uint32_t slice = slice_base;
-  svld1_hor_za128(0, slice, pg, ptr);
-  svld1_hor_za128(15, slice, pg, ptr);
+  svld1_hor_za128(0, slice_base, pg, ptr);

sdesmalen-arm wrote:

```uint32_t slice = slice_base;```
nit: unused variable

https://github.com/llvm/llvm-project/pull/65582
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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[Sander de Smalen via lldb-commits]

https://github.com/sdesmalen-arm approved this pull request.

LGTM with nit addressed!

https://github.com/llvm/llvm-project/pull/65582
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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[Sander de Smalen via lldb-commits]

https://github.com/sdesmalen-arm edited 
https://github.com/llvm/llvm-project/pull/65582
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[Lldb-commits] [PATCH] D159503: [lldb][AArch64] Add SME streaming vector length pseduo register

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid added a comment.

Why do we have svg and za in different register sets?


Repository:
  rG LLVM Github Monorepo

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[Lldb-commits] [PATCH] D159504: [lldb][AArch64] Implement resizing of SME's ZA register

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid added inline comments.



Comment at: lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h:42
   void UpdateARM64SVERegistersInfos(uint64_t vg);
+  void UpdateARM64SMERegistersInfos(uint64_t vg);
 };

svg


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[Lldb-commits] [PATCH] D159503: [lldb][AArch64] Add SME streaming vector length pseduo register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett added a comment.

Made sense at the time with it being it's own regset in ptrace. Current state 
is:

  Scalable Matrix Array Storage Registers:
  za = {<...>}
  
  Scalable Matrix Extension Registers:
 svg = 0x0004
svcr = 0x0003

But I agree, ZA could go in the latter group as you won't have ZA without SME.

I'll give it a go.


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[Lldb-commits] [lldb] [clang-tidy] Add performance-move-smart-pointer-contents check. (PR #66139)

[via lldb-commits]

martinboehme wrote:

> This check has issue in my opinion, the semantic of `std::move(*p)` is not 
> same as `*std::move(p)`

Agree that the suggested fix may not always be correct.

I would suggest simply not emitting a suggested fix (i.e. only emitting a 
warning).

https://github.com/llvm/llvm-project/pull/66139
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[Lldb-commits] [lldb] [clang-tidy] Add performance-move-smart-pointer-contents check. (PR #66139)

[via lldb-commits]

https://github.com/martinboehme requested changes to this pull request.


https://github.com/llvm/llvm-project/pull/66139
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[Lldb-commits] [lldb] [clang-tidy] Add performance-move-smart-pointer-contents check. (PR #66139)

[via lldb-commits]

@@ -0,0 +1,119 @@
+// RUN: %check_clang_tidy %s performance-move-smart-pointer-contents %t -- \
+// RUN: -config="{CheckOptions: \
+// RUN:   
{performance-move-smart-pointer-contents.UniquePointerClasses: \
+// RUN:  'std::unique_ptr; my::OtherUniquePtr;',\
+// RUN:
performance-move-smart-pointer-contents.SharedPointerClasses: \
+// RUN:  'std::shared_ptr;my::OtherSharedPtr;'}}"
+
+// Some dummy definitions we'll need.
+
+namespace std {
+
+using size_t = int;
+  
+template  struct remove_reference;
+template  struct remove_reference { typedef _Tp type; };
+template  struct remove_reference<_Tp &> { typedef _Tp type; };
+template  struct remove_reference<_Tp &&> { typedef _Tp type; };
+
+template 
+constexpr typename std::remove_reference<_Tp>::type &&move(_Tp &&__t) {
+  return static_cast::type &&>(__t);
+}
+
+template 
+struct unique_ptr {
+  unique_ptr();
+  T *get() const;
+  explicit operator bool() const;
+  void reset(T *ptr);
+  T &operator*() const;
+  T *operator->() const;
+  T& operator[](size_t i) const;
+};
+
+template 
+struct shared_ptr {
+  shared_ptr();
+  T *get() const;
+  explicit operator bool() const;
+  void reset(T *ptr);
+  T &operator*() const;
+  T *operator->() const;
+};
+  
+}  // namespace std
+
+namespace my {
+template 
+using OtherUniquePtr = std::unique_ptr;
+template 
+using OtherSharedPtr = std::shared_ptr;
+}  // namespace my
+
+void correctUnique() {
+  std::unique_ptr p;
+  int x = *std::move(p);
+}
+
+void simpleFindingUnique() {
+  std::unique_ptr p;
+  int x = std::move(*p);
+}
+// CHECK-MESSAGES: :[[@LINE-2]]:11: warning: prefer to move the smart pointer 
rather than its contents [performance-move-smart-pointer-contents]
+// CHECK-FIXES: *std::move(p)

martinboehme wrote:

Prefer to put this directly below the line that triggers the diagnostic

https://github.com/llvm/llvm-project/pull/66139
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[Lldb-commits] [lldb] [clang-tidy] Add performance-move-smart-pointer-contents check. (PR #66139)

[Piotr Zegar via lldb-commits]

PiotrZSL wrote:

Other common example from me:
```
struct SomeHeavyClass {};

std::unique_ptr build();

void sendMsg()
{
auto msgContent = build();
Message msg;
msg.content = std::move(*msgContent);
send(msg);
}
```

And next one:
```
struct Info {
   virtual const std::string& getInfo();
};

struct
```

Simply moving a content of unique ptr is not an issue for me, coping big 
structure is.
User may want to move part of object from unique_ptr

https://github.com/llvm/llvm-project/pull/66139
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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[via lldb-commits]

https://github.com/CarolineConcatto updated 
https://github.com/llvm/llvm-project/pull/65582:

>From ae2f1bee2d912895cecb002c2434ef11da7ba3a7 Mon Sep 17 00:00:00 2001
From: Caroline Concatto 
Date: Wed, 6 Sep 2023 14:16:17 +
Subject: [PATCH 1/3] [AArch64][SME]Update intrinsic interface for ld1/st1

The new ACLE PR#225[1] now combines the slice parameters for some builtins.
This patch is the #1 of 3 patches to update the interface.

Slice specifies the ZA slice number directly and needs to be
explicity implemented by the "user" with the base register plus the
immediate offset

[1]https://github.com/ARM-software/acle/pull/225/files
---
 clang/include/clang/Basic/arm_sme.td  |  36 +++
 clang/lib/CodeGen/CGBuiltin.cpp   |  16 +--
 .../aarch64-sme-intrinsics/acle_sme_ld1.c |  58 ++
 .../acle_sme_ld1_vnum.c   |  58 ++
 .../aarch64-sme-intrinsics/acle_sme_st1.c |  58 ++
 .../acle_sme_st1_vnum.c   |  58 ++
 .../aarch64-sme-intrinsics/acle_sme_imm.cpp   | 102 +-
 .../aarch64-sme-intrinsics/acle_sme_target.c  |   8 +-
 8 files changed, 211 insertions(+), 183 deletions(-)

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index f747ccde38a3a15..58471c3dc8dd0d5 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -20,29 +20,29 @@ include "arm_sve_sme_incl.td"
 
 multiclass ZALoad 
ch> {
   let TargetGuard = "sme" in {
-def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimiPQ", t,
+def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimPQ", t,
   [IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
   MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimiPQl", t,
+def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimPQl", t,
[IsLoad, IsOverloadNone, IsStreaming, 
IsSharedZA],
MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimiPQ", t,
+def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimPQ", t,
   [IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
   MemEltTyDefault, i_prefix # "_vert", ch>;
 
-def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimiPQl", t,
+def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimPQl", t,
[IsLoad, IsOverloadNone, IsStreaming, 
IsSharedZA],
MemEltTyDefault, i_prefix # "_vert", ch>;
   }
 }
 
-defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, 
ImmCheck0_0>, ImmCheck<2, ImmCheck0_15>]>;
-defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, 
ImmCheck0_1>, ImmCheck<2, ImmCheck0_7>]>;
-defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, 
ImmCheck0_3>, ImmCheck<2, ImmCheck0_3>]>;
-defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, 
ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>;
-defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, 
ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>;
+defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, 
ImmCheck0_0>]>;
+defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, 
ImmCheck0_1>]>;
+defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, 
ImmCheck0_3>]>;
+defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, 
ImmCheck0_7>]>;
+defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, 
ImmCheck0_15>]>;
 
 def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmiQ", "",
   [IsOverloadNone, IsStreamingCompatible, IsSharedZA],
@@ -54,29 +54,29 @@ def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmiQ", "",
 
 multiclass ZAStore 
ch> {
   let TargetGuard = "sme" in {
-def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimiP%", t,
+def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimP%", t,
   [IsStore, IsOverloadNone, IsStreaming, IsSharedZA, 
IsPreservesZA],
   MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimiP%l", t,
+def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimP%l", t,
[IsStore, IsOverloadNone, IsStreaming, 
IsSharedZA, IsPreservesZA],
MemEltTyDefault, i_prefix # "_horiz", ch>;
 
-def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimiP%", t,
+def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimP%", t,
   [IsStore, IsOverloadNone, IsStreaming, IsSharedZA, 
IsPreservesZA],
   MemEltTyDefault, i_prefix # "_vert", ch>;
 
-def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffi

[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[via lldb-commits]

@@ -84,8 +76,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t 
slice_base, svbool_t pg, co
 //
 ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, 
const void *ptr) {
   uint32_t slice = slice_base;
-  svld1_hor_za128(0, slice, pg, ptr);
-  svld1_hor_za128(15, slice, pg, ptr);
+  svld1_hor_za128(0, slice_base, pg, ptr);

CarolineConcatto wrote:

Done

https://github.com/llvm/llvm-project/pull/65582
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[Lldb-commits] [lldb] [AArch64][SME]Update intrinsic interface for ld1/st1 (PR #65582)

[via lldb-commits]

https://github.com/CarolineConcatto resolved 
https://github.com/llvm/llvm-project/pull/65582
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[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Jonas Devlieghere via lldb-commits]

https://github.com/JDevlieghere created 
https://github.com/llvm/llvm-project/pull/66218:

Users often want to change the look of their prompt and currently the only way 
to do that is by using ANSI escape codes in the prompt itself. This is not only 
tedious, it also results in extra whitespace because our Editline wrapper, when 
computing the cursor column, doesn't ignore the invisible escape codes.

We already have various *-ansi-{prefix,suffix} settings that allow the users to 
customize the color of auto-suggestions and progress events, using mnemonics 
like ${ansi.fg.yellow}. This patch brings the same mechanism to the prompt.

rdar://115390406

>From 9cfa79ae9440c77415d0586d68e20fa967f7b970 Mon Sep 17 00:00:00 2001
From: Jonas Devlieghere 
Date: Wed, 13 Sep 2023 08:05:10 -0700
Subject: [PATCH] [lldb] Add a setting to customize the prompt color

Users often want to change the look of their prompt and currently the
only way to do that is by using ANSI escape codes in the prompt itself.
This is not only tedious, it also results in extra whitespace because
our Editline wrapper, when computing the cursor column, doesn't ignore
the invisible escape codes.

We already have various *-ansi-{prefix,suffix} settings that allow the
users to customize the color of auto-suggestions and progress events,
using mnemonics like ${ansi.fg.yellow}. This patch brings the same
mechanism to the prompt.

rdar://115390406
---
 lldb/include/lldb/Core/Debugger.h  |  4 
 lldb/include/lldb/Host/Editline.h  | 10 
 lldb/source/Core/CoreProperties.td |  8 +++
 lldb/source/Core/Debugger.cpp  | 19 +++
 lldb/source/Core/IOHandler.cpp |  9 +++-
 lldb/source/Host/common/Editline.cpp   | 32 +++---
 lldb/test/API/terminal/TestEditline.py | 12 ++
 7 files changed, 75 insertions(+), 19 deletions(-)

diff --git a/lldb/include/lldb/Core/Debugger.h 
b/lldb/include/lldb/Core/Debugger.h
index 5532cace606bfed..6096a42cd89e5a7 100644
--- a/lldb/include/lldb/Core/Debugger.h
+++ b/lldb/include/lldb/Core/Debugger.h
@@ -289,6 +289,10 @@ class Debugger : public 
std::enable_shared_from_this,
 
   llvm::StringRef GetPrompt() const;
 
+  llvm::StringRef GetPromptAnsiPrefix() const;
+
+  llvm::StringRef GetPromptAnsiSuffix() const;
+
   void SetPrompt(llvm::StringRef p);
   void SetPrompt(const char *) = delete;
 
diff --git a/lldb/include/lldb/Host/Editline.h 
b/lldb/include/lldb/Host/Editline.h
index 35fd179abb509c3..4a5f2a0d5753a6b 100644
--- a/lldb/include/lldb/Host/Editline.h
+++ b/lldb/include/lldb/Host/Editline.h
@@ -211,6 +211,14 @@ class Editline {
 m_fix_indentation_callback_chars = indent_chars;
   }
 
+  void SetPromptAnsiPrefix(std::string prefix) {
+m_prompt_ansi_prefix = std::move(prefix);
+  }
+
+  void SetPromptAnsiSuffix(std::string suffix) {
+m_prompt_ansi_suffix = std::move(suffix);
+  }
+
   void SetSuggestionAnsiPrefix(std::string prefix) {
 m_suggestion_ansi_prefix = std::move(prefix);
   }
@@ -399,6 +407,8 @@ class Editline {
   CompleteCallbackType m_completion_callback;
   SuggestionCallbackType m_suggestion_callback;
 
+  std::string m_prompt_ansi_prefix;
+  std::string m_prompt_ansi_suffix;
   std::string m_suggestion_ansi_prefix;
   std::string m_suggestion_ansi_suffix;
 
diff --git a/lldb/source/Core/CoreProperties.td 
b/lldb/source/Core/CoreProperties.td
index c7d69676f6e14c0..92884258347e9be 100644
--- a/lldb/source/Core/CoreProperties.td
+++ b/lldb/source/Core/CoreProperties.td
@@ -65,6 +65,14 @@ let Definition = "debugger" in {
 
DefaultEnumValue<"OptionValueString::eOptionEncodeCharacterEscapeSequences">,
 DefaultStringValue<"(lldb) ">,
 Desc<"The debugger command line prompt displayed for the user.">;
+  def PromptAnsiPrefix: Property<"prompt-ansi-prefix", "String">,
+Global,
+DefaultStringValue<"${ansi.faint}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately before the prompt.">;
+  def PromptAnsiSuffix: Property<"prompt-ansi-suffix", "String">,
+Global,
+DefaultStringValue<"${ansi.normal}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately after the prompt.">;
   def ScriptLanguage: Property<"script-lang", "Enum">,
 Global,
 DefaultEnumValue<"eScriptLanguagePython">,
diff --git a/lldb/source/Core/Debugger.cpp b/lldb/source/Core/Debugger.cpp
index 7ec1efc64fe9383..de3e17e834b5975 100644
--- a/lldb/source/Core/Debugger.cpp
+++ b/lldb/source/Core/Debugger.cpp
@@ -235,6 +235,13 @@ Status Debugger::SetPropertyValue(const ExecutionContext 
*exe_ctx,
   // use-color changed. Ping the prompt so it can reset the ansi terminal
   // codes.
   SetPrompt(GetPrompt());
+} else if (property_path ==
+   g_debugger_properties[ePropertyPromptAnsiPrefix].name ||
+   property_path ==
+   g_debugger_properties[ePropert

[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Jonas Devlieghere via lldb-commits]

https://github.com/JDevlieghere review_requested 
https://github.com/llvm/llvm-project/pull/66218
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[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[via lldb-commits]

https://github.com/llvmbot labeled 
https://github.com/llvm/llvm-project/pull/66218
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[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[via lldb-commits]

llvmbot wrote:




@llvm/pr-subscribers-lldb


Changes
Users often want to change the look of their prompt and currently the only way 
to do that is by using ANSI escape codes in the prompt itself. This is not only 
tedious, it also results in extra whitespace because our Editline wrapper, when 
computing the cursor column, doesn't ignore the invisible escape codes.

We already have various *-ansi-{prefix,suffix} settings that allow the users to 
customize the color of auto-suggestions and progress events, using mnemonics 
like ${ansi.fg.yellow}. This patch brings the same mechanism to the prompt.

rdar://115390406
--
Full diff: https://github.com/llvm/llvm-project/pull/66218.diff

7 Files Affected:

- (modified) lldb/include/lldb/Core/Debugger.h (+4) 
- (modified) lldb/include/lldb/Host/Editline.h (+10) 
- (modified) lldb/source/Core/CoreProperties.td (+8) 
- (modified) lldb/source/Core/Debugger.cpp (+19) 
- (modified) lldb/source/Core/IOHandler.cpp (+8-1) 
- (modified) lldb/source/Host/common/Editline.cpp (+14-18) 
- (modified) lldb/test/API/terminal/TestEditline.py (+12) 



diff --git a/lldb/include/lldb/Core/Debugger.h 
b/lldb/include/lldb/Core/Debugger.h
index 5532cace606bfed..6096a42cd89e5a7 100644
--- a/lldb/include/lldb/Core/Debugger.h
+++ b/lldb/include/lldb/Core/Debugger.h
@@ -289,6 +289,10 @@ class Debugger : public 
std::enable_shared_from_this,
 
   llvm::StringRef GetPrompt() const;
 
+  llvm::StringRef GetPromptAnsiPrefix() const;
+
+  llvm::StringRef GetPromptAnsiSuffix() const;
+
   void SetPrompt(llvm::StringRef p);
   void SetPrompt(const char *) = delete;
 
diff --git a/lldb/include/lldb/Host/Editline.h 
b/lldb/include/lldb/Host/Editline.h
index 35fd179abb509c3..4a5f2a0d5753a6b 100644
--- a/lldb/include/lldb/Host/Editline.h
+++ b/lldb/include/lldb/Host/Editline.h
@@ -211,6 +211,14 @@ class Editline {
 m_fix_indentation_callback_chars = indent_chars;
   }
 
+  void SetPromptAnsiPrefix(std::string prefix) {
+m_prompt_ansi_prefix = std::move(prefix);
+  }
+
+  void SetPromptAnsiSuffix(std::string suffix) {
+m_prompt_ansi_suffix = std::move(suffix);
+  }
+
   void SetSuggestionAnsiPrefix(std::string prefix) {
 m_suggestion_ansi_prefix = std::move(prefix);
   }
@@ -399,6 +407,8 @@ class Editline {
   CompleteCallbackType m_completion_callback;
   SuggestionCallbackType m_suggestion_callback;
 
+  std::string m_prompt_ansi_prefix;
+  std::string m_prompt_ansi_suffix;
   std::string m_suggestion_ansi_prefix;
   std::string m_suggestion_ansi_suffix;
 
diff --git a/lldb/source/Core/CoreProperties.td 
b/lldb/source/Core/CoreProperties.td
index c7d69676f6e14c0..92884258347e9be 100644
--- a/lldb/source/Core/CoreProperties.td
+++ b/lldb/source/Core/CoreProperties.td
@@ -65,6 +65,14 @@ let Definition = "debugger" in {
 
DefaultEnumValue<"OptionValueString::eOptionEncodeCharacterEscapeSequences">,
 DefaultStringValue<"(lldb) ">,
 Desc<"The debugger command line prompt displayed for the 
user.">;
+  def PromptAnsiPrefix: Property<"prompt-ansi-prefix", 
"String">,
+Global,
+DefaultStringValue<"${ansi.faint}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately before the prompt.">;
+  def PromptAnsiSuffix: Property<"prompt-ansi-suffix", 
"String">,
+Global,
+DefaultStringValue<"${ansi.normal}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately after the prompt.">;
   def ScriptLanguage: Property<"script-lang", 
"Enum">,
 Global,
 DefaultEnumValue<"eScriptLanguagePython">,
diff --git a/lldb/source/Core/Debugger.cpp b/lldb/source/Core/Debugger.cpp
index 7ec1efc64fe9383..de3e17e834b5975 100644
--- a/lldb/source/Core/Debugger.cpp
+++ b/lldb/source/Core/Debugger.cpp
@@ -235,6 +235,13 @@ Status Debugger::SetPropertyValue(const ExecutionContext 
*exe_ctx,
   // use-color changed. Ping the prompt so it can reset the ansi terminal
   // codes.
   SetPrompt(GetPrompt());
+} else if (property_path ==
+   g_debugger_properties[ePropertyPromptAnsiPrefix].name ||
+   property_path ==
+   g_debugger_properties[ePropertyPromptAnsiSuffix].name) {
+  // Prompt colors changed. Ping the prompt so it can reset the ansi
+  // terminal codes.
+  SetPrompt(GetPrompt());
 } else if (property_path ==
g_debugger_properties[ePropertyUseSourceCache].name) {
   // use-source-cache changed. Wipe out the cache contents if it was
@@ -301,6 +308,18 @@ llvm::StringRef Debugger::GetPrompt() const {
   idx, g_debugger_properties[idx].default_cstr_value);
 }
 
+llvm::StringRef Debugger::GetPromptAnsiPrefix() const {
+  const uint32_t idx = ePropertyPromptAnsiPrefix;
+  return GetPropertyAtIndexAs(
+  idx, g_debugger_properties[idx].default_cstr_value);
+}
+
+llvm::StringRef Debugger::GetPromptAnsiSuffix() const {
+  const uint32_

[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Jonas Devlieghere via lldb-commits]

JDevlieghere wrote:

Regarding the column width bug: it's something we'd want to fix anyway. I have 
a naive implementation 
[here](https://github.com/JDevlieghere/llvm-project/commit/17e7844547e8b8509014bc953545c76f3fd6eb25).
 Probably more important than the ANSI escape characters is UTF-8 which poses a 
similar issue. 

https://github.com/llvm/llvm-project/pull/66218
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[Lldb-commits] [PATCH] D159502: [lldb][AArch64] Add SME's Array Storage (ZA) register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556670.
DavidSpickett added a comment.

Put ZA in the SME register set instead.

Once other patches are applied you end up with:

  Scalable Matrix Extension Registers:
svcr = 0x
 svg = 0x0004
  za = {0x00 <...>}


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159502/new/

https://reviews.llvm.org/D159502

Files:
  lldb/include/lldb/Utility/RegisterValue.h
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
  lldb/source/Plugins/Process/Utility/LinuxPTraceDefines_arm64sve.h
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
  lldb/source/Plugins/Process/elf-core/RegisterUtilities.h

Index: lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
===
--- lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
+++ lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
@@ -119,6 +119,10 @@
 {llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_SVE},
 };
 
+constexpr RegsetDesc AARCH64_ZA_Desc[] = {
+{llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_ZA},
+};
+
 constexpr RegsetDesc AARCH64_PAC_Desc[] = {
 {llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_PAC_MASK},
 };
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
===
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
@@ -30,6 +30,7 @@
 eRegsetMaskPAuth = 4,
 eRegsetMaskMTE = 8,
 eRegsetMaskTLS = 16,
+eRegsetMaskZA = 32,
 eRegsetMaskDynamic = ~1,
   };
 
@@ -106,8 +107,12 @@
 
   void AddRegSetTLS(bool has_tpidr2);
 
+  void AddRegSetSME();
+
   uint32_t ConfigureVectorLength(uint32_t sve_vq);
 
+  void ConfigureVectorLengthZA(uint32_t za_vq);
+
   bool VectorSizeIsValid(uint32_t vq) {
 // coverity[unsigned_compare]
 if (vq >= eVectorQuadwordAArch64 && vq <= eVectorQuadwordAArch64SVEMax)
@@ -117,6 +122,7 @@
 
   bool IsSVEEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskSVE); }
   bool IsSSVEEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskSSVE); }
+  bool IsZAEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskZA); }
   bool IsPAuthEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskPAuth); }
   bool IsMTEEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskMTE); }
   bool IsTLSEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskTLS); }
@@ -128,6 +134,7 @@
   bool IsPAuthReg(unsigned reg) const;
   bool IsMTEReg(unsigned reg) const;
   bool IsTLSReg(unsigned reg) const;
+  bool IsSMEReg(unsigned reg) const;
 
   uint32_t GetRegNumSVEZ0() const;
   uint32_t GetRegNumSVEFFR() const;
@@ -137,6 +144,7 @@
   uint32_t GetPAuthOffset() const;
   uint32_t GetMTEOffset() const;
   uint32_t GetTLSOffset() const;
+  uint32_t GetSMEOffset() const;
 
 private:
   typedef std::map>
@@ -145,7 +153,10 @@
   per_vq_register_infos m_per_vq_reg_infos;
 
   uint32_t m_vector_reg_vq = eVectorQuadwordAArch64;
+  uint32_t m_za_reg_vq = eVectorQuadwordAArch64;
 
+  // In normal operation this is const. Only when SVE or SME registers change
+  // size is it either replaced or the content modified.
   const lldb_private::RegisterInfo *m_register_info_p;
   uint32_t m_register_info_count;
 
@@ -164,6 +175,7 @@
   std::vector pauth_regnum_collection;
   std::vector m_mte_regnum_collection;
   std::vector m_tls_regnum_collection;
+  std::vector m_sme_regnum_collection;
 };
 
 #endif
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
===
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -83,6 +83,11 @@
 // Only present when SME is present
 DEFINE_EXTENSION_REG(tpidr2)};
 
+static lldb_private::RegisterInfo g_register_infos_sme[] =
+// 16 is a default size we will change later.
+{{"za", nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,
+  KIND_ALL_INVALID, nullptr, nullptr, nullptr}};
+
 // Number of register sets provided by this context.
 enum {
   k_num_gpr_registers = gpr_w28 - gpr_x0 + 1,
@@ -91,6 +96,7 @@
   k_num_mte_register = 1,
   // Number of TLS registers is dynamic so it is not listed here.
   k_num_pauth_register = 2,
+  k_num_sme_register = 1,
   k_num_register_sets_default = 2,
   k_num_register_sets = 3
 };
@@ -197,6 +203,9 @@
 
 // The size of the TLS set is dynamic, so not listed here.

[Lldb-commits] [PATCH] D159503: [lldb][AArch64] Add SME streaming vector length pseduo register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556671.
DavidSpickett added a comment.

Adjust now that ZA is in the SME set. Putting SVG first for readability and
ease of resizing ZA later.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159503/new/

https://reviews.llvm.org/D159503

Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h

Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
===
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
@@ -135,12 +135,14 @@
   bool IsMTEReg(unsigned reg) const;
   bool IsTLSReg(unsigned reg) const;
   bool IsSMEReg(unsigned reg) const;
+  bool IsSMERegZA(unsigned reg) const;
 
   uint32_t GetRegNumSVEZ0() const;
   uint32_t GetRegNumSVEFFR() const;
   uint32_t GetRegNumFPCR() const;
   uint32_t GetRegNumFPSR() const;
   uint32_t GetRegNumSVEVG() const;
+  uint32_t GetRegNumSMESVG() const;
   uint32_t GetPAuthOffset() const;
   uint32_t GetMTEOffset() const;
   uint32_t GetTLSOffset() const;
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
===
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -83,10 +83,11 @@
 // Only present when SME is present
 DEFINE_EXTENSION_REG(tpidr2)};
 
-static lldb_private::RegisterInfo g_register_infos_sme[] =
+static lldb_private::RegisterInfo g_register_infos_sme[] = {
+DEFINE_EXTENSION_REG(svg),
 // 16 is a default size we will change later.
-{{"za", nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,
-  KIND_ALL_INVALID, nullptr, nullptr, nullptr}};
+{"za", nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,
+ KIND_ALL_INVALID, nullptr, nullptr, nullptr}};
 
 // Number of register sets provided by this context.
 enum {
@@ -96,7 +97,7 @@
   k_num_mte_register = 1,
   // Number of TLS registers is dynamic so it is not listed here.
   k_num_pauth_register = 2,
-  k_num_sme_register = 1,
+  k_num_sme_register = 2,
   k_num_register_sets_default = 2,
   k_num_register_sets = 3
 };
@@ -448,7 +449,7 @@
   // dynamic set and is just 1 register so we make an exception to const here.
   lldb_private::RegisterInfo *non_const_reginfo =
   const_cast(m_register_info_p);
-  non_const_reginfo[m_sme_regnum_collection[0]].byte_size =
+  non_const_reginfo[m_sme_regnum_collection[1]].byte_size =
   (za_vq * 16) * (za_vq * 16);
 }
 
@@ -471,6 +472,10 @@
   return sve_vg == reg;
 }
 
+bool RegisterInfoPOSIX_arm64::IsSMERegZA(unsigned reg) const {
+  return reg == m_sme_regnum_collection[1];
+}
+
 bool RegisterInfoPOSIX_arm64::IsPAuthReg(unsigned reg) const {
   return llvm::is_contained(pauth_regnum_collection, reg);
 }
@@ -497,6 +502,10 @@
 
 uint32_t RegisterInfoPOSIX_arm64::GetRegNumSVEVG() const { return sve_vg; }
 
+uint32_t RegisterInfoPOSIX_arm64::GetRegNumSMESVG() const {
+  return m_sme_regnum_collection[0];
+}
+
 uint32_t RegisterInfoPOSIX_arm64::GetPAuthOffset() const {
   return m_register_info_p[pauth_regnum_collection[0]].byte_offset;
 }
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
===
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
@@ -114,6 +114,12 @@
 
   uint64_t m_mte_ctrl_reg;
 
+  struct sme_regs {
+uint64_t svg_reg;
+  };
+
+  struct sme_regs m_sme_regs;
+
   struct tls_regs {
 uint64_t tpidr_reg;
 // Only valid when SME is present.
@@ -144,6 +150,8 @@
 
   Status WriteTLS();
 
+  Status ReadSMESVG();
+
   Status ReadZAHeader();
 
   Status ReadZA();
@@ -176,6 +184,8 @@
 
   void *GetTLSBuffer() { return &m_tls_regs; }
 
+  void *GetSMEBuffer() { return &m_sme_regs; }
+
   void *GetSVEBuffer() { return m_sve_ptrace_payload.data(); }
 
   size_t GetSVEHeaderSize() { return sizeof(m_sve_header); }
@@ -194,6 +204,8 @@
 
   size_t GetTLSBufferSize() { return m_tls_size; }
 
+  size_t GetSMEBufferSize() { return sizeof(m_sme_regs); }
+
   llvm::Error ReadHardwareDebugInfo() override;
 
   llvm::Error WriteHardwareDebugRegs(DREGType hwbType) override;
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -147,6 +147,7 @@
   ::memset(&

[Lldb-commits] [PATCH] D159504: [lldb][AArch64] Implement resizing of SME's ZA register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556672.
DavidSpickett added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159504/new/

https://reviews.llvm.org/D159504

Files:
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
  lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
  lldb/source/Target/DynamicRegisterInfo.cpp

Index: lldb/source/Target/DynamicRegisterInfo.cpp
===
--- lldb/source/Target/DynamicRegisterInfo.cpp
+++ lldb/source/Target/DynamicRegisterInfo.cpp
@@ -614,10 +614,11 @@
   ConfigureOffsets();
 
   // Check if register info is reconfigurable
-  // AArch64 SVE register set has configurable register sizes
+  // AArch64 SVE register set has configurable register sizes, as does the ZA
+  // register that SME added (the streaming state of SME reuses the SVE state).
   if (arch.GetTriple().isAArch64()) {
 for (const auto ® : m_regs) {
-  if (strcmp(reg.name, "vg") == 0) {
+  if ((strcmp(reg.name, "vg") == 0) || (strcmp(reg.name, "svg") == 0)) {
 m_is_reconfigurable = true;
 break;
   }
Index: lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
===
--- lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+++ lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
@@ -1660,17 +1660,19 @@
 gdb_thread->PrivateSetRegisterValue(lldb_regnum, buffer_sp->GetData());
   }
 
-  // AArch64 SVE specific code below calls AArch64SVEReconfigure to update
-  // SVE register sizes and offsets if value of VG register has changed
-  // since last stop.
+  // AArch64 SVE/SME specific code below updates SVE and ZA register sizes and
+  // offsets if value of VG or SVG registers has changed since last stop.
   const ArchSpec &arch = GetTarget().GetArchitecture();
   if (arch.IsValid() && arch.GetTriple().isAArch64()) {
 GDBRemoteRegisterContext *reg_ctx_sp =
 static_cast(
 gdb_thread->GetRegisterContext().get());
 
-if (reg_ctx_sp)
+if (reg_ctx_sp) {
   reg_ctx_sp->AArch64SVEReconfigure();
+  reg_ctx_sp->AArch64SMEReconfigure();
+  reg_ctx_sp->InvalidateAllRegisters();
+}
   }
 
   thread_sp->SetName(thread_name.empty() ? nullptr : thread_name.c_str());
Index: lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
===
--- lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
+++ lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
@@ -39,6 +39,7 @@
   ~GDBRemoteDynamicRegisterInfo() override = default;
 
   void UpdateARM64SVERegistersInfos(uint64_t vg);
+  void UpdateARM64SMERegistersInfos(uint64_t svg);
 };
 
 class GDBRemoteRegisterContext : public RegisterContext {
@@ -77,7 +78,9 @@
   uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
uint32_t num) override;
 
-  bool AArch64SVEReconfigure();
+  void AArch64SVEReconfigure();
+
+  void AArch64SMEReconfigure();
 
 protected:
   friend class ThreadGDBRemote;
Index: lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
===
--- lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
+++ lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
@@ -373,14 +373,14 @@
   if (dst == nullptr)
 return false;
 
-  // Code below is specific to AArch64 target in SVE state
+  // Code below is specific to AArch64 target in SVE or SME state
   // If vector granule (vg) register is being written then thread's
   // register context reconfiguration is triggered on success.
-  bool do_reconfigure_arm64_sve = false;
+  // We do not allow writes to SVG so it is not mentioned here.
   const ArchSpec &arch = process->GetTarget().GetArchitecture();
-  if (arch.IsValid() && arch.GetTriple().isAArch64())
-if (strcmp(reg_info->name, "vg") == 0)
-  do_reconfigure_arm64_sve = true;
+  bool do_reconfigure_arm64_sve = arch.IsValid() &&
+  arch.GetTriple().isAArch64() &&
+  (strcmp(reg_info->name, "vg") == 0);
 
   if (data.CopyByteOrderedData(data_offset,// src offset
reg_info->byte_size,// src length
@@ -400,10 +400,12 @@
 {m_reg_data.GetDataStart(), size_t(m_reg_data.GetByteSize())}))
 
 {
-  SetAllRegisterValid(false);
-
-  if (do_reconfigure_arm64_sve)
+  if (do_reconfigure_arm64_sve) {
 AArch64SVEReconfigure();
+AArch64SMEReconfigure();
+  }
+
+  InvalidateAllRegisters();
 
   return true;
 }
@@ -435,8 +437,1

[Lldb-commits] [PATCH] D159505: [lldb][AArch64] Add testing for SME's ZA and SVG registers

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556673.
DavidSpickett added a comment.

Update tests now that ZA is part of SME register set.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159505/new/

https://reviews.llvm.org/D159505

Files:
  
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
  
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/Makefile
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/main.c
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/Makefile
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/main.c

Index: lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/main.c
===
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/main.c
@@ -0,0 +1,226 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+
+// Important details for this program:
+// * Making a syscall will disable streaming mode if it is active.
+// * Changing the vector length will make streaming mode and ZA inactive.
+// * ZA can be active independent of streaming mode.
+// * ZA's size is the streaming vector length squared.
+
+#ifndef PR_SME_SET_VL
+#define PR_SME_SET_VL 63
+#endif
+
+#ifndef PR_SME_GET_VL
+#define PR_SME_GET_VL 64
+#endif
+
+#ifndef PR_SME_VL_LEN_MASK
+#define PR_SME_VL_LEN_MASK 0x
+#endif
+
+#define SM_INST(c) asm volatile("msr s0_3_c4_c" #c "_3, xzr")
+#define SMSTART SM_INST(7)
+#define SMSTART_SM SM_INST(3)
+#define SMSTART_ZA SM_INST(5)
+#define SMSTOP SM_INST(6)
+#define SMSTOP_SM SM_INST(2)
+#define SMSTOP_ZA SM_INST(4)
+
+int start_vl = 0;
+int other_vl = 0;
+
+void write_sve_regs() {
+  // We assume the smefa64 feature is present, which allows ffr access
+  // in streaming mode.
+  asm volatile("setffr\n\t");
+  asm volatile("ptrue p0.b\n\t");
+  asm volatile("ptrue p1.h\n\t");
+  asm volatile("ptrue p2.s\n\t");
+  asm volatile("ptrue p3.d\n\t");
+  asm volatile("pfalse p4.b\n\t");
+  asm volatile("ptrue p5.b\n\t");
+  asm volatile("ptrue p6.h\n\t");
+  asm volatile("ptrue p7.s\n\t");
+  asm volatile("ptrue p8.d\n\t");
+  asm volatile("pfalse p9.b\n\t");
+  asm volatile("ptrue p10.b\n\t");
+  asm volatile("ptrue p11.h\n\t");
+  asm volatile("ptrue p12.s\n\t");
+  asm volatile("ptrue p13.d\n\t");
+  asm volatile("pfalse p14.b\n\t");
+  asm volatile("ptrue p15.b\n\t");
+
+  asm volatile("cpy  z0.b, p0/z, #1\n\t");
+  asm volatile("cpy  z1.b, p5/z, #2\n\t");
+  asm volatile("cpy  z2.b, p10/z, #3\n\t");
+  asm volatile("cpy  z3.b, p15/z, #4\n\t");
+  asm volatile("cpy  z4.b, p0/z, #5\n\t");
+  asm volatile("cpy  z5.b, p5/z, #6\n\t");
+  asm volatile("cpy  z6.b, p10/z, #7\n\t");
+  asm volatile("cpy  z7.b, p15/z, #8\n\t");
+  asm volatile("cpy  z8.b, p0/z, #9\n\t");
+  asm volatile("cpy  z9.b, p5/z, #10\n\t");
+  asm volatile("cpy  z10.b, p10/z, #11\n\t");
+  asm volatile("cpy  z11.b, p15/z, #12\n\t");
+  asm volatile("cpy  z12.b, p0/z, #13\n\t");
+  asm volatile("cpy  z13.b, p5/z, #14\n\t");
+  asm volatile("cpy  z14.b, p10/z, #15\n\t");
+  asm volatile("cpy  z15.b, p15/z, #16\n\t");
+  asm volatile("cpy  z16.b, p0/z, #17\n\t");
+  asm volatile("cpy  z17.b, p5/z, #18\n\t");
+  asm volatile("cpy  z18.b, p10/z, #19\n\t");
+  asm volatile("cpy  z19.b, p15/z, #20\n\t");
+  asm volatile("cpy  z20.b, p0/z, #21\n\t");
+  asm volatile("cpy  z21.b, p5/z, #22\n\t");
+  asm volatile("cpy  z22.b, p10/z, #23\n\t");
+  asm volatile("cpy  z23.b, p15/z, #24\n\t");
+  asm volatile("cpy  z24.b, p0/z, #25\n\t");
+  asm volatile("cpy  z25.b, p5/z, #26\n\t");
+  asm volatile("cpy  z26.b, p10/z, #27\n\t");
+  asm volatile("cpy  z27.b, p15/z, #28\n\t");
+  asm volatile("cpy  z28.b, p0/z, #29\n\t");
+  asm volatile("cpy  z29.b, p5/z, #30\n\t");
+  asm volatile("cpy  z30.b, p10/z, #31\n\t");
+  asm volatile("cpy  z31.b, p15/z, #32\n\t");
+}
+
+// Write something different so we will know if we didn't restore them
+// correctly.
+void write_sve_regs_expr() {
+  asm volatile("pfalse p0.b\n\t");
+  asm volatile("wrffr p0.b\n\t");
+  asm volatile("pfalse p1.b\n\t");
+  asm volatile("pfalse p2.b\n\t");
+  asm volatile("pfalse p3.b\n\t");
+  asm volatile("ptrue p4.b\n\t");
+  asm volatile("pfalse p5.b\n\t");
+  asm volatile("pfalse p6.b\n\t");
+  asm volatile("pfalse p7.b\n\t");
+  asm volatile("pfalse p8.b\n\t");
+  asm volatile("ptrue p9.b\n\t");
+  asm volatile("pfalse p10.b\n\t");
+  asm volatile("pfalse p11.b\n\t");
+  asm volatile("pfalse p12.b\n\t");
+  as

[Lldb-commits] [PATCH] D154927: [lldb][AArch64] Add SME's streaming vector control register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556674.
DavidSpickett added a comment.

ZA is now part of the SME set so SVCR is stuck in before SVG.

SVCR
SVG
ZA

Updated the various indexes to reflect that.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154927/new/

https://reviews.llvm.org/D154927

Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
  
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
  
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
  
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py

Index: lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
===
--- lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
+++ lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
@@ -149,6 +149,10 @@
 self.runCmd("register read " + sve_reg_names)
 sve_values = self.res.GetOutput()
 
+svcr_value = 1 if sve_mode == Mode.SSVE else 0
+if za_state == ZA.Enabled:
+svcr_value += 2
+
 def check_regs():
 if za_state == ZA.Enabled:
 self.check_za(start_vl)
@@ -160,6 +164,7 @@
 self.assertEqual(start_vg, self.read_vg())
 
 self.expect("register read " + sve_reg_names, substrs=[sve_values])
+self.expect("register read svcr", substrs=["0x{:016x}".format(svcr_value)])
 
 for expr in exprs:
 expr_cmd = "expression {}()".format(expr)
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
===
--- lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
@@ -5,7 +5,7 @@
 #define PR_SME_SET_VL 63
 #endif
 
-#define SMSTART() asm volatile("msr  s0_3_c4_c7_3, xzr" /*smstart*/)
+#define SMSTART_SM() asm volatile("msr  s0_3_c4_c3_3, xzr" /*smstart sm*/)
 
 void write_sve_regs() {
   // We assume the smefa64 feature is present, which allows ffr access
@@ -126,18 +126,18 @@
   // Note that doing a syscall brings you back to non-streaming mode, so we
   // don't need to SMSTOP here.
   if (streaming)
-SMSTART();
+SMSTART_SM();
   write_sve_regs_expr();
   prctl(SET_VL_OPT, 8 * 4);
   if (streaming)
-SMSTART();
+SMSTART_SM();
   write_sve_regs_expr();
   return 1;
 }
 
 int main() {
 #ifdef START_SSVE
-  SMSTART();
+  SMSTART_SM();
 #endif
   write_sve_regs();
 
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
===
--- lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
@@ -24,7 +24,14 @@
 reg_value.GetByteSize(), expected, 'Verify "%s" == %i' % (name, expected)
 )
 
-def check_sve_regs_read(self, z_reg_size):
+def check_sve_regs_read(self, z_reg_size, expected_mode):
+if self.isAArch64SME():
+# This test uses SMSTART SM, which only enables streaming mode,
+# leaving ZA disabled.
+expected_value = "1" if expected_mode == Mode.SSVE else "0"
+self.expect("register read svcr", substrs=[
+"0x000" + expected_value])
+
 p_reg_size = int(z_reg_size / 8)
 
 for i in range(32):
@@ -168,7 +175,7 @@
 
 vg_reg_value = sve_registers.GetChildMemberWithName("vg").GetValueAsUnsigned()
 z_reg_size = vg_reg_value * 8
-self.check_sve_regs_read(z_reg_size)
+self.check_sve_regs_read(z_reg_size, start_mode)
 
 # Evaluate simple expression and print function expr_eval_func address.
 self.expect("expression expr_eval_func", substrs=["= 0x"])
@@ -184,7 +191,7 @@
 
 # We called a jitted function above which must not have changed SVE
 # vector length or register values.
-self.check_sve_regs_read(z_reg_size)
+self.check_sve_regs_read(z_reg_size, start_mode)
 
 self.check_sve_regs_read_after_write(z_reg_size)
 
Index: lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRe

[Lldb-commits] [PATCH] D158500: [lldb][AArch64] Linux corefile support for SME

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556675.
DavidSpickett added a comment.

Rebase, adjust to handling ZA as part of the SME register set.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158500/new/

https://reviews.llvm.org/D158500

Files:
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
  lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
  lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h
  lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
  lldb/test/API/linux/aarch64/sme_core_file/TestAArch64LinuxSMECoreFile.py
  lldb/test/API/linux/aarch64/sme_core_file/core_0_16_32_1
  lldb/test/API/linux/aarch64/sme_core_file/core_0_32_16_0
  lldb/test/API/linux/aarch64/sme_core_file/core_1_16_32_0
  lldb/test/API/linux/aarch64/sme_core_file/core_1_32_16_1
  lldb/test/API/linux/aarch64/sme_core_file/main.c

Index: lldb/test/API/linux/aarch64/sme_core_file/main.c
===
--- /dev/null
+++ lldb/test/API/linux/aarch64/sme_core_file/main.c
@@ -0,0 +1,140 @@
+// clang-format off
+// Compile with:
+// clang -target aarch64-unknown-linux-gnu main.c -o a.out -g -march=armv8.6-a+sve+sme
+//
+// For minimal corefile size, do this before running the program:
+// echo 0x20 > /proc/self/coredeump_filter
+//
+// Must be run on a system that has SVE and SME, including the smefa64
+// extension. Example command:
+// main 0 32 64 1
+//
+// This would not enter streaming mode, set non-streaming VL to 32
+// bytes, streaming VL to 64 bytes and enable ZA.
+// clang-format on
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifndef PR_SME_SET_VL
+#define PR_SME_SET_VL 63
+#endif
+
+#define SM_INST(c) asm volatile("msr s0_3_c4_c" #c "_3, xzr")
+#define SMSTART_SM SM_INST(3)
+#define SMSTART_ZA SM_INST(5)
+
+void set_sve_registers() {
+  // We assume the smefa64 feature is present, which allows ffr access
+  // in streaming mode.
+  asm volatile("setffr\n\t");
+  asm volatile("ptrue p0.b\n\t");
+  asm volatile("ptrue p1.h\n\t");
+  asm volatile("ptrue p2.s\n\t");
+  asm volatile("ptrue p3.d\n\t");
+  asm volatile("pfalse p4.b\n\t");
+  asm volatile("ptrue p5.b\n\t");
+  asm volatile("ptrue p6.h\n\t");
+  asm volatile("ptrue p7.s\n\t");
+  asm volatile("ptrue p8.d\n\t");
+  asm volatile("pfalse p9.b\n\t");
+  asm volatile("ptrue p10.b\n\t");
+  asm volatile("ptrue p11.h\n\t");
+  asm volatile("ptrue p12.s\n\t");
+  asm volatile("ptrue p13.d\n\t");
+  asm volatile("pfalse p14.b\n\t");
+  asm volatile("ptrue p15.b\n\t");
+
+  asm volatile("cpy  z0.b, p0/z, #1\n\t");
+  asm volatile("cpy  z1.b, p5/z, #2\n\t");
+  asm volatile("cpy  z2.b, p10/z, #3\n\t");
+  asm volatile("cpy  z3.b, p15/z, #4\n\t");
+  asm volatile("cpy  z4.b, p0/z, #5\n\t");
+  asm volatile("cpy  z5.b, p5/z, #6\n\t");
+  asm volatile("cpy  z6.b, p10/z, #7\n\t");
+  asm volatile("cpy  z7.b, p15/z, #8\n\t");
+  asm volatile("cpy  z8.b, p0/z, #9\n\t");
+  asm volatile("cpy  z9.b, p5/z, #10\n\t");
+  asm volatile("cpy  z10.b, p10/z, #11\n\t");
+  asm volatile("cpy  z11.b, p15/z, #12\n\t");
+  asm volatile("cpy  z12.b, p0/z, #13\n\t");
+  asm volatile("cpy  z13.b, p5/z, #14\n\t");
+  asm volatile("cpy  z14.b, p10/z, #15\n\t");
+  asm volatile("cpy  z15.b, p15/z, #16\n\t");
+  asm volatile("cpy  z16.b, p0/z, #17\n\t");
+  asm volatile("cpy  z17.b, p5/z, #18\n\t");
+  asm volatile("cpy  z18.b, p10/z, #19\n\t");
+  asm volatile("cpy  z19.b, p15/z, #20\n\t");
+  asm volatile("cpy  z20.b, p0/z, #21\n\t");
+  asm volatile("cpy  z21.b, p5/z, #22\n\t");
+  asm volatile("cpy  z22.b, p10/z, #23\n\t");
+  asm volatile("cpy  z23.b, p15/z, #24\n\t");
+  asm volatile("cpy  z24.b, p0/z, #25\n\t");
+  asm volatile("cpy  z25.b, p5/z, #26\n\t");
+  asm volatile("cpy  z26.b, p10/z, #27\n\t");
+  asm volatile("cpy  z27.b, p15/z, #28\n\t");
+  asm volatile("cpy  z28.b, p0/z, #29\n\t");
+  asm volatile("cpy  z29.b, p5/z, #30\n\t");
+  asm volatile("cpy  z30.b, p10/z, #31\n\t");
+  asm volatile("cpy  z31.b, p15/z, #32\n\t");
+}
+
+void set_za_register(int streaming_vl) {
+#define MAX_VL_BYTES 256
+  uint8_t data[MAX_VL_BYTES];
+
+  for (unsigned i = 0; i < streaming_vl; ++i) {
+for (unsigned j = 0; j < MAX_VL_BYTES; ++j)
+  data[j] = i + 1;
+asm volatile("mov w12, %w0\n\t"
+ "ldr za[w12, 0], [%1]\n\t" ::"r"(i),
+ "r"(&data)
+ : "w12");
+  }
+}
+
+void set_tpidr2(uint64_t value) {
+  __asm__ volatile("msr S3_3_C13_C0_5, %0" ::"r"(value));
+}
+
+int main(int argc, char **argv) {
+  // Arguments:
+  //  SVE mode: 1 for streaming SVE (SSVE), any other value
+  //  for non-streaming SVE mode.
+  //   Non-Streaming Vector length: In bytes, an integer e.g. "32".
+  //   Streaming Vector length: As above, but for streaming mode.
+  //   ZA mode: 1 for enabled, any other value for disabled.
+  if (arg

[Lldb-commits] [PATCH] D158506: [lldb][AArch64] Add release notes and documentation for SME

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556676.
DavidSpickett added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158506/new/

https://reviews.llvm.org/D158506

Files:
  lldb/docs/index.rst
  lldb/docs/use/aarch64-linux.rst
  llvm/docs/ReleaseNotes.rst

Index: llvm/docs/ReleaseNotes.rst
===
--- llvm/docs/ReleaseNotes.rst
+++ llvm/docs/ReleaseNotes.rst
@@ -183,6 +183,10 @@
 * Methods in SBHostOS related to threads have had their implementations
   removed. These methods will return a value indicating failure.
 
+* LLDB now supports debugging the Scalable Matrix Extension (SME) on AArch64
+  Linux for both running processes and core files. For details refer to the
+  `AArch64 Linux documentation `_.
+
 Changes to Sanitizers
 -
 * HWASan now defaults to detecting use-after-scope bugs.
Index: lldb/docs/use/aarch64-linux.rst
===
--- /dev/null
+++ lldb/docs/use/aarch64-linux.rst
@@ -0,0 +1,190 @@
+Using LLDB On AArch64 Linux
+===
+
+This page explains the details of debugging certain AArch64 extensions using
+LLDB. If something is not mentioned here, it likely works as you would expect.
+
+This is not a replacement for ptrace and Linux Kernel documentation. This covers
+how LLDB has chosen to use those things and how that effects your experience as
+a user.
+
+Scalable Vector Extension (SVE)
+---
+
+See `here `__
+to learn about the extension and `here `__
+for the Linux Kernel's handling of it.
+
+In LLDB you will be able to see the following new registers:
+
+* ``z0-z31`` vector registers, each one has size equal to the vector length.
+* ``p0-p15`` predicate registers, each one containing 1 bit per byte in the vector
+  length. Making each one vector length / 8 sized.
+* ``ffr`` the first fault register, same size as a predicate register.
+* ``vg``, the vector length in "granules". Each granule is 8 bytes.
+
+.. code-block::
+
+   Scalable Vector Extension Registers:
+ vg = 0x0002
+ z0 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 <...> }
+   <...>
+ p0 = {0xff 0xff}
+   <...>
+ffr = {0xff 0xff}
+
+The example above has a vector length of 16 bytes. Within LLDB you will always
+see "vg" as in the ``vg`` register, which is 2 in this case (8*2 = 16).
+Elsewhere you may see "vq" which is the vector length in quadwords (16 bytes)
+elsewhere. Where you see "vl", it is in bytes.
+
+Changing the Vector Length
+..
+
+While you can count the size of a P or Z register, it is intended that ``vg`` be
+used to find the current vector length.
+
+vg can be written. Writing the current vector length changes nothing. If you
+increase the vector length, the registers will likely be reset to 0. If you
+decrease it, LLDB will truncate the Z registers but everything else will be reset
+to 0.
+
+Generally you should not assume that SVE state after changing the vector length
+is in any way the same as it was previously. If you need to do it, do it before
+a function's first use of SVE.
+
+Z Register Presentation
+...
+
+LLDB makes no attempt to predict how an SVE Z register will be used. Even if the
+next SVE instruction (which may some distance away) would use, for example, 32
+bit elements, LLDB prints ``z0`` as single bytes.
+
+If you know what format you are going to use, give a format option::
+
+  (lldb) register read z0 -f uint32_t[]
+  z0 = {0x01010101 0x01010101 0x01010101 0x01010101}
+
+FPSIMD and SVE Modes
+
+
+Prior to the debugee's first use of SVE, it is in what the Linux Kernel terms
+SIMD mode. Only the FPU is being used. In this state LLDB will still show the
+SVE registers however the values are simply the FPU values zero extended up to
+the vector length.
+
+On first access to SVE, the process goes into SVE mode. Now the Z values are
+in the real Z registers.
+
+You can also trigger this with LLDB by writing to an SVE register. Note that
+there is no way to undo this change from within LLDB. However, the debugee
+itself could do something to end up back in SIMD mode.
+
+Expression evaluation
+.
+
+If you evaluate an expression, all SVE state is saved prior to, and restored
+after the expression has been evaluated. Including the register values and
+vector length.
+
+Scalable Matrix Extension (SME)
+---
+
+See `here `__
+to learn about the extension and `h

[Lldb-commits] [PATCH] D158514: [lldb][AArch64] Invalidate SVG prior to reconfiguring ZA regdef

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556677.
DavidSpickett added a comment.

Rebase


Repository:
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Files:
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py


Index: 
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
===
--- 
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
+++ 
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
@@ -125,11 +125,13 @@
 self.runCmd("thread select %d" % (idx + 1))
 self.check_za_register(4, 2)
 self.runCmd("register write vg 2")
+self.check_disabled_za_register(2)
 
 elif stopped_at_line_number == thY_break_line1:
 self.runCmd("thread select %d" % (idx + 1))
 self.check_za_register(2, 3)
 self.runCmd("register write vg 4")
+self.check_disabled_za_register(4)
 
 self.runCmd("thread continue 2")
 self.runCmd("thread continue 3")
Index: lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
===
--- lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
+++ lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
@@ -799,6 +799,11 @@
   if (!reg_info)
 return;
 
+  // When vg is written it is automatically made invalid. Writing vg will also
+  // change svg if we're in streaming mode, so we must fetch the latest value
+  // from the remote.
+  SetRegisterIsValid(reg_info, false);
+
   uint64_t fail_value = LLDB_INVALID_ADDRESS;
   uint32_t svg_reg_num = reg_info->kinds[eRegisterKindLLDB];
   uint64_t svg_reg_value = ReadRegisterAsUnsigned(svg_reg_num, fail_value);


Index: lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
===
--- lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
+++ lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
@@ -125,11 +125,13 @@
 self.runCmd("thread select %d" % (idx + 1))
 self.check_za_register(4, 2)
 self.runCmd("register write vg 2")
+self.check_disabled_za_register(2)
 
 elif stopped_at_line_number == thY_break_line1:
 self.runCmd("thread select %d" % (idx + 1))
 self.check_za_register(2, 3)
 self.runCmd("register write vg 4")
+self.check_disabled_za_register(4)
 
 self.runCmd("thread continue 2")
 self.runCmd("thread continue 3")
Index: lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
===
--- lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
+++ lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
@@ -799,6 +799,11 @@
   if (!reg_info)
 return;
 
+  // When vg is written it is automatically made invalid. Writing vg will also
+  // change svg if we're in streaming mode, so we must fetch the latest value
+  // from the remote.
+  SetRegisterIsValid(reg_info, false);
+
   uint64_t fail_value = LLDB_INVALID_ADDRESS;
   uint32_t svg_reg_num = reg_info->kinds[eRegisterKindLLDB];
   uint64_t svg_reg_value = ReadRegisterAsUnsigned(svg_reg_num, fail_value);
___
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[Lldb-commits] [PATCH] D159503: [lldb][AArch64] Add SME streaming vector length pseduo register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett added a comment.

> Why do we have svg and za in different register sets?

Done.


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[Lldb-commits] [PATCH] D159503: [lldb][AArch64] Add SME streaming vector length pseduo register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett added a comment.

  Scalable Matrix Extension Registers:
svcr = 0x
 svg = 0x0004
  za = {0x00 <...>}

Is the layout now.


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[Lldb-commits] [PATCH] D159505: [lldb][AArch64] Add testing for SME's ZA and SVG registers

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556678.
DavidSpickett added a comment.

Reformat changes with black.


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
  
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/Makefile
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/TestZAThreadedDynamic.py
  
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/main.c
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/Makefile
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/main.c

Index: lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/main.c
===
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/main.c
@@ -0,0 +1,226 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+
+// Important details for this program:
+// * Making a syscall will disable streaming mode if it is active.
+// * Changing the vector length will make streaming mode and ZA inactive.
+// * ZA can be active independent of streaming mode.
+// * ZA's size is the streaming vector length squared.
+
+#ifndef PR_SME_SET_VL
+#define PR_SME_SET_VL 63
+#endif
+
+#ifndef PR_SME_GET_VL
+#define PR_SME_GET_VL 64
+#endif
+
+#ifndef PR_SME_VL_LEN_MASK
+#define PR_SME_VL_LEN_MASK 0x
+#endif
+
+#define SM_INST(c) asm volatile("msr s0_3_c4_c" #c "_3, xzr")
+#define SMSTART SM_INST(7)
+#define SMSTART_SM SM_INST(3)
+#define SMSTART_ZA SM_INST(5)
+#define SMSTOP SM_INST(6)
+#define SMSTOP_SM SM_INST(2)
+#define SMSTOP_ZA SM_INST(4)
+
+int start_vl = 0;
+int other_vl = 0;
+
+void write_sve_regs() {
+  // We assume the smefa64 feature is present, which allows ffr access
+  // in streaming mode.
+  asm volatile("setffr\n\t");
+  asm volatile("ptrue p0.b\n\t");
+  asm volatile("ptrue p1.h\n\t");
+  asm volatile("ptrue p2.s\n\t");
+  asm volatile("ptrue p3.d\n\t");
+  asm volatile("pfalse p4.b\n\t");
+  asm volatile("ptrue p5.b\n\t");
+  asm volatile("ptrue p6.h\n\t");
+  asm volatile("ptrue p7.s\n\t");
+  asm volatile("ptrue p8.d\n\t");
+  asm volatile("pfalse p9.b\n\t");
+  asm volatile("ptrue p10.b\n\t");
+  asm volatile("ptrue p11.h\n\t");
+  asm volatile("ptrue p12.s\n\t");
+  asm volatile("ptrue p13.d\n\t");
+  asm volatile("pfalse p14.b\n\t");
+  asm volatile("ptrue p15.b\n\t");
+
+  asm volatile("cpy  z0.b, p0/z, #1\n\t");
+  asm volatile("cpy  z1.b, p5/z, #2\n\t");
+  asm volatile("cpy  z2.b, p10/z, #3\n\t");
+  asm volatile("cpy  z3.b, p15/z, #4\n\t");
+  asm volatile("cpy  z4.b, p0/z, #5\n\t");
+  asm volatile("cpy  z5.b, p5/z, #6\n\t");
+  asm volatile("cpy  z6.b, p10/z, #7\n\t");
+  asm volatile("cpy  z7.b, p15/z, #8\n\t");
+  asm volatile("cpy  z8.b, p0/z, #9\n\t");
+  asm volatile("cpy  z9.b, p5/z, #10\n\t");
+  asm volatile("cpy  z10.b, p10/z, #11\n\t");
+  asm volatile("cpy  z11.b, p15/z, #12\n\t");
+  asm volatile("cpy  z12.b, p0/z, #13\n\t");
+  asm volatile("cpy  z13.b, p5/z, #14\n\t");
+  asm volatile("cpy  z14.b, p10/z, #15\n\t");
+  asm volatile("cpy  z15.b, p15/z, #16\n\t");
+  asm volatile("cpy  z16.b, p0/z, #17\n\t");
+  asm volatile("cpy  z17.b, p5/z, #18\n\t");
+  asm volatile("cpy  z18.b, p10/z, #19\n\t");
+  asm volatile("cpy  z19.b, p15/z, #20\n\t");
+  asm volatile("cpy  z20.b, p0/z, #21\n\t");
+  asm volatile("cpy  z21.b, p5/z, #22\n\t");
+  asm volatile("cpy  z22.b, p10/z, #23\n\t");
+  asm volatile("cpy  z23.b, p15/z, #24\n\t");
+  asm volatile("cpy  z24.b, p0/z, #25\n\t");
+  asm volatile("cpy  z25.b, p5/z, #26\n\t");
+  asm volatile("cpy  z26.b, p10/z, #27\n\t");
+  asm volatile("cpy  z27.b, p15/z, #28\n\t");
+  asm volatile("cpy  z28.b, p0/z, #29\n\t");
+  asm volatile("cpy  z29.b, p5/z, #30\n\t");
+  asm volatile("cpy  z30.b, p10/z, #31\n\t");
+  asm volatile("cpy  z31.b, p15/z, #32\n\t");
+}
+
+// Write something different so we will know if we didn't restore them
+// correctly.
+void write_sve_regs_expr() {
+  asm volatile("pfalse p0.b\n\t");
+  asm volatile("wrffr p0.b\n\t");
+  asm volatile("pfalse p1.b\n\t");
+  asm volatile("pfalse p2.b\n\t");
+  asm volatile("pfalse p3.b\n\t");
+  asm volatile("ptrue p4.b\n\t");
+  asm volatile("pfalse p5.b\n\t");
+  asm volatile("pfalse p6.b\n\t");
+  asm volatile("pfalse p7.b\n\t");
+  asm volatile("pfalse p8.b\n\t");
+  asm volatile("ptrue p9.b\n\t");
+  asm volatile("pfalse p10.b\n\t");
+  asm volatile("pfalse p11.b\n\t");
+  asm volatile("pfalse p12.b\n\t");
+  asm volatile("pfalse p13.b\

[Lldb-commits] [PATCH] D154927: [lldb][AArch64] Add SME's streaming vector control register

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556679.
DavidSpickett added a comment.

Format with black.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154927/new/

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Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
  
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
  
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
  
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
  
lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py

Index: lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
===
--- lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
+++ lldb/test/API/commands/register/register/aarch64_za_register/za_save_restore/TestZARegisterSaveRestore.py
@@ -164,6 +164,10 @@
 self.runCmd("register read " + sve_reg_names)
 sve_values = self.res.GetOutput()
 
+svcr_value = 1 if sve_mode == Mode.SSVE else 0
+if za_state == ZA.Enabled:
+svcr_value += 2
+
 def check_regs():
 if za_state == ZA.Enabled:
 self.check_za(start_vl)
@@ -175,6 +179,7 @@
 self.assertEqual(start_vg, self.read_vg())
 
 self.expect("register read " + sve_reg_names, substrs=[sve_values])
+self.expect("register read svcr", substrs=["0x{:016x}".format(svcr_value)])
 
 for expr in exprs:
 expr_cmd = "expression {}()".format(expr)
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
===
--- lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
@@ -5,7 +5,7 @@
 #define PR_SME_SET_VL 63
 #endif
 
-#define SMSTART() asm volatile("msr  s0_3_c4_c7_3, xzr" /*smstart*/)
+#define SMSTART_SM() asm volatile("msr  s0_3_c4_c3_3, xzr" /*smstart sm*/)
 
 void write_sve_regs() {
   // We assume the smefa64 feature is present, which allows ffr access
@@ -126,18 +126,18 @@
   // Note that doing a syscall brings you back to non-streaming mode, so we
   // don't need to SMSTOP here.
   if (streaming)
-SMSTART();
+SMSTART_SM();
   write_sve_regs_expr();
   prctl(SET_VL_OPT, 8 * 4);
   if (streaming)
-SMSTART();
+SMSTART_SM();
   write_sve_regs_expr();
   return 1;
 }
 
 int main() {
 #ifdef START_SSVE
-  SMSTART();
+  SMSTART_SM();
 #endif
   write_sve_regs();
 
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
===
--- lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
@@ -24,7 +24,15 @@
 reg_value.GetByteSize(), expected, 'Verify "%s" == %i' % (name, expected)
 )
 
-def check_sve_regs_read(self, z_reg_size):
+def check_sve_regs_read(self, z_reg_size, expected_mode):
+if self.isAArch64SME():
+# This test uses SMSTART SM, which only enables streaming mode,
+# leaving ZA disabled.
+expected_value = "1" if expected_mode == Mode.SSVE else "0"
+self.expect(
+"register read svcr", substrs=["0x000" + expected_value]
+)
+
 p_reg_size = int(z_reg_size / 8)
 
 for i in range(32):
@@ -168,7 +176,7 @@
 
 vg_reg_value = sve_registers.GetChildMemberWithName("vg").GetValueAsUnsigned()
 z_reg_size = vg_reg_value * 8
-self.check_sve_regs_read(z_reg_size)
+self.check_sve_regs_read(z_reg_size, start_mode)
 
 # Evaluate simple expression and print function expr_eval_func address.
 self.expect("expression expr_eval_func", substrs=["= 0x"])
@@ -184,7 +192,7 @@
 
 # We called a jitted function above which must not have changed SVE
 # vector length or register values.
-self.check_sve_regs_read(z_reg_size)
+self.check_sve_regs_read(z_reg_size, start_mode)
 
 self.check_sve_regs_read_after_write(z_reg_size)
 
Index: lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
===
--- lldb/te

[Lldb-commits] [PATCH] D158500: [lldb][AArch64] Linux corefile support for SME

[David Spickett via Phabricator via lldb-commits]

DavidSpickett updated this revision to Diff 556680.
DavidSpickett added a comment.

Format with black.


Repository:
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Files:
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
  lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
  lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h
  lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
  lldb/test/API/linux/aarch64/sme_core_file/TestAArch64LinuxSMECoreFile.py
  lldb/test/API/linux/aarch64/sme_core_file/core_0_16_32_1
  lldb/test/API/linux/aarch64/sme_core_file/core_0_32_16_0
  lldb/test/API/linux/aarch64/sme_core_file/core_1_16_32_0
  lldb/test/API/linux/aarch64/sme_core_file/core_1_32_16_1
  lldb/test/API/linux/aarch64/sme_core_file/main.c

Index: lldb/test/API/linux/aarch64/sme_core_file/main.c
===
--- /dev/null
+++ lldb/test/API/linux/aarch64/sme_core_file/main.c
@@ -0,0 +1,140 @@
+// clang-format off
+// Compile with:
+// clang -target aarch64-unknown-linux-gnu main.c -o a.out -g -march=armv8.6-a+sve+sme
+//
+// For minimal corefile size, do this before running the program:
+// echo 0x20 > /proc/self/coredeump_filter
+//
+// Must be run on a system that has SVE and SME, including the smefa64
+// extension. Example command:
+// main 0 32 64 1
+//
+// This would not enter streaming mode, set non-streaming VL to 32
+// bytes, streaming VL to 64 bytes and enable ZA.
+// clang-format on
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifndef PR_SME_SET_VL
+#define PR_SME_SET_VL 63
+#endif
+
+#define SM_INST(c) asm volatile("msr s0_3_c4_c" #c "_3, xzr")
+#define SMSTART_SM SM_INST(3)
+#define SMSTART_ZA SM_INST(5)
+
+void set_sve_registers() {
+  // We assume the smefa64 feature is present, which allows ffr access
+  // in streaming mode.
+  asm volatile("setffr\n\t");
+  asm volatile("ptrue p0.b\n\t");
+  asm volatile("ptrue p1.h\n\t");
+  asm volatile("ptrue p2.s\n\t");
+  asm volatile("ptrue p3.d\n\t");
+  asm volatile("pfalse p4.b\n\t");
+  asm volatile("ptrue p5.b\n\t");
+  asm volatile("ptrue p6.h\n\t");
+  asm volatile("ptrue p7.s\n\t");
+  asm volatile("ptrue p8.d\n\t");
+  asm volatile("pfalse p9.b\n\t");
+  asm volatile("ptrue p10.b\n\t");
+  asm volatile("ptrue p11.h\n\t");
+  asm volatile("ptrue p12.s\n\t");
+  asm volatile("ptrue p13.d\n\t");
+  asm volatile("pfalse p14.b\n\t");
+  asm volatile("ptrue p15.b\n\t");
+
+  asm volatile("cpy  z0.b, p0/z, #1\n\t");
+  asm volatile("cpy  z1.b, p5/z, #2\n\t");
+  asm volatile("cpy  z2.b, p10/z, #3\n\t");
+  asm volatile("cpy  z3.b, p15/z, #4\n\t");
+  asm volatile("cpy  z4.b, p0/z, #5\n\t");
+  asm volatile("cpy  z5.b, p5/z, #6\n\t");
+  asm volatile("cpy  z6.b, p10/z, #7\n\t");
+  asm volatile("cpy  z7.b, p15/z, #8\n\t");
+  asm volatile("cpy  z8.b, p0/z, #9\n\t");
+  asm volatile("cpy  z9.b, p5/z, #10\n\t");
+  asm volatile("cpy  z10.b, p10/z, #11\n\t");
+  asm volatile("cpy  z11.b, p15/z, #12\n\t");
+  asm volatile("cpy  z12.b, p0/z, #13\n\t");
+  asm volatile("cpy  z13.b, p5/z, #14\n\t");
+  asm volatile("cpy  z14.b, p10/z, #15\n\t");
+  asm volatile("cpy  z15.b, p15/z, #16\n\t");
+  asm volatile("cpy  z16.b, p0/z, #17\n\t");
+  asm volatile("cpy  z17.b, p5/z, #18\n\t");
+  asm volatile("cpy  z18.b, p10/z, #19\n\t");
+  asm volatile("cpy  z19.b, p15/z, #20\n\t");
+  asm volatile("cpy  z20.b, p0/z, #21\n\t");
+  asm volatile("cpy  z21.b, p5/z, #22\n\t");
+  asm volatile("cpy  z22.b, p10/z, #23\n\t");
+  asm volatile("cpy  z23.b, p15/z, #24\n\t");
+  asm volatile("cpy  z24.b, p0/z, #25\n\t");
+  asm volatile("cpy  z25.b, p5/z, #26\n\t");
+  asm volatile("cpy  z26.b, p10/z, #27\n\t");
+  asm volatile("cpy  z27.b, p15/z, #28\n\t");
+  asm volatile("cpy  z28.b, p0/z, #29\n\t");
+  asm volatile("cpy  z29.b, p5/z, #30\n\t");
+  asm volatile("cpy  z30.b, p10/z, #31\n\t");
+  asm volatile("cpy  z31.b, p15/z, #32\n\t");
+}
+
+void set_za_register(int streaming_vl) {
+#define MAX_VL_BYTES 256
+  uint8_t data[MAX_VL_BYTES];
+
+  for (unsigned i = 0; i < streaming_vl; ++i) {
+for (unsigned j = 0; j < MAX_VL_BYTES; ++j)
+  data[j] = i + 1;
+asm volatile("mov w12, %w0\n\t"
+ "ldr za[w12, 0], [%1]\n\t" ::"r"(i),
+ "r"(&data)
+ : "w12");
+  }
+}
+
+void set_tpidr2(uint64_t value) {
+  __asm__ volatile("msr S3_3_C13_C0_5, %0" ::"r"(value));
+}
+
+int main(int argc, char **argv) {
+  // Arguments:
+  //  SVE mode: 1 for streaming SVE (SSVE), any other value
+  //  for non-streaming SVE mode.
+  //   Non-Streaming Vector length: In bytes, an integer e.g. "32".
+  //   Streaming Vector length: As above, but for streaming mode.
+  //   ZA mode: 1 for enabled, any other value for disabled.
+  if (argc != 5)
+return 1;
+
+  // We assume thi

[Lldb-commits] [lldb] b6f66c9 - [lldb][AArch64] Reformat register set test with black

[David Spickett via lldb-commits]

Author: David Spickett
Date: 2023-09-13T15:52:24Z
New Revision: b6f66c94bce7d9c0ef029d133b85925ba23198b4

URL: 
https://github.com/llvm/llvm-project/commit/b6f66c94bce7d9c0ef029d133b85925ba23198b4
DIFF: 
https://github.com/llvm/llvm-project/commit/b6f66c94bce7d9c0ef029d133b85925ba23198b4.diff

LOG: [lldb][AArch64] Reformat register set test with black

I missed this before landing.

Added: 


Modified: 

lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py

Removed: 




diff  --git 
a/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
 
b/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
index e91eeba2a601ebc..d3f53f0e95dfcb5 100644
--- 
a/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
+++ 
b/lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py
@@ -126,7 +126,7 @@ def test_aarch64_dynamic_regset_config(self):
 @skipIf(oslist=no_match(["linux"]))
 def test_aarch64_dynamic_regset_config_sme(self):
 """Test AArch64 Dynamic Register sets configuration, but only SME
-   registers."""
+registers."""
 if not self.isAArch64SME():
 self.skipTest("SME must be present.")
 
@@ -151,6 +151,7 @@ def test_aarch64_dynamic_regset_config_sme(self):
 register_sets = self.thread().GetSelectedFrame().GetRegisters()
 
 ssve_registers = register_sets.GetFirstValueByName(
-"Scalable Vector Extension Registers")
+"Scalable Vector Extension Registers"
+)
 self.assertTrue(ssve_registers.IsValid())
 self.sve_regs_read_dynamic(ssve_registers)



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[Lldb-commits] [lldb] remove common libc tuners (PR #66136)

[Siva Chandra via lldb-commits]

https://github.com/sivachandra updated 
https://github.com/llvm/llvm-project/pull/66136:

>From d1a9fda20a2be37385b44dcbf2f73b1890fa7d78 Mon Sep 17 00:00:00 2001
From: Siva Chandra Reddy 
Date: Tue, 12 Sep 2023 05:42:37 +
Subject: [PATCH 1/3] [libc][NFC] Make entrypoint alias targets real library
 targets.

This is part of a libc wide CMake cleanup which aims to eliminate
certain explicitly duplicated logic which is available in CMake-3.20.
This change in particular makes the entrypoint aliases real library
targets so that they can be treated as normal library targets by other
libc build rules.
---
 libc/cmake/modules/LLVMLibCObjectRules.cmake | 20 +---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/libc/cmake/modules/LLVMLibCObjectRules.cmake 
b/libc/cmake/modules/LLVMLibCObjectRules.cmake
index 709acd9ad614fbe..006b8949b6fd0a1 100644
--- a/libc/cmake/modules/LLVMLibCObjectRules.cmake
+++ b/libc/cmake/modules/LLVMLibCObjectRules.cmake
@@ -559,6 +559,8 @@ function(create_entrypoint_object fq_target_name)
 return()
   endif()
 
+  set(internal_target_name ${fq_target_name}.__internal__)
+
   if(ADD_ENTRYPOINT_OBJ_ALIAS)
 # Alias targets help one add aliases to other entrypoint object targets.
 # One can use alias targets setup OS/machine independent entrypoint 
targets.
@@ -586,10 +588,23 @@ function(create_entrypoint_object fq_target_name)
   message(FATAL_ERROR "The aliasee of an entrypoint alias should be an 
entrypoint.")
 endif()
 
-add_custom_target(${fq_target_name})
-add_dependencies(${fq_target_name} ${fq_dep_name})
+# add_custom_target(${fq_target_name})
 get_target_property(object_file ${fq_dep_name} "OBJECT_FILE")
 get_target_property(object_file_raw ${fq_dep_name} "OBJECT_FILE_RAW")
+add_library(
+  ${internal_target_name}
+  EXCLUDE_FROM_ALL
+  OBJECT
+  ${object_file_raw}
+)
+add_dependencies(${internal_target_name} ${fq_dep_name})
+add_library(
+  ${fq_target_name}
+  EXCLUDE_FROM_ALL
+  OBJECT
+  ${object_file}
+)
+add_dependencies(${fq_target_name} ${fq_dep_name} ${internal_target_name})
 set_target_properties(
   ${fq_target_name}
   PROPERTIES
@@ -619,7 +634,6 @@ function(create_entrypoint_object fq_target_name)
 "${ADD_ENTRYPOINT_OBJ_FLAGS}"
 ${ADD_ENTRYPOINT_OBJ_COMPILE_OPTIONS}
   )
-  set(internal_target_name ${fq_target_name}.__internal__)
   set(include_dirs ${LIBC_SOURCE_DIR} ${LIBC_INCLUDE_DIR})
   get_fq_deps_list(fq_deps_list ${ADD_ENTRYPOINT_OBJ_DEPENDS})
   set(full_deps_list ${fq_deps_list} libc.src.__support.common)

>From f0475c5918f4f645e45f05f8e07f472e9fd94559 Mon Sep 17 00:00:00 2001
From: Siva Chandra Reddy 
Date: Tue, 12 Sep 2023 16:30:50 +
Subject: [PATCH 2/3] [libc][NFC] Remove stray comment.

---
 libc/cmake/modules/LLVMLibCObjectRules.cmake | 1 -
 1 file changed, 1 deletion(-)

diff --git a/libc/cmake/modules/LLVMLibCObjectRules.cmake 
b/libc/cmake/modules/LLVMLibCObjectRules.cmake
index 006b8949b6fd0a1..4d5835cc6b4d809 100644
--- a/libc/cmake/modules/LLVMLibCObjectRules.cmake
+++ b/libc/cmake/modules/LLVMLibCObjectRules.cmake
@@ -588,7 +588,6 @@ function(create_entrypoint_object fq_target_name)
   message(FATAL_ERROR "The aliasee of an entrypoint alias should be an 
entrypoint.")
 endif()
 
-# add_custom_target(${fq_target_name})
 get_target_property(object_file ${fq_dep_name} "OBJECT_FILE")
 get_target_property(object_file_raw ${fq_dep_name} "OBJECT_FILE_RAW")
 add_library(

>From 1eeb5e0eda3bdcf6d4eec6e1afac5c6c3f45 Mon Sep 17 00:00:00 2001
From: Siva Chandra Reddy 
Date: Mon, 11 Sep 2023 22:17:32 +
Subject: [PATCH 3/3] [libc] Remove common_libc_tuners.cmake and move options
 into config.json.

The name has been changed to adhere to the config option naming format.
The necessary build changes to use the new option have also been made.
---
 libc/CMakeLists.txt  |  2 --
 libc/cmake/modules/LLVMLibCObjectRules.cmake |  2 ++
 libc/common_libc_tuners.cmake| 14 --
 libc/config/config.json  |  6 ++
 libc/docs/configure.rst  |  2 ++
 libc/src/string/CMakeLists.txt   |  9 +
 libc/src/string/string_utils.h   |  4 ++--
 7 files changed, 21 insertions(+), 18 deletions(-)
 delete mode 100644 libc/common_libc_tuners.cmake

diff --git a/libc/CMakeLists.txt b/libc/CMakeLists.txt
index 12fff25c197e2d9..cf90919c20fd969 100644
--- a/libc/CMakeLists.txt
+++ b/libc/CMakeLists.txt
@@ -64,8 +64,6 @@ add_compile_definitions(LIBC_NAMESPACE=${LIBC_NAMESPACE})
 # Flags to pass down to the compiler while building the libc functions.
 set(LIBC_COMPILE_OPTIONS_DEFAULT "" CACHE STRING "Architecture to tell clang 
to optimize for (e.g. -march=... or -mcpu=...)")
 
-include(common_libc_tuners.cmake)
-
 list(APPEND LIBC_COMPILE_OPTIONS_DEFAULT ${LIBC_COMMON_TUNE_OPTIONS})
 
 # Check

[Lldb-commits] [lldb] remove common libc tuners (PR #66136)

[Siva Chandra via lldb-commits]

https://github.com/sivachandra closed 
https://github.com/llvm/llvm-project/pull/66136
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[Lldb-commits] [lldb] 4d10b95 - [lldb] Fix formatting and whitespace in Debugger.{h, cpp} (NFC)

[Jonas Devlieghere via lldb-commits]

Author: Jonas Devlieghere
Date: 2023-09-13T09:14:54-07:00
New Revision: 4d10b9507dcf0dfe073b8642c5ade1d906e654ee

URL: 
https://github.com/llvm/llvm-project/commit/4d10b9507dcf0dfe073b8642c5ade1d906e654ee
DIFF: 
https://github.com/llvm/llvm-project/commit/4d10b9507dcf0dfe073b8642c5ade1d906e654ee.diff

LOG: [lldb] Fix formatting and whitespace in Debugger.{h,cpp} (NFC)

This file is heavily trafficked and the various formatting and
whitespace issues make it tedious to work on.

Added: 


Modified: 
lldb/include/lldb/Core/Debugger.h
lldb/source/Core/Debugger.cpp

Removed: 




diff  --git a/lldb/include/lldb/Core/Debugger.h 
b/lldb/include/lldb/Core/Debugger.h
index 5532cace606bfed..f0908eeca5f5cf5 100644
--- a/lldb/include/lldb/Core/Debugger.h
+++ b/lldb/include/lldb/Core/Debugger.h
@@ -417,55 +417,55 @@ class Debugger : public 
std::enable_shared_from_this,
   /// hand, use INTERRUPT_REQUESTED so this gets done consistently.
   ///
   /// \param[in] formatv
-  /// A formatv string for the interrupt message.  If the elements of the 
+  /// A formatv string for the interrupt message.  If the elements of the
   /// message are expensive to compute, you can use the no-argument form of
-  /// InterruptRequested, then make up the report using REPORT_INTERRUPTION. 
-  /// 
+  /// InterruptRequested, then make up the report using REPORT_INTERRUPTION.
+  ///
   /// \return
   ///  A boolean value, if \b true an interruptible operation should interrupt
   ///  itself.
   template 
-  bool InterruptRequested(const char *cur_func, 
-  const char *formatv, Args &&... args) {
+  bool InterruptRequested(const char *cur_func, const char *formatv,
+  Args &&...args) {
 bool ret_val = InterruptRequested();
 if (ret_val) {
   if (!formatv)
 formatv = "Unknown message";
   if (!cur_func)
 cur_func = "";
-  ReportInterruption(InterruptionReport(cur_func, 
-llvm::formatv(formatv, 
-std::forward(args)...)));
+  ReportInterruption(InterruptionReport(
+  cur_func, llvm::formatv(formatv, std::forward(args)...)));
 }
 return ret_val;
   }
-  
-  
+
   /// This handy define will keep you from having to generate a report for the
   /// interruption by hand.  Use this except in the case where the arguments to
   /// the message description are expensive to compute.
-#define INTERRUPT_REQUESTED(debugger, ...) \
-(debugger).InterruptRequested(__func__, __VA_ARGS__)
+#define INTERRUPT_REQUESTED(debugger, ...) 
\
+  (debugger).InterruptRequested(__func__, __VA_ARGS__)
 
   // This form just queries for whether to interrupt, and does no reporting:
   bool InterruptRequested();
-  
+
   // FIXME: Do we want to capture a backtrace at the interruption point?
   class InterruptionReport {
   public:
-InterruptionReport(std::string function_name, std::string description) :
-m_function_name(std::move(function_name)), 
-m_description(std::move(description)),
-m_interrupt_time(std::chrono::system_clock::now()),
-m_thread_id(llvm::get_threadid()) {}
-
-InterruptionReport(std::string function_name, 
-const llvm::formatv_object_base &payload);
-
-  template 
-  InterruptionReport(std::string function_name,
-  const char *format, Args &&... args) :
-InterruptionReport(function_name, llvm::formatv(format, 
std::forward(args)...)) {}
+InterruptionReport(std::string function_name, std::string description)
+: m_function_name(std::move(function_name)),
+  m_description(std::move(description)),
+  m_interrupt_time(std::chrono::system_clock::now()),
+  m_thread_id(llvm::get_threadid()) {}
+
+InterruptionReport(std::string function_name,
+   const llvm::formatv_object_base &payload);
+
+template 
+InterruptionReport(std::string function_name, const char *format,
+   Args &&...args)
+: InterruptionReport(
+  function_name,
+  llvm::formatv(format, std::forward(args)...)) {}
 
 std::string m_function_name;
 std::string m_description;
@@ -473,14 +473,13 @@ class Debugger : public 
std::enable_shared_from_this,
 const uint64_t m_thread_id;
   };
   void ReportInterruption(const InterruptionReport &report);
-#define REPORT_INTERRUPTION(debugger, ...) \
-(debugger).ReportInterruption(Debugger::InterruptionReport(__func__, \
-__VA_ARGS__))
+#define REPORT_INTERRUPTION(debugger, ...) 
\
+  (debugger).ReportInterruption(   
\
+  Debugger::InterruptionReport(__func__, __VA_ARGS__))
 
   static DebuggerList

[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Greg Clayton via lldb-commits]

https://github.com/clayborg commented:

Any interest in just allowing "settings set prompt" to use the format strings 
approach that we support in thread-format, frame-format? I see we have a ton of 
settings that already ansi-prefix and ansi-suffix settings, but it would be 
easy to just do:
```
(lldb) setting set prompt "${ansi.fg.red}(lldb) ${ansi.normal}"
```
It we didn't just expand the above string one time, we could be able to make 
some really powerful LLDB prompts if we used the format strings:
```
(lldb) setting set prompt "{pid = ${process.id} }{tid = ${thread.id%tid}} 
${ansi.fg.red}(lldb) ${ansi.normal}"
```
Just an idea, not a requirement for this patch

https://github.com/llvm/llvm-project/pull/66218
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[Lldb-commits] [lldb] Fix a bug with cancelling "attach -w" after you have run a process previously (PR #65822)

[Greg Clayton via lldb-commits]

clayborg wrote:

> This seems like a much wider ranging change than is required to fix this bug. 
> I'm all for rethinking the 
> ExecutionContextScope/ExecutionContext/ExecutionContextRef nexus, but I don't 
> think that's a trivial rethink, and I don't have the time to undertake that 
> right now.

My only point in mentioning this is many of the changed files in your patch 
goes away if we fix ExecutionContext. 

Change look fine to me if we don't want to change ExecutionContext, but i will 
let others do the final accept.


https://github.com/llvm/llvm-project/pull/65822
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[Lldb-commits] [PATCH] D157609: [lldb] Add more ways to find split DWARF files

[Greg Clayton via Phabricator via lldb-commits]

clayborg added a comment.

In D157609#4644194 , @DavidSpickett 
wrote:

>> Any chance we could simplify this situation and have dwo searches use 
>> exactly the same/shared logic as source file searches?
>
> I'm not sure what exactly this means, can you clarify?
>
> I know that DWP and DWO have different search functions, that could certainly 
> be unified. Not sure how source files work.

Source file search paths and debug info search paths are different in LLDB. GDB 
had one setting IIRC that handled both. These settings have been in LLDB for a 
while so I wouldn't recommend changing this up at this point.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157609/new/

https://reviews.llvm.org/D157609

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[Lldb-commits] [lldb] [lldb][Commands] Show symbol change bit in SB API (PR #66144)

[Chelsea Cassanova via lldb-commits]

@@ -83,7 +83,7 @@ class Debugger : public 
std::enable_shared_from_this,
 eBroadcastBitProgress = (1 << 0),
 eBroadcastBitWarning = (1 << 1),
 eBroadcastBitError = (1 << 2),
-eBroadcastSymbolChange = (1 << 3),
+eBroadcastBitSymbolChange = (1 << 3),

chelcassanova wrote:

For clarity it can be renamed to `eBroadcastBitSymbolFilesChanged` in 
Debugger.h since we should remove this flag from the public view.

https://github.com/llvm/llvm-project/pull/66144
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Re: [Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Jim Ingham via lldb-commits]

We actually have several requests for this internally, and I think that's a 
good idea.  

However, some of the format tokens can return arbitrary text, including 
newlines, for instance "thread.completed-expression", and all the "script." 
ones.  Do we want to try to support prompts with new-lines or do we want to 
restrict the format string for prompts or somehow cut off these arbitrary 
elements at the first new-line?

Jim

> On Sep 13, 2023, at 9:53 AM, Greg Clayton via lldb-commits 
>  wrote:
> 
> 
> https://github.com/clayborg commented:
> 
> Any interest in just allowing "settings set prompt" to use the format strings 
> approach that we support in thread-format, frame-format? I see we have a ton 
> of settings that already ansi-prefix and ansi-suffix settings, but it would 
> be easy to just do:
> ```
> (lldb) setting set prompt "${ansi.fg.red}(lldb) ${ansi.normal}"
> ```
> It we didn't just expand the above string one time, we could be able to make 
> some really powerful LLDB prompts if we used the format strings:
> ```
> (lldb) setting set prompt "{pid = ${process.id} }{tid = ${thread.id%tid}} 
> ${ansi.fg.red}(lldb) ${ansi.normal}"
> ```
> Just an idea, not a requirement for this patch
> 
> https://github.com/llvm/llvm-project/pull/66218
> ___
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Ben Barham via lldb-commits]

https://github.com/bnbarham review_requested 
https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Ben Barham via lldb-commits]

https://github.com/bnbarham created 
https://github.com/llvm/llvm-project/pull/66271:

This reverts commit c95a0c91c0de66eb1066f23c69332522656f188e.

llvm#65683 split `-fincremental-extensions` and `IncrementalProcessing` such 
that `IncrementalProcessing` can be used to extend the lifetime of various 
datastructures without parsing changes. LLDB really should not be parsing any 
differently to a regular compile, so switch back to using just 
`IncrementalProcessing`.

>From 2f65db88d9249ca38fb86438fd92ef2f734d39b3 Mon Sep 17 00:00:00 2001
From: Ben Barham 
Date: Wed, 13 Sep 2023 11:14:35 -0700
Subject: [PATCH] Revert "[lldb] Fix the way we set up the lldb modules
 infrastructure."

This reverts commit c95a0c91c0de66eb1066f23c69332522656f188e.

llvm#65683 split `-fincremental-extensions` and `IncrementalProcessing`
such that `IncrementalProcessing` can be used to extend the lifetime of
various datastructures without parsing changes. LLDB really should not
be parsing any differently to a regular compile, so switch back to using
just `IncrementalProcessing`.
---
 .../Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp  | 3 ++-
 .../lang/objc/modules-compile-error/TestModulesCompileError.py | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git 
a/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp 
b/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
index 5ce0d35378230cf..86d5ca1b125df3f 100644
--- a/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
+++ b/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
@@ -670,7 +670,6 @@ ClangModulesDeclVendor::Create(Target &target) {
   arch.GetTriple().str(),
   "-fmodules-validate-system-headers",
   "-Werror=non-modular-include-in-framework-module",
-  "-Xclang=-fincremental-extensions",
   "-Rmodule-build"};
 
   target.GetPlatform()->AddClangModuleCompilationOptions(
@@ -765,6 +764,8 @@ ClangModulesDeclVendor::Create(Target &target) {
instance->getFrontendOpts().Inputs[0]))
 return nullptr;
 
+  instance->getPreprocessor().enableIncrementalProcessing();
+
   instance->createASTReader();
 
   instance->createSema(action->getTranslationUnitKind(), nullptr);
diff --git 
a/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py 
b/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
index 36e302be2525b51..db6d74bfdb540a5 100644
--- a/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
+++ b/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
@@ -21,7 +21,7 @@ def test(self):
 "expr @import LLDBTestModule",
 error=True,
 substrs=[
-"module.h:4:1: error: use of undeclared identifier 
'syntax_error_for_lldb_to_find'",
+"module.h:4:1: error: unknown type name 
'syntax_error_for_lldb_to_find'",
 "syntax_error_for_lldb_to_find // comment that tests source 
printing",
 "could not build module 'LLDBTestModule'",
 ],

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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[via lldb-commits]

llvmbot wrote:




@llvm/pr-subscribers-lldb


Changes
This reverts commit c95a0c91c0de66eb1066f23c69332522656f188e.

llvm#65683 split `-fincremental-extensions` and `IncrementalProcessing` such 
that `IncrementalProcessing` can be used to extend the lifetime of various 
datastructures without parsing changes. LLDB really should not be parsing any 
differently to a regular compile, so switch back to using just 
`IncrementalProcessing`.
--
Full diff: https://github.com/llvm/llvm-project/pull/66271.diff

2 Files Affected:

- (modified) 
lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp (+2-1) 
- (modified) 
lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py (+1-1) 



diff --git 
a/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp 
b/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
index 5ce0d35378230cf..86d5ca1b125df3f 100644
--- a/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
+++ b/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
@@ -670,7 +670,6 @@ ClangModulesDeclVendor::Create(Target &target) {
   arch.GetTriple().str(),
   "-fmodules-validate-system-headers",
   "-Werror=non-modular-include-in-framework-module",
-  "-Xclang=-fincremental-extensions",
   "-Rmodule-build"};
 
   target.GetPlatform()->AddClangModuleCompilationOptions(
@@ -765,6 +764,8 @@ ClangModulesDeclVendor::Create(Target &target) {
instance->getFrontendOpts().Inputs[0]))
 return nullptr;
 
+  instance->getPreprocessor().enableIncrementalProcessing();
+
   instance->createASTReader();
 
   instance->createSema(action->getTranslationUnitKind(), nullptr);
diff --git 
a/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py 
b/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
index 36e302be2525b51..db6d74bfdb540a5 100644
--- a/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
+++ b/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
@@ -21,7 +21,7 @@ def test(self):
 "expr @import LLDBTestModule",
 error=True,
 substrs=[
-"module.h:4:1: error: use of undeclared identifier 
'syntax_error_for_lldb_to_find'",
+"module.h:4:1: error: unknown type name 
'syntax_error_for_lldb_to_find'",
 "syntax_error_for_lldb_to_find // comment that tests 
source printing",
 "could not build module 'LLDBTestModule'",
 ],




https://github.com/llvm/llvm-project/pull/66271
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[Ben Barham via lldb-commits]

https://github.com/bnbarham updated 
https://github.com/llvm/llvm-project/pull/66271:

>From 2f65db88d9249ca38fb86438fd92ef2f734d39b3 Mon Sep 17 00:00:00 2001
From: Ben Barham 
Date: Wed, 13 Sep 2023 11:14:35 -0700
Subject: [PATCH] Revert "[lldb] Fix the way we set up the lldb modules
 infrastructure."

This reverts commit c95a0c91c0de66eb1066f23c69332522656f188e.

llvm#65683 split `-fincremental-extensions` and `IncrementalProcessing`
such that `IncrementalProcessing` can be used to extend the lifetime of
various datastructures without parsing changes. LLDB really should not
be parsing any differently to a regular compile, so switch back to using
just `IncrementalProcessing`.
---
 .../Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp  | 3 ++-
 .../lang/objc/modules-compile-error/TestModulesCompileError.py | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git 
a/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp 
b/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
index 5ce0d35378230cf..86d5ca1b125df3f 100644
--- a/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
+++ b/lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
@@ -670,7 +670,6 @@ ClangModulesDeclVendor::Create(Target &target) {
   arch.GetTriple().str(),
   "-fmodules-validate-system-headers",
   "-Werror=non-modular-include-in-framework-module",
-  "-Xclang=-fincremental-extensions",
   "-Rmodule-build"};
 
   target.GetPlatform()->AddClangModuleCompilationOptions(
@@ -765,6 +764,8 @@ ClangModulesDeclVendor::Create(Target &target) {
instance->getFrontendOpts().Inputs[0]))
 return nullptr;
 
+  instance->getPreprocessor().enableIncrementalProcessing();
+
   instance->createASTReader();
 
   instance->createSema(action->getTranslationUnitKind(), nullptr);
diff --git 
a/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py 
b/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
index 36e302be2525b51..db6d74bfdb540a5 100644
--- a/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
+++ b/lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
@@ -21,7 +21,7 @@ def test(self):
 "expr @import LLDBTestModule",
 error=True,
 substrs=[
-"module.h:4:1: error: use of undeclared identifier 
'syntax_error_for_lldb_to_find'",
+"module.h:4:1: error: unknown type name 
'syntax_error_for_lldb_to_find'",
 "syntax_error_for_lldb_to_find // comment that tests source 
printing",
 "could not build module 'LLDBTestModule'",
 ],

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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Ben Barham via lldb-commits]

https://github.com/bnbarham unlabeled 
https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Ben Barham via lldb-commits]

bnbarham wrote:

Sorry about the noise here. I accidentally pushed over the same branch name.

https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Ben Barham via lldb-commits]

bnbarham wrote:

> Isn't that a better way to support the expression parsing logic where we 
> execute statements on the global scope to evaluate their results?

This is currently enabled during module loading, where we definitely don't want 
any change in behavior IMO. Perhaps we could enable it after? If we think this 
is useful to keep I'll need to look into how 
https://github.com/llvm/llvm-project/pull/65683 broke LLDB testing:
```
lldb-api.commands/expression/diagnostics.TestExprDiagnostics.py
lldb-api.lang/objc/modules.TestObjCModules.py
lldb-api.lang/objc/modules-incomplete.TestIncompleteModules.py
lldb-api.lang/objc/modules-non-objc-target.TestObjCModulesNonObjCTarget.py
lldb-api.lang/objc/modules-objc-property.TestModulesObjCProperty.py
```

That change should effectively be NFC as far as `-fincremental-extensions` is 
concerned, so if you have any ideas that would be appreciated :)

https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Vassil Vassilev via lldb-commits]

vgvassilev wrote:

@bnbarham, I think it would be useful to keep it. 

> If we think this is useful to keep I'll need to look into how 
> https://github.com/llvm/llvm-project/pull/65683 broke LLDB testing:

Incremental processing should also enable the llvm expression parser workflows. 
The advantage is that now we can write tests against `clang-repl` which 
combines the clang frontend and the llvm jit. If we capture the lldb workflows 
in these tests we will reduce the amount of regressions that inadvertently 
happen because of these two components are not tested together. 

> That change should effectively be NFC as far as -fincremental-extensions is 
> concerned, so if you have any ideas that would be appreciated :)

If you can provide links to the failing tests I can take a look.



https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Ben Barham via lldb-commits]

bnbarham wrote:

> If you can provide links to the failing tests I can take a look.

https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/60022/

https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] Revert "[lldb] Fix the way we set up the lldb modules infrastructure." (PR #66271)

[Vassil Vassilev via lldb-commits]

vgvassilev wrote:

Does that PR fix the tests you mentioned?

https://github.com/llvm/llvm-project/pull/66271
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[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Jonas Devlieghere via lldb-commits]

https://github.com/JDevlieghere updated 
https://github.com/llvm/llvm-project/pull/66218:

>From 9e3ccc3b7209ef92abedb3f7aa9b1ddd6687f410 Mon Sep 17 00:00:00 2001
From: Jonas Devlieghere 
Date: Wed, 13 Sep 2023 08:05:10 -0700
Subject: [PATCH] [lldb] Add a setting to customize the prompt color

Users often want to change the look of their prompt and currently the
only way to do that is by using ANSI escape codes in the prompt itself.
This is not only tedious, it also results in extra whitespace because
our Editline wrapper, when computing the cursor column, doesn't ignore
the invisible escape codes.

We already have various *-ansi-{prefix,suffix} settings that allow the
users to customize the color of auto-suggestions and progress events,
using mnemonics like ${ansi.fg.yellow}. This patch brings the same
mechanism to the prompt.

rdar://115390406
---
 lldb/include/lldb/Core/Debugger.h  |  4 
 lldb/include/lldb/Host/Editline.h  | 10 
 lldb/source/Core/CoreProperties.td |  8 +++
 lldb/source/Core/Debugger.cpp  | 19 +++
 lldb/source/Core/IOHandler.cpp |  9 +++-
 lldb/source/Host/common/Editline.cpp   | 32 +++---
 lldb/test/API/terminal/TestEditline.py | 24 +++
 7 files changed, 87 insertions(+), 19 deletions(-)

diff --git a/lldb/include/lldb/Core/Debugger.h 
b/lldb/include/lldb/Core/Debugger.h
index 5532cace606bfed..6096a42cd89e5a7 100644
--- a/lldb/include/lldb/Core/Debugger.h
+++ b/lldb/include/lldb/Core/Debugger.h
@@ -289,6 +289,10 @@ class Debugger : public 
std::enable_shared_from_this,
 
   llvm::StringRef GetPrompt() const;
 
+  llvm::StringRef GetPromptAnsiPrefix() const;
+
+  llvm::StringRef GetPromptAnsiSuffix() const;
+
   void SetPrompt(llvm::StringRef p);
   void SetPrompt(const char *) = delete;
 
diff --git a/lldb/include/lldb/Host/Editline.h 
b/lldb/include/lldb/Host/Editline.h
index 35fd179abb509c3..4a5f2a0d5753a6b 100644
--- a/lldb/include/lldb/Host/Editline.h
+++ b/lldb/include/lldb/Host/Editline.h
@@ -211,6 +211,14 @@ class Editline {
 m_fix_indentation_callback_chars = indent_chars;
   }
 
+  void SetPromptAnsiPrefix(std::string prefix) {
+m_prompt_ansi_prefix = std::move(prefix);
+  }
+
+  void SetPromptAnsiSuffix(std::string suffix) {
+m_prompt_ansi_suffix = std::move(suffix);
+  }
+
   void SetSuggestionAnsiPrefix(std::string prefix) {
 m_suggestion_ansi_prefix = std::move(prefix);
   }
@@ -399,6 +407,8 @@ class Editline {
   CompleteCallbackType m_completion_callback;
   SuggestionCallbackType m_suggestion_callback;
 
+  std::string m_prompt_ansi_prefix;
+  std::string m_prompt_ansi_suffix;
   std::string m_suggestion_ansi_prefix;
   std::string m_suggestion_ansi_suffix;
 
diff --git a/lldb/source/Core/CoreProperties.td 
b/lldb/source/Core/CoreProperties.td
index c7d69676f6e14c0..92884258347e9be 100644
--- a/lldb/source/Core/CoreProperties.td
+++ b/lldb/source/Core/CoreProperties.td
@@ -65,6 +65,14 @@ let Definition = "debugger" in {
 
DefaultEnumValue<"OptionValueString::eOptionEncodeCharacterEscapeSequences">,
 DefaultStringValue<"(lldb) ">,
 Desc<"The debugger command line prompt displayed for the user.">;
+  def PromptAnsiPrefix: Property<"prompt-ansi-prefix", "String">,
+Global,
+DefaultStringValue<"${ansi.faint}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately before the prompt.">;
+  def PromptAnsiSuffix: Property<"prompt-ansi-suffix", "String">,
+Global,
+DefaultStringValue<"${ansi.normal}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately after the prompt.">;
   def ScriptLanguage: Property<"script-lang", "Enum">,
 Global,
 DefaultEnumValue<"eScriptLanguagePython">,
diff --git a/lldb/source/Core/Debugger.cpp b/lldb/source/Core/Debugger.cpp
index 7ec1efc64fe9383..de3e17e834b5975 100644
--- a/lldb/source/Core/Debugger.cpp
+++ b/lldb/source/Core/Debugger.cpp
@@ -235,6 +235,13 @@ Status Debugger::SetPropertyValue(const ExecutionContext 
*exe_ctx,
   // use-color changed. Ping the prompt so it can reset the ansi terminal
   // codes.
   SetPrompt(GetPrompt());
+} else if (property_path ==
+   g_debugger_properties[ePropertyPromptAnsiPrefix].name ||
+   property_path ==
+   g_debugger_properties[ePropertyPromptAnsiSuffix].name) {
+  // Prompt colors changed. Ping the prompt so it can reset the ansi
+  // terminal codes.
+  SetPrompt(GetPrompt());
 } else if (property_path ==
g_debugger_properties[ePropertyUseSourceCache].name) {
   // use-source-cache changed. Wipe out the cache contents if it was
@@ -301,6 +308,18 @@ llvm::StringRef Debugger::GetPrompt() const {
   idx, g_debugger_properties[idx].default_cstr_value);
 }
 
+llvm::StringRef Debugger::GetPromptAnsiPrefix() const {
+  const uint32_t idx = ePropertyPr

[Lldb-commits] [lldb] [lldb] Add a setting to customize the prompt color (PR #66218)

[Jonas Devlieghere via lldb-commits]

https://github.com/JDevlieghere updated 
https://github.com/llvm/llvm-project/pull/66218:

>From bb1941649714c424bbcaab6c14892657aab55c93 Mon Sep 17 00:00:00 2001
From: Jonas Devlieghere 
Date: Wed, 13 Sep 2023 08:05:10 -0700
Subject: [PATCH] [lldb] Add a setting to customize the prompt color

Users often want to change the look of their prompt and currently the
only way to do that is by using ANSI escape codes in the prompt itself.
This is not only tedious, it also results in extra whitespace because
our Editline wrapper, when computing the cursor column, doesn't ignore
the invisible escape codes.

We already have various *-ansi-{prefix,suffix} settings that allow the
users to customize the color of auto-suggestions and progress events,
using mnemonics like ${ansi.fg.yellow}. This patch brings the same
mechanism to the prompt.

rdar://115390406
---
 lldb/include/lldb/Core/Debugger.h  |  4 
 lldb/include/lldb/Host/Editline.h  | 10 
 lldb/source/Core/CoreProperties.td |  8 +++
 lldb/source/Core/Debugger.cpp  | 19 +++
 lldb/source/Core/IOHandler.cpp |  9 +++-
 lldb/source/Host/common/Editline.cpp   | 32 +++---
 lldb/test/API/terminal/TestEditline.py | 24 +++
 7 files changed, 87 insertions(+), 19 deletions(-)

diff --git a/lldb/include/lldb/Core/Debugger.h 
b/lldb/include/lldb/Core/Debugger.h
index 5532cace606bfed..6096a42cd89e5a7 100644
--- a/lldb/include/lldb/Core/Debugger.h
+++ b/lldb/include/lldb/Core/Debugger.h
@@ -289,6 +289,10 @@ class Debugger : public 
std::enable_shared_from_this,
 
   llvm::StringRef GetPrompt() const;
 
+  llvm::StringRef GetPromptAnsiPrefix() const;
+
+  llvm::StringRef GetPromptAnsiSuffix() const;
+
   void SetPrompt(llvm::StringRef p);
   void SetPrompt(const char *) = delete;
 
diff --git a/lldb/include/lldb/Host/Editline.h 
b/lldb/include/lldb/Host/Editline.h
index 35fd179abb509c3..4a5f2a0d5753a6b 100644
--- a/lldb/include/lldb/Host/Editline.h
+++ b/lldb/include/lldb/Host/Editline.h
@@ -211,6 +211,14 @@ class Editline {
 m_fix_indentation_callback_chars = indent_chars;
   }
 
+  void SetPromptAnsiPrefix(std::string prefix) {
+m_prompt_ansi_prefix = std::move(prefix);
+  }
+
+  void SetPromptAnsiSuffix(std::string suffix) {
+m_prompt_ansi_suffix = std::move(suffix);
+  }
+
   void SetSuggestionAnsiPrefix(std::string prefix) {
 m_suggestion_ansi_prefix = std::move(prefix);
   }
@@ -399,6 +407,8 @@ class Editline {
   CompleteCallbackType m_completion_callback;
   SuggestionCallbackType m_suggestion_callback;
 
+  std::string m_prompt_ansi_prefix;
+  std::string m_prompt_ansi_suffix;
   std::string m_suggestion_ansi_prefix;
   std::string m_suggestion_ansi_suffix;
 
diff --git a/lldb/source/Core/CoreProperties.td 
b/lldb/source/Core/CoreProperties.td
index c7d69676f6e14c0..92884258347e9be 100644
--- a/lldb/source/Core/CoreProperties.td
+++ b/lldb/source/Core/CoreProperties.td
@@ -65,6 +65,14 @@ let Definition = "debugger" in {
 
DefaultEnumValue<"OptionValueString::eOptionEncodeCharacterEscapeSequences">,
 DefaultStringValue<"(lldb) ">,
 Desc<"The debugger command line prompt displayed for the user.">;
+  def PromptAnsiPrefix: Property<"prompt-ansi-prefix", "String">,
+Global,
+DefaultStringValue<"${ansi.faint}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately before the prompt.">;
+  def PromptAnsiSuffix: Property<"prompt-ansi-suffix", "String">,
+Global,
+DefaultStringValue<"${ansi.normal}">,
+Desc<"When in a color-enabled terminal, use the ANSI terminal code 
specified in this format immediately after the prompt.">;
   def ScriptLanguage: Property<"script-lang", "Enum">,
 Global,
 DefaultEnumValue<"eScriptLanguagePython">,
diff --git a/lldb/source/Core/Debugger.cpp b/lldb/source/Core/Debugger.cpp
index 7ec1efc64fe9383..de3e17e834b5975 100644
--- a/lldb/source/Core/Debugger.cpp
+++ b/lldb/source/Core/Debugger.cpp
@@ -235,6 +235,13 @@ Status Debugger::SetPropertyValue(const ExecutionContext 
*exe_ctx,
   // use-color changed. Ping the prompt so it can reset the ansi terminal
   // codes.
   SetPrompt(GetPrompt());
+} else if (property_path ==
+   g_debugger_properties[ePropertyPromptAnsiPrefix].name ||
+   property_path ==
+   g_debugger_properties[ePropertyPromptAnsiSuffix].name) {
+  // Prompt colors changed. Ping the prompt so it can reset the ansi
+  // terminal codes.
+  SetPrompt(GetPrompt());
 } else if (property_path ==
g_debugger_properties[ePropertyUseSourceCache].name) {
   // use-source-cache changed. Wipe out the cache contents if it was
@@ -301,6 +308,18 @@ llvm::StringRef Debugger::GetPrompt() const {
   idx, g_debugger_properties[idx].default_cstr_value);
 }
 
+llvm::StringRef Debugger::GetPromptAnsiPrefix() const {
+  const uint32_t idx = ePropertyPr