Re: [PATCH v2] Enable match.pd dumping with -fdump-tree-original

2022-05-09 Thread Richard Biener via Gcc-patches
On Fri, 6 May 2022, Alex Coplan wrote:

> This is a respin of:
> https://gcc.gnu.org/pipermail/gcc-patches/2022-March/592307.html
> that implements Richard's suggestion around the cgraph.cc change.
> Otherwise the patch is as before.
> 
> Bootstrapped and regtested on aarch64-linux-gnu, OK for trunk?

OK.

Thanks,
Richard.

> Thanks,
> Alex
> 
> --
> 
> I noticed that, while the C/C++ frontends invoke the GENERIC match.pd
> simplifications to do early folding, the debug output from
> generic-match.cc does not appear in the -fdump-tree-original output,
> even with -fdump-tree-original-folding or -fdump-tree-original-all. This
> patch fixes that.
> 
> For example, before the patch, for the following code:
> 
> int a[2];
> void bar ();
> void f()
> {
> if ((unsigned long)(a + 1) == 0)
> bar ();
> }
> 
> on AArch64 at -O0, -fdump-tree-original-all would give:
> 
> ;; Function f (null)
> ;; enabled by -tree-original
> 
> 
> {
>   if (0)
> {
>   bar ();
> }
> }
> 
> After the patch, we get:
> 
> Applying pattern match.pd:3774, generic-match.cc:24535
> Matching expression match.pd:146, generic-match.cc:23
> Applying pattern match.pd:5638, generic-match.cc:13388
> 
> ;; Function f (null)
> ;; enabled by -tree-original
> 
> 
> {
>   if (0)
> {
>   bar ();
> }
> }
> 
> The reason we don't get the match.pd output as it stands, is that the
> original dump is treated specially in c-opts.cc: it gets its own state
> which is independent from that used by other dump files in the compiler.
> Like most of the compiler, the generated generic-match.cc has code of
> the form:
> 
>   if (dump_file && (dump_flags & TDF_FOLDING))
> fprintf (dump_file, ...);
> 
> But, as it stands, -fdump-tree-original has its own FILE * and flags in
> c-opts.cc (original_dump_{file,flags}) and never touches the global
> dump_{file,flags} (managed by dumpfile.{h,cc}). This patch adjusts the
> code in c-opts.cc to use the main dump infrastructure used by the rest
> of the compiler, instead of treating the original dump specially.
> 
> We take the opportunity to make a small refactor: the code in
> c-gimplify.cc:c_genericize can, with this change, use the global dump
> infrastructure to get the original dump file and flags instead of using
> the bespoke get_dump_info function implemented in c-opts.cc. With this
> change, we remove the only use of get_dump_info, so this can be removed.
> 
> Note that we also fix a leak of the original dump file in
> c_common_parse_file. I originally thought it might be possible to
> achieve this with only one static call to dump_finish () (by simply
> moving it earlier in the loop), but unfortunately the dump file is
> required to be open while c_parse_final_cleanups runs, as we (e.g.)
> perform some template instantiations here for C++, which need to appear
> in the original dump file.
> 
> We adjust cgraph_node::get_create to avoid introducing noise in the
> original dump file: without this, these "Introduced new external node"
> lines start appearing in the original dump files, which breaks tests
> that do a scan-tree-dump-times on the original dump looking for a
> certain function name.
> 
> gcc/c-family/ChangeLog:
> 
>   * c-common.h (get_dump_info): Delete.
>   * c-gimplify.cc (c_genericize): Get TDI_original dump file info
>   from the global dump_manager instead of the (now obsolete)
>   get_dump_info.
>   * c-opts.cc (original_dump_file): Delete.
>   (original_dump_flags): Delete.
>   (c_common_parse_file): Switch to using global dump_manager to
>   manage the original dump file; fix leak of dump file.
>   (get_dump_info): Delete.
> 
> gcc/ChangeLog:
> 
>   * cgraph.cc (cgraph_node::get_create): Don't dump if the current
>   symtab state is PARSING.
> 

-- 
Richard Biener 
SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg,
Germany; GF: Ivo Totev; HRB 36809 (AG Nuernberg)


Re: [patch gcc13] middle-end/70090: Dynamic sizes for -fsanitize=object-size

2022-05-09 Thread Siddhesh Poyarekar

On 07/02/2022 17:37, Jakub Jelinek wrote:

On Mon, Feb 07, 2022 at 05:31:58PM +0530, Siddhesh Poyarekar wrote:

Use __builtin_dynamic_object_size to get object sizes for ubsan.

gcc/ChangeLog:

middle-end/70090
* ubsan.cc (ubsan_expand_objsize_ifn): Allow non-constant SIZE.
(instrument_object_size): Get dynamic object size expression.

gcc/testsuite/ChangeLog:

middle-end/70090
* gcc.dg/ubsan/object-size-dyn.c: New test.

Signed-off-by: Siddhesh Poyarekar 
---
Proposing for gcc13 since I reckoned this is not feasible for stage 4.


Ok for stage1.

Jakub



Hi Jakub, may I rebase and push this now?

Thanks,
Siddhesh


Re: [patch gcc13] middle-end/70090: Dynamic sizes for -fsanitize=object-size

2022-05-09 Thread Jakub Jelinek via Gcc-patches
On Mon, May 09, 2022 at 01:02:07PM +0530, Siddhesh Poyarekar wrote:
> On 07/02/2022 17:37, Jakub Jelinek wrote:
> > On Mon, Feb 07, 2022 at 05:31:58PM +0530, Siddhesh Poyarekar wrote:
> > > Use __builtin_dynamic_object_size to get object sizes for ubsan.
> > > 
> > > gcc/ChangeLog:
> > > 
> > >   middle-end/70090
> > >   * ubsan.cc (ubsan_expand_objsize_ifn): Allow non-constant SIZE.
> > >   (instrument_object_size): Get dynamic object size expression.
> > > 
> > > gcc/testsuite/ChangeLog:
> > > 
> > >   middle-end/70090
> > >   * gcc.dg/ubsan/object-size-dyn.c: New test.
> > > 
> > > Signed-off-by: Siddhesh Poyarekar 
> > > ---
> > > Proposing for gcc13 since I reckoned this is not feasible for stage 4.
> > 
> > Ok for stage1.
> > 
> > Jakub
> > 
> 
> Hi Jakub, may I rebase and push this now?

Yes.

Jakub



Re: [PATCH] Guard against applying scale with 0 denominator

2022-05-09 Thread Richard Biener via Gcc-patches
On Fri, May 6, 2022 at 10:32 PM Eugene Rozenfeld via Gcc-patches
 wrote:
>
> Calling count.apply_scale with a 0 denominator causes an assert.
> This change guards against that.
>
> Tested on x86_64-pc-linux-gnu.
>
> gcc/ChangeLog:
> * tree-loop-vect-manip.cc (vect_do_peeling): Guard against applying 
> scale with 0 denominator.
> ---
>  gcc/tree-vect-loop-manip.cc | 9 +
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/gcc/tree-vect-loop-manip.cc b/gcc/tree-vect-loop-manip.cc
> index 1d4337eb261..db54ae69e45 100644
> --- a/gcc/tree-vect-loop-manip.cc
> +++ b/gcc/tree-vect-loop-manip.cc
> @@ -2989,10 +2989,11 @@ vect_do_peeling (loop_vec_info loop_vinfo, tree 
> niters, tree nitersm1,
>  get lost if we scale down to 0.  */
>   basic_block *bbs = get_loop_body (epilog);
>   for (unsigned int i = 0; i < epilog->num_nodes; i++)
> -   bbs[i]->count = bbs[i]->count.apply_scale
> -(bbs[i]->count,
> - bbs[i]->count.apply_probability
> -   (prob_vector));
> +   if (bbs[i]->count.nonzero_p ())
> + bbs[i]->count = bbs[i]->count.apply_scale
> +  (bbs[i]->count,
> +   bbs[i]->count.apply_probability
> + (prob_vector));

So exactly what the FIXME in the comment above says happens.   It
might be better
to save/restore the old counts if the intent is to get them back.  I'm
not exactly
sure where the other scaling happens though.

Richard.



>   free (bbs);
> }
>
> --
> 2.25.1


Re: [PATCH] Optimize vec_setv8{hi,hf}_0 + pmovzxbq to pmovzxbq.

2022-05-09 Thread Uros Bizjak via Gcc-patches
On Mon, May 9, 2022 at 8:44 AM Hongtao Liu  wrote:
>
> On Mon, May 9, 2022 at 2:43 PM liuhongt via Gcc-patches
>  wrote:
> >
> > Clean up of 16-bit uppers is not needed for pmovzxbq/pmovsxbq.
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> > PR target/105072
> > * config/i386/sse.md (*sse4_1_v2qiv2di2_1):
> > New define_insn.
> > (*sse4_1_zero_extendv2qiv2di2_2): New pre_reload
> > define_insn_and_split.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/i386/pr105072.c: New test.

OK.

Thanks,
Uros.

> > ---
> >  gcc/config/i386/sse.md   | 45 +---
> >  gcc/testsuite/gcc.target/i386/pr105072.c | 24 +
> >  2 files changed, 65 insertions(+), 4 deletions(-)
> >  create mode 100644 gcc/testsuite/gcc.target/i386/pr105072.c
> >
> > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> > index 7b791def542..47f8b18b82e 100644
> > --- a/gcc/config/i386/sse.md
> > +++ b/gcc/config/i386/sse.md
> > @@ -22297,15 +22297,52 @@ (define_insn "sse4_1_v2qiv2di2"
> > (set_attr "prefix" "orig,orig,maybe_evex")
> > (set_attr "mode" "TI")])
> >
> > +(define_insn "*sse4_1_v2qiv2di2_1"
> > +  [(set (match_operand:V2DI 0 "register_operand" "=v")
> > +   (any_extend:V2DI
> > +(match_operand:V2QI 1 "memory_operand" "m")))]
> > +  "TARGET_SSE4_1 && "
> > +  "%vpmovbq\t{%1, %0|%0, %1}"
> > +  [(set_attr "type" "ssemov")
> > +   (set_attr "prefix_extra" "1")
> > +   (set_attr "prefix" "maybe_evex")
> > +   (set_attr "mode" "TI")])
> > +
> >  (define_expand "v2qiv2di2"
> >[(set (match_operand:V2DI 0 "register_operand")
> > (any_extend:V2DI
> > - (match_operand:V2QI 1 "register_operand")))]
> > +(match_operand:V2QI 1 "nonimmediate_operand")))]
> >"TARGET_SSE4_1"
> >  {
> > -  rtx op1 = force_reg (V2QImode, operands[1]);
> > -  op1 = lowpart_subreg (V16QImode, op1, V2QImode);
> > -  emit_insn (gen_sse4_1_v2qiv2di2 (operands[0], op1));
> > +  if (!MEM_P (operands[1]))
> > +{
> > +  rtx op1 = force_reg (V2QImode, operands[1]);
> > +  op1 = lowpart_subreg (V16QImode, op1, V2QImode);
> > +  emit_insn (gen_sse4_1_v2qiv2di2 (operands[0], op1));
> > +  DONE;
> > +}
> > +})
> > +
> > +(define_insn_and_split "*sse4_1_zero_extendv2qiv2di2_2"
> > +  [(set (match_operand:V2DI 0 "register_operand")
> > +   (zero_extend:V2DI
> > +(vec_select:V2QI
> > + (subreg:V16QI
> > +  (vec_merge:V8_128
> > +   (vec_duplicate:V8_128
> > +(match_operand: 1 "nonimmediate_operand"))
> > +   (match_operand:V8_128 2 "const0_operand")
> > +   (const_int 1)) 0)
> > + (parallel [(const_int 0) (const_int 1)]]
> > +  "TARGET_SSE4_1 && ix86_pre_reload_split ()"
> > +  "#"
> > +  "&& 1"
> > +  [(const_int 0)]
> > +{
> > +  if (!MEM_P (operands[1]))
> > +operands[1] = force_reg (mode, operands[1]);
> > +  operands[1] = lowpart_subreg (V2QImode, operands[1], 
> > mode);
> > +  emit_insn (gen_zero_extendv2qiv2di2 (operands[0], operands[1]));
> >DONE;
> >  })
> >
> > diff --git a/gcc/testsuite/gcc.target/i386/pr105072.c 
> > b/gcc/testsuite/gcc.target/i386/pr105072.c
> > new file mode 100644
> > index 000..54e229731b8
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr105072.c
> > @@ -0,0 +1,24 @@
> > +/* { dg-do compile } */
> > +/* { dg-options "-msse4.1 -O2" } */
> > +/* { dg-final { scan-assembler-times {(?n)pmovzxbq[ \t]+} "4" } } */
> > +/* { dg-final { scan-assembler-not {(?n)pinsrw[ \t]+} } } */
> > +
> > +#include
> > +
> > +__m128i foo (void *p){
> > +  return _mm_cvtepu8_epi64(_mm_loadu_si16(p));
> > +}
> > +
> > +__m128i foo2 (short a){
> > +  return _mm_cvtepu8_epi64(_mm_set_epi16(0, 0, 0, 0, 0, 0, 0, a));
> > +}
> > +
> > +__m128i
> > +foo3 (void *p){
> > +  return _mm_cvtepu8_epi64((__m128i)__extension__(__m128h) {*(_Float16 
> > const*)p, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f});
> > +}
> > +
> > +__m128i
> > +foo4 (_Float16 a){
> > +  return _mm_cvtepu8_epi64((__m128i)__extension__(__m128h) {a, 0.0f, 0.0f, 
> > 0.0f, 0.0f, 0.0f, 0.0f, 0.0f});
> > +}
> > --
> > 2.18.1
> >
>
>
> --
> BR,
> Hongtao


Re: [PATCH v2 2/2] [PR100106] Reject unaligned subregs when strict alignment is required

2022-05-09 Thread Richard Sandiford via Gcc-patches
Alexandre Oliva  writes:
> On May  5, 2022, Segher Boessenkool  wrote:
>
>> On Thu, May 05, 2022 at 08:59:21AM +0100, Richard Sandiford wrote:
>>> Alexandre Oliva via Gcc-patches  writes:
>>> I know this is the best being the enemy of the good, but given
>>> that we're at the start of stage 1, would it be feasible to try
>>> to get rid of (subreg (mem)) altogether for GCC 13?
>
>> Yes please!
>
> I'm not sure this is what you two had in mind, but the news I have is
> not great.  With this patch, x86_64 has some regressions in vector
> testcases (*), and ppc64le doesn't bootstrap (tsan_interface_atomic.o
> ends up with a nil SET_DEST in split all insns).  aarch64 is still
> building stage2.
>
> I'm not sure this is enough.  IIRC register allocation modifies in place
> pseudos that can't be assigned to hard registers, turning them into
> MEMs.  If that's so, SUBREGs of such pseudos will silently become
> SUBREGs of MEMs, and I don't know that they are validated again and, if
> so, what happens to those that fail validation.

Yeah, the changes would be a bit more invasive than this.  They would
touch more than just emit-rtl.cc.

> I kind of feel that this is more than I can tackle ATM, so I'd
> appreciate if someone else would take this up and drive this transition.

OK, I'll have a go if there's time.

Thanks,
Richard

> Disallow SUBREG of MEM
>
> Introduce TARGET_ALLOW_SUBREG_OF_MEM, defaulting to 0.
>
> Reject SUBREG of MEM regardless of alignment, unless the macro is
> defined to nonzero.
>
>
> for  gcc/ChangeLog
>
>   PR target/100106
>   * emit-rtl.cc (validate_subreg) [!TARGET_ALLOW_SUBREG_OF_MEM]:
>   Reject SUBREG of MEM.
> ---
>  gcc/emit-rtl.cc |8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc
> index 9c03e27894fff..f055179b3b8a6 100644
> --- a/gcc/emit-rtl.cc
> +++ b/gcc/emit-rtl.cc
> @@ -983,8 +983,12 @@ validate_subreg (machine_mode omode, machine_mode imode,
>return subreg_offset_representable_p (regno, imode, offset, omode);
>  }
>/* Do not allow SUBREG with stricter alignment than the inner MEM.  */
> -  else if (reg && MEM_P (reg) && STRICT_ALIGNMENT
> -&& MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode))
> +  else if (reg && MEM_P (reg)
> +#if TARGET_ALLOW_SUBREG_OF_MEM /* ??? Reject them all eventually.  */
> +&& STRICT_ALIGNMENT
> +&& MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)
> +#endif
> +)
>  return false;
>  
>/* The outer size must be ordered wrt the register size, otherwise
>
>
>
> (*) here are the x86_64 regressions introduced by the patch:
>
> + FAIL: gcc.target/i386/avx-2.c (internal compiler error: in gen_rtx_SUBREG, 
> at emit-rtl.cc:1030)
> + FAIL: gcc.target/i386/avx-2.c (test for excess errors)
> + FAIL: gcc.target/i386/sse-14.c (internal compiler error: in gen_rtx_SUBREG, 
> at emit-rtl.cc:1030)
> + FAIL: gcc.target/i386/sse-14.c (test for excess errors)
> + FAIL: gcc.target/i386/sse-22.c (internal compiler error: in gen_rtx_SUBREG, 
> at emit-rtl.cc:1030)
> + FAIL: gcc.target/i386/sse-22.c (test for excess errors)
> + FAIL: gcc.target/i386/sse-22a.c (internal compiler error: in 
> gen_rtx_SUBREG, at emit-rtl.cc:1030)
> + FAIL: gcc.target/i386/sse-22a.c (test for excess errors)


Re: [PATCH] [i386] Implement permutation with pslldq + psrldq + por when pshufb is not available.

2022-05-09 Thread Uros Bizjak via Gcc-patches
On Mon, May 9, 2022 at 7:24 AM Hongtao Liu  wrote:
>
> On Mon, May 9, 2022 at 1:22 PM liuhongt via Gcc-patches
>  wrote:
> >
> > pand/pandn may be used to clear upper/lower bits of the operands, in
> > that case there will be 4-5 instructions for permutation, and it's
> > still better than scalar codes.
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> >
> > gcc/ChangeLog:
> >
> > PR target/105354
> > * config/i386/i386-expand.cc
> > (expand_vec_perm_pslldq_psrldq_por): New function.
> > (ix86_expand_vec_perm_const_1): Try
> > expand_vec_perm_pslldq_psrldq_por for both 3-instruction and
> > 4/5-instruction sequence.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/i386/pr105354-1.c: New test.
> > * gcc.target/i386/pr105354-2.c: New test.

OK, with a slight adjustment below.

Thanks,
Uros.

> > ---
> >  gcc/config/i386/i386-expand.cc | 109 +
> >  gcc/testsuite/gcc.target/i386/pr105354-1.c | 130 +
> >  gcc/testsuite/gcc.target/i386/pr105354-2.c | 110 +
> >  3 files changed, 349 insertions(+)
> >  create mode 100644 gcc/testsuite/gcc.target/i386/pr105354-1.c
> >  create mode 100644 gcc/testsuite/gcc.target/i386/pr105354-2.c
> >
> > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
> > index bc806ffa283..49231e964ba 100644
> > --- a/gcc/config/i386/i386-expand.cc
> > +++ b/gcc/config/i386/i386-expand.cc
> > @@ -20941,6 +20941,108 @@ expand_vec_perm_vpshufb2_vpermq_even_odd (struct 
> > expand_vec_perm_d *d)
> >return true;
> >  }
> >
> > +/* Implement permutation with pslldq + psrldq + por when pshufb is not
> > +   available.  */
> > +static bool
> > +expand_vec_perm_pslldq_psrldq_por (struct expand_vec_perm_d *d, bool pandn)
> > +{
> > +  unsigned i, nelt = d->nelt;
> > +  unsigned start1, end1 = -1;
> > +  machine_mode vmode = d->vmode, imode;
> > +  int start2 = -1;
> > +  bool clear_op0, clear_op1;
> > +  unsigned inner_size;
> > +  rtx op0, op1, dop1;
> > +  rtx (*gen_vec_shr) (rtx, rtx, rtx);
> > +  rtx (*gen_vec_shl) (rtx, rtx, rtx);
> > +
> > +  /* pshufb is available under TARGET_SSSE3.  */
> > +  if (TARGET_SSSE3 || !TARGET_SSE2

You don't have to check for TARGET_SSSE3 here. The
expand_vec_perm_pslldq_psrldq_por should be positioned in
ix86_expand_vec_perm const_1 in a place where more optimal insn
sequence is already generated when TARGET_SSSE3 is available.

> > +  /* pshufd can be used for V4SI/V2DI under TARGET_SSE2.  */
> > +  || (vmode != E_V16QImode && vmode != E_V8HImode))
> > +return false;
> > +
> > +  start1 = d->perm[0];
> > +  for (i = 1; i < nelt; i++)
> > +{
> > +  if (d->perm[i] != d->perm[i-1] + 1)
> > +   {
> > + if (start2 == -1)
> > +   {
> > + start2 = d->perm[i];
> > + end1 = d->perm[i-1];
> > +   }
> > + else
> > +   return false;
> > +   }
> > +  else if (d->perm[i] >= nelt
> > +  && start2 == -1)
> > +   {
> > + start2 = d->perm[i];
> > + end1 = d->perm[i-1];
> > +   }
> > +}
> > +
> > +  clear_op0 = end1 != nelt - 1;
> > +  clear_op1 = start2 % nelt != 0;
> > +  /* pandn/pand is needed to clear upper/lower bits of op0/op1.  */
> > +  if (!pandn && (clear_op0 || clear_op1))
> > +return false;
> > +
> > +  if (d->testing_p)
> > +return true;
> > +
> > +  gen_vec_shr = vmode == E_V16QImode ? gen_vec_shr_v16qi : 
> > gen_vec_shr_v8hi;
> > +  gen_vec_shl = vmode == E_V16QImode ? gen_vec_shl_v16qi : 
> > gen_vec_shl_v8hi;
> > +  imode = GET_MODE_INNER (vmode);
> > +  inner_size = GET_MODE_BITSIZE (imode);
> > +  op0 = gen_reg_rtx (vmode);
> > +  op1 = gen_reg_rtx (vmode);
> > +
> > +  if (start1)
> > +emit_insn (gen_vec_shr (op0, d->op0, GEN_INT (start1 * inner_size)));
> > +  else
> > +emit_move_insn (op0, d->op0);
> > +
> > +  dop1 = d->op1;
> > +  if (d->one_operand_p)
> > +dop1 = d->op0;
> > +
> > +  int shl_offset = end1 - start1 + 1 - start2 % nelt;
> > +  if (shl_offset)
> > +emit_insn (gen_vec_shl (op1, dop1, GEN_INT (shl_offset * inner_size)));
> > +  else
> > +emit_move_insn (op1, dop1);
> > +
> > +  /* Clear lower/upper bits for op0/op1.  */
> > +  if (clear_op0 || clear_op1)
> > +{
> > +  rtx vec[16];
> > +  rtx const_vec;
> > +  rtx clear;
> > +  for (i = 0; i != nelt; i++)
> > +   {
> > + if (i < (end1 - start1 + 1))
> > +   vec[i] = gen_int_mode ((HOST_WIDE_INT_1U << inner_size) - 1, 
> > imode);
> > + else
> > +   vec[i] = CONST0_RTX (imode);
> > +   }
> > +  const_vec = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (nelt, vec));
> > +  const_vec = validize_mem (force_const_mem (vmode, const_vec));
> > +  clear = force_reg (vmode, const_vec);
> > +
> > +  if (clear_op0)
> > +   emit_move_insn (op0, gen_rtx_AND (vmode, op0, clear

Re: [PATCH] [i386] Optimize movzwl + vmovd/vmovq to vmovw.

2022-05-09 Thread Uros Bizjak via Gcc-patches
On Mon, May 9, 2022 at 4:03 AM liuhongt  wrote:
>
> Similarly optimize movl + vmovq to vmovd.
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
>
> gcc/ChangeLog:
>
> PR target/104915
> * config/i386/sse.md (*vec_set_0_zero_extendhi): New
> pre_reload define_insn_and_split.
> (*vec_setv2di_0_zero_extendhi_1): Ditto.
> (*vec_set_0_zero_extendsi): Ditto.
> (*vec_setv2di_0_zero_extendsi_1): Ditto.
> (ssewvecmode): New mode attr.
> (ssewvecmodelower): Ditto.
> (ssepackmodelower): Ditto.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/pr104915-vmovd.c: New test.
> * gcc.target/i386/pr104915-vmovw.c: New test.

I wonder if these define_insn_and_splits can instead be implemented
via combine splitter (which has the unfortunate limitation that the
output sequence has to be exactly two instructions, which is true in
your case). Combine splitter is preferred, since it splits immediately
and the resulting insns can be combined further during the combine
pass.

Uros.

> ---
>  gcc/config/i386/sse.md| 94 +++
>  .../gcc.target/i386/pr104915-vmovd.c  | 25 +
>  .../gcc.target/i386/pr104915-vmovw.c  | 45 +
>  3 files changed, 164 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr104915-vmovd.c
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr104915-vmovw.c
>
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index 7b791def542..2ad8a2b46b8 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -985,6 +985,15 @@ (define_mode_attr sseintvecmode
> (V32HI "V32HI") (V64QI "V64QI")
> (V32QI "V32QI") (V16QI "V16QI")])
>
> +;; Mapping of vector modes to an V*HImode of the same size
> +(define_mode_attr ssewvecmode
> +  [(V8DI "V32HI") (V4DI "V16HI") (V2DI "V8HI")
> +   (V16SI "V32HI") (V8SI "V16HI") (V4SI "V8HI")])
> +
> +(define_mode_attr ssewvecmodelower
> +  [(V8DI "v32hi") (V4DI "v16hi") (V2DI "v8hi")
> +   (V16SI "v32hi") (V8SI "v16hi") (V4SI "v8hi")])
> +
>  (define_mode_attr sseintvecmode2
>[(V8DF "XI") (V4DF "OI") (V2DF "TI")
> (V8SF "OI") (V4SF "TI")
> @@ -1194,6 +1203,11 @@ (define_mode_attr ssepackmode
> (V16HI "V32QI") (V8SI "V16HI") (V4DI "V8SI")
> (V32HI "V64QI") (V16SI "V32HI") (V8DI "V16SI")])
>
> +(define_mode_attr ssepackmodelower
> +  [(V8HI "v16qi") (V4SI "v8hi") (V2DI "v4si")
> +   (V16HI "v32qi") (V8SI "v16hi") (V4DI "v8si")
> +   (V32HI "v64qi") (V16SI "v32hi") (V8DI "v16si")])
> +
>  ;; Mapping of the max integer size for xop rotate immediate constraint
>  (define_mode_attr sserotatemax
>[(V16QI "7") (V8HI "15") (V4SI "31") (V2DI "63")])
> @@ -10681,6 +10695,46 @@ (define_insn "vec_set_0"
> (set_attr "prefix" "evex")
> (set_attr "mode" "HF")])
>
> +(define_insn_and_split "*vec_set_0_zero_extendhi"
> +  [(set (match_operand:VI48_AVX512F 0 "register_operand")
> +   (vec_merge:VI48_AVX512F
> +(vec_duplicate:VI48_AVX512F
> + (zero_extend:
> +   (match_operand:HI 1 "nonimmediate_operand")))
> +(match_operand:VI48_AVX512F 2 "const0_operand")
> +(const_int 1)))]
> +  "TARGET_AVX512FP16 && ix86_pre_reload_split ()"
> +  "#"
> +  "&& 1"
> +  [(const_int 0)]
> +{
> +  rtx dest = gen_reg_rtx (mode);
> +  emit_insn (gen_vec_set_0 (dest,
> + CONST0_RTX (mode),
> + operands[1]));
> +  emit_move_insn (operands[0],
> + lowpart_subreg (mode, dest, mode));
> +  DONE;
> +})
> +
> +(define_insn_and_split "*vec_setv2di_0_zero_extendhi_1"
> +  [(set (match_operand:V2DI 0 "register_operand")
> +   (vec_concat:V2DI
> + (zero_extend:DI
> +   (match_operand:HI 1 "nonimmediate_operand"))
> + (const_int 0)))]
> +  "TARGET_AVX512FP16 && ix86_pre_reload_split ()"
> +  "#"
> +  "&& 1"
> +  [(const_int 0)]
> +{
> +  rtx dest = gen_reg_rtx (V8HImode);
> +  emit_insn (gen_vec_setv8hi_0 (dest, CONST0_RTX (V8HImode), operands[1]));
> +  emit_move_insn (operands[0],
> + lowpart_subreg (V2DImode, dest, V8HImode));
> +  DONE;
> +})
> +
>  (define_insn "avx512fp16_movsh"
>[(set (match_operand:V8HF 0 "register_operand" "=v")
> (vec_merge:V8HF
> @@ -10750,6 +10804,46 @@ (define_insn "vec_set_0"
>]
>(symbol_ref "true")))])
>
> +(define_insn_and_split "*vec_set_0_zero_extendsi"
> +  [(set (match_operand:VI8 0 "register_operand")
> +   (vec_merge:VI8
> +(vec_duplicate:VI8
> + (zero_extend:DI
> +   (match_operand:SI 1 "nonimmediate_operand")))
> +(match_operand:VI8 2 "const0_operand")
> +(const_int 1)))]
> +  "TARGET_SSE2 && ix86_pre_reload_split ()"
> +  "#"
> +  "&& 1"
> +  [(const_int 0)]
> +{
> +  rtx dest = gen_reg_rtx (mode);
> +  emit_insn (gen_vec_set_0 (dest,
> +   

New French PO file for 'gcc' (version 12.1.0)

2022-05-09 Thread Translation Project Robot
Hello, gentle maintainer.

This is a message from the Translation Project robot.

A revised PO file for textual domain 'gcc' has been submitted
by the French team of translators.  The file is available at:

https://translationproject.org/latest/gcc/fr.po

(This file, 'gcc-12.1.0.fr.po', has just now been sent to you in
a separate email.)

All other PO files for your package are available in:

https://translationproject.org/latest/gcc/

Please consider including all of these in your next release, whether
official or a pretest.

Whenever you have a new distribution with a new version number ready,
containing a newer POT file, please send the URL of that distribution
tarball to the address below.  The tarball may be just a pretest or a
snapshot, it does not even have to compile.  It is just used by the
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If any question arises, please contact the translation coordinator.

Thank you for all your work,

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name of your translation coordinator.




Re: [PATCH] Come up with {,UN}LIKELY macros.

2022-05-09 Thread Martin Liška
On 5/6/22 08:19, Richard Biener wrote:
> But I would have been fine with LIKELY as well.

Ok, so let's go with this version.
I'm going to install the patch.

Martin


Re: [PATCH] Remove conditional STATIC_ASSERT.

2022-05-09 Thread Martin Liška
On 5/5/22 15:08, Richard Biener wrote:
> On Thu, May 5, 2022 at 2:41 PM Martin Liška  wrote:
>>
>> On 5/5/22 14:29, Richard Biener wrote:
>>> Can we then use static_assert (...) instead and remove the
>>> macro?
>>
>> Oh yes, we can ;)
>>
>>> Do we have C compiled code left (I think we might,
>>> otherwise we'd not have __cplusplus guards in system.h),
>>> in which case the #if should change to #ifdef __cplusplus?
>>
>> No, there's no such a consumer of the macro.
> 
> OK, but for C uses it should still be different so my suggestion
> to change to #ifdef __cplusplus remains.  OTOH then the change
> is somewhat pointless.

Sure, so something like this?

Thanks,
Martin

> 
>> What about the updated version of the patch?
>>
>> Cheers,
>> Martin
From 100b7a3de69605ab7e80680e6a6e651e31366bc5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Li=C5=A1ka?= 
Date: Thu, 5 May 2022 14:18:58 +0200
Subject: [PATCH] Simplify STATIC_ASSERT macro.

For C++, use always __static_assert and for C, use the negative array
index.

gcc/ChangeLog:

	* basic-block.h (STATIC_ASSERT): Use normal STATIC_ASSERT.
	* system.h (STATIC_ASSERT): Define as static_assert for C++
	and fallback to array index in C.
---
 gcc/basic-block.h | 5 +
 gcc/system.h  | 3 +--
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index e3fff1f6975..21a9b24dbf9 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -158,10 +158,7 @@ struct GTY((chain_next ("%h.next_bb"), chain_prev ("%h.prev_bb"))) basic_block_d
 /* This ensures that struct gimple_bb_info is smaller than
struct rtl_bb_info, so that inlining the former into basic_block_def
is the better choice.  */
-typedef int __assert_gimple_bb_smaller_rtl_bb
-  [(int) sizeof (struct rtl_bb_info)
-   - (int) sizeof (struct gimple_bb_info)];
-
+STATIC_ASSERT (sizeof (rtl_bb_info) >= sizeof (gimple_bb_info));
 
 #define BB_FREQ_MAX 1
 
diff --git a/gcc/system.h b/gcc/system.h
index 1121af485a4..1c783c5331d 100644
--- a/gcc/system.h
+++ b/gcc/system.h
@@ -835,8 +835,7 @@ extern void fancy_abort (const char *, int, const char *)
 #define STATIC_CONSTANT_P(X) (false && (X))
 #endif
 
-/* static_assert (COND, MESSAGE) is available in C++11 onwards.  */
-#if __cplusplus >= 201103L
+#ifdef __cplusplus
 #define STATIC_ASSERT(X) \
   static_assert ((X), #X)
 #else
-- 
2.36.0



[PATCH] opts: do not allow Separate+Joined ending with =

2022-05-09 Thread Martin Liška
Do not allow strange option format:
-msmall-data-limit= 11.

For -output-pch we need to use Separate syntax as lang spec
rules automatically append a space.

Patch can bootstrap on x86_64-linux-gnu and survives regression tests.

Ready to be installed?
Thanks,
Martin

PR target/105355

gcc/ChangeLog:

* config/riscv/riscv.opt: Remove Separate from
-msmall-data-limit=.
* optc-gen.awk: Report error for the described situation.
* gcc.cc: Use Separate syntax.
* opts.cc (gen_command_line_string): Change option name.

gcc/c-family/ChangeLog:

* c-opts.cc (c_common_handle_option): Change option name.
* c.opt: Remove Joined and use Separate option.

gcc/cp/ChangeLog:

* lang-specs.h: Use Separate syntax.

gcc/objc/ChangeLog:

* lang-specs.h: Use Separate syntax.

gcc/objcp/ChangeLog:

* lang-specs.h: Use Separate syntax.
---
 gcc/c-family/c-opts.cc | 2 +-
 gcc/c-family/c.opt | 4 ++--
 gcc/config/riscv/riscv.opt | 2 +-
 gcc/cp/lang-specs.h| 6 +++---
 gcc/gcc.cc | 8 
 gcc/objc/lang-specs.h  | 8 
 gcc/objcp/lang-specs.h | 2 +-
 gcc/optc-gen.awk   | 7 +++
 gcc/opts.cc| 2 +-
 9 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/gcc/c-family/c-opts.cc b/gcc/c-family/c-opts.cc
index a341a061758..da377f09bba 100644
--- a/gcc/c-family/c-opts.cc
+++ b/gcc/c-family/c-opts.cc
@@ -303,7 +303,7 @@ c_common_handle_option (size_t scode, const char *arg, 
HOST_WIDE_INT value,
   result = false;
   break;
 
-case OPT__output_pch_:
+case OPT__output_pch:
   pch_file = arg;
   break;
 
diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt
index 07da40ef43b..035b1de0d84 100644
--- a/gcc/c-family/c.opt
+++ b/gcc/c-family/c.opt
@@ -135,8 +135,8 @@ C ObjC C++ ObjC++ Separate Alias(o)
 -output=
 C ObjC C++ ObjC++ Joined Alias(o)
 
--output-pch=
-C ObjC C++ ObjC++ Joined Separate
+-output-pch
+C ObjC C++ ObjC++ Separate
 
 -pedantic
 C ObjC C++ ObjC++ Alias(pedantic)
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 492aad12324..84c8cf5a2de 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -92,7 +92,7 @@ Target RejectNegative Joined Var(riscv_cpu_string)
 -mcpu=PROCESSORUse architecture of and optimize the output for 
PROCESSOR.
 
 msmall-data-limit=
-Target Joined Separate UInteger Var(g_switch_value) Init(8)
+Target Joined UInteger Var(g_switch_value) Init(8)
 -msmall-data-limit=N   Put global and static data smaller than  bytes 
into a special section (on some targets).
 
 msave-restore
diff --git a/gcc/cp/lang-specs.h b/gcc/cp/lang-specs.h
index f35c9fab76b..dbda5a7b2e4 100644
--- a/gcc/cp/lang-specs.h
+++ b/gcc/cp/lang-specs.h
@@ -55,7 +55,7 @@ along with GCC; see the file COPYING3.  If not see
   "  %{!fsyntax-only:"
   "%{!S:-o %g.s%V}"
   "%{!fmodule-*:%{!fmodules-*:%{!fdump-ada-spec*:"
-  " %{!o*:--output-pch=%i.gch}%W{o*:--output-pch=%*}"
+  " %{!o*:--output-pch %i.gch}%W{o*:--output-pch %*}"
   "}}}",
  CPLUSPLUS_CPP_SPEC, 0, 0},
   {"@c++-system-header",
@@ -76,7 +76,7 @@ along with GCC; see the file COPYING3.  If not see
   "  %{!fsyntax-only:"
   "%{!S:-o %g.s%V}"
   "%{!fmodule-*:%{!fmodules-*:%{!fdump-ada-spec*:"
-  " %{!o*:--output-pch=%i.gch}%W{o*:--output-pch=%*}"
+  " %{!o*:--output-pch %i.gch}%W{o*:--output-pch %*}"
   "}}}",
  CPLUSPLUS_CPP_SPEC, 0, 0},
   {"@c++-user-header",
@@ -96,7 +96,7 @@ along with GCC; see the file COPYING3.  If not see
   "  %{!fsyntax-only:"
   "%{!S:-o %g.s%V}"
   "%{!fmodule-*:%{!fmodules-*:%{!fdump-ada-spec*:"
-  " %{!o*:--output-pch=%i.gch}%W{o*:--output-pch=%*}"
+  " %{!o*:--output-pch %i.gch}%W{o*:--output-pch %*}"
   "}}}",
  CPLUSPLUS_CPP_SPEC, 0, 0},
   {"@c++",
diff --git a/gcc/gcc.cc b/gcc/gcc.cc
index bb07cc244e3..299e09c4f54 100644
--- a/gcc/gcc.cc
+++ b/gcc/gcc.cc
@@ -1462,13 +1462,13 @@ static const struct compiler default_compilers[] =
cc1 -fpreprocessed %{save-temps*:%b.i} %{!save-temps*:%g.i} 
\
%(cc1_options)\
%{!fsyntax-only:%{!S:-o %g.s} \
-   %{!fdump-ada-spec*:%{!o*:--output-pch=%i.gch}\
-  %W{o*:--output-pch=%*}}%V}}\
+   %{!fdump-ada-spec*:%{!o*:--output-pch %i.gch}\
+  %W{o*:--output-pch %*}}%V}}\
  %{!save-temps*:%{!traditional-cpp:%{!no-integrated-cpp:\
cc1 %(cpp_unique_options) %(cc1_options)\
%{!fsyntax-only:%{!S:-o %g.s} \
-   %{!fdump-ada-spec*:%{!o*:--output-pch=%i.gch}\
-

[PATCH] limits.h, syslimits.h: do not install to include-fixed

2022-05-09 Thread Martin Liška
Hi.

The header files limits.h are syslimits.h are not a product of fix-includes,
so let's install it to a proper include location.

Patch can bootstrap on x86_64-linux-gnu and survives regression tests.

Ready to be installed?
Thanks,
Martin

gcc/ChangeLog:

* Makefile.in: Install limits.h, syslimits.h to includes
and not include-fixed.
---
 gcc/Makefile.in | 30 ++
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 31ff95500c9..10abb29fa59 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -3151,19 +3151,19 @@ stmp-int-hdrs: $(STMP_FIXINC) $(T_GLIMITS_H) 
$(T_STDINT_GCC_H) $(USER_H) fixinc_
set -e; for ml in `cat fixinc_list`; do \
  sysroot_headers_suffix=`echo $${ml} | sed -e 's/;.*$$//'`; \
  multi_dir=`echo $${ml} | sed -e 's/^[^;]*;//'`; \
- fix_dir=include-fixed$${multi_dir}; \
+ include_dir=include$${multi_dir}; \
  if $(LIMITS_H_TEST) ; then \
cat $(srcdir)/limitx.h $(T_GLIMITS_H) $(srcdir)/limity.h > 
tmp-xlimits.h; \
  else \
cat $(T_GLIMITS_H) > tmp-xlimits.h; \
  fi; \
- $(mkinstalldirs) $${fix_dir}; \
- chmod a+rx $${fix_dir} || true; \
+ $(mkinstalldirs) $${include_dir}; \
+ chmod a+rx $${include_dir} || true; \
  $(SHELL) $(srcdir)/../move-if-change \
tmp-xlimits.h  tmp-limits.h; \
- rm -f $${fix_dir}/limits.h; \
- cp -p tmp-limits.h $${fix_dir}/limits.h; \
- chmod a+r $${fix_dir}/limits.h; \
+ rm -f $${include_dir}/limits.h; \
+ cp -p tmp-limits.h $${include_dir}/limits.h; \
+ chmod a+r $${include_dir}/limits.h; \
done
 # Install the README
rm -f include-fixed/README
@@ -3229,6 +3229,9 @@ stmp-fixinc: gsyslimits.h macro_list fixinc_list \
rm -rf include-fixed; mkdir include-fixed
-chmod a+rx include-fixed
if [ -d ../prev-gcc ]; then \
+ mkdir `pwd`/../gcc/include && \
+ cp ../prev-gcc/include/limits.h `pwd`/../gcc/include && \
+ cp ../prev-gcc/include/syslimits.h `pwd`/../gcc/include && \
  cd ../prev-gcc && \
  $(MAKE) real-$(INSTALL_HEADERS_DIR) DESTDIR=`pwd`/../gcc/ \
libsubdir=. ; \
@@ -3237,6 +3240,7 @@ stmp-fixinc: gsyslimits.h macro_list fixinc_list \
sysroot_headers_suffix=`echo $${ml} | sed -e 's/;.*$$//'`; \
multi_dir=`echo $${ml} | sed -e 's/^[^;]*;//'`; \
fix_dir=include-fixed$${multi_dir}; \
+   include_dir=include$${multi_dir}; \
if ! $(inhibit_libc) && test ! -d ${BUILD_SYSTEM_HEADER_DIR}; then \
  echo The directory that should contain system headers does not 
exist: >&2 ; \
  echo "  ${BUILD_SYSTEM_HEADER_DIR}" >&2 ; \
@@ -3253,13 +3257,15 @@ stmp-fixinc: gsyslimits.h macro_list fixinc_list \
  cd $(build_objdir)/fixincludes && \
  $(SHELL) ./fixinc.sh "$${gcc_dir}/$${fix_dir}" \
$(BUILD_SYSTEM_HEADER_DIR) $(OTHER_FIXINCLUDES_DIRS) ); \
-   rm -f $${fix_dir}/syslimits.h; \
-   if [ -f $${fix_dir}/limits.h ]; then \
- mv $${fix_dir}/limits.h $${fix_dir}/syslimits.h; \
+   $(mkinstalldirs) $${include_dir}; \
+   chmod a+rx $${include_dir} || true; \
+   rm -f $${include_dir}/syslimits.h; \
+   if [ -f $${include_dir}/limits.h ]; then \
+ mv $${include_dir}/limits.h $${include_dir}/syslimits.h; \
else \
- cp $(srcdir)/gsyslimits.h $${fix_dir}/syslimits.h; \
+ cp $(srcdir)/gsyslimits.h $${include_dir}/syslimits.h; \
fi; \
-   chmod a+r $${fix_dir}/syslimits.h; \
+   chmod a+r $${include_dir}/syslimits.h; \
  done; \
fi
$(STAMP) stmp-fixinc
@@ -3977,7 +3983,7 @@ install-mkheaders: stmp-int-hdrs install-itoolsdirs \
set -e; for ml in `cat fixinc_list`; do \
  multi_dir=`echo $${ml} | sed -e 's/^[^;]*;//'`; \
  $(mkinstalldirs) $(DESTDIR)$(itoolsdatadir)/include$${multi_dir}; \
- $(INSTALL_DATA) include-fixed$${multi_dir}/limits.h 
$(DESTDIR)$(itoolsdatadir)/include$${multi_dir}/limits.h; \
+ $(INSTALL_DATA) include$${multi_dir}/limits.h 
$(DESTDIR)$(itoolsdatadir)/include$${multi_dir}/limits.h; \
done
$(INSTALL_SCRIPT) $(srcdir)/../mkinstalldirs \
$(DESTDIR)$(itoolsdir)/mkinstalldirs ; \
-- 
2.36.0



[PATCH] configure: add --disable-fix-includes

2022-05-09 Thread Martin Liška
Right now, fixinclude takes about 11 seconds on my machine, where
it reads 130MB of header files.

The number of fixed headers is negligible without any significant
change.

Patch can bootstrap on x86_64-linux-gnu and survives regression tests.

Ready to be installed?
Thanks,
Martin

fixincludes/ChangeLog:

* fixinc.in: Add early exit.

gcc/ChangeLog:

* Makefile.in: Support disable_fix_includes.
* configure.ac: Add --disable-fix-includes.
* configure: Regenerate.
---
 fixincludes/fixinc.in |  6 ++
 gcc/Makefile.in   |  6 --
 gcc/configure | 21 +++--
 gcc/configure.ac  |  6 ++
 4 files changed, 35 insertions(+), 4 deletions(-)

diff --git a/fixincludes/fixinc.in b/fixincludes/fixinc.in
index 0c3066452c6..3ebcd346d41 100755
--- a/fixincludes/fixinc.in
+++ b/fixincludes/fixinc.in
@@ -63,6 +63,12 @@ else
   esac
 fi
 
+if test "x$DISABLE_FIX_INCLUDES" = "xyes"
+then
+  echo "Skipping fixincludes"
+  exit 0
+fi
+
 # Define what target system we're fixing.
 #
 if test -r ./Makefile; then
diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 31ff95500c9..c77f1cc644d 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -401,6 +401,8 @@ PLUGINLIBS = @pluginlibs@
 
 enable_plugin = @enable_plugin@
 
+disable_fix_includes = @disable_fix_includes@
+
 # On MinGW plugin installation involves installing import libraries.
 ifeq ($(enable_plugin),yes)
   plugin_implib := $(if $(strip $(filter mingw%,$(host_os))),yes,no)
@@ -3248,8 +3250,8 @@ stmp-fixinc: gsyslimits.h macro_list fixinc_list \
chmod a+rx $${fix_dir} || true; \
(TARGET_MACHINE='$(target)'; srcdir=`cd $(srcdir); ${PWD_COMMAND}`; 
\
  SHELL='$(SHELL)'; MACRO_LIST=`${PWD_COMMAND}`/macro_list ; \
- gcc_dir=`${PWD_COMMAND}` ; \
- export TARGET_MACHINE srcdir SHELL MACRO_LIST && \
+ gcc_dir=`${PWD_COMMAND}` ; 
DISABLE_FIX_INCLUDES=${disable_fix_includes} \
+ export TARGET_MACHINE srcdir SHELL MACRO_LIST 
DISABLE_FIX_INCLUDES && \
  cd $(build_objdir)/fixincludes && \
  $(SHELL) ./fixinc.sh "$${gcc_dir}/$${fix_dir}" \
$(BUILD_SYSTEM_HEADER_DIR) $(OTHER_FIXINCLUDES_DIRS) ); \
diff --git a/gcc/configure b/gcc/configure
index bd4d4721868..843ab02bfa3 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -839,6 +839,7 @@ with_float
 with_cpu
 enable_multiarch
 enable_multilib
+disable_fix_includes
 coverage_flags
 valgrind_command
 valgrind_path_defines
@@ -958,6 +959,7 @@ enable_werror_always
 enable_checking
 enable_coverage
 enable_gather_detailed_mem_stats
+enable_disable_fix_includes
 enable_valgrind_annotations
 enable_multilib
 enable_multiarch
@@ -1688,6 +1690,7 @@ Optional Features:
   Values are opt, noopt, default is noopt
   --enable-gather-detailed-mem-stats
   enable detailed memory allocation stats gathering
+  --disable-fix-includes  skip fixing of includes
   --enable-valgrind-annotations
   enable valgrind runtime interaction
   --enable-multilib   enable library support for multiple ABIs
@@ -7780,6 +7783,20 @@ cat >>confdefs.h <<_ACEOF
 _ACEOF
 
 
+# Check whether --enable-disable-fix-includes was given.
+if test "${enable_disable_fix_includes+set}" = set; then :
+  enableval=$enable_disable_fix_includes;
+else
+  disable_fix_includes=yes
+fi
+
+
+cat >>confdefs.h <<_ACEOF
+#define FIX_INCLUDES $disable_fix_includes
+_ACEOF
+
+
+
 # Check whether --enable-valgrind-annotations was given.
 if test "${enable_valgrind_annotations+set}" = set; then :
   enableval=$enable_valgrind_annotations;
@@ -19659,7 +19676,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 19662 "configure"
+#line 19679 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -19765,7 +19782,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 19768 "configure"
+#line 19785 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 1171c946e6e..6015e403aa9 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -842,6 +842,12 @@ gather_stats=`if test $enable_gather_detailed_mem_stats != 
no; then echo 1; else
 AC_DEFINE_UNQUOTED(GATHER_STATISTICS, $gather_stats,
 [Define to enable detailed memory allocation stats gathering.])
 
+AC_ARG_ENABLE(disable-fix-includes,
+[AS_HELP_STRING([--disable-fix-includes],
+   [skip fixing of includes])], [],
+[disable_fix_includes=yes])
+AC_SUBST(disable_fix_includes)
+
 AC_ARG_ENABLE(valgrind-annotations,
 [AS_HELP_STRING([--enable-valgrind-annotations],
[enable valgrind runtime interaction])], [],
-- 
2.36.0



Re: [PATCH] lto-plugin: add support for feature detection

2022-05-09 Thread Martin Liška
CCing mold's author.

On 5/6/22 16:46, Alexander Monakov wrote:
> 
> 
> On Thu, 5 May 2022, Martin Liška wrote:
> 
>> On 5/5/22 12:52, Alexander Monakov wrote:
>>> Feels a bit weird to ask, but before entertaining such an API extension,
>>> can we step back and understand the v3 variant of get_symbols? It is not
>>> documented, and from what little I saw I did not get the "motivation" for
>>> its existence (what it is doing that couldn't be done with the v2 api).
>>
>> Please see here:
>> https://github.com/rui314/mold/issues/181#issuecomment-1037927757
> 
> Thanks. I've also re-read [1] and [2] which provided some relevant ideas.
> 
> [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86490
> [2] https://sourceware.org/bugzilla/show_bug.cgi?id=23411
> 
> 
> OK, so the crux of the issue is that sometimes the linker needs to feed the
> compiler plugin with LTO .o files extracted from static archives. This is
> not really obvious, because normally .a archives have an index that enumerates
> symbols defined/used by its .o files, and even during LTO the linker can 
> simply
> consult the index to find out which members to extract.  In theory, at least.
> 
> The theory breaks in the following cases:
> 
>  - ld.bfd and common symbols (I wonder if weak/comdat code is also affected?):
>  archive index does not indicate which definitions are common, so ld.bfd
>  extracts the member and feeds it to the plugin to find out;
> 
>  - ld.gold and emulated archives via --start-lib a.o b.o ... --end-lib: here
>  there's no index to consult and ld.gold feeds each .o to the plugin.
> 
> In those cases it may happen that the linker extracts an .o file that would
> not be extracted during non-LTO link, and if that happens, the linker needs to
> inform the plugin. This is not the same as marking each symbol from spuriously
> extracted .o file as PREEMPTED when the .o file has constructors (the plugin
> will assume the constructors are kept while the linker needs to discard them).
> 
> So get_symbols_v3 allows the linker to discard an LTO .o file to solve this.
> 
> In absence of get_symbols_v3 mold tries to ensure correctness by restarting
> itself while appending a list of .o files to be discarded to its command line.
> 
> I wonder if mold can invoke plugin cleanup callback to solve this without
> restarting.
> 
> (also, hm, it seems to confirm my idea that LTO .o files should have had the
> correct symbol table so normal linker algorithms would work)
> 
> Hopefully this was useful.
> Alexander



[Ada] Stabilize exit code on close process

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Call Kill before close input handler in Close routine.  Otherwise close
input handler can terminate process before Kill and exit code became
unpredictable.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* libgnat/g-expect.adb (Close): Call Kill before Close_Input.diff --git a/gcc/ada/libgnat/g-expect.adb b/gcc/ada/libgnat/g-expect.adb
--- a/gcc/ada/libgnat/g-expect.adb
+++ b/gcc/ada/libgnat/g-expect.adb
@@ -222,6 +222,10 @@ package body GNAT.Expect is
   Next_Filter: Filter_List;
 
begin
+  if Descriptor.Pid > 0 then  --  see comment in Send_Signal
+ Kill (Descriptor.Pid, Sig_Num => 9, Close => 0);
+  end if;
+
   Close_Input (Descriptor);
 
   if Descriptor.Error_Fd /= Descriptor.Output_Fd
@@ -234,12 +238,6 @@ package body GNAT.Expect is
  Close (Descriptor.Output_Fd);
   end if;
 
-  --  ??? Should have timeouts for different signals
-
-  if Descriptor.Pid > 0 then  --  see comment in Send_Signal
- Kill (Descriptor.Pid, Sig_Num => 9, Close => 0);
-  end if;
-
   GNAT.OS_Lib.Free (Descriptor.Buffer);
   Descriptor.Buffer_Size := 0;
 




[Ada] Remove doubly-negated tests for empty lists

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Replace "not Is_Non_Empty_List (...)" with "Is_Empty_List (...)".

Code cleanup; semantics is unaffected.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_ch5.adb (Update_Choice_Index): Simplify condition.
* sem_ch8.adb (Attribute_Renaming): Likewise.diff --git a/gcc/ada/exp_ch5.adb b/gcc/ada/exp_ch5.adb
--- a/gcc/ada/exp_ch5.adb
+++ b/gcc/ada/exp_ch5.adb
@@ -3563,8 +3563,7 @@ package body Exp_Ch5 is
 --  is ok here.
 --
 pragma Assert
-  (not Is_Non_Empty_List
- (Component_Associations (Pattern)));
+  (Is_Empty_List (Component_Associations (Pattern)));
 
 declare
Agg_Length : constant Node_Id :=


diff --git a/gcc/ada/sem_ch8.adb b/gcc/ada/sem_ch8.adb
--- a/gcc/ada/sem_ch8.adb
+++ b/gcc/ada/sem_ch8.adb
@@ -4532,7 +4532,7 @@ package body Sem_Ch8 is
   --  have at least one formal parameter, with the exceptions of the GNAT
   --  attribute 'Img, which GNAT treats as renameable.
 
-  if not Is_Non_Empty_List (Parameter_Specifications (Spec)) then
+  if Is_Empty_List (Parameter_Specifications (Spec)) then
  if Aname /= Name_Img then
 Error_Msg_N
   ("subprogram renaming an attribute must have formals", N);




[Ada] Remove unused parameter from __gnat_kill

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Remove close parameter from __gnat_kill because it is not used in
implementation.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* adaint.c (__gnat_kill): Remove close parameter.
(__gnat_killprocesstree): Do not provide close parameter on call
to __gnat_kill.
* libgnat/g-expect.adb (Kill): Remove Close parameter.
(Close): Do not provide Close parameter on call to Kill.
(Send_Signal): Do not provide Close parameter on call to Kill.
* libgnat/s-os_lib.adb (Kill): Do not provide close parameter on
call to __gnat_kill.diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
--- a/gcc/ada/adaint.c
+++ b/gcc/ada/adaint.c
@@ -3556,7 +3556,7 @@ __gnat_get_executable_load_address (void)
 }
 
 void
-__gnat_kill (int pid, int sig, int close ATTRIBUTE_UNUSED)
+__gnat_kill (int pid, int sig)
 {
 #if defined(_WIN32)
   HANDLE h;
@@ -3595,7 +3595,7 @@ void __gnat_killprocesstree (int pid, int sig_num)
 
   if (hSnap == INVALID_HANDLE_VALUE)
 {
-  __gnat_kill (pid, sig_num, 1);
+  __gnat_kill (pid, sig_num);
   return;
 }
 
@@ -3618,7 +3618,7 @@ void __gnat_killprocesstree (int pid, int sig_num)
 
   /* kill process */
 
-  __gnat_kill (pid, sig_num, 1);
+  __gnat_kill (pid, sig_num);
 
 #elif defined (__vxworks)
   /* not implemented */
@@ -3635,7 +3635,7 @@ void __gnat_killprocesstree (int pid, int sig_num)
 
   if (!dir)
 {
-  __gnat_kill (pid, sig_num, 1);
+  __gnat_kill (pid, sig_num);
   return;
 }
 
@@ -3673,9 +3673,9 @@ void __gnat_killprocesstree (int pid, int sig_num)
 
   /* kill process */
 
-  __gnat_kill (pid, sig_num, 1);
+  __gnat_kill (pid, sig_num);
 #else
-  __gnat_kill (pid, sig_num, 1);
+  __gnat_kill (pid, sig_num);
 #endif
   /* Note on Solaris it is possible to read /proc//status.
  The 5th and 6th words are the pid and the 7th and 8th the ppid.


diff --git a/gcc/ada/libgnat/g-expect.adb b/gcc/ada/libgnat/g-expect.adb
--- a/gcc/ada/libgnat/g-expect.adb
+++ b/gcc/ada/libgnat/g-expect.adb
@@ -96,7 +96,7 @@ package body GNAT.Expect is
procedure Dup2 (Old_Fd, New_Fd : File_Descriptor);
pragma Import (C, Dup2);
 
-   procedure Kill (Pid : Process_Id; Sig_Num : Integer; Close : Integer);
+   procedure Kill (Pid : Process_Id; Sig_Num : Integer);
pragma Import (C, Kill, "__gnat_kill");
--  if Close is set to 1 all OS resources used by the Pid must be freed
 
@@ -223,7 +223,7 @@ package body GNAT.Expect is
 
begin
   if Descriptor.Pid > 0 then  --  see comment in Send_Signal
- Kill (Descriptor.Pid, Sig_Num => 9, Close => 0);
+ Kill (Descriptor.Pid, Sig_Num => 9);
   end if;
 
   Close_Input (Descriptor);
@@ -1347,7 +1347,7 @@ package body GNAT.Expect is
   --  started; we don't want to kill ourself in that case.
 
   if Descriptor.Pid > 0 then
- Kill (Descriptor.Pid, Signal, Close => 1);
+ Kill (Descriptor.Pid, Signal);
  --  ??? Need to check process status here
   else
  raise Invalid_Process;


diff --git a/gcc/ada/libgnat/s-os_lib.adb b/gcc/ada/libgnat/s-os_lib.adb
--- a/gcc/ada/libgnat/s-os_lib.adb
+++ b/gcc/ada/libgnat/s-os_lib.adb
@@ -1602,15 +1602,15 @@ package body System.OS_Lib is
   SIGKILL : constant := 9;
   SIGINT  : constant := 2;
 
-  procedure C_Kill (Pid : Process_Id; Sig_Num : Integer; Close : Integer);
+  procedure C_Kill (Pid : Process_Id; Sig_Num : Integer);
   pragma Import (C, C_Kill, "__gnat_kill");
 
begin
   if Pid /= Invalid_Pid then
  if Hard_Kill then
-C_Kill (Pid, SIGKILL, 1);
+C_Kill (Pid, SIGKILL);
  else
-C_Kill (Pid, SIGINT, 1);
+C_Kill (Pid, SIGINT);
  end if;
   end if;
end Kill;




[Ada] Revamp type resolution for comparison and equality operators

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
The main goal was to make it symmetrical, but this also moves error handling
entirely to the second phase of type resolution.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* einfo.ads (Access Kinds): Reorder and beef up.
* sem.adb (Analyze): Call Analyze_Comparison_Equality_Op for all
comparison and equality operators.
* sem_ch4.ads (Analyze_Comparison_Op): Delete.
(Analyze_Equality_Op): Likewise.
(Analyze_Comparison_Equality_Op): Declare.
(Ambiguous_Operands): Likewise.
* sem_ch4.adb (Ambiguous_Operands): Remove declaration.
(Defined_In_Scope): Delete.
(Find_Comparison_Types): Merge into...
(Find_Equality_Types): Merge into...
(Find_Comparison_Equality_Types): ...this.  Make fully symmetrical.
(Analyze_Arithmetic_Op): Minor consistency tweaks.
(Analyze_Comparison_Op): Merge into...
(Analyze_Equality_Op): Merge into...
(Analyze_Comparison_Equality_Op): ...this.  Make fully symmetrical.
(Analyze_Logical_Op): Minor consistency tweaks.
(Analyze_Membership_Op): Make fully symmetrical.
(Analyze_One_Call): Minor comment tweak.
(Analyze_Operator_Call): Call Find_Comparison_Equality_Types.
(Analyze_User_Defined_Binary_Op): Make fully symmetrical.
(Check_Arithmetic_Pair.Specific_Type): Delete.
(Diagnose_Call): Add special handling for "+" operator.
(Operator_Check): Call Analyze_Comparison_Equality_Op.
* sem_ch8.adb (Has_Implicit_Operator): Add Is_Type guard for boolean
operators, use Valid_Comparison_Arg and Valid_Equality_Arg for resp.
comparison and equality operators.
* sem_res.adb (Check_For_Visible_Operator): Call Is_Visible_Operator
(Make_Call_Into_Operator): Use Preserve_Comes_From_Source.
(Resolve_Actuals): Deal specifically with Any_Type actuals for user-
defined comparison and equality operators.
(Resolve_Call): Minor tweaks.
(Resolve_Comparison_Op): Tidy up and give error for ambiguity.
(Resolve_Equality_Op): Likewise, as well as other errors.
(Rewrite_Renamed_Operator): Simplify.
* sem_type.ads (Is_Invisible_Operator): Delete.
(Is_Visible_Operator): Declare.
(Has_Compatible_Type): Remove For_Comparison parameter.
(Specific_Type): Declare.
(Valid_Equality_Arg): Likewise.
* sem_type.adb (Specific_Type): Remove declaration.
(Add_One_Interp): Call Is_Visible_Operator for the visibility test.
(Remove_Conversions): Rename into...
(Remove_Conversions_And_Abstract_Operations): ...this.  Do not apply
numeric-type treatment to Any_Type.  Expand the special handling for
abstract interpretations to second operand.  Remove obsolete code.
(Disambiguate): Adjust to above renaming.  Tweak to hidden case and
call Remove_Conversions_And_Abstract_Operations for operators too.
(Entity_Matches_Spec): Minor tweak.
(Find_Unique_Type): Simplify and deal with user-defined literals.
(Has_Compatible_Type): Remove For_Comparison parameter and adjust.
Call the Is_User_Defined_Literal predicate and remove call to
the Is_Invisible_Operator predicate.
(Is_Invisible_Operator): Delete.
(Is_Visible_Operator): New function.
(Operator_Matches_Spec): Use Valid_Equality_Arg predicate.
(Specific_Type): Tidy up, make fully symmetrical and deal with
private views the same way as Covers.
(Valid_Comparison_Arg): Return true for Any_Composite/Any_String.
(Valid_Equality_Arg): New function.
* sem_util.ads (Is_User_Defined_Literal): Declare.
* sem_util.adb (Is_User_Defined_Literal): New function.

patch.diff.gz
Description: application/gzip


[Ada] Remove redundant call to Set_Etype for attribute Bit_Order

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Node created by a call to New_Occurrence_Of (RTE (...), ...) has its
Etype set. There is no need to follow it with a call to Set_Etype.

Cleanup of various Analyze/Resolve routines.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_attr.adb (Analyze_Attribute): Don't call Set_Etype for
Bit_Order attribute.diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -3421,7 +3421,6 @@ package body Sem_Attr is
   New_Occurrence_Of (RTE (RE_Low_Order_First), Loc));
  end if;
 
- Set_Etype (N, RTE (RE_Bit_Order));
  Resolve (N);
 
  --  Reset incorrect indication of staticness




[Ada] Remove repeated analysis of attribute prefixes

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
At the beginning of Analyze_Attribute routine we analyze the attribute
prefix. There is no need to repeat this analysis in branches for
individual attributes.

Code cleanup related to various Analyze/Resolve routines.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_attr.adb (Analyze_Attribute): Remove calls to Analyze for
attributes Identity, Priority, Ref, Restriction_Set, To_Address
and for tasking-related attributes Callable, Terminated and
Storage_Size.diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -2693,8 +2693,6 @@ package body Sem_Attr is
 
   procedure Check_Task_Prefix is
   begin
- Analyze (P);
-
  --  Ada 2005 (AI-345): Attribute 'Terminated can be applied to
  --  task interface class-wide types.
 
@@ -4301,7 +4299,6 @@ package body Sem_Attr is
 
   when Attribute_Identity =>
  Check_E0;
- Analyze (P);
 
  if Etype (P) = Standard_Exception_Type then
 Set_Etype (N, RTE (RE_Exception_Id));
@@ -5505,8 +5502,6 @@ package body Sem_Attr is
 
  --  The prefix must be a protected object (AARM D.5.2 (2/2))
 
- Analyze (P);
-
  if Is_Protected_Type (Etype (P))
or else (Is_Access_Type (Etype (P))
   and then Is_Protected_Type (Designated_Type (Etype (P
@@ -5846,7 +5841,6 @@ package body Sem_Attr is
 
   when Attribute_Ref =>
  Check_E1;
- Analyze (P);
 
  if Nkind (P) /= N_Expanded_Name
or else not Is_RTE (P_Type, RE_Address)
@@ -5874,7 +5868,6 @@ package body Sem_Attr is
 
   begin
  Check_E1;
- Analyze (P);
  Check_System_Prefix;
 
  --  No_Dependence case
@@ -6456,7 +6449,6 @@ package body Sem_Attr is
  Val : Uint;
   begin
  Check_E1;
- Analyze (P);
  Check_System_Prefix;
 
  Generate_Reference (RTE (RE_Address), P);




[Ada] vx21.07: stack-checking on ppc

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
On VxWorks >= 7.2 and 653, signal processing code is expected to clear
the TCB exception count field when returning control back to user code.
This change arranges to do so.  It is believed that this is only an
issue in Kernel mode, and not RTP because there is no exception count
field in RTP mode and no failures have been observed.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* init.c [vxworks] (CLEAR_EXCEPTION_COUNT): New macro.
(__gnat_clear_exception_count): Remove.
(__gnat_map_signal): Call CLEAR_EXCEPTION_COUNT().diff --git a/gcc/ada/init.c b/gcc/ada/init.c
--- a/gcc/ada/init.c
+++ b/gcc/ada/init.c
@@ -1758,8 +1758,26 @@ extern size_t vxIntStackOverflowSize;
 #define INT_OVERFLOW_SIZE vxIntStackOverflowSize
 #endif
 
-#ifdef VTHREADS
-#include "private/vThreadsP.h"
+/* VxWorks 653 vThreads expects the field excCnt to be zeroed when a signal is.
+   handled.  The VxWorks version of longjmp does this; GCC's builtin_longjmp
+   doesn't.  A similar issue is present VxWorks 7.2 and affects ZCX as well
+   as builtin_longjmp.  This field only exists in Kernel mode, not RTP.  */
+#if defined(VTHREADS) || (!defined(__RTP__) && (_WRS_VXWORKS_MAJOR >= 7))
+# ifdef VTHREADS
+#  include "private/vThreadsP.h"
+#  define EXCCNT vThreads.excCnt
+# else
+#  include "private/taskLibP.h"
+#  define EXCCNT excCnt
+# endif
+# define CLEAR_EXCEPTION_COUNT()			 \
+  do			 \
+{			 \
+  WIND_TCB *currentTask = (WIND_TCB *) taskIdSelf(); \
+  currentTask->EXCCNT = 0; \
+} while (0)
+#else
+# define CLEAR_EXCEPTION_COUNT()
 #endif
 
 #ifndef __RTP__
@@ -1835,19 +1853,6 @@ __gnat_reset_guard_page (int sig)
   return FALSE;
 }
 
-/* VxWorks 653 vThreads expects the field excCnt to be zeroed when a signal is.
-   handled. The VxWorks version of longjmp does this; GCC's builtin_longjmp
-   doesn't.  */
-void
-__gnat_clear_exception_count (void)
-{
-#ifdef VTHREADS
-  WIND_TCB *currentTask = (WIND_TCB *) taskIdSelf();
-
-  currentTask->vThreads.excCnt = 0;
-#endif
-}
-
 /* Handle different SIGnal to exception mappings in different VxWorks
versions.  */
 void
@@ -1959,7 +1964,8 @@ __gnat_map_signal (int sig,
   break;
 }
 }
-  __gnat_clear_exception_count ();
+
+  CLEAR_EXCEPTION_COUNT ();
   Raise_From_Signal_Handler (exception, msg);
 }
 




[Ada] Add utility to preanalyze assert expression without forcing its type

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
In SPARK loop and subprogram variants we now allow expressions of any
discrete type or of Ada.Numerics.Big_Numbers.Big_Integers.Big_Integer
type. This requires a variant of Preanalyze_Assert_Expression that
doesn't force the expression to be of a particular type, similar to the
existing variant of Analyze_And_Resolve.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_ch3.ads, sem_ch3.adb (Preanalyze_Assert_Expression): Add a
variant that doesn't force preanalysis to yield a specific type.diff --git a/gcc/ada/sem_ch3.adb b/gcc/ada/sem_ch3.adb
--- a/gcc/ada/sem_ch3.adb
+++ b/gcc/ada/sem_ch3.adb
@@ -40,6 +40,7 @@ with Exp_Disp;   use Exp_Disp;
 with Exp_Dist;   use Exp_Dist;
 with Exp_Tss;use Exp_Tss;
 with Exp_Util;   use Exp_Util;
+with Expander;   use Expander;
 with Freeze; use Freeze;
 with Ghost;  use Ghost;
 with Itypes; use Itypes;
@@ -20387,6 +20388,40 @@ package body Sem_Ch3 is
   In_Assertion_Expr := In_Assertion_Expr - 1;
end Preanalyze_Assert_Expression;
 
+   --  ??? The variant below explicitly saves and restores all the flags,
+   --  because it is impossible to compose the existing variety of
+   --  Analyze/Resolve (and their wrappers, e.g. Preanalyze_Spec_Expression)
+   --  to achieve the desired semantics.
+
+   procedure Preanalyze_Assert_Expression (N : Node_Id) is
+  Save_In_Spec_Expression : constant Boolean := In_Spec_Expression;
+  Save_Must_Not_Freeze: constant Boolean := Must_Not_Freeze (N);
+  Save_Full_Analysis  : constant Boolean := Full_Analysis;
+
+   begin
+  In_Assertion_Expr  := In_Assertion_Expr + 1;
+  In_Spec_Expression := True;
+  Set_Must_Not_Freeze (N);
+  Inside_Preanalysis_Without_Freezing :=
+Inside_Preanalysis_Without_Freezing + 1;
+  Full_Analysis  := False;
+  Expander_Mode_Save_And_Set (False);
+
+  if GNATprove_Mode then
+ Analyze_And_Resolve (N);
+  else
+ Analyze_And_Resolve (N, Suppress => All_Checks);
+  end if;
+
+  Expander_Mode_Restore;
+  Full_Analysis  := Save_Full_Analysis;
+  Inside_Preanalysis_Without_Freezing :=
+Inside_Preanalysis_Without_Freezing - 1;
+  Set_Must_Not_Freeze (N, Save_Must_Not_Freeze);
+  In_Spec_Expression := Save_In_Spec_Expression;
+  In_Assertion_Expr  := In_Assertion_Expr - 1;
+   end Preanalyze_Assert_Expression;
+
---
-- Preanalyze_Default_Expression --
---


diff --git a/gcc/ada/sem_ch3.ads b/gcc/ada/sem_ch3.ads
--- a/gcc/ada/sem_ch3.ads
+++ b/gcc/ada/sem_ch3.ads
@@ -235,6 +235,9 @@ package Sem_Ch3 is
--  Wrapper on Preanalyze_Spec_Expression for assertion expressions, so that
--  In_Assertion_Expr can be properly adjusted.
 
+   procedure Preanalyze_Assert_Expression (N : Node_Id);
+   --  Similar to the above, but without forcing N to be of a particular type
+
procedure Preanalyze_Spec_Expression (N : Node_Id; T : Entity_Id);
--  Default and per object expressions do not freeze their components, and
--  must be analyzed and resolved accordingly. The analysis is done by




[Ada] Allow Big_Integer in loop and subprogram variants

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
In SPARK loop and subprogram variants we now allow expressions of any
discrete type and of Ada.Numerics.Big_Numbers.Big_Integers.Big_Integer
type.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_prag.adb (Expand_Pragma_Loop_Variant,
Expand_Pragma_Subprogram_Variant): Adapt call via
Process_Variant to Make_Variant_Comparison.
* exp_util.adb (Make_Variant_Comparison): Compare Big_Integer
expressions with a function call and not an operator.
* exp_util.ads (Make_Variant_Comparison): Add type parameter,
which is needed because the Curr_Val and Old_Val expressions
might not be yet decorated.
* rtsfind.ads: (RTU_Id): Add support for Big_Integers and
Big_Integers_Ghost.
(RE_Id): Add support for Big_Integer and its ghost variant.
(RE_Unit_Table): Add mapping from Big_Integer to Big_Integers;
same for the ghost variants.
* rtsfind.adb (Get_Unit_Name): Add support for Big_Numbers.
* sem_prag.adb (Analyze_Pragma): Allow Big_Integer in pragma
Loop_Variant.
(Analyze_Variant): Allow Big_Integer in pragma
Subprogram_Variant.diff --git a/gcc/ada/exp_prag.adb b/gcc/ada/exp_prag.adb
--- a/gcc/ada/exp_prag.adb
+++ b/gcc/ada/exp_prag.adb
@@ -2636,6 +2636,7 @@ package body Exp_Prag is
  Expression =>
Make_Variant_Comparison (Loc,
  Mode => Chars (Variant),
+ Typ  => Expr_Typ,
  Curr_Val => New_Occurrence_Of (Curr_Id, Loc),
  Old_Val  => New_Occurrence_Of (Old_Id, Loc);
 
@@ -3000,6 +3001,7 @@ package body Exp_Prag is
  Expression =>
Make_Variant_Comparison (Loc,
  Mode => Chars (First (Choices (Variant))),
+ Typ  => Expr_Typ,
  Curr_Val => New_Occurrence_Of (Curr_Id, Loc),
  Old_Val  => New_Occurrence_Of (Old_Id, Loc);
 


diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb
--- a/gcc/ada/exp_util.adb
+++ b/gcc/ada/exp_util.adb
@@ -10239,15 +10239,61 @@ package body Exp_Util is
 
function Make_Variant_Comparison
  (Loc  : Source_Ptr;
+  Typ  : Entity_Id;
   Mode : Name_Id;
   Curr_Val : Node_Id;
   Old_Val  : Node_Id) return Node_Id
is
+  function Big_Integer_Lt return Entity_Id;
+  --  Returns the entity of the predefined "<" function from
+  --  Ada.Numerics.Big_Numbers.Big_Integers.
+
+  
+  -- Big_Integer_Lt --
+  
+
+  function Big_Integer_Lt return Entity_Id is
+ Big_Integers : constant Entity_Id :=
+   RTU_Entity (Ada_Numerics_Big_Numbers_Big_Integers);
+
+ E : Entity_Id := First_Entity (Big_Integers);
+
+  begin
+ while Present (E) loop
+if Chars (E) = Name_Op_Lt then
+   return E;
+end if;
+Next_Entity (E);
+ end loop;
+
+ raise Program_Error;
+  end Big_Integer_Lt;
+
+   --  Start of processing for Make_Variant_Comparison
+
begin
   if Mode = Name_Increases then
  return Make_Op_Gt (Loc, Curr_Val, Old_Val);
+
   else pragma Assert (Mode = Name_Decreases);
- return Make_Op_Lt (Loc, Curr_Val, Old_Val);
+
+ --  For discrete expressions use the "<" operator
+
+ if Is_Discrete_Type (Typ) then
+return Make_Op_Lt (Loc, Curr_Val, Old_Val);
+
+ --  For Big_Integer expressions use the "<" function, because the
+ --  operator on private type might not be visible and won't be
+ --  resolved.
+
+ else pragma Assert (Is_RTE (Base_Type (Typ), RE_Big_Integer));
+return
+  Make_Function_Call (Loc,
+Name   =>
+  New_Occurrence_Of (Big_Integer_Lt, Loc),
+Parameter_Associations =>
+  New_List (Curr_Val, Old_Val));
+ end if;
   end if;
end Make_Variant_Comparison;
 


diff --git a/gcc/ada/exp_util.ads b/gcc/ada/exp_util.ads
--- a/gcc/ada/exp_util.ads
+++ b/gcc/ada/exp_util.ads
@@ -901,12 +901,14 @@ package Exp_Util is
 
function Make_Variant_Comparison
  (Loc  : Source_Ptr;
+  Typ  : Entity_Id;
   Mode : Name_Id;
   Curr_Val : Node_Id;
   Old_Val  : Node_Id) return Node_Id;
--  Subsidiary to the expansion of pragmas Loop_Variant and
--  Subprogram_Variant. Generate a comparison between Curr_Val and Old_Val
-   --  depending on the variant mode (Increases / Decreases).
+   --  depending on the variant mode (Increases / Decreases) using less or
+   --  greater operator for Typ.
 
procedure Map_Formals
  (Parent_Subp  : Entity_Id;


diff --git a/gcc/ada/rtsfind.adb b/gcc/ada/rtsfind.adb
--- a/gcc/ada/rtsfind.adb
+++ b/gcc/ada/rtsfind.adb
@@ -564,8 +564,12 @@ pac

[Ada] Use "aspect" instead of "pragma" in warnings

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
For warnings related to the Unreferenced, Unmodified, and Unused
aspects, refer to the "aspect", not the "pragma". Note that the aspect
can be set by an aspect_specification or a pragma, so the term "aspect"
is correct even in the pragma case.  However, messages in sem_prag.adb
use Fix_Error, so they refer to "aspect" or "pragma". It's not clear
that we really ought to refer to "pragma", now that those are obsolete,
but de call Fix_Error for uniformity. We do not attempt to make
Fix_Error available outside sem_prag.adb -- too much trouble for
something that perhaps ought to be removed.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* lib-xref.adb, sem_util.adb: Change wording of warning messages
to use "aspect".
* sem_prag.adb: Use Fix_Error to change wording of warnings.
* doc/gnat_rm/implementation_defined_pragmas.rst: Minor: fix
cut&paste error.
* gnat_rm.texi: Regenerate.diff --git a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
--- a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
+++ b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
@@ -7313,7 +7313,7 @@ For the variable case, warnings are never given for unreferenced
 variables whose name contains one of the substrings
 ``DISCARD, DUMMY, IGNORE, JUNK, UNUSED`` in any casing. Such names
 are typically to be used in cases where such warnings are expected.
-Thus it is never necessary to use ``pragma Unmodified`` for such
+Thus it is never necessary to use ``pragma Unused`` for such
 variables, though it is harmless to do so.
 
 Pragma Validity_Checks


diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi
--- a/gcc/ada/gnat_rm.texi
+++ b/gcc/ada/gnat_rm.texi
@@ -21,7 +21,7 @@
 
 @copying
 @quotation
-GNAT Reference Manual , Jan 03, 2022
+GNAT Reference Manual , Apr 22, 2022
 
 AdaCore
 
@@ -8837,7 +8837,7 @@ For the variable case, warnings are never given for unreferenced
 variables whose name contains one of the substrings
 @code{DISCARD, DUMMY, IGNORE, JUNK, UNUSED} in any casing. Such names
 are typically to be used in cases where such warnings are expected.
-Thus it is never necessary to use @code{pragma Unmodified} for such
+Thus it is never necessary to use @code{pragma Unused} for such
 variables, though it is harmless to do so.
 
 @node Pragma Validity_Checks,Pragma Volatile,Pragma Unused,Implementation Defined Pragmas


diff --git a/gcc/ada/lib-xref.adb b/gcc/ada/lib-xref.adb
--- a/gcc/ada/lib-xref.adb
+++ b/gcc/ada/lib-xref.adb
@@ -936,10 +936,10 @@ package body Lib.Xref is
  if Chars (BE) = Chars (E) then
 if Has_Pragma_Unused (E) then
Error_Msg_NE -- CODEFIX
- ("??pragma Unused given for&!", N, BE);
+ ("??aspect Unused specified for&!", N, BE);
 else
Error_Msg_NE -- CODEFIX
- ("??pragma Unreferenced given for&!", N, BE);
+ ("??aspect Unreferenced specified for&!", N, BE);
 end if;
 exit;
  end if;
@@ -952,10 +952,10 @@ package body Lib.Xref is
 
 elsif Has_Pragma_Unused (E) then
Error_Msg_NE -- CODEFIX
- ("??pragma Unused given for&!", N, E);
+ ("??aspect Unused specified for&!", N, E);
 else
Error_Msg_NE -- CODEFIX
- ("??pragma Unreferenced given for&!", N, E);
+ ("??aspect Unreferenced specified for&!", N, E);
 end if;
  end if;
 


diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb
--- a/gcc/ada/sem_prag.adb
+++ b/gcc/ada/sem_prag.adb
@@ -5168,12 +5168,12 @@ package body Sem_Prag is
elsif Has_Pragma_Unmodified (Arg_Id) then
   if Has_Pragma_Unused (Arg_Id) then
  Error_Msg_NE
-   ("??pragma Unused already given for &!", Arg_Expr,
- Arg_Id);
+   (Fix_Error ("??pragma Unused already given for &!"),
+Arg_Expr, Arg_Id);
   else
  Error_Msg_NE
-   ("??pragma Unmodified already given for &!", Arg_Expr,
- Arg_Id);
+   (Fix_Error ("??pragma Unmodified already given for &!"),
+Arg_Expr, Arg_Id);
   end if;
 
--  Otherwise the pragma referenced an illegal entity
@@ -5276,12 +5276,13 @@ package body Sem_Prag is
   if Has_Pragma_Unreferenced (Arg_Id) then
  if Has_Pragma_Unused (Arg_Id) then
 Error_Msg_NE
-  ("??pragma Unused already given for &!", Arg_Expr,
-Arg_I

[Ada] Refine description of SPARK with static Boolean expressions

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
A number of SPARK pragmas controlled by an optional Boolean expression
require those expressions to be static. This is now clarified in the
GNAT RM.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* doc/gnat_rm/implementation_defined_pragmas.rst
(Abstract_State, Async_Readers, Async_Writers,
Constant_After_Elaboration, Effective_Reads, Effective_Writes,
Extensions_Visible, Ghost, No_Caching, Volatile_Function): Only
static Boolean expressions are allowed.
* gnat_rm.texi: Regenerate.diff --git a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
--- a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
+++ b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
@@ -90,11 +90,11 @@ Syntax:
 | (EXTERNAL_PROPERTY {, EXTERNAL_PROPERTY} )
 
   EXTERNAL_PROPERTY ::=
-  Async_Readers[=> boolean_EXPRESSION]
-| Async_Writers[=> boolean_EXPRESSION]
-| Effective_Reads  [=> boolean_EXPRESSION]
-| Effective_Writes [=> boolean_EXPRESSION]
-  others=> boolean_EXPRESSION
+  Async_Readers[=> static_boolean_EXPRESSION]
+| Async_Writers[=> static_boolean_EXPRESSION]
+| Effective_Reads  [=> static_boolean_EXPRESSION]
+| Effective_Writes [=> static_boolean_EXPRESSION]
+  others=> static_boolean_EXPRESSION
 
   STATE_NAME ::= defining_identifier
 
@@ -600,7 +600,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Async_Readers [ (boolean_EXPRESSION) ];
+  pragma Async_Readers [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Async_Readers`` in
 the SPARK 2014 Reference Manual, section 7.1.2.
@@ -614,7 +614,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Async_Writers [ (boolean_EXPRESSION) ];
+  pragma Async_Writers [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Async_Writers`` in
 the SPARK 2014 Reference Manual, section 7.1.2.
@@ -1132,7 +1132,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Constant_After_Elaboration [ (boolean_EXPRESSION) ];
+  pragma Constant_After_Elaboration [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect
 ``Constant_After_Elaboration`` in the SPARK 2014 Reference Manual, section 3.3.1.
@@ -1656,7 +1656,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Effective_Reads [ (boolean_EXPRESSION) ];
+  pragma Effective_Reads [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Effective_Reads`` in
 the SPARK 2014 Reference Manual, section 7.1.2.
@@ -1670,7 +1670,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Effective_Writes [ (boolean_EXPRESSION) ];
+  pragma Effective_Writes [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Effective_Writes``
 in the SPARK 2014 Reference Manual, section 7.1.2.
@@ -2401,7 +2401,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Extensions_Visible [ (boolean_EXPRESSION) ];
+  pragma Extensions_Visible [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Extensions_Visible``
 in the SPARK 2014 Reference Manual, section 6.1.7.
@@ -2615,7 +2615,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Ghost [ (boolean_EXPRESSION) ];
+  pragma Ghost [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Ghost`` in the SPARK
 2014 Reference Manual, section 6.9.
@@ -3969,7 +3969,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma No_Caching [ (boolean_EXPRESSION) ];
+  pragma No_Caching [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``No_Caching`` in
 the SPARK 2014 Reference Manual, section 7.1.2.
@@ -7430,7 +7430,7 @@ Syntax:
 
 .. code-block:: ada
 
-  pragma Volatile_Function [ (boolean_EXPRESSION) ];
+  pragma Volatile_Function [ (static_boolean_EXPRESSION) ];
 
 For the semantics of this pragma, see the entry for aspect ``Volatile_Function``
 in the SPARK 2014 Reference Manual, section 7.1.2.


diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi
--- a/gcc/ada/gnat_rm.texi
+++ b/gcc/ada/gnat_rm.texi
@@ -1457,11 +1457,11 @@ EXTERNAL_PROPERTY_LIST ::=
   | (EXTERNAL_PROPERTY @{, EXTERNAL_PROPERTY@} )
 
 EXTERNAL_PROPERTY ::=
-Async_Readers[=> boolean_EXPRESSION]
-  | Async_Writers[=> boolean_EXPRESSION]
-  | Effective_Reads  [=> boolean_EXPRESSION]
-  | Effective_Writes [=> boolean_EXPRESSION]
-others=> boolean_EXPRESSION
+Async_Readers[=> static_boolean_EXPRESSION]
+  | Async_Writers[=> static_boolean_EXPRESSION]
+  | Effective_Reads  [=> static_boolean_EXPRESSION]
+  | Effective_Writes [=> static_boolean_EXPRESSION]
+others=> static_boolean_EXPRESSION
 
 STATE_NAME ::= defining_identifier
 
@@ -1983,7 +1983,7 @@ case, and it is recommended that these two options not be use

[Ada] Fix check for looking for user defined literals

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Recall that Has_Possible_Literal_Aspects only comes in if a given node
does not have any visible interpretation. If one operand is a literal we
assume that there may be a user-defined literal defined for some type to
be determined during the downward pass of resolution, but that depends
on the existence of some user-defined function or operator that can take
that literal as an actual. If analysis did not find such, the call is
illegal. I think that the following must be added to Operator_Check to
recover the proper error.

Note that this breaks current partial implementation of user-defined
literals.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_ch4.adb (Operator_Check): Fix condition.diff --git a/gcc/ada/sem_ch4.adb b/gcc/ada/sem_ch4.adb
--- a/gcc/ada/sem_ch4.adb
+++ b/gcc/ada/sem_ch4.adb
@@ -7260,7 +7260,9 @@ package body Sem_Ch4 is
 then
return;
 
-elsif Has_Possible_Literal_Aspects (N) then
+elsif Present (Entity (N))
+  and then Has_Possible_Literal_Aspects (N)
+then
return;
 
 --  If we have a logical operator, one of whose operands is




[Ada] Fix visibility inside declare_expression

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
The first implementation just created a scope for the analysis of the
declarations and the expression, so that visibility would just work as
it does for all other constructs. However this led to an annoying bug
when one of the declarations or the expression itself creates a
transient scope: there may be a confusion on scope exit between those
two scopes. As a result visibility is handled by explicit traversal of
the expression and replacement of occurrences of the local variables,
see Replace_Local_Ref in Resolve_Declare_Expression (sem_res.adb). The
current code does not take into account that there may be references to
a local object in a subsequent declaration (not just in the expression).

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_res.adb (Resolve_Declare_Expression): Traverse the
expression to replace references to local variables that occur
within declarations of the declare_expression; fix typos in
comments.diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -7595,7 +7595,7 @@ package body Sem_Res is
   Local : Entity_Id := Empty;
 
   function Replace_Local (N  : Node_Id) return Traverse_Result;
-  --  Use a tree traversal to replace each ocurrence of the name of
+  --  Use a tree traversal to replace each occurrence of the name of
   --  a local object declared in the construct, with the corresponding
   --  entity. This replaces the usual way to perform name capture by
   --  visibility, because it is not possible to place on the scope
@@ -7632,7 +7632,7 @@ package body Sem_Res is
 
   procedure Replace_Local_Ref is new Traverse_Proc (Replace_Local);
 
-  --  Start of processing for  Resolve_Declare_Expression
+   --  Start of processing for Resolve_Declare_Expression
 
begin
 
@@ -7645,6 +7645,19 @@ package body Sem_Res is
  then
 Local := Defining_Identifier (Decl);
 Replace_Local_Ref (Expr);
+
+--  Traverse the expression to replace references to local
+--  variables that occur within declarations of the
+--  declare_expression.
+
+declare
+   D : Node_Id := Next (Decl);
+begin
+   while Present (D) loop
+  Replace_Local_Ref (D);
+  Next (D);
+   end loop;
+end;
  end if;
 
  Next (Decl);




[Ada] Fix internal error on declaration of derived discriminated record type

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
When the parent type has a variant part and the derived type is also
discriminated but statically selects a variant, the initialization
routine of the derived type may attempt to access components of other
variants that are no longer present.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_ch4.adb (Handle_Changed_Representation): Simplify and fix
thinko in the loop building the constraints for discriminants.
* exp_ch5.adb (Make_Component_List_Assign): Try also to extract
discriminant values for a derived type.diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -11745,31 +11745,24 @@ package body Exp_Ch4 is
   declare
  Stored : constant Elist_Id :=
 Stored_Constraint (Operand_Type);
-
- Elmt : Elmt_Id;
+ --  Stored constraints of the operand. If present, they
+ --  correspond to the discriminants of the parent type.
 
  Disc_O : Entity_Id;
  --  Discriminant of the operand type. Its value in the
  --  object is captured in a selected component.
 
- Disc_S : Entity_Id;
- --  Stored discriminant of the operand. If present, it
- --  corresponds to a constrained discriminant of the
- --  parent type.
-
  Disc_T : Entity_Id;
  --  Discriminant of the target type
 
+ Elmt : Elmt_Id;
+
   begin
- Disc_T := First_Discriminant (Target_Type);
  Disc_O := First_Discriminant (Operand_Type);
- Disc_S := First_Stored_Discriminant (Operand_Type);
-
- if Present (Stored) then
-Elmt := First_Elmt (Stored);
- else
-Elmt := No_Elmt; -- init to avoid warning
- end if;
+ Disc_T := First_Discriminant (Target_Type);
+ Elmt   := (if Present (Stored)
+ then First_Elmt (Stored)
+ else No_Elmt);
 
  Cons := New_List;
  while Present (Disc_T) loop
@@ -11784,8 +11777,11 @@ package body Exp_Ch4 is
  Make_Identifier (Loc, Chars (Disc_O;
Next_Discriminant (Disc_O);
 
-elsif Present (Disc_S) then
+elsif Present (Elmt) then
Append_To (Cons, New_Copy_Tree (Node (Elmt)));
+end if;
+
+if Present (Elmt) then
Next_Elmt (Elmt);
 end if;
 


diff --git a/gcc/ada/exp_ch5.adb b/gcc/ada/exp_ch5.adb
--- a/gcc/ada/exp_ch5.adb
+++ b/gcc/ada/exp_ch5.adb
@@ -1848,27 +1848,14 @@ package body Exp_Ch5 is
 CI : constant List_Id := Component_Items (CL);
 VP : constant Node_Id := Variant_Part (CL);
 
-Constrained_Typ : Entity_Id;
-Alts: List_Id;
-DC  : Node_Id;
-DCH : List_Id;
-Expr: Node_Id;
-Result  : List_Id;
-V   : Node_Id;
+Alts   : List_Id;
+DC : Node_Id;
+DCH: List_Id;
+Expr   : Node_Id;
+Result : List_Id;
+V  : Node_Id;
 
  begin
---  Try to find a constrained type to extract discriminant values
---  from, so that the case statement built below gets an
---  opportunity to be folded by Expand_N_Case_Statement.
-
-if U_U or else Is_Constrained (Etype (Rhs)) then
-   Constrained_Typ := Etype (Rhs);
-elsif Is_Constrained (Etype (Expression (N))) then
-   Constrained_Typ := Etype (Expression (N));
-else
-   Constrained_Typ := Empty;
-end if;
-
 Result := Make_Field_Assigns (CI);
 
 if Present (VP) then
@@ -1890,13 +1877,38 @@ package body Exp_Ch5 is
   Next_Non_Pragma (V);
end loop;
 
-   if Present (Constrained_Typ) then
+   --  Try to find a constrained type or a derived type to extract
+   --  discriminant values from, so that the case statement built
+   --  below can be folded by Expand_N_Case_Statement.
+
+   if U_U or else Is_Constrained (Etype (Rhs)) then
+  Expr :=
+New_Copy (Get_Discriminant_Value (
+  Entity (Name (VP)),
+  Etype (Rhs),
+  Discriminant_Constraint (Etype (

[Ada] Properly handle unprefixed references to components

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
In some cases, the compiler would incorrectly reject unprefixed uses of
component names in an aspect specification for the composite type.
Correct this error.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_ch13.adb (Replace_Type_Ref): In the case of an identifier
that names a component of the type, simplify the test to decide
whether to build a prefix for it (the prefix denotes the current
instance of the enclosing type): if the identifier doesn't
already have a prefix, then give it one. This isn't quite right
in the corner case of a quantified expression or some other such
expression that declares an object with the same name as a
component, but it is still an improvement.diff --git a/gcc/ada/sem_ch13.adb b/gcc/ada/sem_ch13.adb
--- a/gcc/ada/sem_ch13.adb
+++ b/gcc/ada/sem_ch13.adb
@@ -15176,27 +15176,26 @@ package body Sem_Ch13 is
end if;
 
--  The components of the type are directly visible and can
-   --  be referenced without a prefix.
-
-   if Nkind (Parent (N)) = N_Selected_Component then
-  null;
-
-   --  In expression C (I), C may be a directly visible function
-   --  or a visible component that has an array type. Disambiguate
-   --  by examining the component type.
+   --  be referenced in the source code without a prefix.
+   --  If a name denoting a component doesn't already have a
+   --  prefix, then normalize it by adding a reference to the
+   --  current instance of the type as a prefix.
+   --
+   --  This isn't right in the pathological corner case of an
+   --  object-declaring expression (e.g., a quantified expression
+   --  or a declare expression) that declares an object with the
+   --  same name as a visible component declaration, thereby hiding
+   --  the component within that expression. For example, given a
+   --  record with a Boolean component "C" and a dynamic predicate
+   --  "C = (for some C in Character => Some_Function (C))", only
+   --  the first of the two uses of C should have a prefix added
+   --  here; instead, both will get prefixes.
 
-   elsif Nkind (Parent (N)) = N_Indexed_Component
- and then N = Prefix (Parent (N))
+   if Nkind (Parent (N)) /= N_Selected_Component
+ or else N /= Selector_Name (Parent (N))
then
   Comp := Visible_Component (Chars (N));
 
-  if Present (Comp) and then Is_Array_Type (Etype (Comp)) then
- Add_Prefix (N, Comp);
-  end if;
-
-   else
-  Comp := Visible_Component (Chars (N));
-
   if Present (Comp) then
  Add_Prefix (N, Comp);
   end if;




[Ada] Fix package installation for private array type of private element

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
The problem comes from the construction of Stream operations, which
happens at the point a tagged type is frozen. Streams need to see the
full view of types, so that for example the Read attribute for an array
can be expanded into a loop over the Read attribute for the component
type.  Now if during that expansion we have a private type we may need
to retrieve the full view of the type to find its structure. And the
corresponding tree must be compiled in the context of the package that
defines the type, which might not be the current package.  The problem
arises when both array and component types are private, then the
described mechanism is invoked twice.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_attr.adb (Compile_Stream_Body_In_Scope): Do not install
package if array type and element type come from the same
package, and the original array type is private.diff --git a/gcc/ada/exp_attr.adb b/gcc/ada/exp_attr.adb
--- a/gcc/ada/exp_attr.adb
+++ b/gcc/ada/exp_attr.adb
@@ -888,6 +888,11 @@ package body Exp_Attr is
  --  special stream-processing operations for that type (for example
  --  Unbounded_String and its wide varieties).
 
+ --  We don't install the package either if array type and element
+ --  type come from the same package, and the original array type is
+ --  private, because in this case the underlying type Arr is
+ --  itself a full view, which carries the full view of the component.
+
  Scop := Scope (C_Type);
 
  if Is_Private_Type (C_Type)
@@ -896,7 +901,15 @@ package body Exp_Attr is
and then Ekind (Scop) = E_Package
and then No (Get_Stream_Convert_Pragma (C_Type))
  then
-Install := True;
+if Scope (Arr) = Scope (C_Type)
+  and then Is_Private_Type (Etype (Prefix (N)))
+  and then Full_View (Etype (Prefix (N))) = Arr
+then
+   null;
+
+else
+   Install := True;
+end if;
  end if;
   end if;
 




[Ada] Fix missing error on actual for In/Out parameter

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
The compiler was failing to give an error on the result of a call to the
Input attribute passed as actual for an In/Out parameter.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_util.adb (Is_OK_Variable_For_Out_Formal): Remove test on
Comes_From_Source in the condition dealing with the expression
of an N_Unchecked_Type_Conversion node.diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -19533,9 +19533,7 @@ package body Sem_Util is
  if Nkind (Original_Node (AV)) in N_Function_Call | N_Aggregate then
 return False;
 
- elsif Comes_From_Source (AV)
-   and then Nkind (Original_Node (Expression (AV))) = N_Function_Call
- then
+ elsif Nkind (Original_Node (Expression (AV))) = N_Function_Call then
 return False;
 
  elsif Nkind (Original_Node (AV)) = N_Type_Conversion then




[Ada] Fix indentation of "Start of processing for ..." labels

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
The "Start of processing for ..." labels should be aligned with the
BEGIN that follows. Violations found with:

$ grep -Pzo "( *)   \-\-  Start of processing for \w+\n\n\1begin" *.adb

and corrected manually, because some of them had to be entirely removed.

Also, remove trailing semicolons found while guessing the grep pattern.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_aggr.adb, exp_ch3.adb, exp_util.adb, freeze.adb,
gnatfind.adb, gnatlink.adb, gnatxref.adb, gprep.adb,
libgnat/a-cfhama.adb, libgnat/g-alleve.adb, sem_ch12.adb,
sem_ch13.adb, xr_tabls.adb: Fix style labels.diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -7542,7 +7542,7 @@ package body Exp_Aggr is
 
   end Expand_Iterated_Component;
 
-  --  Start of processing for Expand_Container_Aggregate
+   --  Start of processing for Expand_Container_Aggregate
 
begin
   Parse_Aspect_Aggregate (Asp,


diff --git a/gcc/ada/exp_ch3.adb b/gcc/ada/exp_ch3.adb
--- a/gcc/ada/exp_ch3.adb
+++ b/gcc/ada/exp_ch3.adb
@@ -1288,8 +1288,6 @@ package body Exp_Ch3 is
   Comp  : Entity_Id;
   Comp_Type : Entity_Id;
 
-  --  Start of processing for Build_Equivalent_Record_Aggregate
-
begin
   if not Is_Record_Type (T)
 or else Has_Discriminants (T)


diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb
--- a/gcc/ada/exp_util.adb
+++ b/gcc/ada/exp_util.adb
@@ -6468,7 +6468,7 @@ package body Exp_Util is
  return Empty;
   end Check_Decls;
 
-  --  Start of processing for Following_Address_Clause
+   --  Start of processing for Following_Address_Clause
 
begin
   --  If parser detected no address clause for the identifier in question,


diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -3581,7 +3581,7 @@ package body Freeze is
  end if;
   end Complain_CS;
 
-  --  Start of processing for Alias_Atomic_Check
+   --  Start of processing for Alias_Atomic_Check
 
begin
   --  If object size of component type isn't known, we cannot


diff --git a/gcc/ada/gnatfind.adb b/gcc/ada/gnatfind.adb
--- a/gcc/ada/gnatfind.adb
+++ b/gcc/ada/gnatfind.adb
@@ -86,7 +86,7 @@ procedure Gnatfind is
 
   procedure Check_Version_And_Help is new Check_Version_And_Help_G (Usage);
 
-  --  Start of processing for Parse_Cmd_Line
+   --  Start of processing for Parse_Cmd_Line
 
begin
   --  First check for --version or --help


diff --git a/gcc/ada/gnatlink.adb b/gcc/ada/gnatlink.adb
--- a/gcc/ada/gnatlink.adb
+++ b/gcc/ada/gnatlink.adb
@@ -407,7 +407,7 @@ procedure Gnatlink is
 
   procedure Check_Version_And_Help is new Check_Version_And_Help_G (Usage);
 
-  --  Start of processing for Process_Args
+   --  Start of processing for Process_Args
 
begin
   --  First, check for --version and --help


diff --git a/gcc/ada/gnatxref.adb b/gcc/ada/gnatxref.adb
--- a/gcc/ada/gnatxref.adb
+++ b/gcc/ada/gnatxref.adb
@@ -74,7 +74,7 @@ procedure Gnatxref is
 
   procedure Check_Version_And_Help is new Check_Version_And_Help_G (Usage);
 
-  --  Start of processing for Parse_Cmd_Line
+   --  Start of processing for Parse_Cmd_Line
 
begin
   --  First check for --version or --help


diff --git a/gcc/ada/gprep.adb b/gcc/ada/gprep.adb
--- a/gcc/ada/gprep.adb
+++ b/gcc/ada/gprep.adb
@@ -729,7 +729,7 @@ package body GPrep is
 
   procedure Check_Version_And_Help is new Check_Version_And_Help_G (Usage);
 
-  --  Start of processing for Scan_Command_Line
+   --  Start of processing for Scan_Command_Line
 
begin
   --  First check for --version or --help


diff --git a/gcc/ada/libgnat/a-cfhama.adb b/gcc/ada/libgnat/a-cfhama.adb
--- a/gcc/ada/libgnat/a-cfhama.adb
+++ b/gcc/ada/libgnat/a-cfhama.adb
@@ -151,7 +151,7 @@ is
  Insert (Target, N.Key, N.Element);
   end Insert_Element;
 
-  --  Start of processing for Assign
+   --  Start of processing for Assign
 
begin
   if Target'Address = Source'Address then


diff --git a/gcc/ada/libgnat/g-alleve.adb b/gcc/ada/libgnat/g-alleve.adb
--- a/gcc/ada/libgnat/g-alleve.adb
+++ b/gcc/ada/libgnat/g-alleve.adb
@@ -3779,7 +3779,7 @@ package body GNAT.Altivec.Low_Level_Vectors is
  return D;
   end Saturate;
 
-  --  Start of processing for vpksxus
+   --  Start of processing for vpksxus
 
begin
   for J in 0 .. N - 1 loop


diff --git a/gcc/ada/sem_ch12.adb b/gcc/ada/sem_ch12.adb
--- a/gcc/ada/sem_ch12.adb
+++ b/gcc/ada/sem_ch12.adb
@@ -17192,7 +17192,7 @@ package body Sem_Ch12 is
  end if;
   end Validate_Derived_Type_Default;
 
-  --  Start of processing for Validate_Formal_Type_Default
+   --  Start of processing for Validate_Formal_Type_Default
 
begin
   Analyze (Default);


diff --git a/gcc/ada/sem_ch1

[Ada] Improve error messages to include full package name

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
This patch improves error messages in the compiler so that missing
'with' error messages show the complete package name instead of a
limited number of selectors.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* err_vars.ads: Add new error message names and nodes.
* erroutc.adb (Set_Msg_Insertion_Name,
Set_Msg_Insertion_Name_Literal): Likewise.
* errout.adb (Set_Msg_Insertion_Node): Likewise.
* errout.ads: Likewise.
* exp_disp.adb (Check_Premature_Freezing): Modify setting of
Error_Msg_Node_2 to occur directly before Error_Msg call where
applicable.
* sem_ch8.adb (Error_Missing_With_Of_Known_Unit): Added to
handle the printing of full package names of known units.
(Undefined, Find_Expanded_Name): Replace error printing with
call to Error_Missing_With_Of_Known_Unit.diff --git a/gcc/ada/err_vars.ads b/gcc/ada/err_vars.ads
--- a/gcc/ada/err_vars.ads
+++ b/gcc/ada/err_vars.ads
@@ -100,6 +100,11 @@ package Err_Vars is
--
--  Some of these are initialized below, because they are read before being
--  set by clients.
+   --
+   --  Would it be desirable to use arrays (with element renamings) here
+   --  instead of individual variables, at least for the Error_Msg_Name_N and
+   --  Error_Msg_Node_N ??? This would allow simplifying existing code in some
+   --  cases (see errout.adb).
 
Error_Msg_Col : Column_Number;
--  Column for @ insertion character in message
@@ -116,6 +121,9 @@ package Err_Vars is
Error_Msg_Name_1 : Name_Id;
Error_Msg_Name_2 : Name_Id := No_Name;
Error_Msg_Name_3 : Name_Id := No_Name;
+   Error_Msg_Name_4 : Name_Id := No_Name;
+   Error_Msg_Name_5 : Name_Id := No_Name;
+   Error_Msg_Name_6 : Name_Id := No_Name;
--  Name_Id values for % insertion characters in message
 
Error_Msg_File_1 : File_Name_Type;
@@ -129,6 +137,10 @@ package Err_Vars is
 
Error_Msg_Node_1 : Node_Id;
Error_Msg_Node_2 : Node_Id := Empty;
+   Error_Msg_Node_3 : Node_Id := Empty;
+   Error_Msg_Node_4 : Node_Id := Empty;
+   Error_Msg_Node_5 : Node_Id := Empty;
+   Error_Msg_Node_6 : Node_Id := Empty;
--  Node_Id values for & insertion characters in message
 
Error_Msg_Warn : Boolean;


diff --git a/gcc/ada/errout.adb b/gcc/ada/errout.adb
--- a/gcc/ada/errout.adb
+++ b/gcc/ada/errout.adb
@@ -3578,10 +3578,14 @@ package body Errout is
  end if;
   end if;
 
-  --  The following assignment ensures that a second ampersand insertion
-  --  character will correspond to the Error_Msg_Node_2 parameter.
+  --  The following assignment ensures that further ampersand insertion
+  --  characters will correspond to the Error_Msg_Node_# parameter.
 
   Error_Msg_Node_1 := Error_Msg_Node_2;
+  Error_Msg_Node_2 := Error_Msg_Node_3;
+  Error_Msg_Node_3 := Error_Msg_Node_4;
+  Error_Msg_Node_4 := Error_Msg_Node_5;
+  Error_Msg_Node_5 := Error_Msg_Node_6;
end Set_Msg_Insertion_Node;
 
--


diff --git a/gcc/ada/errout.ads b/gcc/ada/errout.ads
--- a/gcc/ada/errout.ads
+++ b/gcc/ada/errout.ads
@@ -468,6 +468,9 @@ package Errout is
Error_Msg_Name_1 : Name_Id renames Err_Vars.Error_Msg_Name_1;
Error_Msg_Name_2 : Name_Id renames Err_Vars.Error_Msg_Name_2;
Error_Msg_Name_3 : Name_Id renames Err_Vars.Error_Msg_Name_3;
+   Error_Msg_Name_4 : Name_Id renames Err_Vars.Error_Msg_Name_4;
+   Error_Msg_Name_5 : Name_Id renames Err_Vars.Error_Msg_Name_5;
+   Error_Msg_Name_6 : Name_Id renames Err_Vars.Error_Msg_Name_6;
--  Name_Id values for % insertion characters in message
 
Error_Msg_File_1 : File_Name_Type renames Err_Vars.Error_Msg_File_1;
@@ -481,6 +484,10 @@ package Errout is
 
Error_Msg_Node_1 : Node_Id renames Err_Vars.Error_Msg_Node_1;
Error_Msg_Node_2 : Node_Id renames Err_Vars.Error_Msg_Node_2;
+   Error_Msg_Node_3 : Node_Id renames Err_Vars.Error_Msg_Node_3;
+   Error_Msg_Node_4 : Node_Id renames Err_Vars.Error_Msg_Node_4;
+   Error_Msg_Node_5 : Node_Id renames Err_Vars.Error_Msg_Node_5;
+   Error_Msg_Node_6 : Node_Id renames Err_Vars.Error_Msg_Node_6;
--  Node_Id values for & insertion characters in message
 
Error_Msg_Qual_Level : Nat renames Err_Vars.Error_Msg_Qual_Level;


diff --git a/gcc/ada/erroutc.adb b/gcc/ada/erroutc.adb
--- a/gcc/ada/erroutc.adb
+++ b/gcc/ada/erroutc.adb
@@ -1319,12 +1319,15 @@ package body Erroutc is
  end if;
   end if;
 
-  --  The following assignments ensure that the second and third percent
-  --  insertion characters will correspond to the Error_Msg_Name_2 and
-  --  Error_Msg_Name_3 as required.
+  --  The following assignments ensure that other percent insertion
+  --  characters will correspond to their appropriate Error_Msg_Name_#
+  --  values as required.
 
   Error_Msg_Name_1 := Error_Msg_Name_2;
   Error_Msg_Name_2 := Error_Msg_Name_3;
+  Error_Msg_Name_3 := Error_

[Ada] Remove redundant guards for empty list

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Routine Has_Excluded_Declaration iterates over declarations with
First/Present/Next, which is safe when declarations are No_List.

Cleanup related to excessive inlining-for-proof by GNATprove.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* inline.adb (Build_Body_To_Inline): Remove redundant guards.
* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Likewise.diff --git a/gcc/ada/inline.adb b/gcc/ada/inline.adb
--- a/gcc/ada/inline.adb
+++ b/gcc/ada/inline.adb
@@ -1330,9 +1330,7 @@ package body Inline is
  return;
   end if;
 
-  if Present (Declarations (N))
-and then Has_Excluded_Declaration (Spec_Id, Declarations (N))
-  then
+  if Has_Excluded_Declaration (Spec_Id, Declarations (N)) then
  return;
   end if;
 
@@ -2622,9 +2620,7 @@ package body Inline is
 
   --  Check excluded declarations
 
-  elsif Present (Declarations (N))
-and then Has_Excluded_Declaration (Spec_Id, Declarations (N))
-  then
+  elsif Has_Excluded_Declaration (Spec_Id, Declarations (N)) then
  return;
 
   --  Check excluded statements. There is no need to protect us against
@@ -4388,9 +4384,7 @@ package body Inline is
 return True;
 
  elsif Nkind (S) = N_Block_Statement then
-if Present (Declarations (S))
-  and then Has_Excluded_Declaration (Subp, Declarations (S))
-then
+if Has_Excluded_Declaration (Subp, Declarations (S)) then
return True;
 
 elsif Present (Handled_Statement_Sequence (S)) then


diff --git a/gcc/ada/sem_ch6.adb b/gcc/ada/sem_ch6.adb
--- a/gcc/ada/sem_ch6.adb
+++ b/gcc/ada/sem_ch6.adb
@@ -4931,9 +4931,7 @@ package body Sem_Ch6 is
  --  by the GCC backend (ie. "function might not be
  --  inlinable").
 
- if Present (Subp_Decl)
-   and then Has_Excluded_Declaration (Spec_Id, Subp_Decl)
- then
+ if Has_Excluded_Declaration (Spec_Id, Subp_Decl) then
 null;
 
  elsif Has_Excluded_Statement




[Ada] Set Error_Msg_Warn before use of << insertion

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Calls to Error_Msg procedures with a message using the < or <<
insertions need to set appropriately Error_Msg_Warn. This was not done
in one call, which would lead to spurious errors when changing the
implementation of a runtime unit. This fixes it so that changes can be
applied.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_ch4.adb (Expand_Allocator_Expression): Set Error_Msg_Warn
correctly.diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -835,6 +835,7 @@ package body Exp_Ch4 is
   Make_Raise_Program_Error (Loc,
 Reason => PE_Accessibility_Check_Failed));
 
+Error_Msg_Warn := SPARK_Mode /= On;
 Error_Msg_N ("anonymous access discriminant is too deep for use"
  & " in allocator<<", N);
 Error_Msg_N ("\Program_Error [<<", N);




[Ada] Prevent inlining-for-proof for calls inside ELSIF condition

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
In GNATprove we don't want inlining-for-proof to expand subprogram
bodies into actions attached to nodes. These actions are attached either
to expressions or to statements.

For expressions, we prevented inlining by Is_Potentially_Unevaluated.
For statements, we prevented inlining by In_While_Loop_Condition, but
forgot about actions attached to ELSIF condition.

There are no other expression or statements nodes where actions could be
attached, so this fix is exhaustive.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_util.ads (In_Statement_Condition_With_Actions): Renamed
from In_While_Loop_Condition; move to fit the alphabetic order.
* sem_util.adb (In_Statement_Condition_With_Actions): Detect
Elsif condition; stop search on other statements; prevent search
from going too far; move to fit the alphabetic order.
* sem_res.adb (Resolve_Call): Adapt caller.diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -7346,7 +7346,7 @@ package body Sem_Res is
--  loops, as this would create complex actions inside
--  the condition, that are not handled by GNATprove.
 
-   elsif In_While_Loop_Condition (N) then
+   elsif In_Statement_Condition_With_Actions (N) then
   Cannot_Inline
 ("cannot inline & (in while loop condition)?", N, Nam_UA);
 


diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -14986,41 +14986,58 @@ package body Sem_Util is
   return False;
end In_Return_Value;
 
-   -
-   -- In_Visible_Part --
-   -
-
-   function In_Visible_Part (Scope_Id : Entity_Id) return Boolean is
-   begin
-  return Is_Package_Or_Generic_Package (Scope_Id)
-and then In_Open_Scopes (Scope_Id)
-and then not In_Package_Body (Scope_Id)
-and then not In_Private_Part (Scope_Id);
-   end In_Visible_Part;
-
-   -
-   -- In_While_Loop_Condition --
-   -
+   -
+   -- In_Statement_Condition_With_Actions --
+   -
 
-   function In_While_Loop_Condition (N : Node_Id) return Boolean is
+   function In_Statement_Condition_With_Actions (N : Node_Id) return Boolean is
   Prev : Node_Id := N;
   P: Node_Id := Parent (N);
   --  P and Prev will be used for traversing the AST, while maintaining an
   --  invariant that P = Parent (Prev).
begin
-  loop
- if No (P) then
-return False;
- elsif Nkind (P) = N_Iteration_Scheme
+  while Present (P) loop
+ if Nkind (P) = N_Iteration_Scheme
and then Prev = Condition (P)
  then
 return True;
- else
-Prev := P;
-P := Parent (P);
+
+ elsif Nkind (P) = N_Elsif_Part
+   and then Prev = Condition (P)
+ then
+return True;
+
+ --  No point in going beyond statements
+
+ elsif Nkind (N) in N_Statement_Other_Than_Procedure_Call
+  | N_Procedure_Call_Statement
+ then
+exit;
+
+ --  Prevent the search from going too far
+
+ elsif Is_Body_Or_Package_Declaration (P) then
+exit;
  end if;
+
+ Prev := P;
+ P := Parent (P);
   end loop;
-   end In_While_Loop_Condition;
+
+  return False;
+   end In_Statement_Condition_With_Actions;
+
+   -
+   -- In_Visible_Part --
+   -
+
+   function In_Visible_Part (Scope_Id : Entity_Id) return Boolean is
+   begin
+  return Is_Package_Or_Generic_Package (Scope_Id)
+and then In_Open_Scopes (Scope_Id)
+and then not In_Package_Body (Scope_Id)
+and then not In_Private_Part (Scope_Id);
+   end In_Visible_Part;
 

-- Incomplete_Or_Partial_View --


diff --git a/gcc/ada/sem_util.ads b/gcc/ada/sem_util.ads
--- a/gcc/ada/sem_util.ads
+++ b/gcc/ada/sem_util.ads
@@ -1723,14 +1723,18 @@ package Sem_Util is
--  This version is more efficient than calling the single root version of
--  Is_Subtree twice.
 
+   function In_Statement_Condition_With_Actions (N : Node_Id) return Boolean;
+   --  Returns true if the expression N occurs within the condition of a
+   --  statement node with actions. Subsidiary to inlining for GNATprove, where
+   --  inlining of function calls in such expressions would expand the called
+   --  body into actions list of the condition node. GNATprove cannot yet cope
+   --  with such a complex AST.
+
function In_Visible_Part (Scope_Id : Entity_Id) return Boolean;
--  Determine whether a declaration occurs within the visible part of a
--  package specification. The package must be on t

[Ada] Remove CodePeer annotations for pragma Loop_Variant

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Pragma Loop_Variant is now expanded into a null statement in CodePeer
mode. Remove annotation related to false positives in runtime units.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* libgnat/s-expmod.adb: Remove CodePeer annotation for pragma
Loop_Variant.diff --git a/gcc/ada/libgnat/s-expmod.adb b/gcc/ada/libgnat/s-expmod.adb
--- a/gcc/ada/libgnat/s-expmod.adb
+++ b/gcc/ada/libgnat/s-expmod.adb
@@ -251,9 +251,6 @@ is
 pragma Loop_Invariant (Equal_Modulo
   (Big (Result) * Big (Factor) ** Exp, Big (Left) ** Right));
 pragma Loop_Variant (Decreases => Exp);
-pragma Annotate
-  (CodePeer, False_Positive,
-   "validity check", "confusion on generated code");
 
 if Exp rem 2 /= 0 then
pragma Assert




[Ada] Fully qualify name in JSON representation info

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
The current termination condition of the recursion is wrong.  When in
JSON mode, names should be fully qualified. This requires to stop not at
the first encountered compilation unit but to recurse up to Standard.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* repinfo.adb (List_Name): Rework termination condition.diff --git a/gcc/ada/repinfo.adb b/gcc/ada/repinfo.adb
--- a/gcc/ada/repinfo.adb
+++ b/gcc/ada/repinfo.adb
@@ -44,6 +44,7 @@ with Sinfo.Nodes;use Sinfo.Nodes;
 with Sinfo.Utils;use Sinfo.Utils;
 with Sinput; use Sinput;
 with Snames; use Snames;
+with Stand;  use Stand;
 with Stringt;use Stringt;
 with Table;
 with Ttypes;
@@ -874,10 +875,11 @@ package body Repinfo is
   C : Character;
 
begin
-  --  List the qualified name recursively, except
-  --  at compilation unit level in default mode.
+  --  In JSON mode, we recurse up to Standard. This is also valid in
+  --  default mode where we recurse up to the first compilation unit and
+  --  should not get to Standard.
 
-  if Is_Compilation_Unit (Ent) then
+  if Scope (Ent) = Standard_Standard then
  null;
   elsif not Is_Compilation_Unit (Scope (Ent))
 or else List_Representation_Info_To_JSON




[Ada] Remove extra space around binary operators

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Style cleanups. Violation initially spotted while reading the code for
UI_Expon; other occurrences found with grep (and examined manually,
because sometimes the extra space is needed for a code layout).

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* bindgen.adb, errout.adb, exp_unst.adb, gnatchop.adb,
libgnat/a-ngcefu.adb, libgnat/a-strunb.adb,
libgnat/a-stwiun.adb, libgnat/a-stzunb.adb,
libgnat/a-wtedit.adb, libgnat/g-debpoo.adb, osint.adb,
sigtramp-vxworks.c, uintp.adb: Remove extra whitespace around +,
-, *, / and **.diff --git a/gcc/ada/bindgen.adb b/gcc/ada/bindgen.adb
--- a/gcc/ada/bindgen.adb
+++ b/gcc/ada/bindgen.adb
@@ -2907,7 +2907,7 @@ package body Bindgen is
 Nlen := Name'Length;
 Name (Name'Last) := Character'Val (J mod 10 + Character'Pos ('0'));
 Name (Name'Last - 1) :=
-  Character'Val (J /   10 + Character'Pos ('0'));
+  Character'Val (J / 10 + Character'Pos ('0'));
  end if;
 
  for K in ALIs.First .. ALIs.Last loop


diff --git a/gcc/ada/errout.adb b/gcc/ada/errout.adb
--- a/gcc/ada/errout.adb
+++ b/gcc/ada/errout.adb
@@ -3876,7 +3876,7 @@ package body Errout is
   --  dealing with some cases of internal names).
 
   while Name_Len > 1 and then Name_Buffer (Name_Len) in 'A' .. 'Z' loop
- Name_Len := Name_Len  - 1;
+ Name_Len := Name_Len - 1;
   end loop;
 
   --  If we have any of the names from standard that start with the


diff --git a/gcc/ada/exp_unst.adb b/gcc/ada/exp_unst.adb
--- a/gcc/ada/exp_unst.adb
+++ b/gcc/ada/exp_unst.adb
@@ -856,7 +856,7 @@ package body Exp_Unst is
  S : Entity_Id := E;
 
   begin
- for J in reverse 1 .. L  - 1 loop
+ for J in reverse 1 .. L - 1 loop
 S := Enclosing_Subprogram (S);
 Subps.Table (Subp_Index (S)).Reachable := True;
  end loop;


diff --git a/gcc/ada/gnatchop.adb b/gcc/ada/gnatchop.adb
--- a/gcc/ada/gnatchop.adb
+++ b/gcc/ada/gnatchop.adb
@@ -721,7 +721,7 @@ procedure Gnatchop is
   begin
  Parse_Token (Source, Parse_Ptr, Token_Ptr);
 
- if Source'Last  + 1 - Token_Ptr < Literal'Length
+ if Source'Last + 1 - Token_Ptr < Literal'Length
or else
  Source (Token_Ptr .. Token_Ptr + Literal'Length - 1) /= Literal
  then


diff --git a/gcc/ada/libgnat/a-ngcefu.adb b/gcc/ada/libgnat/a-ngcefu.adb
--- a/gcc/ada/libgnat/a-ngcefu.adb
+++ b/gcc/ada/libgnat/a-ngcefu.adb
@@ -225,7 +225,7 @@ package body Ada.Numerics.Generic_Complex_Elementary_Functions is
   elsif abs Re (X) > 1.0 / Epsilon or else
 abs Im (X) > 1.0 / Epsilon
   then
- Xt := Complex_One  /  X;
+ Xt := Complex_One / X;
 
  if Re (X) < 0.0 then
 Set_Re (Xt, PI - Re (Xt));
@@ -442,7 +442,7 @@ package body Ada.Numerics.Generic_Complex_Elementary_Functions is
   if abs Re (X) < Square_Root_Epsilon and then
  abs Im (X) < Square_Root_Epsilon
   then
- return Complex_One  /  X;
+ return Complex_One / X;
 
   elsif Im (X) > Log_Inverse_Epsilon_2 then
  return -Complex_I;
@@ -463,7 +463,7 @@ package body Ada.Numerics.Generic_Complex_Elementary_Functions is
   if abs Re (X) < Square_Root_Epsilon and then
  abs Im (X) < Square_Root_Epsilon
   then
- return Complex_One  /  X;
+ return Complex_One / X;
 
   elsif Re (X) > Log_Inverse_Epsilon_2 then
  return Complex_One;


diff --git a/gcc/ada/libgnat/a-strunb.adb b/gcc/ada/libgnat/a-strunb.adb
--- a/gcc/ada/libgnat/a-strunb.adb
+++ b/gcc/ada/libgnat/a-strunb.adb
@@ -721,7 +721,7 @@ package body Ada.Strings.Unbounded is
   Realloc_For_Chunk (Source, New_Item'Length);
 
   Source.Reference
-(Before +  New_Item'Length .. Source.Last + New_Item'Length) :=
+(Before + New_Item'Length .. Source.Last + New_Item'Length) :=
Source.Reference (Before .. Source.Last);
 
   Source.Reference (Before .. Before + New_Item'Length - 1) := New_Item;


diff --git a/gcc/ada/libgnat/a-stwiun.adb b/gcc/ada/libgnat/a-stwiun.adb
--- a/gcc/ada/libgnat/a-stwiun.adb
+++ b/gcc/ada/libgnat/a-stwiun.adb
@@ -718,7 +718,7 @@ package body Ada.Strings.Wide_Unbounded is
   Realloc_For_Chunk (Source, New_Item'Length);
 
   Source.Reference
-(Before +  New_Item'Length .. Source.Last + New_Item'Length) :=
+(Before + New_Item'Length .. Source.Last + New_Item'Length) :=
Source.Reference (Before .. Source.Last);
 
   Source.Reference (Before .. Before + New_Item'Length - 1) := New_Item;


diff --git a/gcc/ada/libgnat/a-stzunb.adb b/gcc/ada/libgnat/a-stzunb.adb
--- a/gcc/ada/libgnat/a-stzunb.adb
+++ b/gcc/ada/libgnat/a-stzunb.adb
@@ -726,7 +726,7 @@ package body Ada.Strings.Wide_Wide_Unbounded is
   Reall

[Ada] Simplify conversions from Uint to Char_Code

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Replace "Char_Code (UI_To_Int (...))" with "UI_To_CC (...).

Cleanup related to handling characters in GNATprove counterexamples;
semantics is unaffected.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* par-prag.adb (Prag): Simplify conversion of character codes.
* sem_case.adb (Choice_Image): Likewise.
(Lit_Of): Likewise.diff --git a/gcc/ada/par-prag.adb b/gcc/ada/par-prag.adb
--- a/gcc/ada/par-prag.adb
+++ b/gcc/ada/par-prag.adb
@@ -1266,8 +1266,7 @@ begin
 
  elsif Nkind (A) = N_Character_Literal then
 declare
-   R : constant Char_Code :=
- Char_Code (UI_To_Int (Char_Literal_Value (A)));
+   R : constant Char_Code := UI_To_CC (Char_Literal_Value (A));
 begin
if In_Character_Range (R) then
   Wide_Character_Encoding_Method :=


diff --git a/gcc/ada/sem_case.adb b/gcc/ada/sem_case.adb
--- a/gcc/ada/sem_case.adb
+++ b/gcc/ada/sem_case.adb
@@ -1104,7 +1104,7 @@ package body Sem_Case is
  C := UI_To_Int (Value);
 
  if C in 16#20# .. 16#7E# then
-Set_Character_Literal_Name (Char_Code (UI_To_Int (Value)));
+Set_Character_Literal_Name (UI_To_CC (Value));
 return Name_Find;
  end if;
 
@@ -2925,7 +2925,7 @@ package body Sem_Case is
  --  is created with the appropriate Char_Code and Chars fields.
 
  if Is_Standard_Character_Type (Choice_Type) then
-Set_Character_Literal_Name (Char_Code (UI_To_Int (Value)));
+Set_Character_Literal_Name (UI_To_CC (Value));
 Lit :=
   Make_Character_Literal (Loc,
 Chars  => Name_Find,




[Ada] Fix invalid memory access on finalization of class-wide type

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
This patch corrects issues in the compiler whereby finalization of a
heap- allocated class-wide type may cause an invalid memory read at
runtime when the type in question contains a component whose type has a
large alignment.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* exp_attr.adb (Expand_N_Attribute_Reference) :
Deal specifically wth class-wide equivalent types without a
parent.
* exp_util.adb (Build_Allocate_Deallocate_Proc): Extract
allocator node for calculation of alignment actual and modify
alignment for allocators of class-wide types with associated
expressions.
(Make_CW_Equivalent_Type): Handle interface types differently
when generating the equivalent record.
* sem_aux.adb (First_Tag_Component): Accept class-wide
equivalent types too.diff --git a/gcc/ada/exp_attr.adb b/gcc/ada/exp_attr.adb
--- a/gcc/ada/exp_attr.adb
+++ b/gcc/ada/exp_attr.adb
@@ -6704,7 +6704,21 @@ package body Exp_Attr is
 Prefix_Is_Type := False;
  end if;
 
- if Is_Class_Wide_Type (Ttyp) then
+ --  In the case of a class-wide equivalent type without a parent,
+ --  the _Tag component has been built in Make_CW_Equivalent_Type
+ --  manually and must be referenced directly.
+
+ if Ekind (Ttyp) = E_Class_Wide_Subtype
+   and then Present (Equivalent_Type (Ttyp))
+   and then No (Parent_Subtype (Equivalent_Type (Ttyp)))
+ then
+Ttyp := Equivalent_Type (Ttyp);
+
+ --  In all the other cases of class-wide type, including an equivalent
+ --  type with a parent, the _Tag component ultimately present is that
+ --  of the root type.
+
+ elsif Is_Class_Wide_Type (Ttyp) then
 Ttyp := Root_Type (Ttyp);
  end if;
 


diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb
--- a/gcc/ada/exp_util.adb
+++ b/gcc/ada/exp_util.adb
@@ -890,6 +890,8 @@ package body Exp_Util is
  Size_Id : constant Entity_Id := Make_Temporary (Loc, 'S');
 
  Actuals  : List_Id;
+ Alloc_Nod: Node_Id := Empty;
+ Alloc_Expr   : Node_Id := Empty;
  Fin_Addr_Id  : Entity_Id;
  Fin_Mas_Act  : Node_Id;
  Fin_Mas_Id   : Entity_Id;
@@ -897,6 +899,36 @@ package body Exp_Util is
  Subpool  : Node_Id := Empty;
 
   begin
+ --  When we are building an allocator procedure, extract the allocator
+ --  node for later processing and calculation of alignment.
+
+ if Is_Allocate then
+
+if Nkind (Expr) = N_Allocator then
+   Alloc_Nod := Expr;
+
+--  When Expr is an object declaration we have to examine its
+--  expression.
+
+elsif Nkind (Expr) = N_Object_Declaration
+  and then Nkind (Expression (Expr)) = N_Allocator
+then
+   Alloc_Nod := Expression (Expr);
+
+--  Otherwise, we raise an error because we should have found one
+
+else
+   raise Program_Error;
+end if;
+
+--  Extract the qualified expression if there is one from the
+--  allocator.
+
+if Nkind (Expression (Alloc_Nod)) = N_Qualified_Expression then
+   Alloc_Expr := Expression (Alloc_Nod);
+end if;
+ end if;
+
  --  Step 1: Construct all the actuals for the call to library routine
  --  Allocate_Any_Controlled / Deallocate_Any_Controlled.
 
@@ -967,19 +999,27 @@ package body Exp_Util is
  Append_To (Actuals, New_Occurrence_Of (Addr_Id, Loc));
  Append_To (Actuals, New_Occurrence_Of (Size_Id, Loc));
 
- if (Is_Allocate or else not Is_Class_Wide_Type (Desig_Typ))
+ --  Class-wide allocations without expressions and non-class-wide
+ --  allocations can be performed without getting the alignment from
+ --  the type's Type Specific Record.
+
+ if ((Is_Allocate and then No (Alloc_Expr))
+   or else
+ not Is_Class_Wide_Type (Desig_Typ))
and then not Use_Secondary_Stack_Pool
  then
 Append_To (Actuals, New_Occurrence_Of (Alig_Id, Loc));
 
- --  For deallocation of class-wide types we obtain the value of
- --  alignment from the Type Specific Record of the deallocated object.
+ --  For operations on class-wide types we obtain the value of
+ --  alignment from the Type Specific Record of the relevant object.
  --  This is needed because the frontend expansion of class-wide types
  --  into equivalent types confuses the back end.
 
  else
 --  Generate:
 -- Obj.all'Alignment
+--   or
+-- Alloc_Expr'Alignment
 
 --  ... because 'Alignment applied to class-wide types is expanded
 --  into the code that reads th

[Ada] Raise Constraint_Error when converting negative values to Char_Code

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
GNATprove relies on the comment for Get_Enum_Lit_From_Pos, which
promises to raise Constraint_Error when its Pos parameter is not among
the representation values for enumeration literal. However, this promise
was only respected in builds with range checks enabled.

The root problem was that a similar comment for conversion from Uint to
Char_Code was likewise only respected in builds with range checks
enabled.

Now both routines respect promises in their comments. The behaviour of
GNAT itself is not affected. The fix is needed to filter garbage
counterexamples generated by provers for characters objects in SPARK.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* uintp.adb (UI_To_CC): Guard against illegal inputs; reuse
UI_To_Int.diff --git a/gcc/ada/uintp.adb b/gcc/ada/uintp.adb
--- a/gcc/ada/uintp.adb
+++ b/gcc/ada/uintp.adb
@@ -2233,30 +2233,17 @@ package body Uintp is
 
function UI_To_CC (Input : Valid_Uint) return Char_Code is
begin
-  if Direct (Input) then
- return Char_Code (Direct_Val (Input));
+  --  Char_Code and Int have equal upper bounds, so simply guard against
+  --  negative Input and reuse conversion to Int. We trust that conversion
+  --  to Int will raise Constraint_Error when Input is too large.
 
-  --  Case of input is more than one digit
+  pragma Assert
+(Char_Code'First = 0 and then Int (Char_Code'Last) = Int'Last);
 
+  if Input >= Uint_0 then
+ return Char_Code (UI_To_Int (Input));
   else
- declare
-In_Length : constant Int := N_Digits (Input);
-In_Vec: UI_Vector (1 .. In_Length);
-Ret_CC: Char_Code;
-
- begin
-Init_Operand (Input, In_Vec);
-
---  We assume value is positive
-
-Ret_CC := 0;
-for Idx in In_Vec'Range loop
-   Ret_CC := Ret_CC * Char_Code (Base) +
-  Char_Code (abs In_Vec (Idx));
-end loop;
-
-return Ret_CC;
- end;
+ raise Constraint_Error;
   end if;
end UI_To_CC;
 




[Ada] Suggest use of First_Valid/Last_Valid on type with static predicate

2022-05-09 Thread Pierre-Marie de Rodat via Gcc-patches
Attributes First_Valid/Last_Valid can be used on types with static
predicate, instead of First/Last/Range. Include that suggestion in
the corresponding error message.

Tested on x86_64-pc-linux-gnu, committed on trunk

gcc/ada/

* sem_util.adb (Bad_Predicated_Subtype_Use): Add continuation
message.diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -1719,6 +1719,31 @@ package body Sem_Util is
 Error_Msg_FE (Msg, N, Typ);
  end if;
 
+ --  Suggest to use First_Valid/Last_Valid instead of First/Last/Range
+ --  if the predicate is static.
+
+ if not Has_Dynamic_Predicate_Aspect (Typ)
+   and then Has_Static_Predicate (Typ)
+   and then Nkind (N) = N_Attribute_Reference
+ then
+declare
+   Aname   : constant Name_Id := Attribute_Name (N);
+   Attr_Id : constant Attribute_Id := Get_Attribute_Id (Aname);
+begin
+   case Attr_Id is
+  when Attribute_First =>
+ Error_Msg_F ("\use attribute First_Valid instead", N);
+  when Attribute_Last =>
+ Error_Msg_F ("\use attribute Last_Valid instead", N);
+  when Attribute_Range =>
+ Error_Msg_F ("\use attributes First_Valid and "
+  & "Last_Valid instead", N);
+  when others =>
+ null;
+   end case;
+end;
+ end if;
+
  --  Emit an optional suggestion on how to remedy the error if the
  --  context warrants it.
 




Re: [PATCH] configure: add --disable-fix-includes

2022-05-09 Thread Andreas Schwab
On Mai 09 2022, Martin Liška wrote:

> +cat >>confdefs.h <<_ACEOF
> +#define FIX_INCLUDES $disable_fix_includes
> +_ACEOF

Where does this come from?  Also, nothing uses it.

> diff --git a/gcc/configure.ac b/gcc/configure.ac
> index 1171c946e6e..6015e403aa9 100644
> --- a/gcc/configure.ac
> +++ b/gcc/configure.ac
> @@ -842,6 +842,12 @@ gather_stats=`if test $enable_gather_detailed_mem_stats 
> != no; then echo 1; else
>  AC_DEFINE_UNQUOTED(GATHER_STATISTICS, $gather_stats,
>  [Define to enable detailed memory allocation stats gathering.])
>  
> +AC_ARG_ENABLE(disable-fix-includes,
> +[AS_HELP_STRING([--disable-fix-includes],
> + [skip fixing of includes])], [],
> +[disable_fix_includes=yes])

That creates the (non-working) options --enable-disable-fix-includes and
--disable-disable-fix-includes, but not --disable-fix-includes.  It also
disables fixincludes by default, which doesn't look intended.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
"And now for something completely different."


[PATCH] testsuite: Make AArch64 attributes_7.c generate unique report lines.

2022-05-09 Thread Christophe Lyon via Gcc-patches
This test is executed in both C and C++ modes, lines 98 and 100 pass
in C++ and are xfail in C.

This results in similar lines in gcc.sum and g++.sum, differing by the
PASS or XFAIL prefix, which confuses compare_test: it reports these
tests twice, as "now fail, but worked before" and "now work, but
didn't before". To make the diagnostic different betweek C and C++, I
use $tool in the dg-error comment field.

2022-05-06  Christophe Lyon  

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/attributes_7.c: Make
diagnostic unique.
---
 .../gcc.target/aarch64/sve/acle/general/attributes_7.c| 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_7.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_7.c
index 621666ce6c9..95be60591fb 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_7.c
@@ -95,9 +95,9 @@ f (int c)
   fb = sb;
 
   (void) (c ? sb : sb);
-  (void) (c ? sb : fb); // { dg-error {type mismatch|different types} "" { 
xfail c } }
+  (void) (c ? sb : fb); // { dg-error {type mismatch|different types} "$tool" 
{ xfail c } }
 
-  (void) (c ? fb : sb); // { dg-error {type mismatch|different types} "" { 
xfail c } }
+  (void) (c ? fb : sb); // { dg-error {type mismatch|different types} "$tool" 
{ xfail c } }
   (void) (c ? fb : fb);
 }
 
-- 
2.25.1



[PATCH] rs6000: avoid peeking eof after __vector

2022-05-09 Thread Jiufu Guo via Gcc-patches
Hi!

This patch is based on:
https://gcc.gnu.org/pipermail/gcc-patches/2022-March/592102.html
And update the 'function comment' to make it consistent with code.

There is a rare corner case: where vector is followed only by one
valid identifer and the ";" which is near the end of the file.

Like the case in PR101168:
using vdbl =  __vector double;
#define BREAK 1

For this case, "vector double" is followed by CPP_SEMICOLON and then
EOF.  There is no more tokens need to check for this case.

This patch pass bootstrap and regtest on ppc64 and ppc64le.


BR,
Jiufu


PR preprocessor/101168

gcc/ChangeLog:

* config/rs6000/rs6000-c.cc (rs6000_macro_to_expand):
Avoid empty identifier.

gcc/testsuite/ChangeLog:

* g++.target/powerpc/pr101168.C: New test.


---
 gcc/config/rs6000/rs6000-c.cc   | 9 +
 gcc/testsuite/g++.target/powerpc/pr101168.C | 6 ++
 2 files changed, 11 insertions(+), 4 deletions(-)
 create mode 100644 gcc/testsuite/g++.target/powerpc/pr101168.C

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 84bb98f94fb..9c8cbd7a66e 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -178,9 +178,8 @@ rid_int128(void)
   return RID_MAX + 1;
 }
 
-/* Called to decide whether a conditional macro should be expanded.
-   Since we have exactly one such macro (i.e, 'vector'), we do not
-   need to examine the 'tok' parameter.  */
+/* Called to decide whether a conditional macro should be expanded
+   by peeking two or more tokens(_bool/_pixel/int/long/double/...).  */
 
 static cpp_hashnode *
 rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token *tok)
@@ -282,7 +281,9 @@ rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token 
*tok)
expand_bool_pixel = __pixel_keyword;
  else if (ident == C_CPP_HASHNODE (__bool_keyword))
expand_bool_pixel = __bool_keyword;
- else
+
+ /* If there are more tokens to check.  */
+ else if (ident)
{
  /* Try two tokens down, too.  */
  do
diff --git a/gcc/testsuite/g++.target/powerpc/pr101168.C 
b/gcc/testsuite/g++.target/powerpc/pr101168.C
new file mode 100644
index 000..284e77fdc88
--- /dev/null
+++ b/gcc/testsuite/g++.target/powerpc/pr101168.C
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec" } */
+
+using vdbl =  __vector double;
+#define BREAK 1
-- 
2.25.1



Re: [PATCH] Use more ARRAY_SIZE.

2022-05-09 Thread Arnaud Charlet via Gcc-patches
> Patch can bootstrap on x86_64-linux-gnu and survives regression tests.
> 
> Ready to be installed?
> Thanks,
> Martin
> 
> gcc/ada/ChangeLog:
> 
>   * locales.c (iso_639_1_to_639_3): Use ARRAY_SIZE.
>   (language_name_to_639_3): Likewise.
>   (country_name_to_3166): Likewise.

Can you clarify where ARRAY_SIZE is defined? locales.c only contains:

#include 
#include 
#include 

So I don't see how your patch can work, can you clarify?
Also, did you perform a build with Ada enabled with this change?

Arno


Re: [PATCH] Use more ARRAY_SIZE.

2022-05-09 Thread Martin Liška
On 5/9/22 12:21, Arnaud Charlet wrote:
> So I don't see how your patch can work, can you clarify?

Sorry for that, fixed in the updated version.

Cheers,
MartinFrom 5ad8fe059d3419446647eadf8785c768b647d15b Mon Sep 17 00:00:00 2001
From: Martin Liska 
Date: Thu, 13 Jan 2022 18:46:26 +0100
Subject: [PATCH] Use more ARRAY_SIZE.

gcc/ada/ChangeLog:

	* locales.c (iso_639_1_to_639_3): Use ARRAY_SIZE.
	(language_name_to_639_3): Likewise.
	(country_name_to_3166): Likewise.

gcc/analyzer/ChangeLog:

	* engine.cc (exploded_node::get_dot_fillcolor): Use ARRAY_SIZE.
	* function-set.cc (test_stdio_example): Likewise.
	* sm-file.cc (get_file_using_fns): Likewise.
	* sm-malloc.cc (malloc_state_machine::unaffected_by_call_p): Likewise.
	* sm-signal.cc (get_async_signal_unsafe_fns): Likewise.

gcc/ChangeLog:

	* attribs.cc (diag_attr_exclusions): Use ARRAY_SIZE.
	(decls_mismatched_attributes): Likewise.
	* builtins.cc (c_strlen): Likewise.
	* cfg.cc (DEF_BASIC_BLOCK_FLAG): Likewise.
	* common/config/aarch64/aarch64-common.cc (aarch64_option_init_struct): Likewise.
	* config/aarch64/aarch64-builtins.cc (aarch64_lookup_simd_builtin_type): Likewise.
	(aarch64_init_simd_builtin_types): Likewise.
	(aarch64_init_builtin_rsqrt): Likewise.
	* config/aarch64/aarch64.cc (is_madd_op): Likewise.
	* config/arm/arm-builtins.cc (arm_lookup_simd_builtin_type): Likewise.
	(arm_init_simd_builtin_types): Likewise.
	* config/avr/gen-avr-mmcu-texi.cc (mcus[ARRAY_SIZE): Likewise.
	(c_prefix): Likewise.
	(main): Likewise.
	* config/c6x/c6x.cc (N_SAVE_ORDER): Likewise.
	* config/darwin-c.cc (darwin_register_frameworks): Likewise.
	* config/gcn/mkoffload.cc (process_obj): Likewise.
	* config/i386/i386-builtins.cc (get_builtin_code_for_version): Likewise.
	(fold_builtin_cpu): Likewise.
	* config/m32c/m32c.cc (PUSHM_N): Likewise.
	* config/nvptx/mkoffload.cc (process): Likewise.
	* config/rs6000/driver-rs6000.cc (host_detect_local_cpu): Likewise.
	* config/s390/s390.cc (NR_C_MODES): Likewise.
	* config/tilepro/gen-mul-tables.cc (find_sequences): Likewise.
	(create_insn_code_compression_table): Likewise.
	* config/vms/vms.cc (NBR_CRTL_NAMES): Likewise.
	* diagnostic-format-json.cc (json_from_expanded_location): Likewise.
	* dwarf2out.cc (ARRAY_SIZE): Likewise.
	* genhooks.cc (emit_documentation): Likewise.
	(emit_init_macros): Likewise.
	* gimple-ssa-sprintf.cc (format_floating): Likewise.
	* gimple-ssa-warn-access.cc (memmodel_name): Likewise.
	* godump.cc (keyword_hash_init): Likewise.
	* hash-table.cc (hash_table_higher_prime_index): Likewise.
	* input.cc (for_each_line_table_case): Likewise.
	* ipa-free-lang-data.cc (free_lang_data): Likewise.
	* ipa-inline.cc (sanitize_attrs_match_for_inline_p): Likewise.
	* optc-save-gen.awk: Likewise.
	* spellcheck.cc (test_metric_conditions): Likewise.
	* tree-vect-slp-patterns.cc (sizeof): Likewise.
	(ARRAY_SIZE): Likewise.
	* tree.cc (build_common_tree_nodes): Likewise.

gcc/c-family/ChangeLog:

	* c-common.cc (ARRAY_SIZE): Use ARRAY_SIZE.
	(c_common_nodes_and_builtins): Likewise.
	* c-format.cc (check_tokens): Likewise.
	(check_plain): Likewise.
	* c-pragma.cc (c_pp_lookup_pragma): Likewise.
	(init_pragma): Likewise.
	* known-headers.cc (get_string_macro_hint): Likewise.
	(get_stdlib_header_for_name): Likewise.
	* c-attribs.cc: Likewise.

gcc/c/ChangeLog:

	* c-decl.cc (match_builtin_function_types): Use ARRAY_SIZE.

gcc/cp/ChangeLog:

	* module.cc (depset::entity_kind_name): Use ARRAY_SIZE.
	* name-lookup.cc (get_std_name_hint): Likewise.
	* parser.cc (cp_parser_new): Likewise.

gcc/fortran/ChangeLog:

	* frontend-passes.cc (gfc_code_walker): Use ARRAY_SIZE.
	* openmp.cc (gfc_match_omp_context_selector_specification): Likewise.
	* trans-intrinsic.cc (conv_intrinsic_ieee_builtin): Likewise.
	* trans-types.cc (gfc_get_array_descr_info): Likewise.

gcc/jit/ChangeLog:

	* jit-builtins.cc (find_builtin_by_name): Use ARRAY_SIZE.
	(get_string_for_type_id): Likewise.
	* jit-recording.cc (recording::context::context): Likewise.

gcc/lto/ChangeLog:

	* lto-common.cc (lto_resolution_read): Use ARRAY_SIZE.
	* lto-lang.cc (lto_init): Likewise.
---
 gcc/ada/locales.c   |  8 +---
 gcc/analyzer/engine.cc  |  2 +-
 gcc/analyzer/function-set.cc|  2 +-
 gcc/analyzer/sm-file.cc |  3 +--
 gcc/analyzer/sm-malloc.cc   |  3 +--
 gcc/analyzer/sm-signal.cc   |  3 +--
 gcc/attribs.cc  |  4 ++--
 gcc/builtins.cc |  2 +-
 gcc/c-family/c-attribs.cc   |  3 +--
 gcc/c-family/c-common.cc|  7 ++-
 gcc/c-family/c-format.cc| 12 ++--
 gcc/c-family/c-pragma.cc|  9 -
 gcc/c-family/known-headers.cc   |  5 ++---
 gcc/c/c-decl.cc |  8 +++-
 gcc/cfg.cc  |  2 +-
 gcc/common/config/aarch64/aarch64-common.cc |  

Re: [PATCH] Use more ARRAY_SIZE.

2022-05-09 Thread Arnaud Charlet via Gcc-patches
> > So I don't see how your patch can work, can you clarify?
> 
> Sorry for that, fixed in the updated version.

Assuming you're getting a successful Ada build, the Ada part is OK.

> From 5ad8fe059d3419446647eadf8785c768b647d15b Mon Sep 17 00:00:00 2001
> From: Martin Liska 
> Date: Thu, 13 Jan 2022 18:46:26 +0100
> Subject: [PATCH] Use more ARRAY_SIZE.
> 
> gcc/ada/ChangeLog:
> 
>   * locales.c (iso_639_1_to_639_3): Use ARRAY_SIZE.
>   (language_name_to_639_3): Likewise.
>   (country_name_to_3166): Likewise.


Re: [PATCH V3 2/3] RISC-V:Cache Management Operation instructions

2022-05-09 Thread Kito Cheng via Gcc-patches
Use unspec_volatile instead of unspec for those cache operations,
because those operations have side effects, instruction scheduler
might reorder those CMO operations if you use unspec.

> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index b3c5bce842a..d60843df490 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -45,6 +45,11 @@
>
>;; Stack tie
>UNSPEC_TIE
> +  UNSPEC_CLEAN
> +  UNSPEC_FLUSH
> +  UNSPEC_INVAL
> +  UNSPEC_ZERO
> +  UNSPEC_PREI

And then move those UNSPEC to unspecv

>  ])
>
>  (define_c_enum "unspecv" [
> @@ -69,6 +74,7 @@
>;; Stack Smash Protector
>UNSPEC_SSP_SET
>UNSPEC_SSP_TEST
> +
>  ])


PING: [PATCH v2] eliminate mutex in fast path of __register_frame

2022-05-09 Thread Thomas Neumann via Gcc-patches
Summary: __register_frame and the corresponding _Unwind_Find_FDE use a 
global mutex for frame registration and unwinding. This can lead to very 
poor performance on machines with high core counts. This patch organizes 
the frames in a b-tree with read-optimized synchronization instead, 
which allows for fully parallel unwinding.


See:
https://gcc.gnu.org/pipermail/gcc-patches/2022-March/591203.html

Best

Thomas


Re: [2/2] PR96463 -- changes to type checking vec_perm_expr in middle end

2022-05-09 Thread Prathamesh Kulkarni via Gcc-patches
On Tue, 3 May 2022 at 18:25, Richard Sandiford
 wrote:
>
> Prathamesh Kulkarni  writes:
> > On Tue, 4 Jan 2022 at 19:12, Richard Sandiford
> >  wrote:
> >>
> >> Richard Biener  writes:
> >> > On Tue, 4 Jan 2022, Richard Sandiford wrote:
> >> >
> >> >> Richard Biener  writes:
> >> >> > On Fri, 17 Dec 2021, Richard Sandiford wrote:
> >> >> >
> >> >> >> Prathamesh Kulkarni  writes:
> >> >> >> > Hi,
> >> >> >> > The attached patch rearranges order of type-check for vec_perm_expr
> >> >> >> > and relaxes type checking for
> >> >> >> > lhs = vec_perm_expr
> >> >> >> >
> >> >> >> > when:
> >> >> >> > rhs1 == rhs2,
> >> >> >> > lhs is variable length vector,
> >> >> >> > rhs1 is fixed length vector,
> >> >> >> > TREE_TYPE (lhs) == TREE_TYPE (rhs1)
> >> >> >> >
> >> >> >> > I am not sure tho if this check is correct ? My intent was to 
> >> >> >> > capture
> >> >> >> > case when vec_perm_expr is used to "extend" fixed length vector to
> >> >> >> > it's VLA equivalent.
> >> >> >>
> >> >> >> VLAness isn't really the issue.  We want the same thing to work for
> >> >> >> -msve-vector-bits=256, -msve-vector-bits=512, etc., even though the
> >> >> >> vectors are fixed-length in that case.
> >> >> >>
> >> >> >> The principle is that for:
> >> >> >>
> >> >> >>   A = VEC_PERM_EXPR ;
> >> >> >>
> >> >> >> the requirements are:
> >> >> >>
> >> >> >> - A, B, C and D must be vectors
> >> >> >> - A, B and C must have the same element type
> >> >> >> - D must have an integer element type
> >> >> >> - A and D must have the same number of elements (NA)
> >> >> >> - B and C must have the same number of elements (NB)
> >> >> >>
> >> >> >> The semantics are that we create a joined vector BC (all elements of 
> >> >> >> B
> >> >> >> followed by all element of C) and that:
> >> >> >>
> >> >> >>   A[i] = BC[D[i] % (NB+NB)]
> >> >> >>
> >> >> >> for 0 ≤ i < NA.
> >> >> >>
> >> >> >> This operation makes sense even if NA != NB.
> >> >> >
> >> >> > But note that we don't currently expect NA != NB and the optab just
> >> >> > has a single mode.
> >> >>
> >> >> True, but we only need this for constant permutes.  They are already
> >> >> special in that they allow the index elements to be wider than the data
> >> >> elements.
> >> >
> >> > OK, then we should reflect this in the stmt verification and only relax
> >> > the constant permute vector case and also amend the
> >> > TARGET_VECTORIZE_VEC_PERM_CONST accordingly.
> >>
> >> Sounds good.
> >>
> >> > For non-constant permutes the docs say the mode of vec_perm is
> >> > the common mode of operands 1 and 2 whilst the mode of operand 0
> >> > is unspecified - even unconstrained by the docs.  I'm not sure
> >> > if vec_perm expansion is expected to eventually FAIL.  Updating the
> >> > docs of vec_perm would be appreciated as well.
> >>
> >> Yeah, I guess de facto operand 0 has to be the same mode as operands
> >> 1 and 2.  Maybe that was just an oversight, or maybe it seemed obvious
> >> or self-explanatory at the time. :-)
> >>
> >> > As said I prefer to not mangle the existing stmt checking too much
> >> > at this stage so minimal adjustment is prefered there.
> >>
> >> The PR is only an enhancement request rather than a bug, so I think the
> >> patch would need to wait for GCC 13 whatever happens.
> > Hi,
> > In attached patch, the type checking is relaxed only if mask is constant.
> > Does this look OK ?
> >
> > Thanks,
> > Prathamesh
> >>
> >> Thanks,
> >> Richard
> >
> > diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
> > index e321d929fd0..02b88f67855 100644
> > --- a/gcc/tree-cfg.cc
> > +++ b/gcc/tree-cfg.cc
> > @@ -4307,6 +4307,24 @@ verify_gimple_assign_ternary (gassign *stmt)
> >break;
> >
> >  case VEC_PERM_EXPR:
> > +  /* If permute is constant, then we allow for lhs and rhs
> > +  to have different vector types, provided:
> > +  (1) lhs, rhs1, rhs2, and rhs3 have same element type.
>
> This isn't a requirement for rhs3.
>
> > +  (2) rhs3 vector has integer element type.
> > +  (3) len(lhs) == len(rhs3) && len(rhs1) == len(rhs2).  */
> > +
> > +  if (TREE_CONSTANT (rhs3)
> > +   && VECTOR_TYPE_P (lhs_type)
> > +   && VECTOR_TYPE_P (rhs1_type)
> > +   && VECTOR_TYPE_P (rhs2_type)
> > +   && VECTOR_TYPE_P (rhs3_type)
> > +   && TREE_TYPE (lhs_type) == TREE_TYPE (rhs1_type)
> > +   && TREE_TYPE (lhs_type) == TREE_TYPE (rhs2_type)
> > +   && INTEGRAL_TYPE_P (TREE_TYPE (rhs3_type))
> > +   && known_eq (TYPE_VECTOR_SUBPARTS (lhs_type), TYPE_VECTOR_SUBPARTS 
> > (rhs3_type))
> > +   && known_eq (TYPE_VECTOR_SUBPARTS (rhs1_type), TYPE_VECTOR_SUBPARTS 
> > (rhs2_type)))
> > + return false;
> > +
>
> I think this should be integrated into the existing conditions
> rather than done as an initial special case.
>
> It might make sense to start with:
>
>   if (TREE_CODE (rhs1_type) != VECTOR_TYPE
>   || TREE_CODE (rhs2_type) != VECTOR_TYPE
>   || TREE_CODE (rhs3_type) != VECTOR_TYPE)
> {
>
> b

Re: [PATCH v2] PR105169 Fix references to discarded sections

2022-05-09 Thread Richard Biener via Gcc-patches
On Sat, 7 May 2022, Giuliano Belinassi wrote:

> When -fpatchable-function-entry= is enabled, certain C++ codes fails to
> link because of generated references to discarded sections in
> __patchable_function_entry section. This commit fixes this problem by
> puting those references in a COMDAT section.
> 
> On the previous patch, GCC fails to compile with --enable-vtable-verify
> enabled. This version compiles fine with it.

OK for trunk.

Thanks,
Richard.

> 2022-05-06  Giuliano Belinassi  
> 
>   PR c++/105169
>   * targhooks.cc (default_print_patchable_function_entry_1): Handle 
> COMDAT case.
>   * varasm.cc (switch_to_comdat_section): New
>   (handle_vtv_comdat_section): Call switch_to_comdat_section.
>   * varasm.h: Declare switch_to_comdat_section.
> 
> gcc/testsuite/ChangeLog
> 2022-05-06  Giuliano Belinassi  
> 
>   PR c++/105169
>   * g++.dg/modules/pr105169.h: New file.
>   * g++.dg/modules/pr105169_a.C: New test.
>   * g++.dg/modules/pr105169_b.C: New file.
> ---
>  gcc/targhooks.cc  |  8 --
>  gcc/testsuite/g++.dg/modules/pr105169.h   | 22 +++
>  gcc/testsuite/g++.dg/modules/pr105169_a.C | 25 +
>  gcc/testsuite/g++.dg/modules/pr105169_b.C | 12 +
>  gcc/varasm.cc | 33 ++-
>  gcc/varasm.h  |  2 ++
>  6 files changed, 87 insertions(+), 15 deletions(-)
>  create mode 100644 gcc/testsuite/g++.dg/modules/pr105169.h
>  create mode 100644 gcc/testsuite/g++.dg/modules/pr105169_a.C
>  create mode 100644 gcc/testsuite/g++.dg/modules/pr105169_b.C
> 
> diff --git a/gcc/targhooks.cc b/gcc/targhooks.cc
> index 399d6f874dc..b15ae19bcb6 100644
> --- a/gcc/targhooks.cc
> +++ b/gcc/targhooks.cc
> @@ -2009,8 +2009,12 @@ default_print_patchable_function_entry_1 (FILE *file,
>patch_area_number++;
>ASM_GENERATE_INTERNAL_LABEL (buf, "LPFE", patch_area_number);
>  
> -  switch_to_section (get_section ("__patchable_function_entries",
> -   flags, current_function_decl));
> +  section *sect = get_section ("__patchable_function_entries",
> +   flags, current_function_decl);
> +  if (HAVE_COMDAT_GROUP && DECL_COMDAT_GROUP (current_function_decl))
> + switch_to_comdat_section (sect, current_function_decl);
> +  else
> + switch_to_section (sect);
>assemble_align (POINTER_SIZE);
>fputs (asm_op, file);
>assemble_name_raw (file, buf);
> diff --git a/gcc/testsuite/g++.dg/modules/pr105169.h 
> b/gcc/testsuite/g++.dg/modules/pr105169.h
> new file mode 100644
> index 000..a7e76270531
> --- /dev/null
> +++ b/gcc/testsuite/g++.dg/modules/pr105169.h
> @@ -0,0 +1,22 @@
> +class IPXAddressClass
> +{
> +public:
> +IPXAddressClass(void);
> +};
> +
> +class WinsockInterfaceClass
> +{
> +
> +public:
> +WinsockInterfaceClass(void);
> +
> +virtual void Set_Broadcast_Address(void*){};
> +
> +virtual int Get_Protocol(void)
> +{
> +return 0;
> +};
> +
> +protected:
> +};
> +
> diff --git a/gcc/testsuite/g++.dg/modules/pr105169_a.C 
> b/gcc/testsuite/g++.dg/modules/pr105169_a.C
> new file mode 100644
> index 000..66dc4b7901f
> --- /dev/null
> +++ b/gcc/testsuite/g++.dg/modules/pr105169_a.C
> @@ -0,0 +1,25 @@
> +/* { dg-module-do link } */
> +/* { dg-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
> +/* { dg-additional-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
> +
> +/* This test is in the "modules" package because it supports multiple files
> +   linkage.  */
> +
> +#include "pr105169.h"
> +
> +WinsockInterfaceClass* PacketTransport;
> +
> +IPXAddressClass::IPXAddressClass(void)
> +{
> +}
> +
> +int function()
> +{
> +  return PacketTransport->Get_Protocol();
> +}
> +
> +int main()
> +{
> +  IPXAddressClass ipxaddr;
> +  return 0;
> +}
> diff --git a/gcc/testsuite/g++.dg/modules/pr105169_b.C 
> b/gcc/testsuite/g++.dg/modules/pr105169_b.C
> new file mode 100644
> index 000..5f8b00dfe51
> --- /dev/null
> +++ b/gcc/testsuite/g++.dg/modules/pr105169_b.C
> @@ -0,0 +1,12 @@
> +/* { dg-module-do link } */
> +/* { dg-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
> +/* { dg-additional-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
> +
> +/* This test is in the "modules" package because it supports multiple files
> +   linkage.  */
> +
> +#include "pr105169.h"
> +
> +WinsockInterfaceClass::WinsockInterfaceClass(void)
> +{
> +}
> diff --git a/gcc/varasm.cc b/gcc/varasm.cc
> index c41f17d64f7..6454f1ce519 100644
> --- a/gcc/varasm.cc
> +++ b/gcc/varasm.cc
> @@ -8457,25 +8457,21 @@ default_asm_output_ident_directive (const char 
> *ident_str)
>  fprintf (asm_out_file, "%s\"%s\"\n", ident_asm_op, ident_str);
>  }
>  
> -
> -/* This function ensures that vtable_map variables are not only
> -   in the comdat section, but that each variable has its own uniq

[PATCH] Remove GIMPLE restriction of ! using match.pd patterns

2022-05-09 Thread Richard Biener via Gcc-patches
This removes #if GIMPLE guards around patterns using ! which is
now also provided in the GENERIC implementation.

Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.

2022-05-09  Richard Biener  

* match.pd: Remove #if GIMPLE guards around ! using patterns.
---
 gcc/match.pd | 12 +---
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/gcc/match.pd b/gcc/match.pd
index 6d691d302b3..1fdd98b375e 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1087,7 +1087,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (bit_ior:c (bit_xor:c@3 @0 @1) (bit_xor:c (bit_xor:c @1 @2) @0))
  (bit_ior @3 @2))
 
-#if GIMPLE
 /* (~X | C) ^ D -> (X | C) ^ (~D ^ C) if (~D ^ C) can be simplified.  */
 (simplify
  (bit_xor:c (bit_ior:cs (bit_not:s @0) @1) @2)
@@ -1104,7 +1103,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (if (INTEGRAL_TYPE_P (TREE_TYPE (@0))
   && wi::bit_and_not (get_nonzero_bits (@0), wi::to_wide (@1)) == 0)
   (bit_xor @0 @1)))
-#endif
 
 /* For constants M and N, if M == (1LL << cst) - 1 && (N & M) == M,
((A & N) + B) & M -> (A + B) & M
@@ -1259,6 +1257,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
&& wi::to_wide (@1) != wi::min_value (TYPE_PRECISION (type),
  SIGNED))
 (minus (plus @1 { build_minus_one_cst (type); }) @0
+#endif
 
 /* ~(X >> Y) -> ~X >> Y if ~X can be simplified.  */
 (simplify
@@ -1271,7 +1270,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
(if (!wi::neg_p (tree_nonzero_bits (@0)))
 (with { tree stype = signed_type_for (TREE_TYPE (@0)); }
  (convert (rshift (bit_not! (convert:stype @0)) @1))
-#endif
 
 /* x + (x & 1) -> (x + 1) & ~1 */
 (simplify
@@ -2750,7 +2748,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 
 /* (T)(A) +- (T)(B) -> (T)(A +- B) only when (A +- B) could be simplified
to a simple value.  */
-#if GIMPLE
   (for op (plus minus)
(simplify
 (op (convert @0) (convert @1))
@@ -2761,7 +2758,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  && !TYPE_OVERFLOW_TRAPS (type)
  && !TYPE_OVERFLOW_SANITIZED (type))
   (convert (op! @0 @1)
-#endif
 
   /* ~A + A -> -1 */
   (simplify
@@ -2947,9 +2943,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  /* If @1 +- @2 is constant require a hard single-use on either
original operand (but not on both).  */
  (mult (plusminus @1 @2) @0)
-#if GIMPLE
  (mult! (plusminus @1 @2) @0)
-#endif
   )))
   /* We cannot generate constant 1 for fract.  */
   (if (!ALL_FRACT_MODE_P (TYPE_MODE (type)))
@@ -4070,7 +4064,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
   (if (integer_zerop (@0))
@2)))
 
-#if GIMPLE
 /* Sink unary operations to branches, but only if we do fold both.  */
 (for op (negate bit_not abs absu)
  (simplify
@@ -4093,7 +4086,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (simplify
   (op @3 (vec_cond:s @0 @1 @2))
   (vec_cond @0 (op! @3 @1) (op! @3 @2
-#endif
 
 #if GIMPLE
 (match (nop_atomic_bit_test_and_p @0 @1 @4)
@@ -5419,7 +5411,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
   (cmp:c (bit_xor:c @0 @1) @0)
   (cmp @1 { build_zero_cst (TREE_TYPE (@1)); }))
 
-#if GIMPLE
  /* (X & Y) == X becomes (X & ~Y) == 0.  */
  (simplify
   (cmp:c (bit_and:c @0 @1) @0)
@@ -5439,7 +5430,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (simplify
   (cmp:c (bit_ior:c @0 @1) @1)
   (cmp (bit_and @0 (bit_not! @1)) { build_zero_cst (TREE_TYPE (@0)); }))
-#endif
 
  /* (X ^ C1) op C2 can be rewritten as X op (C1 ^ C2).  */
  (simplify
-- 
2.35.3


[PATCH] tree-optimization/105517 - avoid offset truncation during VN

2022-05-09 Thread Richard Biener via Gcc-patches
When value-numbering an address expression like
&p_74(D)->a1x[4294967295].a1; we are accumulating the byte offset
in an 64bit integer.  When later exploiting the duality between
that and a POINTER_PLUS_EXPR we should avoid truncating that
offset to fit in the target specific sizetype.  While such
overflows are generally undefined behavior, exploiting this
may leads to spurious missing diagnostics.

Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.

2022-05-09  Richard Biener  

PR tree-optimization/105517
* tree-ssa-sccvn.cc (vn_reference_lookup): Make sure the accumulated
offset can be represented in the POINTER_PLUS_EXPR IL.
(vn_reference_insert): Likewise.
* poly-int.h (sext_hwi): Add poly version of sext_hwi.
---
 gcc/poly-int.h| 13 +
 gcc/tree-ssa-sccvn.cc | 14 --
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/poly-int.h b/gcc/poly-int.h
index 2bf9d98599f..d085544a57e 100644
--- a/gcc/poly-int.h
+++ b/gcc/poly-int.h
@@ -1178,6 +1178,19 @@ lshift (const poly_int_pod &a, const Cb &b)
 }
 }
 
+/* Poly version of sext_hwi, with the same interface.  */
+
+template
+inline poly_int
+sext_hwi (const poly_int &a, unsigned int precision)
+{
+  poly_int_pod r;
+  for (unsigned int i = 0; i < N; i++)
+r.coeffs[i] = sext_hwi (a.coeffs[i], precision);
+  return r;
+}
+
+
 /* Return true if a0 + a1 * x might equal b0 + b1 * x for some nonnegative
integer x.  */
 
diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
index 76587632312..3732d06b0bb 100644
--- a/gcc/tree-ssa-sccvn.cc
+++ b/gcc/tree-ssa-sccvn.cc
@@ -3684,7 +3684,12 @@ vn_reference_lookup (tree op, tree vuse, vn_lookup_kind 
kind,
break;
  off += vro->off;
}
-  if (i == operands.length () - 1)
+  if (i == operands.length () - 1
+ /* Make sure we the offset we accumulated in a 64bit int
+fits the address computation carried out in target
+offset precision.  */
+ && (off.coeffs[0]
+ == sext_hwi (off.coeffs[0], TYPE_PRECISION (sizetype
{
  gcc_assert (operands[i-1].opcode == MEM_REF);
  tree ops[2];
@@ -3808,7 +3813,12 @@ vn_reference_insert (tree op, tree result, tree vuse, 
tree vdef)
break;
  off += vro->off;
}
-  if (i == operands.length () - 1)
+  if (i == operands.length () - 1
+ /* Make sure we the offset we accumulated in a 64bit int
+fits the address computation carried out in target
+offset precision.  */
+ && (off.coeffs[0]
+ == sext_hwi (off.coeffs[0], TYPE_PRECISION (sizetype
{
  gcc_assert (operands[i-1].opcode == MEM_REF);
  tree ops[2];
-- 
2.35.3


Re: [PATCH] Remove non-ANSI C path in ansidecl.h.

2022-05-09 Thread Martin Liška
On 5/5/22 14:27, Richard Biener wrote:
> You'd have to ask the sourceware side as well (binutils), but for sure
> either the

Yes, I've asked and they proved that.

> guarding #if should be removed or the #else path should contain an #error.

All right, I'm going to install the version w/o #if.

Martin


Re: [PATCH] opts: do not allow Separate+Joined ending with =

2022-05-09 Thread Richard Biener via Gcc-patches
On Mon, May 9, 2022 at 10:58 AM Martin Liška  wrote:
>
> Do not allow strange option format:
> -msmall-data-limit= 11.
>
> For -output-pch we need to use Separate syntax as lang spec
> rules automatically append a space.
>
> Patch can bootstrap on x86_64-linux-gnu and survives regression tests.
>
> Ready to be installed?
> Thanks,
> Martin
>
> PR target/105355
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.opt: Remove Separate from
> -msmall-data-limit=.
> * optc-gen.awk: Report error for the described situation.
> * gcc.cc: Use Separate syntax.
> * opts.cc (gen_command_line_string): Change option name.
>
> gcc/c-family/ChangeLog:
>
> * c-opts.cc (c_common_handle_option): Change option name.
> * c.opt: Remove Joined and use Separate option.
>
> gcc/cp/ChangeLog:
>
> * lang-specs.h: Use Separate syntax.
>
> gcc/objc/ChangeLog:
>
> * lang-specs.h: Use Separate syntax.
>
> gcc/objcp/ChangeLog:
>
> * lang-specs.h: Use Separate syntax.
> ---
>  gcc/c-family/c-opts.cc | 2 +-
>  gcc/c-family/c.opt | 4 ++--
>  gcc/config/riscv/riscv.opt | 2 +-
>  gcc/cp/lang-specs.h| 6 +++---
>  gcc/gcc.cc | 8 
>  gcc/objc/lang-specs.h  | 8 
>  gcc/objcp/lang-specs.h | 2 +-
>  gcc/optc-gen.awk   | 7 +++
>  gcc/opts.cc| 2 +-
>  9 files changed, 24 insertions(+), 17 deletions(-)
>
> diff --git a/gcc/c-family/c-opts.cc b/gcc/c-family/c-opts.cc
> index a341a061758..da377f09bba 100644
> --- a/gcc/c-family/c-opts.cc
> +++ b/gcc/c-family/c-opts.cc
> @@ -303,7 +303,7 @@ c_common_handle_option (size_t scode, const char *arg, 
> HOST_WIDE_INT value,
>result = false;
>break;
>
> -case OPT__output_pch_:
> +case OPT__output_pch:
>pch_file = arg;
>break;
>
> diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt
> index 07da40ef43b..035b1de0d84 100644
> --- a/gcc/c-family/c.opt
> +++ b/gcc/c-family/c.opt
> @@ -135,8 +135,8 @@ C ObjC C++ ObjC++ Separate Alias(o)
>  -output=
>  C ObjC C++ ObjC++ Joined Alias(o)
>
> --output-pch=
> -C ObjC C++ ObjC++ Joined Separate
> +-output-pch
> +C ObjC C++ ObjC++ Separate

The patch would have been a lot smaller if you kept it Joined only?

>
>  -pedantic
>  C ObjC C++ ObjC++ Alias(pedantic)
> diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
> index 492aad12324..84c8cf5a2de 100644
> --- a/gcc/config/riscv/riscv.opt
> +++ b/gcc/config/riscv/riscv.opt
> @@ -92,7 +92,7 @@ Target RejectNegative Joined Var(riscv_cpu_string)
>  -mcpu=PROCESSORUse architecture of and optimize the output for 
> PROCESSOR.
>
>  msmall-data-limit=
> -Target Joined Separate UInteger Var(g_switch_value) Init(8)
> +Target Joined UInteger Var(g_switch_value) Init(8)
>  -msmall-data-limit=N   Put global and static data smaller than  
> bytes into a special section (on some targets).
>
>  msave-restore
> diff --git a/gcc/cp/lang-specs.h b/gcc/cp/lang-specs.h
> index f35c9fab76b..dbda5a7b2e4 100644
> --- a/gcc/cp/lang-specs.h
> +++ b/gcc/cp/lang-specs.h
> @@ -55,7 +55,7 @@ along with GCC; see the file COPYING3.  If not see
>"  %{!fsyntax-only:"
>"%{!S:-o %g.s%V}"
>"%{!fmodule-*:%{!fmodules-*:%{!fdump-ada-spec*:"
> -  " %{!o*:--output-pch=%i.gch}%W{o*:--output-pch=%*}"
> +  " %{!o*:--output-pch %i.gch}%W{o*:--output-pch %*}"
>"}}}",
>   CPLUSPLUS_CPP_SPEC, 0, 0},
>{"@c++-system-header",
> @@ -76,7 +76,7 @@ along with GCC; see the file COPYING3.  If not see
>"  %{!fsyntax-only:"
>"%{!S:-o %g.s%V}"
>"%{!fmodule-*:%{!fmodules-*:%{!fdump-ada-spec*:"
> -  " %{!o*:--output-pch=%i.gch}%W{o*:--output-pch=%*}"
> +  " %{!o*:--output-pch %i.gch}%W{o*:--output-pch %*}"
>"}}}",
>   CPLUSPLUS_CPP_SPEC, 0, 0},
>{"@c++-user-header",
> @@ -96,7 +96,7 @@ along with GCC; see the file COPYING3.  If not see
>"  %{!fsyntax-only:"
>"%{!S:-o %g.s%V}"
>"%{!fmodule-*:%{!fmodules-*:%{!fdump-ada-spec*:"
> -  " %{!o*:--output-pch=%i.gch}%W{o*:--output-pch=%*}"
> +  " %{!o*:--output-pch %i.gch}%W{o*:--output-pch %*}"
>"}}}",
>   CPLUSPLUS_CPP_SPEC, 0, 0},
>{"@c++",
> diff --git a/gcc/gcc.cc b/gcc/gcc.cc
> index bb07cc244e3..299e09c4f54 100644
> --- a/gcc/gcc.cc
> +++ b/gcc/gcc.cc
> @@ -1462,13 +1462,13 @@ static const struct compiler default_compilers[] =
> cc1 -fpreprocessed %{save-temps*:%b.i} 
> %{!save-temps*:%g.i} \
> %(cc1_options)\
> %{!fsyntax-only:%{!S:-o %g.s} \
> -   %{!fdump-ada-spec*:%{!o*:--output-pch=%i.gch}\
> -  %W{o*:--output-pch=%*}}%V}}\
> +   %{!fdump-ada-spec*:%{!o*:--output-pc

Re: [PATCH] Use more ARRAY_SIZE.

2022-05-09 Thread Richard Biener via Gcc-patches
On Thu, May 5, 2022 at 4:30 PM Martin Liška  wrote:
>
> On 5/5/22 14:58, Iain Buclaw wrote:
> > This D front-end change doesn't look right to me, besides the slight
>
> Hello.
>
> Sorry, I've re-read the patch and fixed some places where the macro usage
> was wrong.
>
> Patch can bootstrap on x86_64-linux-gnu and survives regression tests.

The middle-end parts are OK.  I'd say in files where ARRAY_SIZE is already
used it's OK to introduce more uses.  Otherwise I defer to the more specific
maintainers if they like this or not.

Richard.

> Martin


Re: [PATCH] Remove conditional STATIC_ASSERT.

2022-05-09 Thread Richard Biener via Gcc-patches
On Mon, May 9, 2022 at 10:46 AM Martin Liška  wrote:
>
> On 5/5/22 15:08, Richard Biener wrote:
> > On Thu, May 5, 2022 at 2:41 PM Martin Liška  wrote:
> >>
> >> On 5/5/22 14:29, Richard Biener wrote:
> >>> Can we then use static_assert (...) instead and remove the
> >>> macro?
> >>
> >> Oh yes, we can ;)
> >>
> >>> Do we have C compiled code left (I think we might,
> >>> otherwise we'd not have __cplusplus guards in system.h),
> >>> in which case the #if should change to #ifdef __cplusplus?
> >>
> >> No, there's no such a consumer of the macro.
> >
> > OK, but for C uses it should still be different so my suggestion
> > to change to #ifdef __cplusplus remains.  OTOH then the change
> > is somewhat pointless.
>
> Sure, so something like this?

Works for me.

Richard.

> Thanks,
> Martin
>
> >
> >> What about the updated version of the patch?
> >>
> >> Cheers,
> >> Martin


Re: [PATCH] opts: do not allow Separate+Joined ending with =

2022-05-09 Thread Martin Liška
On 5/9/22 13:58, Richard Biener wrote:
> The patch would have been a lot smaller if you kept it Joined only?

Yes, but the langspec rules append a space for some reason:

$ ./xgcc -B. /tmp/1.h -ox.h.pch --save-temps --verbose
...
./cc1 -fpreprocessed x.h.pch-1.i ... --output-pch= x.h.pch

Martin


[PATCH] MAINTAINERS: Update my email address.

2022-05-09 Thread Clément chigot via Gcc-patches

From 8ba8d5b34473ebd8e8221c0f427b06d4af46f0aa Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= 
Date: Mon, 9 May 2022 14:13:09 +0200
Subject: [PATCH] MAINTAINERS: Update my email address.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Update my email address in the MAINTAINERS file.

ChangeLog:
2022-05-06  Clément Chigot  

	* MAINTAINERS: Update my email address.
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 87708942d39..350d04d52e3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -360,7 +360,7 @@ Gabriel Charette
 Chandra Chavva	
 Dehao Chen	
 Fabien Chêne	
-Clément Chigot	
+Clément Chigot	
 Harshit Chopra	
 Tamar Christina	
 Eric Christopher
-- 
2.25.1



Re: [PATCH] opts: do not allow Separate+Joined ending with =

2022-05-09 Thread Richard Biener via Gcc-patches
On Mon, May 9, 2022 at 2:16 PM Martin Liška  wrote:
>
> On 5/9/22 13:58, Richard Biener wrote:
> > The patch would have been a lot smaller if you kept it Joined only?
>
> Yes, but the langspec rules append a space for some reason:
>
> $ ./xgcc -B. /tmp/1.h -ox.h.pch --save-temps --verbose
> ...
> ./cc1 -fpreprocessed x.h.pch-1.i ... --output-pch= x.h.pch

That's probably because we canonicalize Joined & Separate to
Separate and '{o*:--output-pch %*}' causes then '-o FOO' to be
matched with 'o*' and %* also outputs the matched space(?)

Anyway, I see how your approach avoids this and the --output-pch
switch doesn't seem documented (if one is concerned about
backwards compatibility).

So OK if there are no further comments within 48h.

Richard.

> Martin


Re: [PATCH] Replace EVRP in DOM with ranger.

2022-05-09 Thread Andrew MacLeod via Gcc-patches

On 5/2/22 02:30, Richard Biener wrote:

On Fri, Apr 29, 2022 at 6:22 PM Aldy Hernandez  wrote:


Andrew was mumbling something about a fast ranger mode for this
release that should be on par with legacy evrp.  IIRC it would be
purely DOM based, won't visit back edges, and there's no caching.  But
he'll have to expand on it when he returns from vacation.  I don't
know the details.

I would guess the stmt analysis building blocks (whatever API part of
ranger that is) can be used to produce something like that.  But in the
end it would be the old EVRP pass with the VRP stmt analysis it
re-used replaced with the appropriate ranger parts.

But yes, I'd welcome that.  I'd also like to revisit integration of some
of this with value-numbering which doesn't do a DOM walk but instead
a RPO walk.



Yes, it will bear numerous similarities to the old EVRP mechanism 
approach.  It'd would use a similar "current value" vector, just using 
multi-ranges and wired into the range-ops/gori mechanism for calculating 
outgoing ranges on outgoing/incoming edges.  Its next on my list after I 
get a few outstanding things in.


An RPO walk should be trivial to work with as well.  Is there generic 
infrastructure for RPO like there is for DOM walks, or is it more wired 
into VN?  Regardless, we should be able to set it up to work from anywhere.


Andrew




[c++][NFC] Rename Attached to Keyed

2022-05-09 Thread Nathan Sidwell


With modules, certain decls are 'scoped' with another decl.  I chose
the name 'attached', but that has become something specific in the
modules context, so is no longer a good name.  The alternative name I
considered was 'keyed', but we already had the concept of a key
virtual function (from the ABI), which is why I went with 'attached'.
However, I think 'keyed' is the less worse name.  I think there's less
chance of confusion.

nathan

--
Nathan SidwellFrom c0718dc18559912e6228aaabae0c34ff12b63288 Mon Sep 17 00:00:00 2001
From: Nathan Sidwell 
Date: Mon, 9 May 2022 04:36:30 -0700
Subject: [PATCH] [c++][NFC] Rename Attached to Keyed

With modules, certain decls are 'scoped' with another decl.  I chose
the name 'attached', but that has become something specific in the
modules context, so is no longer a good name.  The alternative name I
considered was 'keyed', but we already had the concept of a key
virtual function (from the ABI), which is why I went with 'attached'.
However, I think 'keyed' is the less worse name.  I think there's less
chance of confusion.
---
 gcc/cp/cp-tree.h | 10 
 gcc/cp/lambda.cc |  2 +-
 gcc/cp/lex.cc|  4 +--
 gcc/cp/module.cc | 64 
 4 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 663fe7a20fc..10ecab76082 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -1734,9 +1734,9 @@ check_constraint_info (tree t)
   (DECL_LANG_SPECIFIC (DECL_MODULE_CHECK (NODE))->u.base.module_entity_p)
 
 /* DECL that has attached decls for ODR-relatedness.  */
-#define DECL_MODULE_ATTACHMENTS_P(NODE)			\
+#define DECL_MODULE_KEYED_DECLS_P(NODE)			\
   (DECL_LANG_SPECIFIC (TREE_CHECK2(NODE,FUNCTION_DECL,VAR_DECL))\
-   ->u.base.module_attached_p)
+   ->u.base.module_keyed_decls_p)
 
 /* Whether this is an exported DECL.  Held on any decl that can appear
at namespace scope (function, var, type, template, const or
@@ -2836,8 +2836,8 @@ struct GTY(()) lang_decl_base {
   unsigned module_import_p : 1; 	   /* from an import */
   unsigned module_entity_p : 1;		   /* is in the entitity ary &
 	  hash.  */
-  /* VAR_DECL or FUNCTION_DECL has attached decls. */
-  unsigned module_attached_p : 1;
+  /* VAR_DECL or FUNCTION_DECL has keyed decls. */
+  unsigned module_keyed_decls_p : 1;
 
   /* 12 spare bits.  */
 };
@@ -7196,7 +7196,7 @@ extern unsigned get_importing_module (tree, bool = false) ATTRIBUTE_PURE;
 /* Where current instance of the decl got declared/defined/instantiated.  */
 extern void set_instantiating_module (tree);
 extern void set_defining_module (tree);
-extern void maybe_attach_decl (tree ctx, tree decl);
+extern void maybe_key_decl (tree ctx, tree decl);
 
 extern void mangle_module (int m, bool include_partition);
 extern void mangle_module_fini ();
diff --git a/gcc/cp/lambda.cc b/gcc/cp/lambda.cc
index afac53b6d7c..0a9f0f8f310 100644
--- a/gcc/cp/lambda.cc
+++ b/gcc/cp/lambda.cc
@@ -1431,7 +1431,7 @@ record_lambda_scope (tree lambda)
 {
   tree closure = LAMBDA_EXPR_CLOSURE (lambda);
   gcc_checking_assert (closure);
-  maybe_attach_decl (lambda_scope, TYPE_NAME (closure));
+  maybe_key_decl (lambda_scope, TYPE_NAME (closure));
 }
 }
 
diff --git a/gcc/cp/lex.cc b/gcc/cp/lex.cc
index 739f0890e01..784debcd705 100644
--- a/gcc/cp/lex.cc
+++ b/gcc/cp/lex.cc
@@ -1008,8 +1008,8 @@ cxx_dup_lang_specific_decl (tree node)
  (module_purview_p still does).  */
   ld->u.base.module_entity_p = false;
   ld->u.base.module_import_p = false;
-  ld->u.base.module_attached_p = false;
-  
+  ld->u.base.module_keyed_decls_p = false;
+
   if (GATHER_STATISTICS)
 {
   tree_node_counts[(int)lang_decl] += 1;
diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
index 18dabfcc9ac..6126316a6a0 100644
--- a/gcc/cp/module.cc
+++ b/gcc/cp/module.cc
@@ -2697,11 +2697,11 @@ pending_map_t *pending_table;
completed.  */
 vec *post_load_decls;
 
-/* Some entities are attached to another entitity for ODR purposes.
+/* Some entities are keyed to another entitity for ODR purposes.
For example, at namespace scope, 'inline auto var = []{};', that
-   lambda is attached to 'var', and follows its ODRness.  */
-typedef hash_map> attached_map_t;
-static attached_map_t *attached_table;
+   lambda is keyed to 'var', and follows its ODRness.  */
+typedef hash_map> keyed_map_t;
+static keyed_map_t *keyed_table;
 
 //
 /* Tree streaming.   The tree streaming is very specific to the tree
@@ -2766,7 +2766,7 @@ enum merge_kind
   MK_partial,
 
   MK_enum,	/* Found by CTX, & 1stMemberNAME.  */
-  MK_attached,  /* Found by attachee & index.  */
+  MK_keyed, /* Found by key & index.  */
 
   MK_friend_spec,  /* Like named, but has a tmpl & args too.  */
   MK_local_friend, /* Found by CTX, index.  */
@@ -5533,7 +5533,7 @@ trees_out::lang_decl_bools (tree t)
  that's the GM purview, so n

Re: [PATCH] testsuite: Silence analyzer/pr51628-30.c for default_packed

2022-05-09 Thread David Malcolm via Gcc-patches
On Sun, 2022-05-08 at 10:31 +0300, Dimitar Dimitrov wrote:
> On default_packed targets like PRU, a warning in the file included
> from
> analyzer/pr51628-30.c is reported as spurious one, even though it has
> been
> annotated there:
> 
>   Excess errors:
>   gcc/gcc/testsuite/gcc.dg/analyzer/torture/../../../c-c++-
> common/pr51628-30.c:7:19: warning: 'packed' attribute ignored for
> field of type 'struct B' [-Wattributes]
> 
> DejaGnu does not preprocess the C test case sources.  Hence the "dg-
> *"
> statements in included files are ignored.
> 
> Mark that gcc.dg/analyzer/torture/pr51628-30.c generates excess
> warnings
> for default_packed targets.  This is safe because the original test
> case
> covered an ICE, not a diagnostic error.

Indeed; for reference, the ICE was part of PR analyzer/93388 (part of
ensuring that -fanalyzer doesn't ICE on less common tree codes).

> 
> Ok for trunk?

Thanks; looks good to me.  Sorry about the noise.

Dave

> 
> gcc/testsuite/ChangeLog:
> 
> * gcc.dg/analyzer/torture/pr51628-30.c: Test can spill excess
> errors for default_packed targets.
> 
> CC: David Malcolm 
> Signed-off-by: Dimitar Dimitrov 
> ---
>  gcc/testsuite/gcc.dg/analyzer/torture/pr51628-30.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/gcc/testsuite/gcc.dg/analyzer/torture/pr51628-30.c
> b/gcc/testsuite/gcc.dg/analyzer/torture/pr51628-30.c
> index 4513e0f890c..abc13413f2b 100644
> --- a/gcc/testsuite/gcc.dg/analyzer/torture/pr51628-30.c
> +++ b/gcc/testsuite/gcc.dg/analyzer/torture/pr51628-30.c
> @@ -1,3 +1,4 @@
>  /* { dg-additional-options "-Wno-address-of-packed-member" } */
> +/* { dg-excess-errors "warnings about ignored 'packed' attribute" {
> target default_packed } } */
>  
>  #include "../../../c-c++-common/pr51628-30.c"




Re: [PATCH] Replace EVRP in DOM with ranger.

2022-05-09 Thread Richard Biener via Gcc-patches
On Mon, May 9, 2022 at 2:42 PM Andrew MacLeod  wrote:
>
> On 5/2/22 02:30, Richard Biener wrote:
> > On Fri, Apr 29, 2022 at 6:22 PM Aldy Hernandez  wrote:
> >>
> >> Andrew was mumbling something about a fast ranger mode for this
> >> release that should be on par with legacy evrp.  IIRC it would be
> >> purely DOM based, won't visit back edges, and there's no caching.  But
> >> he'll have to expand on it when he returns from vacation.  I don't
> >> know the details.
> > I would guess the stmt analysis building blocks (whatever API part of
> > ranger that is) can be used to produce something like that.  But in the
> > end it would be the old EVRP pass with the VRP stmt analysis it
> > re-used replaced with the appropriate ranger parts.
> >
> > But yes, I'd welcome that.  I'd also like to revisit integration of some
> > of this with value-numbering which doesn't do a DOM walk but instead
> > a RPO walk.
>
>
> Yes, it will bear numerous similarities to the old EVRP mechanism
> approach.  It'd would use a similar "current value" vector, just using
> multi-ranges and wired into the range-ops/gori mechanism for calculating
> outgoing ranges on outgoing/incoming edges.  Its next on my list after I
> get a few outstanding things in.
>
> An RPO walk should be trivial to work with as well.  Is there generic
> infrastructure for RPO like there is for DOM walks, or is it more wired
> into VN?  Regardless, we should be able to set it up to work from anywhere.

It's currently wired into VN.  But once I see the domwalk implementation I can
trivially adapt that I think.  There's two interesting cases, the iterating and
the non-iterating VN which switch around tree-ssa-sccvn.cc:8001.  Currently
all context sensitive information is kept but tagged rather than unwound
like a domwalk would do in its after_dom_children hook.  That's a) a bit ugly
(and costly) and b) for relations it's too simple (what VN currently does).  So
my hope was to throw that out and replace it with something else - there's
vn_avail which is what models the DOM relationship.  I'll have to think about
what we need for relations (for ranges that vn_avail should do).

Richard.

> Andrew
>
>


Re: [PATCH] [i386] Implement permutation with pslldq + psrldq + por when pshufb is not available.

2022-05-09 Thread Hongtao Liu via Gcc-patches
On Mon, May 9, 2022 at 4:19 PM Uros Bizjak  wrote:
>
> On Mon, May 9, 2022 at 7:24 AM Hongtao Liu  wrote:
> >
> > On Mon, May 9, 2022 at 1:22 PM liuhongt via Gcc-patches
> >  wrote:
> > >
> > > pand/pandn may be used to clear upper/lower bits of the operands, in
> > > that case there will be 4-5 instructions for permutation, and it's
> > > still better than scalar codes.
> > >
> > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > > Ok for trunk?
> > >
> > >
> > > gcc/ChangeLog:
> > >
> > > PR target/105354
> > > * config/i386/i386-expand.cc
> > > (expand_vec_perm_pslldq_psrldq_por): New function.
> > > (ix86_expand_vec_perm_const_1): Try
> > > expand_vec_perm_pslldq_psrldq_por for both 3-instruction and
> > > 4/5-instruction sequence.
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > > * gcc.target/i386/pr105354-1.c: New test.
> > > * gcc.target/i386/pr105354-2.c: New test.
>
> OK, with a slight adjustment below.
>
> Thanks,
> Uros.
>
> > > ---
> > >  gcc/config/i386/i386-expand.cc | 109 +
> > >  gcc/testsuite/gcc.target/i386/pr105354-1.c | 130 +
> > >  gcc/testsuite/gcc.target/i386/pr105354-2.c | 110 +
> > >  3 files changed, 349 insertions(+)
> > >  create mode 100644 gcc/testsuite/gcc.target/i386/pr105354-1.c
> > >  create mode 100644 gcc/testsuite/gcc.target/i386/pr105354-2.c
> > >
> > > diff --git a/gcc/config/i386/i386-expand.cc 
> > > b/gcc/config/i386/i386-expand.cc
> > > index bc806ffa283..49231e964ba 100644
> > > --- a/gcc/config/i386/i386-expand.cc
> > > +++ b/gcc/config/i386/i386-expand.cc
> > > @@ -20941,6 +20941,108 @@ expand_vec_perm_vpshufb2_vpermq_even_odd 
> > > (struct expand_vec_perm_d *d)
> > >return true;
> > >  }
> > >
> > > +/* Implement permutation with pslldq + psrldq + por when pshufb is not
> > > +   available.  */
> > > +static bool
> > > +expand_vec_perm_pslldq_psrldq_por (struct expand_vec_perm_d *d, bool 
> > > pandn)
> > > +{
> > > +  unsigned i, nelt = d->nelt;
> > > +  unsigned start1, end1 = -1;
> > > +  machine_mode vmode = d->vmode, imode;
> > > +  int start2 = -1;
> > > +  bool clear_op0, clear_op1;
> > > +  unsigned inner_size;
> > > +  rtx op0, op1, dop1;
> > > +  rtx (*gen_vec_shr) (rtx, rtx, rtx);
> > > +  rtx (*gen_vec_shl) (rtx, rtx, rtx);
> > > +
> > > +  /* pshufb is available under TARGET_SSSE3.  */
> > > +  if (TARGET_SSSE3 || !TARGET_SSE2
>
> You don't have to check for TARGET_SSSE3 here. The
> expand_vec_perm_pslldq_psrldq_por should be positioned in
> ix86_expand_vec_perm const_1 in a place where more optimal insn
> sequence is already generated when TARGET_SSSE3 is available.
Changed and committed, thanks for the review.
>
> > > +  /* pshufd can be used for V4SI/V2DI under TARGET_SSE2.  */
> > > +  || (vmode != E_V16QImode && vmode != E_V8HImode))
> > > +return false;
> > > +
> > > +  start1 = d->perm[0];
> > > +  for (i = 1; i < nelt; i++)
> > > +{
> > > +  if (d->perm[i] != d->perm[i-1] + 1)
> > > +   {
> > > + if (start2 == -1)
> > > +   {
> > > + start2 = d->perm[i];
> > > + end1 = d->perm[i-1];
> > > +   }
> > > + else
> > > +   return false;
> > > +   }
> > > +  else if (d->perm[i] >= nelt
> > > +  && start2 == -1)
> > > +   {
> > > + start2 = d->perm[i];
> > > + end1 = d->perm[i-1];
> > > +   }
> > > +}
> > > +
> > > +  clear_op0 = end1 != nelt - 1;
> > > +  clear_op1 = start2 % nelt != 0;
> > > +  /* pandn/pand is needed to clear upper/lower bits of op0/op1.  */
> > > +  if (!pandn && (clear_op0 || clear_op1))
> > > +return false;
> > > +
> > > +  if (d->testing_p)
> > > +return true;
> > > +
> > > +  gen_vec_shr = vmode == E_V16QImode ? gen_vec_shr_v16qi : 
> > > gen_vec_shr_v8hi;
> > > +  gen_vec_shl = vmode == E_V16QImode ? gen_vec_shl_v16qi : 
> > > gen_vec_shl_v8hi;
> > > +  imode = GET_MODE_INNER (vmode);
> > > +  inner_size = GET_MODE_BITSIZE (imode);
> > > +  op0 = gen_reg_rtx (vmode);
> > > +  op1 = gen_reg_rtx (vmode);
> > > +
> > > +  if (start1)
> > > +emit_insn (gen_vec_shr (op0, d->op0, GEN_INT (start1 * inner_size)));
> > > +  else
> > > +emit_move_insn (op0, d->op0);
> > > +
> > > +  dop1 = d->op1;
> > > +  if (d->one_operand_p)
> > > +dop1 = d->op0;
> > > +
> > > +  int shl_offset = end1 - start1 + 1 - start2 % nelt;
> > > +  if (shl_offset)
> > > +emit_insn (gen_vec_shl (op1, dop1, GEN_INT (shl_offset * 
> > > inner_size)));
> > > +  else
> > > +emit_move_insn (op1, dop1);
> > > +
> > > +  /* Clear lower/upper bits for op0/op1.  */
> > > +  if (clear_op0 || clear_op1)
> > > +{
> > > +  rtx vec[16];
> > > +  rtx const_vec;
> > > +  rtx clear;
> > > +  for (i = 0; i != nelt; i++)
> > > +   {
> > > + if (i < (end1 - start1 + 1))
> > > +   vec[i] = gen_int_mode ((HOST_WIDE_INT_1U << inner_siz

Re: [2/2] PR96463 -- changes to type checking vec_perm_expr in middle end

2022-05-09 Thread Richard Sandiford via Gcc-patches
Prathamesh Kulkarni  writes:
> On Tue, 3 May 2022 at 18:25, Richard Sandiford
>  wrote:
>>
>> Prathamesh Kulkarni  writes:
>> > On Tue, 4 Jan 2022 at 19:12, Richard Sandiford
>> >  wrote:
>> >>
>> >> Richard Biener  writes:
>> >> > On Tue, 4 Jan 2022, Richard Sandiford wrote:
>> >> >
>> >> >> Richard Biener  writes:
>> >> >> > On Fri, 17 Dec 2021, Richard Sandiford wrote:
>> >> >> >
>> >> >> >> Prathamesh Kulkarni  writes:
>> >> >> >> > Hi,
>> >> >> >> > The attached patch rearranges order of type-check for 
>> >> >> >> > vec_perm_expr
>> >> >> >> > and relaxes type checking for
>> >> >> >> > lhs = vec_perm_expr
>> >> >> >> >
>> >> >> >> > when:
>> >> >> >> > rhs1 == rhs2,
>> >> >> >> > lhs is variable length vector,
>> >> >> >> > rhs1 is fixed length vector,
>> >> >> >> > TREE_TYPE (lhs) == TREE_TYPE (rhs1)
>> >> >> >> >
>> >> >> >> > I am not sure tho if this check is correct ? My intent was to 
>> >> >> >> > capture
>> >> >> >> > case when vec_perm_expr is used to "extend" fixed length vector to
>> >> >> >> > it's VLA equivalent.
>> >> >> >>
>> >> >> >> VLAness isn't really the issue.  We want the same thing to work for
>> >> >> >> -msve-vector-bits=256, -msve-vector-bits=512, etc., even though the
>> >> >> >> vectors are fixed-length in that case.
>> >> >> >>
>> >> >> >> The principle is that for:
>> >> >> >>
>> >> >> >>   A = VEC_PERM_EXPR ;
>> >> >> >>
>> >> >> >> the requirements are:
>> >> >> >>
>> >> >> >> - A, B, C and D must be vectors
>> >> >> >> - A, B and C must have the same element type
>> >> >> >> - D must have an integer element type
>> >> >> >> - A and D must have the same number of elements (NA)
>> >> >> >> - B and C must have the same number of elements (NB)
>> >> >> >>
>> >> >> >> The semantics are that we create a joined vector BC (all elements 
>> >> >> >> of B
>> >> >> >> followed by all element of C) and that:
>> >> >> >>
>> >> >> >>   A[i] = BC[D[i] % (NB+NB)]
>> >> >> >>
>> >> >> >> for 0 ≤ i < NA.
>> >> >> >>
>> >> >> >> This operation makes sense even if NA != NB.
>> >> >> >
>> >> >> > But note that we don't currently expect NA != NB and the optab just
>> >> >> > has a single mode.
>> >> >>
>> >> >> True, but we only need this for constant permutes.  They are already
>> >> >> special in that they allow the index elements to be wider than the data
>> >> >> elements.
>> >> >
>> >> > OK, then we should reflect this in the stmt verification and only relax
>> >> > the constant permute vector case and also amend the
>> >> > TARGET_VECTORIZE_VEC_PERM_CONST accordingly.
>> >>
>> >> Sounds good.
>> >>
>> >> > For non-constant permutes the docs say the mode of vec_perm is
>> >> > the common mode of operands 1 and 2 whilst the mode of operand 0
>> >> > is unspecified - even unconstrained by the docs.  I'm not sure
>> >> > if vec_perm expansion is expected to eventually FAIL.  Updating the
>> >> > docs of vec_perm would be appreciated as well.
>> >>
>> >> Yeah, I guess de facto operand 0 has to be the same mode as operands
>> >> 1 and 2.  Maybe that was just an oversight, or maybe it seemed obvious
>> >> or self-explanatory at the time. :-)
>> >>
>> >> > As said I prefer to not mangle the existing stmt checking too much
>> >> > at this stage so minimal adjustment is prefered there.
>> >>
>> >> The PR is only an enhancement request rather than a bug, so I think the
>> >> patch would need to wait for GCC 13 whatever happens.
>> > Hi,
>> > In attached patch, the type checking is relaxed only if mask is constant.
>> > Does this look OK ?
>> >
>> > Thanks,
>> > Prathamesh
>> >>
>> >> Thanks,
>> >> Richard
>> >
>> > diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
>> > index e321d929fd0..02b88f67855 100644
>> > --- a/gcc/tree-cfg.cc
>> > +++ b/gcc/tree-cfg.cc
>> > @@ -4307,6 +4307,24 @@ verify_gimple_assign_ternary (gassign *stmt)
>> >break;
>> >
>> >  case VEC_PERM_EXPR:
>> > +  /* If permute is constant, then we allow for lhs and rhs
>> > +  to have different vector types, provided:
>> > +  (1) lhs, rhs1, rhs2, and rhs3 have same element type.
>>
>> This isn't a requirement for rhs3.
>>
>> > +  (2) rhs3 vector has integer element type.
>> > +  (3) len(lhs) == len(rhs3) && len(rhs1) == len(rhs2).  */
>> > +
>> > +  if (TREE_CONSTANT (rhs3)
>> > +   && VECTOR_TYPE_P (lhs_type)
>> > +   && VECTOR_TYPE_P (rhs1_type)
>> > +   && VECTOR_TYPE_P (rhs2_type)
>> > +   && VECTOR_TYPE_P (rhs3_type)
>> > +   && TREE_TYPE (lhs_type) == TREE_TYPE (rhs1_type)
>> > +   && TREE_TYPE (lhs_type) == TREE_TYPE (rhs2_type)
>> > +   && INTEGRAL_TYPE_P (TREE_TYPE (rhs3_type))
>> > +   && known_eq (TYPE_VECTOR_SUBPARTS (lhs_type), TYPE_VECTOR_SUBPARTS 
>> > (rhs3_type))
>> > +   && known_eq (TYPE_VECTOR_SUBPARTS (rhs1_type), 
>> > TYPE_VECTOR_SUBPARTS (rhs2_type)))
>> > + return false;
>> > +
>>
>> I think this should be integrated into the existing conditions
>> rather than done as an initial special case.
>>
>> It might make sense to start wit

Re: [PATCH] rs6000: avoid peeking eof after __vector

2022-05-09 Thread Segher Boessenkool
Hi!

On Mon, May 09, 2022 at 06:19:45PM +0800, Jiufu Guo wrote:
> There is a rare corner case: where vector is followed only by one
> valid identifer and the ";" which is near the end of the file.
> 
> Like the case in PR101168:
> using vdbl =  __vector double;
> #define BREAK 1
> 
> For this case, "vector double" is followed by CPP_SEMICOLON and then
> EOF.  There is no more tokens need to check for this case.

One tiny comment/hint:

> --- /dev/null
> +++ b/gcc/testsuite/g++.target/powerpc/pr101168.C
> @@ -0,0 +1,6 @@
> +/* { dg-do compile } */

This is the default, you can leave it out if you want.

Okay for trunk with or without it.  Thanks!


Segher


[PATCH v2] PR105169 Fix references to discarded sections

2022-05-09 Thread Giuliano Belinassi via Gcc-patches
When -fpatchable-function-entry= is enabled, certain C++ codes fails to
link because of generated references to discarded sections in
__patchable_function_entry section. This commit fixes this problem by
puting those references in a COMDAT section.

On the previous patch, GCC fails to compile with --enable-vtable-verify
enabled. This version compiles fine with it.

2022-05-06  Giuliano Belinassi  

PR c++/105169
* targhooks.cc (default_print_patchable_function_entry_1): Handle 
COMDAT case.
* varasm.cc (switch_to_comdat_section): New
(handle_vtv_comdat_section): Call switch_to_comdat_section.
* varasm.h: Declare switch_to_comdat_section.

gcc/testsuite/ChangeLog
2022-05-06  Giuliano Belinassi  

PR c++/105169
* g++.dg/modules/pr105169.h: New file.
* g++.dg/modules/pr105169_a.C: New test.
* g++.dg/modules/pr105169_b.C: New file.
---
 gcc/targhooks.cc  |  8 --
 gcc/testsuite/g++.dg/modules/pr105169.h   | 22 +++
 gcc/testsuite/g++.dg/modules/pr105169_a.C | 25 +
 gcc/testsuite/g++.dg/modules/pr105169_b.C | 12 +
 gcc/varasm.cc | 33 ++-
 gcc/varasm.h  |  2 ++
 6 files changed, 87 insertions(+), 15 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/modules/pr105169.h
 create mode 100644 gcc/testsuite/g++.dg/modules/pr105169_a.C
 create mode 100644 gcc/testsuite/g++.dg/modules/pr105169_b.C

diff --git a/gcc/targhooks.cc b/gcc/targhooks.cc
index 399d6f874dc..b15ae19bcb6 100644
--- a/gcc/targhooks.cc
+++ b/gcc/targhooks.cc
@@ -2009,8 +2009,12 @@ default_print_patchable_function_entry_1 (FILE *file,
   patch_area_number++;
   ASM_GENERATE_INTERNAL_LABEL (buf, "LPFE", patch_area_number);
 
-  switch_to_section (get_section ("__patchable_function_entries",
- flags, current_function_decl));
+  section *sect = get_section ("__patchable_function_entries",
+ flags, current_function_decl);
+  if (HAVE_COMDAT_GROUP && DECL_COMDAT_GROUP (current_function_decl))
+   switch_to_comdat_section (sect, current_function_decl);
+  else
+   switch_to_section (sect);
   assemble_align (POINTER_SIZE);
   fputs (asm_op, file);
   assemble_name_raw (file, buf);
diff --git a/gcc/testsuite/g++.dg/modules/pr105169.h 
b/gcc/testsuite/g++.dg/modules/pr105169.h
new file mode 100644
index 000..a7e76270531
--- /dev/null
+++ b/gcc/testsuite/g++.dg/modules/pr105169.h
@@ -0,0 +1,22 @@
+class IPXAddressClass
+{
+public:
+IPXAddressClass(void);
+};
+
+class WinsockInterfaceClass
+{
+
+public:
+WinsockInterfaceClass(void);
+
+virtual void Set_Broadcast_Address(void*){};
+
+virtual int Get_Protocol(void)
+{
+return 0;
+};
+
+protected:
+};
+
diff --git a/gcc/testsuite/g++.dg/modules/pr105169_a.C 
b/gcc/testsuite/g++.dg/modules/pr105169_a.C
new file mode 100644
index 000..66dc4b7901f
--- /dev/null
+++ b/gcc/testsuite/g++.dg/modules/pr105169_a.C
@@ -0,0 +1,25 @@
+/* { dg-module-do link } */
+/* { dg-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
+/* { dg-additional-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
+
+/* This test is in the "modules" package because it supports multiple files
+   linkage.  */
+
+#include "pr105169.h"
+
+WinsockInterfaceClass* PacketTransport;
+
+IPXAddressClass::IPXAddressClass(void)
+{
+}
+
+int function()
+{
+  return PacketTransport->Get_Protocol();
+}
+
+int main()
+{
+  IPXAddressClass ipxaddr;
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/modules/pr105169_b.C 
b/gcc/testsuite/g++.dg/modules/pr105169_b.C
new file mode 100644
index 000..5f8b00dfe51
--- /dev/null
+++ b/gcc/testsuite/g++.dg/modules/pr105169_b.C
@@ -0,0 +1,12 @@
+/* { dg-module-do link } */
+/* { dg-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
+/* { dg-additional-options "-std=c++11 -fpatchable-function-entry=1 -O2" } */
+
+/* This test is in the "modules" package because it supports multiple files
+   linkage.  */
+
+#include "pr105169.h"
+
+WinsockInterfaceClass::WinsockInterfaceClass(void)
+{
+}
diff --git a/gcc/varasm.cc b/gcc/varasm.cc
index c41f17d64f7..6454f1ce519 100644
--- a/gcc/varasm.cc
+++ b/gcc/varasm.cc
@@ -8457,25 +8457,21 @@ default_asm_output_ident_directive (const char 
*ident_str)
 fprintf (asm_out_file, "%s\"%s\"\n", ident_asm_op, ident_str);
 }
 
-
-/* This function ensures that vtable_map variables are not only
-   in the comdat section, but that each variable has its own unique
-   comdat name.  Without this the variables end up in the same section
-   with a single comdat name.
-
+/* Switch to a COMDAT section with COMDAT name of decl.
+   
FIXME:  resolve_unique_section needs to deal better with
decls with both DECL_SECTION_NAME and DECL_ONE_ONLY.  Once
that is fixed, this if-else statement can be rep

[PATCH 00/10] Enable Decimal Floating Point (DFP) on AArch64

2022-05-09 Thread Christophe Lyon via Gcc-patches
This patch series enables support of DFP on AArch64, using the BID
format (Binary Integer Decimal).  There is no HW support for DFP on
AArch64, and we made a choice similar to x86: BID format using
libgcc's libbid for software emulation.

This work was done independently from Andrew's patch, which I
discovered some time after I started [1].  The essence is similar
although the AArch64 back-end evolved quite a bit since then, and I add
several tests.

The ABI has been documented a few months ago: _Decimal32 is treated
like float, _Decimal64 is treated like double and _Decimal128 is
treated like long double, using the same registers and conventions
(sN, dN, qN, varargs handling).

I have patches for GDB, which I'll send once this series is committed
in GCC since the first GDB patch is to merge the libdecnumber updated.

As of testing, I have also used libdfp, which required only a couple
of minor patches, and its testsuite passes.

I have tested the whole series on aarch64, aarch64_be and x86_64, no
regression, all the DFP tests pass.

OK?

Thanks,
Christophe



[1] https://gcc.gnu.org/legacy-ml/gcc-patches/2017-07/msg00788.html

Christophe Lyon (10):
  aarch64: Enable DFP (Decimal Floating-point) (BID format)
  aarch64: Add backend support for DFP
  libgcc: Enable XF mode conversions to/from DFP modes only if supported
  libgcc: enable DFP for AArch64
  testsuite:: Fix pr39986.c testcase for AArch64
  testsuite: Add new tests for DFP under aarch64/aapcs64
  testsuite: enable more BID DFP tests for AArch64
  testsuite: Add C++ unwinding tests with Decimal Floating-Point
  libgcc: Add support for HF mode (aka __fp16) in libbid
  libgcc: use __builtin_clz and __builtin_ctz in libbid

 config/dfp.m4 |   3 +-
 gcc/config/aarch64/aarch64.cc |  95 ++---
 gcc/config/aarch64/aarch64.md |  86 ++--
 gcc/config/aarch64/iterators.md   |  28 +++-
 gcc/configure |   3 +-
 gcc/doc/sourcebuild.texi  |   3 +
 gcc/testsuite/c-c++-common/dfp/pr39986.c  |  22 +--
 gcc/testsuite/g++.dg/eh/dfp-1.C   |  54 +++
 gcc/testsuite/g++.dg/eh/dfp-2.C   |  54 +++
 gcc/testsuite/g++.dg/eh/dfp-saves-aarch64.C   |  49 +++
 .../gcc.dg/dfp/bid-non-canonical-d128-1.c |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d128-2.c |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d128-3.c |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d128-4.c |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d32-1.c  |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d32-2.c  |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d64-1.c  |   3 +-
 .../gcc.dg/dfp/bid-non-canonical-d64-2.c  |   3 +-
 .../gcc.target/aarch64/aapcs64/aapcs64.exp|   8 ++
 .../gcc.target/aarch64/aapcs64/dfp-1.c|  24 
 .../gcc.target/aarch64/aapcs64/func-ret-1.c   |   7 +
 .../gcc.target/aarch64/aapcs64/func-ret-3.c   |  67 +
 .../gcc.target/aarch64/aapcs64/ice_dfp_5.c|  20 +++
 .../aarch64/aapcs64/test_align_dfp-1.c| 126 +
 .../aarch64/aapcs64/test_align_dfp-4.c|  42 ++
 .../gcc.target/aarch64/aapcs64/test_dfp_1.c   |  31 
 .../gcc.target/aarch64/aapcs64/test_dfp_10.c  |  26 
 .../gcc.target/aarch64/aapcs64/test_dfp_11.c  |  34 +
 .../gcc.target/aarch64/aapcs64/test_dfp_12.c  |  44 ++
 .../gcc.target/aarch64/aapcs64/test_dfp_13.c  |  34 +
 .../gcc.target/aarch64/aapcs64/test_dfp_14.c  |  35 +
 .../gcc.target/aarch64/aapcs64/test_dfp_15.c  |  21 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_16.c  |  32 +
 .../gcc.target/aarch64/aapcs64/test_dfp_17.c  |  37 +
 .../gcc.target/aarch64/aapcs64/test_dfp_18.c  |  34 +
 .../gcc.target/aarch64/aapcs64/test_dfp_19.c  |  35 +
 .../gcc.target/aarch64/aapcs64/test_dfp_2.c   |  17 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_20.c  |  22 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_21.c  |  21 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_22.c  |  19 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_23.c  |  42 ++
 .../gcc.target/aarch64/aapcs64/test_dfp_24.c  |  22 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_25.c  |  61 
 .../gcc.target/aarch64/aapcs64/test_dfp_26.c  |  54 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_27.c  |  46 ++
 .../gcc.target/aarch64/aapcs64/test_dfp_3.c   |  18 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_5.c   |  24 
 .../gcc.target/aarch64/aapcs64/test_dfp_6.c   |  26 
 .../gcc.target/aarch64/aapcs64/test_dfp_7.c   |  30 
 .../gcc.target/aarch64/aapcs64/test_dfp_8.c   |  24 
 .../gcc.target/aarch64/aapcs64/test_dfp_9.c   |  32 +
 .../aarch64/aapcs64/test_quad_double_dfp.c|  26 
 .../gcc.target/aarch64/aapcs64/type-def.h | 132 ++
 .../gcc.target/aarch64/aapcs64/va_arg_dfp-1.c |  60 
 .../aarch64/aapcs64/va_arg_dfp-10.c   |  29 
 .../aarch64/aapcs64/va_arg_dfp-11.c   |  32

[PATCH 02/10] aarch64: Add backend support for DFP

2022-05-09 Thread Christophe Lyon via Gcc-patches
This patch updates the aarch64 backend as needed to support DFP modes
(SD, DD and TD).

2022-03-31  Christophe Lyon  

gcc/
* config/aarch64/aarch64.cc
(aarch64_split_128bit_move): Handle DFP modes.
(aarch64_gen_storewb_pair): Likewise.
(aarch64_gen_loadwb_pair): Likewise.
(aarch64_gen_store_pair): Likewise.
(aarch64_gen_load_pair): Likewise.
(aarch64_mode_valid_for_sched_fusion_p): Likewise.
(aarch64_classify_address): Likewise.
(aarch64_legitimize_address_displacement): Likewise.
(aarch64_can_const_movi_rtx_p): Likewise.
(aarch64_anchor_offset): Likewise.
(aarch64_secondary_reload): Likewise.
(aarch64_rtx_costs): Likewise.
(aarch64_gimplify_va_arg_expr): Likewise.
(aapcs_vfp_sub_candidate): Likewise.
(aarch64_vfp_is_call_or_return_candidate): Likewise.
(aarch64_output_scalar_simd_mov_immediate): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
(aarch64_scalar_mode_supported_p): Accept DFP modes if enabled.
* config/aarch64/aarch64.md
(movsf_aarch64): Use SFD iterator and rename into
mov_aarch64.
(movdf_aarch64): Use DFD iterator and rename into
mov_aarch64.
(movtf_aarch64): Use TFD iterator and rename into
mov_aarch64.
(split pattern for move TF mode): Use TFD iterator.
(load_pair_dw_tftf): Use TX iterator and rename into
load_pair_dw_.
(store_pair_dw_tftf): Likewise.
(loadwb_pair_): Use GPF_PAIR iterator.
(storewb_pair_): Likewise.
* config/aarch64/aarch64/iterators.md
(GPF_PAIR): New iterator.
(GPF_TF_F16_MOV): Add DFP modes.
(SFD, DFD, TFD): New iterators.
(GPF_TF): Add DFP modes.
(TX, DX, DX2): Likewise.
---
 gcc/config/aarch64/aarch64.cc   | 95 +
 gcc/config/aarch64/aarch64.md   | 86 ++---
 gcc/config/aarch64/iterators.md | 28 +++---
 3 files changed, 136 insertions(+), 73 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index bd855758778..0f1b3c04158 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -4828,7 +4828,7 @@ aarch64_split_128bit_move (rtx dst, rtx src)
 
   machine_mode mode = GET_MODE (dst);
 
-  gcc_assert (mode == TImode || mode == TFmode);
+  gcc_assert (mode == TImode || mode == TFmode || mode == TDmode);
   gcc_assert (!(side_effects_p (src) || side_effects_p (dst)));
   gcc_assert (mode == GET_MODE (src) || GET_MODE (src) == VOIDmode);
 
@@ -8464,10 +8464,18 @@ aarch64_gen_storewb_pair (machine_mode mode, rtx base, 
rtx reg, rtx reg2,
   return gen_storewb_pairdf_di (base, base, reg, reg2,
GEN_INT (-adjustment),
GEN_INT (UNITS_PER_WORD - adjustment));
+case E_DDmode:
+  return gen_storewb_pairdd_di (base, base, reg, reg2,
+   GEN_INT (-adjustment),
+   GEN_INT (UNITS_PER_WORD - adjustment));
 case E_TFmode:
   return gen_storewb_pairtf_di (base, base, reg, reg2,
GEN_INT (-adjustment),
GEN_INT (UNITS_PER_VREG - adjustment));
+case E_TDmode:
+  return gen_storewb_pairtd_di (base, base, reg, reg2,
+   GEN_INT (-adjustment),
+   GEN_INT (UNITS_PER_VREG - adjustment));
 default:
   gcc_unreachable ();
 }
@@ -8510,9 +8518,15 @@ aarch64_gen_loadwb_pair (machine_mode mode, rtx base, 
rtx reg, rtx reg2,
 case E_DFmode:
   return gen_loadwb_pairdf_di (base, base, reg, reg2, GEN_INT (adjustment),
   GEN_INT (UNITS_PER_WORD));
+case E_DDmode:
+  return gen_loadwb_pairdd_di (base, base, reg, reg2, GEN_INT (adjustment),
+  GEN_INT (UNITS_PER_WORD));
 case E_TFmode:
   return gen_loadwb_pairtf_di (base, base, reg, reg2, GEN_INT (adjustment),
   GEN_INT (UNITS_PER_VREG));
+case E_TDmode:
+  return gen_loadwb_pairtd_di (base, base, reg, reg2, GEN_INT (adjustment),
+  GEN_INT (UNITS_PER_VREG));
 default:
   gcc_unreachable ();
 }
@@ -8561,9 +8575,15 @@ aarch64_gen_store_pair (machine_mode mode, rtx mem1, rtx 
reg1, rtx mem2,
 case E_DFmode:
   return gen_store_pair_dw_dfdf (mem1, reg1, mem2, reg2);
 
+case E_DDmode:
+  return gen_store_pair_dw_ (mem1, reg1, mem2, reg2);
+
 case E_TFmode:
   return gen_store_pair_dw_tftf (mem1, reg1, mem2, reg2);
 
+case E_TDmode:
+  return gen_store_pair_dw_tdtd (mem1, reg1, mem2, reg2);
+
 case E_V4SImode:
   return gen_vec_store_pairv4siv4si (mem1, reg1, mem2, reg2);
 
@@ -8590,9 +8610,15 @@ aarch64_gen_load_

[PATCH 08/10] testsuite: Add C++ unwinding tests with Decimal Floating-Point

2022-05-09 Thread Christophe Lyon via Gcc-patches
These tests exercise exception handling with Decimal Floating-Point
type.

dfp-1.C and dfp-2.C check that thrown objects of such types are
properly caught, whether when using C++ classes (decimalXX) or via GCC
mode attributes.

dfp-saves-aarch64.C checks that such objects are properly restored,
and has to use the mode attribute trick because objects of decimalXX
class type cannot be assigned to a register variable.

2022-05-03  Christophe Lyon  

gcc/testsuite/
* g++.dg/eh/dfp-1.C: New test.
* g++.dg/eh/dfp-2.C: New test.
* g++.dg/eh/dfp-saves-aarch64.C: New test.
---
 gcc/testsuite/g++.dg/eh/dfp-1.C | 54 +
 gcc/testsuite/g++.dg/eh/dfp-2.C | 54 +
 gcc/testsuite/g++.dg/eh/dfp-saves-aarch64.C | 49 +++
 3 files changed, 157 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/eh/dfp-1.C
 create mode 100644 gcc/testsuite/g++.dg/eh/dfp-2.C
 create mode 100644 gcc/testsuite/g++.dg/eh/dfp-saves-aarch64.C

diff --git a/gcc/testsuite/g++.dg/eh/dfp-1.C b/gcc/testsuite/g++.dg/eh/dfp-1.C
new file mode 100644
index 000..b0da13a4cc5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/eh/dfp-1.C
@@ -0,0 +1,54 @@
+// { dg-do run }
+// { dg-require-effective-target dfp }
+
+extern "C" void abort ();
+
+#include 
+
+using namespace std::decimal;
+
+int
+foo (double fp)
+{
+  if (fp < 32.0)
+throw (decimal32)32;
+  if (fp < 64.0)
+throw (decimal64)64;
+  if (fp < 128.0)
+throw (decimal128)128;
+  return 0;
+}
+
+int bar (double fp)
+{
+  try
+{
+  foo (fp);
+  abort ();
+}
+  catch (decimal32 df)
+{
+  if (df != (decimal32)32)
+   abort ();
+}
+  catch (decimal64 dd)
+{
+  if (dd != (decimal64)64)
+   abort ();
+}
+  catch (decimal128 dl)
+{
+  if (dl != (decimal128)128)
+   abort ();
+}
+  return 0;
+}
+
+int
+main ()
+{
+  bar (10.0);
+  bar (20.0);
+  bar (100.0);
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/eh/dfp-2.C b/gcc/testsuite/g++.dg/eh/dfp-2.C
new file mode 100644
index 000..aff0e03d1d9
--- /dev/null
+++ b/gcc/testsuite/g++.dg/eh/dfp-2.C
@@ -0,0 +1,54 @@
+// { dg-do run }
+// { dg-require-effective-target dfp }
+
+extern "C" void abort ();
+
+typedef float dec32 __attribute__((mode(SD)));
+typedef float dec64 __attribute__((mode(DD)));
+typedef float dec128 __attribute__((mode(TD)));
+
+int
+foo (double fp)
+{
+  if (fp < 32.0)
+throw (dec32)32;
+  if (fp < 64.0)
+throw (dec64)64;
+  if (fp < 128.0)
+throw (dec128)128;
+  return 0;
+}
+
+int bar (double fp)
+{
+  try
+{
+  foo (fp);
+  abort ();
+}
+  catch (dec32 df)
+{
+  if (df != (dec32)32)
+   abort ();
+}
+  catch (dec64 dd)
+{
+  if (dd != (dec64)64)
+   abort ();
+}
+  catch (dec128 dl)
+{
+  if (dl != (dec128)128)
+   abort ();
+}
+  return 0;
+}
+
+int
+main ()
+{
+  bar (10.0);
+  bar (20.0);
+  bar (100.0);
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/eh/dfp-saves-aarch64.C 
b/gcc/testsuite/g++.dg/eh/dfp-saves-aarch64.C
new file mode 100644
index 000..79f6697dd10
--- /dev/null
+++ b/gcc/testsuite/g++.dg/eh/dfp-saves-aarch64.C
@@ -0,0 +1,49 @@
+// { dg-do run { target aarch64*-*-* } }
+// { dg-require-effective-target dfp }
+
+/* Test unwinding of AArch64 register saves.  */
+/* We cannot use #include  because it defines
+   decimal* types as classes, which we cannot be assigned to register
+   variables.  Hence the use the mode attribute trick.  */
+
+#ifdef __aarch64__
+
+typedef float dec64 __attribute__((mode(DD)));
+
+extern "C" void abort (void);
+extern "C" void exit (int);
+
+void
+foo (void)
+{
+  register dec64 v10 asm("v10") = 0;
+  register dec64 v11 asm("v11") = 1;
+  register dec64 v12 asm("v12") = 2;
+  register dec64 v13 asm("v13") = 3;
+  asm volatile ("" : "+w" (v10), "+w" (v11), "+w" (v12), "+w" (v13));
+  throw "";
+}
+
+int
+main (void)
+{
+  register dec64 v10 asm("v10") = 10;
+  register dec64 v11 asm("v11") = 11;
+  register dec64 v12 asm("v12") = 12;
+  register dec64 v13 asm("v13") = 13;
+  asm volatile ("" : "+w" (v10), "+w" (v11), "+w" (v12), "+w" (v13));
+  try {
+foo ();
+  } catch (...) {
+asm volatile ("" : "+w" (v10), "+w" (v11), "+w" (v12), "+w" (v13));
+if (v10 != 10 || v11 != 11 || v12 != 12 || v13 != 13)
+  abort ();
+  }
+  exit (0);
+}
+#else
+int
+main (void)
+{
+}
+#endif
-- 
2.25.1



[PATCH 07/10] testsuite: enable more BID DFP tests for AArch64

2022-05-09 Thread Christophe Lyon via Gcc-patches
Some tests for the BID format are currently restricted to i?86 and
x86_64, but they also pass on AArch64, so this patch enables them.

Since all these tests are related to the BID format, it seems useful
to introduce a new effective-target (dfp_bid) instead of adding
aarch64 to the current target list.

2022-04-28  Christophe Lyon  

gcc/doc/
* sourcebuild.texi (Decimal floating point attributes): Document
dfp_bid effective-target.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_dfp_bid): New.
* gcc.dg/dfp/bid-non-canonical-d128-1.c: Use dfp_bid
effective-target.
* gcc.dg/dfp/bid-non-canonical-d128-2.c: Likewise.
* gcc.dg/dfp/bid-non-canonical-d128-3.c: Likewise.
* gcc.dg/dfp/bid-non-canonical-d128-4.c: Likewise.
* gcc.dg/dfp/bid-non-canonical-d32-1.c: Likewise.
* gcc.dg/dfp/bid-non-canonical-d32-2.c: Likewise.
* gcc.dg/dfp/bid-non-canonical-d64-1.c: Likewise.
* gcc.dg/dfp/bid-non-canonical-d64-2.c: Likewise.
---
 gcc/doc/sourcebuild.texi|  3 +++
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-1.c |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-2.c |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-3.c |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-4.c |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d32-1.c  |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d32-2.c  |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d64-1.c  |  3 ++-
 gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d64-2.c  |  3 ++-
 gcc/testsuite/lib/target-supports.exp   | 11 +++
 10 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 613ac29967b..8189d9ec8ec 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1937,6 +1937,9 @@ test system can execute decimal floating point tests.
 
 @item hard_dfp
 Target generates decimal floating point instructions with current options.
+
+@item dfp_bid
+Target uses the BID format for decimal floating point.
 @end table
 
 @subsubsection ARM-specific attributes
diff --git a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-1.c 
b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-1.c
index eee5471cae0..f8da7022213 100644
--- a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-1.c
+++ b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-1.c
@@ -1,5 +1,6 @@
 /* Test non-canonical BID significands: _Decimal128.  Bug 91226.  */
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
+/* { dg-do run { target lp64 } } */
+/* { dg-require-effective-target dfp_bid } */
 /* { dg-options "-std=gnu2x -O2" } */
 
 extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-2.c 
b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-2.c
index 626712153b4..dade48fcf66 100644
--- a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-2.c
+++ b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-2.c
@@ -1,6 +1,7 @@
 /* Test non-canonical BID significands: _Decimal128, case where
combination field starts 11.  Bug 91226.  */
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
+/* { dg-do run { target lp64 } } */
+/* { dg-require-effective-target dfp_bid } */
 /* { dg-options "-std=gnu2x -O2" } */
 
 extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-3.c 
b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-3.c
index 9190daedaf6..77c0941c027 100644
--- a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-3.c
+++ b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-3.c
@@ -1,5 +1,6 @@
 /* Test non-canonical BID significands: _Decimal128.  Bug 91226.  */
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
+/* { dg-do run { target lp64 } } */
+/* { dg-require-effective-target dfp_bid } */
 /* { dg-options "-std=gnu2x -O0" } */
 
 #include "bid-non-canonical-d128-1.c"
diff --git a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-4.c 
b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-4.c
index b148ce445e7..93ff0fc6d57 100644
--- a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-4.c
+++ b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d128-4.c
@@ -1,6 +1,7 @@
 /* Test non-canonical BID significands: _Decimal128, case where
combination field starts 11.  Bug 91226.  */
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
+/* { dg-do run { target lp64 } } */
+/* { dg-require-effective-target dfp_bid } */
 /* { dg-options "-std=gnu2x -O0" } */
 
 #include "bid-non-canonical-d128-2.c"
diff --git a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d32-1.c 
b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d32-1.c
index b46b71cc3fc..69d014f68c0 100644
--- a/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d32-1.c
+++ b/gcc/testsuite/gcc.dg/dfp/bid-non-canonical-d32-1.c
@@ -1,5 +1,6 @@
 /* Test non-canonical BID significands: _Decimal32.  Bug 91226.  */
-/* { dg-do 

[PATCH 09/10] libgcc: Add support for HF mode (aka __fp16) in libbid

2022-05-09 Thread Christophe Lyon via Gcc-patches
This patch adds support for trunc and extend operations between HF
mode (__fp16) and Decimal Floating Point formats (_Decimal32,
_Decimal64 and _Decimal128).

For simplicity we rely on the implicit conversions inserted by the
compiler between HF and SD/DF/TF modes.  The existing bid*_to_binary*
and binary*_to_bid* functions are non-trivial and at this stage it is
not clear if there is a performance-critical use case involving __fp16
and _Decimal* formats.

The patch also adds two executable tests for AArch64, to make sure the
right functions are used, available (link phase) and functional.

2022-05-04  Christophe Lyon  

libgcc/ChangeLog:

* Makefile.in (D32PBIT_FUNCS): Add _hf_to_sd and _sd_to_hf.
(D64PBIT_FUNCS): Add _hf_to_dd and _dd_to_hf.
(D128PBIT_FUNCS): Add _hf_to_td _td_to_hf.

libgcc/config/libbid/ChangeLog:

* bid_gcc_intrinsics.h (LIBGCC2_HAS_HF_MODE): Define according to
__LIBGCC_HAS_HF_MODE__.
(BID_HAS_HF_MODE): Define.
(HFtype): Define.
(__bid_extendhfsd): New prototype.
(__bid_extendhfdd): Likewise.
(__bid_extendhftd): Likewise.
(__bid_truncsdhf): Likewise.
(__bid_truncddhf): Likewise.
(__bid_trunctdhf): Likewise.
* _dd_to_hf.c: New file.
* _hf_to_dd.c: New file.
* _hf_to_sd.c: New file.
* _hf_to_td.c: New file.
* _sd_to_hf.c: New file.
* _td_to_hf.c: New file.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/convert-dfp-2.c: New test.
* gcc.target/aarch64/convert-dfp.c: New test.
---
 .../gcc.target/aarch64/convert-dfp-2.c| 42 +
 .../gcc.target/aarch64/convert-dfp.c  | 60 +++
 libgcc/Makefile.in|  9 ++-
 libgcc/config/libbid/_dd_to_hf.c  | 36 +++
 libgcc/config/libbid/_hf_to_dd.c  | 36 +++
 libgcc/config/libbid/_hf_to_sd.c  | 36 +++
 libgcc/config/libbid/_hf_to_td.c  | 36 +++
 libgcc/config/libbid/_sd_to_hf.c  | 36 +++
 libgcc/config/libbid/_td_to_hf.c  | 36 +++
 libgcc/config/libbid/bid_gcc_intrinsics.h | 30 +-
 10 files changed, 352 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/convert-dfp-2.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/convert-dfp.c
 create mode 100644 libgcc/config/libbid/_dd_to_hf.c
 create mode 100644 libgcc/config/libbid/_hf_to_dd.c
 create mode 100644 libgcc/config/libbid/_hf_to_sd.c
 create mode 100644 libgcc/config/libbid/_hf_to_td.c
 create mode 100644 libgcc/config/libbid/_sd_to_hf.c
 create mode 100644 libgcc/config/libbid/_td_to_hf.c

diff --git a/gcc/testsuite/gcc.target/aarch64/convert-dfp-2.c 
b/gcc/testsuite/gcc.target/aarch64/convert-dfp-2.c
new file mode 100644
index 000..ebbbc649455
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/convert-dfp-2.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-options "-save-temps" } */
+
+/* Test conversions from DFP to smaller types.  */
+
+_Decimal32 var32;
+_Decimal64 var64;
+_Decimal128 var128;
+__fp16 var16;
+
+void foo32 (_Decimal32 param32)
+{
+  var16 = param32;
+}
+
+void foo64 (_Decimal64 param64)
+{
+  var16 = param64;
+  var32 = param64;
+}
+
+void foo128 (_Decimal128 param128)
+{
+  var16 = param128;
+  var32 = param128;
+  var64 = param128;
+}
+
+int main ()
+{
+  foo32 (var32);
+  foo64 (var64);
+  foo128 (var128);
+  return 0;
+}
+
+/* { dg-final { scan-assembler-times {\tbl\t__bid_truncsdhf} 1 } } */
+/* { dg-final { scan-assembler-times {\tbl\t__bid_truncddhf} 1 } } */
+/* { dg-final { scan-assembler-times {\tbl\t__bid_truncddsd2} 1 } } */
+/* { dg-final { scan-assembler-times {\tbl\t__bid_trunctdhf} 1 } } */
+/* { dg-final { scan-assembler-times {\tbl\t__bid_trunctdsd2} 1 } } */
+/* { dg-final { scan-assembler-times {\tbl\t__bid_trunctddd2} 1 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/convert-dfp.c 
b/gcc/testsuite/gcc.target/aarch64/convert-dfp.c
new file mode 100644
index 000..cd5ada46e3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/convert-dfp.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-save-temps" } */
+
+/* Test conversions to/from DFP values.  */
+
+extern void abort ();
+
+_Decimal32 var32 = 1.2df;
+
+int foo32 (_Decimal32 param32, _Decimal64 param64, _Decimal128 param128, 
__fp16 param16)
+{
+  return (param32 == var32)
++ (param64 == var32)
++ (param128 == var32)
+/* Small enough relative difference?  */
++ _Decimal32)param16 - var32) / var32) < 0.002df);
+}
+
+_Decimal64 var64 = 1.2dd;
+
+int foo64 (_Decimal32 param32, _Decimal64 param64, _Decimal128 param128, 
__fp16 param16)
+{
+  return (param32 == var64)
++ (param64 == var64)
++ (param128 == var64)
+/* Small enough relative difference?  */
++ _Decimal64)param16 - var64) / var64) < 0.002dd);
+}
+
+_Decimal128 var128 = 1.2dl;
+
+int foo12

[PATCH 04/10] libgcc: enable DFP for AArch64

2022-05-09 Thread Christophe Lyon via Gcc-patches
DFP support on AArch64 relies on libgcc, so enable its DFP routines
for all AArch64 targets.

2022-03-31  Christophe Lyon  

* libgcc/config.host: Add t-dfprules to AArch64 targets.
---
 libgcc/config.host | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/libgcc/config.host b/libgcc/config.host
index 8c56fcae5d2..927d34a9573 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -382,6 +382,7 @@ aarch64*-*-elf | aarch64*-*-rtems*)
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
+   tmake_file="${tmake_file} t-dfprules"
md_unwind_header=aarch64/aarch64-unwind.h
;;
 aarch64*-*-freebsd*)
@@ -389,18 +390,21 @@ aarch64*-*-freebsd*)
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
+   tmake_file="${tmake_file} t-dfprules"
md_unwind_header=aarch64/freebsd-unwind.h
;;
 aarch64*-*-netbsd*)
extra_parts="$extra_parts crtfastmath.o"
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
+   tmake_file="${tmake_file} t-dfprules"
md_unwind_header=aarch64/aarch64-unwind.h
;;
 aarch64*-*-fuchsia*)
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp"
+   tmake_file="${tmake_file} t-dfprules"
;;
 aarch64*-*-linux*)
extra_parts="$extra_parts crtfastmath.o"
@@ -408,6 +412,7 @@ aarch64*-*-linux*)
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
+   tmake_file="${tmake_file} t-dfprules"
;;
 aarch64*-*-vxworks7*)
extra_parts="$extra_parts crtfastmath.o"
@@ -415,6 +420,7 @@ aarch64*-*-vxworks7*)
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
+   tmake_file="${tmake_file} t-dfprules"
;;
 alpha*-*-linux*)
tmake_file="${tmake_file} alpha/t-alpha alpha/t-ieee t-crtfm 
alpha/t-linux"
-- 
2.25.1



[PATCH 03/10] libgcc: Enable XF mode conversions to/from DFP modes only if supported

2022-05-09 Thread Christophe Lyon via Gcc-patches
Some targets do not support XF mode (eg AArch64), so don't build the
corresponding to/from DFP modes convertion routines if
__LIBGCC_HAS_XF_MODE__ is not defined.

2022-03-31  Christophe Lyon  

libgcc/
* config/libbid/_dd_to_xf.c: Check __LIBGCC_HAS_XF_MODE__.
* config/libbid/_sd_to_xf.c: Likewise.
* config/libbid/_td_to_xf.c: Likewise.
* config/libbid/_xf_to_dd.c: Likewise.
* config/libbid/_xf_to_sd.c: Likewise.
* config/libbid/_xf_to_td.c: Likewise.
---
 libgcc/config/libbid/_dd_to_xf.c | 2 ++
 libgcc/config/libbid/_sd_to_xf.c | 2 ++
 libgcc/config/libbid/_td_to_xf.c | 2 ++
 libgcc/config/libbid/_xf_to_dd.c | 2 ++
 libgcc/config/libbid/_xf_to_sd.c | 2 ++
 libgcc/config/libbid/_xf_to_td.c | 2 ++
 6 files changed, 12 insertions(+)

diff --git a/libgcc/config/libbid/_dd_to_xf.c b/libgcc/config/libbid/_dd_to_xf.c
index 5a2a1f4..e4b12e8ac4f 100644
--- a/libgcc/config/libbid/_dd_to_xf.c
+++ b/libgcc/config/libbid/_dd_to_xf.c
@@ -25,6 +25,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 #include "bid_functions.h"
 #include "bid_gcc_intrinsics.h"
 
+#ifdef __LIBGCC_HAS_XF_MODE__
 XFtype
 __bid_extendddxf (_Decimal64 x) {
   XFtype res;
@@ -34,3 +35,4 @@ __bid_extendddxf (_Decimal64 x) {
   res = __bid64_to_binary80 (ux.i);
   return (res);
 }
+#endif
diff --git a/libgcc/config/libbid/_sd_to_xf.c b/libgcc/config/libbid/_sd_to_xf.c
index 9af09913684..288ccb25075 100644
--- a/libgcc/config/libbid/_sd_to_xf.c
+++ b/libgcc/config/libbid/_sd_to_xf.c
@@ -25,6 +25,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 #include "bid_functions.h"
 #include "bid_gcc_intrinsics.h"
 
+#ifdef __LIBGCC_HAS_XF_MODE__
 XFtype
 __bid_extendsdxf (_Decimal32 x) {
   XFtype res;
@@ -34,3 +35,4 @@ __bid_extendsdxf (_Decimal32 x) {
   res = __bid32_to_binary80 (ux.i);
   return (res);
 }
+#endif
diff --git a/libgcc/config/libbid/_td_to_xf.c b/libgcc/config/libbid/_td_to_xf.c
index b0c76a71497..e990282162d 100644
--- a/libgcc/config/libbid/_td_to_xf.c
+++ b/libgcc/config/libbid/_td_to_xf.c
@@ -25,6 +25,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 #include "bid_functions.h"
 #include "bid_gcc_intrinsics.h"
 
+#ifdef __LIBGCC_HAS_XF_MODE__
 XFtype
 __bid_trunctdxf (_Decimal128 x) {
   XFtype res;
@@ -34,3 +35,4 @@ __bid_trunctdxf (_Decimal128 x) {
   res = __bid128_to_binary80 (ux.i);
   return (res);
 }
+#endif
diff --git a/libgcc/config/libbid/_xf_to_dd.c b/libgcc/config/libbid/_xf_to_dd.c
index 9feb0f2c3d6..e3246a1c2e1 100644
--- a/libgcc/config/libbid/_xf_to_dd.c
+++ b/libgcc/config/libbid/_xf_to_dd.c
@@ -25,9 +25,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 #include "bid_functions.h"
 #include "bid_gcc_intrinsics.h"
 
+#ifdef __LIBGCC_HAS_XF_MODE__
 _Decimal64
 __bid_truncxfdd (XFtype x) {
   union decimal64 res;
   res.i = __binary80_to_bid64 (x);
   return (res.d);
 }
+#endif
diff --git a/libgcc/config/libbid/_xf_to_sd.c b/libgcc/config/libbid/_xf_to_sd.c
index 7d46548af6c..9147e979182 100644
--- a/libgcc/config/libbid/_xf_to_sd.c
+++ b/libgcc/config/libbid/_xf_to_sd.c
@@ -25,9 +25,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 #include "bid_functions.h"
 #include "bid_gcc_intrinsics.h"
 
+#ifdef __LIBGCC_HAS_XF_MODE__
 _Decimal32
 __bid_truncxfsd (XFtype x) {
   union decimal32 res;
   res.i = __binary80_to_bid32 (x);
   return (res.d);
 }
+#endif
diff --git a/libgcc/config/libbid/_xf_to_td.c b/libgcc/config/libbid/_xf_to_td.c
index 07987fdcc3a..c8d102b0b7f 100644
--- a/libgcc/config/libbid/_xf_to_td.c
+++ b/libgcc/config/libbid/_xf_to_td.c
@@ -25,9 +25,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 #include "bid_functions.h"
 #include "bid_gcc_intrinsics.h"
 
+#ifdef __LIBGCC_HAS_XF_MODE__
 _Decimal128
 __bid_extendxftd (XFtype x) {
   union decimal128 res;
   res.i = __binary80_to_bid128 (x);
   return (res.d);
 }
+#endif
-- 
2.25.1



[PATCH 06/10] testsuite: Add new tests for DFP under aarch64/aapcs64

2022-05-09 Thread Christophe Lyon via Gcc-patches
This patch copies all existing tests involving float/double/long
double types and replaces them with _Decimal32/_Decimal64/_Decimal128.
I thought it would be clearer/easier to maintain to do it this way
rather than adding tests for DFP types in the existing testcases,
except for func-ret-1.c and func-ret-3.c.

This makes sure all cases tested for traditional floating-point are
equally tested for decimal floating-point.

The patch also adds a test involving loading DFP values from memory.

2022-03-31  Christophe Lyon  

gcc/testsuite/
* gcc.target/aarch64/aapcs64/aapcs64.exp: Support new dfp*.c tests.
* gcc.target/aarch64/aapcs64/func-ret-1.c: Add DFP tests.
* gcc.target/aarch64/aapcs64/func-ret-3.c: Add DFP tests.
* gcc.target/aarch64/aapcs64/type-def.h: Add DFP types.
* gcc.target/aarch64/aapcs64/dfp-1.c: New test.
* gcc.target/aarch64/aapcs64/ice_dfp_5.c: New test.
* gcc.target/aarch64/aapcs64/test_align_dfp-1.c: New test.
* gcc.target/aarch64/aapcs64/test_align_dfp-4.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_1.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_10.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_11.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_12.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_13.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_14.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_15.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_16.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_17.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_18.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_19.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_2.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_20.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_21.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_22.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_23.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_24.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_25.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_26.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_27.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_3.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_5.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_6.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_7.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_8.c: New test.
* gcc.target/aarch64/aapcs64/test_dfp_9.c: New test.
* gcc.target/aarch64/aapcs64/test_quad_double_dfp.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-1.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-10.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-11.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-12.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-13.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-14.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-16.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-2.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-3.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-4.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-5.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-6.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-8.c: New test.
* gcc.target/aarch64/aapcs64/va_arg_dfp-9.c: New test.
---
 .../gcc.target/aarch64/aapcs64/aapcs64.exp|   8 ++
 .../gcc.target/aarch64/aapcs64/dfp-1.c|  24 
 .../gcc.target/aarch64/aapcs64/func-ret-1.c   |   7 +
 .../gcc.target/aarch64/aapcs64/func-ret-3.c   |  67 +
 .../gcc.target/aarch64/aapcs64/ice_dfp_5.c|  20 +++
 .../aarch64/aapcs64/test_align_dfp-1.c| 126 +
 .../aarch64/aapcs64/test_align_dfp-4.c|  42 ++
 .../gcc.target/aarch64/aapcs64/test_dfp_1.c   |  31 
 .../gcc.target/aarch64/aapcs64/test_dfp_10.c  |  26 
 .../gcc.target/aarch64/aapcs64/test_dfp_11.c  |  34 +
 .../gcc.target/aarch64/aapcs64/test_dfp_12.c  |  44 ++
 .../gcc.target/aarch64/aapcs64/test_dfp_13.c  |  34 +
 .../gcc.target/aarch64/aapcs64/test_dfp_14.c  |  35 +
 .../gcc.target/aarch64/aapcs64/test_dfp_15.c  |  21 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_16.c  |  32 +
 .../gcc.target/aarch64/aapcs64/test_dfp_17.c  |  37 +
 .../gcc.target/aarch64/aapcs64/test_dfp_18.c  |  34 +
 .../gcc.target/aarch64/aapcs64/test_dfp_19.c  |  35 +
 .../gcc.target/aarch64/aapcs64/test_dfp_2.c   |  17 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_20.c  |  22 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_21.c  |  21 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_22.c  |  19 +++
 .../gcc.target/aarch64/aapcs64/test_dfp_23.c  |  42 ++
 .../gcc

[PATCH 01/10] aarch64: Enable DFP (Decimal Floating-point) (BID format)

2022-05-09 Thread Christophe Lyon via Gcc-patches
This patch enables DFP support on aarch64, by updating config/dfp.m4
and regenerating the involved configure scripts.
We enable the BID format.

2022-03-31  Christophe Lyon  

* config/dfp.m4: Add aarch64 support.
* gcc/configure: Regenerate.
* libdecnumber/configure: Regenerate.
* libgcc/configure: Regenerate.
---
 config/dfp.m4  | 3 ++-
 gcc/configure  | 3 ++-
 libdecnumber/configure | 3 ++-
 libgcc/configure   | 3 ++-
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/config/dfp.m4 b/config/dfp.m4
index 5b6a3f9d114..d1d151b2da7 100644
--- a/config/dfp.m4
+++ b/config/dfp.m4
@@ -38,6 +38,7 @@ Valid choices are 'yes', 'bid', 'dpd', and 'no'.]) ;;
 ],
 [
   case $1 in
+aarch64* | \
 powerpc*-*-linux* | i?86*-*-linux* | x86_64*-*-linux* | s390*-*-linux* | \
 i?86*-*-elfiamcu | i?86*-*-gnu* | x86_64*-*-gnu* | \
 i?86*-*-mingw* | x86_64*-*-mingw* | \
@@ -55,7 +56,7 @@ Valid choices are 'yes', 'bid', 'dpd', and 'no'.]) ;;
 case x$enable_decimal_float in
   xyes)
 case $1 in
-  i?86*-*-* | x86_64*-*-*)
+  aarch64* | i?86*-*-* | x86_64*-*-*)
enable_decimal_float=bid
;;
   *)
diff --git a/gcc/configure b/gcc/configure
index 5ce0557719a..37e0dd5e414 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -7896,6 +7896,7 @@ Valid choices are 'yes', 'bid', 'dpd', and 'no'." 
"$LINENO" 5 ;;
 else
 
   case $target in
+aarch64* | \
 powerpc*-*-linux* | i?86*-*-linux* | x86_64*-*-linux* | s390*-*-linux* | \
 i?86*-*-elfiamcu | i?86*-*-gnu* | x86_64*-*-gnu* | \
 i?86*-*-mingw* | x86_64*-*-mingw* | \
@@ -7916,7 +7917,7 @@ fi
 case x$enable_decimal_float in
   xyes)
 case $target in
-  i?86*-*-* | x86_64*-*-*)
+  aarch64* | i?86*-*-* | x86_64*-*-*)
enable_decimal_float=bid
;;
   *)
diff --git a/libdecnumber/configure b/libdecnumber/configure
index da5302f9315..fb6db05565a 100755
--- a/libdecnumber/configure
+++ b/libdecnumber/configure
@@ -4903,6 +4903,7 @@ Valid choices are 'yes', 'bid', 'dpd', and 'no'." 
"$LINENO" 5 ;;
 else
 
   case $target in
+aarch64* | \
 powerpc*-*-linux* | i?86*-*-linux* | x86_64*-*-linux* | s390*-*-linux* | \
 i?86*-*-elfiamcu | i?86*-*-gnu* | x86_64*-*-gnu* | \
 i?86*-*-mingw* | x86_64*-*-mingw* | \
@@ -4923,7 +4924,7 @@ fi
 case x$enable_decimal_float in
   xyes)
 case $target in
-  i?86*-*-* | x86_64*-*-*)
+  aarch64* | i?86*-*-* | x86_64*-*-*)
enable_decimal_float=bid
;;
   *)
diff --git a/libgcc/configure b/libgcc/configure
index 1f9b2ac578b..61f3ace2891 100755
--- a/libgcc/configure
+++ b/libgcc/configure
@@ -4771,6 +4771,7 @@ Valid choices are 'yes', 'bid', 'dpd', and 'no'." 
"$LINENO" 5 ;;
 else
 
   case $host in
+aarch64* | \
 powerpc*-*-linux* | i?86*-*-linux* | x86_64*-*-linux* | s390*-*-linux* | \
 i?86*-*-elfiamcu | i?86*-*-gnu* | x86_64*-*-gnu* | \
 i?86*-*-mingw* | x86_64*-*-mingw* | \
@@ -4791,7 +4792,7 @@ fi
 case x$enable_decimal_float in
   xyes)
 case $host in
-  i?86*-*-* | x86_64*-*-*)
+  aarch64* | i?86*-*-* | x86_64*-*-*)
enable_decimal_float=bid
;;
   *)
-- 
2.25.1



[PATCH 10/10] libgcc: use __builtin_clz and __builtin_ctz in libbid

2022-05-09 Thread Christophe Lyon via Gcc-patches
This patch replaces libbid's implementations of clz and ctz for 32 and
64 bits inputs which used several masks, and switches to the
corresponding builtins. This will provide a better implementation,
especially on targets with clz/ctz instructions.

2022-05-06  Christophe Lyon  

libgcc/config/libbid/ChangeLog:

* bid_binarydecimal.c (CLZ32_MASK16): Delete.
(CLZ32_MASK8): Delete.
(CLZ32_MASK4): Delete.
(CLZ32_MASK2): Delete.
(CLZ32_MASK1): Delete.
(clz32_nz): Use __builtin_clz.
(ctz32_1bit): Delete.
(ctz32): Use __builtin_ctz.
(CLZ64_MASK32): Delete.
(CLZ64_MASK16): Delete.
(CLZ64_MASK8): Delete.
(CLZ64_MASK4): Delete.
(CLZ64_MASK2): Delete.
(CLZ64_MASK1): Delete.
(clz64_nz): Use __builtin_clzl.
(ctz64_1bit): Delete.
(ctz64): Use __builtin_ctzl.
---
 libgcc/config/libbid/bid_binarydecimal.c | 51 ++--
 1 file changed, 4 insertions(+), 47 deletions(-)

diff --git a/libgcc/config/libbid/bid_binarydecimal.c 
b/libgcc/config/libbid/bid_binarydecimal.c
index e156ea60d11..5413acceeaf 100644
--- a/libgcc/config/libbid/bid_binarydecimal.c
+++ b/libgcc/config/libbid/bid_binarydecimal.c
@@ -26,65 +26,22 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  
If not, see
 // Counting leading zeros in an unsigned 32-bit word
 // The "_nz" version will return the wrong answer (31) for zero inputs
 
-#define CLZ32_MASK16 0xul
-#define CLZ32_MASK8  0xFF00FF00ul
-#define CLZ32_MASK4  0xF0F0F0F0ul
-#define CLZ32_MASK2  0xul
-#define CLZ32_MASK1  0xul
-
-#define clz32_nz(n) \
- (n) & CLZ32_MASK16) <= ((n) & ~CLZ32_MASK16)) ? 16 : 0) +  \
-  n) & CLZ32_MASK8) <= ((n) & ~CLZ32_MASK8)) ? 8 : 0) + \
-  n) & CLZ32_MASK4) <= ((n) & ~CLZ32_MASK4)) ? 4 : 0) + \
-  n) & CLZ32_MASK2) <= ((n) & ~CLZ32_MASK2)) ? 2 : 0) + \
-  n) & CLZ32_MASK1) <= ((n) & ~CLZ32_MASK1)) ? 1 : 0))
-
+#define clz32_nz(n) (__builtin_clz (n))
 #define clz32(n) (((n)==0) ? 32 : clz32_nz(n))
 
 // Counting trailing zeros in an unsigned 32-bit word
-// The ctz32_1bit version is for a single bit
-
-#define ctz32_1bit(n)   \
- n) & ~CLZ32_MASK16) ? 0 : 16) +\
-  (((n) & ~CLZ32_MASK8) ? 0 : 8) +  \
-  (((n) & ~CLZ32_MASK4) ? 0 : 4) +  \
-  (((n) & ~CLZ32_MASK2) ? 0 : 2) +  \
-  (((n) & ~CLZ32_MASK1) ? 0 : 1))
+#define ctz32(n) (__builtin_ctz (n))
 
-#define ctz32(n) (((n) == 0) ? 32 : ctz32_1bit((n) & -(n)))
 
 // Counting leading zeros in an unsigned 64-bit word
 // The "_nz" version will return the wrong answer (63) for zero inputs
 
-#define CLZ64_MASK32 0xull
-#define CLZ64_MASK16 0xull
-#define CLZ64_MASK8  0xFF00FF00FF00FF00ull
-#define CLZ64_MASK4  0xF0F0F0F0F0F0F0F0ull
-#define CLZ64_MASK2  0xull
-#define CLZ64_MASK1  0xull
-
-#define clz64_nz(n) \
- (n) & CLZ64_MASK32) <= ((n) & ~CLZ64_MASK32)) ? 32 : 0) +  \
-  n) & CLZ64_MASK16) <= ((n) & ~CLZ64_MASK16)) ? 16 : 0) +  \
-  n) & CLZ64_MASK8) <= ((n) & ~CLZ64_MASK8)) ? 8 : 0) + \
-  n) & CLZ64_MASK4) <= ((n) & ~CLZ64_MASK4)) ? 4 : 0) + \
-  n) & CLZ64_MASK2) <= ((n) & ~CLZ64_MASK2)) ? 2 : 0) + \
-  n) & CLZ64_MASK1) <= ((n) & ~CLZ64_MASK1)) ? 1 : 0))  \
-
+#define clz64_nz(n) ( (__SIZEOF_LONG__ == 8) ?__builtin_clzl(n) : 
__builtin_clzll(n) )
 #define clz64(n) (((n)==0) ? 64 : clz64_nz(n))
 
 // Counting trailing zeros in an unsigned 64-bit word
-// The ctz64_1bit version is for a single bit
-
-#define ctz64_1bit(n)   \
- n) & ~CLZ64_MASK32) ? 0 : 32) +\
-  (((n) & ~CLZ64_MASK16) ? 0 : 16) +\
-  (((n) & ~CLZ64_MASK8) ? 0 : 8) +  \
-  (((n) & ~CLZ64_MASK4) ? 0 : 4) +  \
-  (((n) & ~CLZ64_MASK2) ? 0 : 2) +  \
-  (((n) & ~CLZ64_MASK1) ? 0 : 1))
+#define ctz64(n) ( (__SIZEOF_LONG__ == 8) ?__builtin_ctzl(n) : 
__builtin_ctzll(n) )
 
-#define ctz64(n) (((n) == 0) ? 64 : ctz64_1bit((n) & -(n)))
 
 // Counting leading zeros in an unsigned 2-part 128-bit word
 
-- 
2.25.1



[PATCH 05/10] testsuite:: Fix pr39986.c testcase for AArch64

2022-05-09 Thread Christophe Lyon via Gcc-patches
The testcase in c-c++-common/dfp/pr39986.c detects if DFP constants
are correctly emitted in the assembly.  However, AArch64 uses .word
instead of the expected .long directive. With this patch, we now
accept both.

2022-03-31  Christophe Lyon 

gcc/testsuite/
* c-c++-common/dfp/pr39986.c: Accept .word directive.
---
 gcc/testsuite/c-c++-common/dfp/pr39986.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/gcc/testsuite/c-c++-common/dfp/pr39986.c 
b/gcc/testsuite/c-c++-common/dfp/pr39986.c
index e7c9ce98283..4dfbf2446cc 100644
--- a/gcc/testsuite/c-c++-common/dfp/pr39986.c
+++ b/gcc/testsuite/c-c++-common/dfp/pr39986.c
@@ -14,19 +14,19 @@ _Decimal128 f = -678901.234e-6dl;
 /* The first value is DPD, the second is BID.  The order differs depending
on whether the target is big-endian or little-endian.  */
 
-/* { dg-final { scan-assembler ".long\t(572653859|822183807)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(572653859|822183807)\n" } } */
 
-/* { dg-final { scan-assembler ".long\t(-1572863965|-1308622825)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(-1572863965|-1308622825)\n" } 
} */
 
-/* { dg-final { scan-assembler ".long\t(52|34)\n" } } */
-/* { dg-final { scan-assembler ".long\t(572784640|824180736)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(52|34)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(572784640|824180736)\n" } } */
 
-/* { dg-final { scan-assembler ".long\t(4736|4500)\n" } } */
-/* { dg-final { scan-assembler ".long\t(-1574174720|-1319108608)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(4736|4500)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(-1574174720|-1319108608)\n" } 
} */
 
-/* { dg-final { scan-assembler ".long\t(-1975952433|957645077)\n" } } */
-/* { dg-final { scan-assembler ".long\t(190215|13)\n" } } */
-/* { dg-final { scan-assembler ".long\t(574193664|835452928)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(-1975952433|957645077)\n" } } 
*/
+/* { dg-final { scan-assembler "(.long|.word)\t(190215|13)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(574193664|835452928)\n" } } */
 
-/* { dg-final { scan-assembler ".long\t(931280180|678901234)\n" } } */
-/* { dg-final { scan-assembler ".long\t(-1576681472|-1339162624)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(931280180|678901234)\n" } } */
+/* { dg-final { scan-assembler "(.long|.word)\t(-1576681472|-1339162624)\n" } 
} */
-- 
2.25.1



[PATCH] x86: Add .note.GNU-stack section only for Linux

2022-05-09 Thread H.J. Lu via Gcc-patches
Add .note.GNU-stack section only for Linux since it may not be supported
on non-Linux OSes.  __ELF__ isn't checked since these tests can only run
on Linux/x86 ELF systems.

PR target/105472
* gcc.target/i386/iamcu/asm-support.S: Add .note.GNU-stack section
only for Linux.
* gcc.target/x86_64/abi/asm-support.S: Likewise.
* gcc.target/x86_64/abi/avx/asm-support.S: Likewise.
* gcc.target/x86_64/abi/avx512f/asm-support.S: Likewise.
* gcc.target/x86_64/abi/avx512fp16/asm-support.S: Likewise.
* gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S: Likewise.
* gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S: Likewise.
* gcc.target/x86_64/abi/ms-sysv/do-test.S: Likewise.
---
 gcc/testsuite/gcc.target/i386/iamcu/asm-support.S   | 2 ++
 gcc/testsuite/gcc.target/x86_64/abi/asm-support.S   | 2 ++
 gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S   | 2 ++
 gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S   | 2 ++
 gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/asm-support.S| 2 ++
 .../gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S| 2 ++
 .../gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S| 2 ++
 gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/do-test.S   | 2 ++
 8 files changed, 16 insertions(+)

diff --git a/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S 
b/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S
index db08f52a34f..9d6be88e7d5 100644
--- a/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S
+++ b/gcc/testsuite/gcc.target/i386/iamcu/asm-support.S
@@ -300,4 +300,6 @@ iamcu_noprintf:
.align 4
 .LCiamcu_noprintf1:
.long   1132527616
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/asm-support.S 
b/gcc/testsuite/gcc.target/x86_64/abi/asm-support.S
index 2f8d3a09c6b..b2ad67aef87 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/asm-support.S
+++ b/gcc/testsuite/gcc.target/x86_64/abi/asm-support.S
@@ -82,4 +82,6 @@ snapshot_ret:
.comm   xmm_regs,256,32
.comm   x87_regs,128,32
.comm   volatile_var,8,8
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S 
b/gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S
index 77b3480ac32..24c8b3c9023 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx/asm-support.S
@@ -79,4 +79,6 @@ snapshot_ret:
.comm   ymm_regs,512,32
.comm   x87_regs,128,32
.comm   volatile_var,8,8
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S 
b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
index 2e3306c44cb..86d54d11c58 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
@@ -95,4 +95,6 @@ snapshot_ret:
.comm   zmm_regs,2048,64
.comm   x87_regs,128,32
.comm   volatile_var,8,8
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/asm-support.S 
b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/asm-support.S
index 0793acf048b..a8165d86317 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/asm-support.S
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/asm-support.S
@@ -79,4 +79,6 @@ snapshot_ret:
.comm   xmm_regs,256,32
.comm   x87_regs,128,32
.comm   volatile_var,8,8
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S 
b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S
index 77b3480ac32..24c8b3c9023 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S
@@ -79,4 +79,6 @@ snapshot_ret:
.comm   ymm_regs,512,32
.comm   x87_regs,128,32
.comm   volatile_var,8,8
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S 
b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S
index 2e3306c44cb..86d54d11c58 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S
@@ -95,4 +95,6 @@ snapshot_ret:
.comm   zmm_regs,2048,64
.comm   x87_regs,128,32
.comm   volatile_var,8,8
+#ifdef __linux__
.section.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/ms-sysv/do-test.S 
b/gcc/testsuite/gcc.target/x86_64/abi/

Re: [patch][gcc13][i386][pr101891]Adjust -fzero-call-used-regs to always use XOR

2022-05-09 Thread Qing Zhao via Gcc-patches


> On May 7, 2022, at 4:06 AM, Uros Bizjak  wrote:
> 
> On Fri, May 6, 2022 at 6:42 PM Qing Zhao  wrote:
>> 
>> 
>> 
>>> On May 6, 2022, at 10:58 AM, Uros Bizjak  wrote:
>>> 
>>> On Fri, May 6, 2022 at 4:29 PM Qing Zhao  wrote:
 
 Hi,
 
 As Kee’s requested in this PR: 
 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101891
 
 =
 
 Currently -fzero-call-used-regs will use a pattern of:
 
 XOR regA,regA
 MOV regA,regB
 MOV regA,regC
 ...
 RET
 
 However, this introduces both a register ordering dependency (e.g. the CPU 
 cannot clear regB without clearing regA first), and while greatly reduces 
 available ROP gadgets, it does technically leave a set of "MOV" ROP 
 gadgets at the end of functions (e.g. "MOV regA,regC; RET").
 
 Please switch to always using XOR:
 
 XOR regA,regA
 XOR regB,regB
 XOR regC,regC
 ...
 RET
 
 ===
 
 This patch switch all MOV to XOR on i386.
 
 Bootstrapped and regresstion tested on x86_64-linux-gnu.
 
 Okay for gcc13?
 
 Thanks.
 
 Qing
 
 ==
>>> 
 gcc/ChangeLog:
 
 * config/i386/i386.cc (zero_all_mm_registers): Use SET to zero instead
 of MOV for zeroing scratch registers.
 (ix86_zero_call_used_regs): Likewise.
 
 gcc/testsuite/ChangeLog:
 
 * gcc.target/i386/zero-scratch-regs-1.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-10.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-13.c: Add -msse.
 * gcc.target/i386/zero-scratch-regs-14.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-15.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-16.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-17.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-18.c: Add -fno-stack-protector
 -fno-PIC, adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-19.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-2.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-20.c: Add -msse.
 * gcc.target/i386/zero-scratch-regs-21.c: Add -fno-stack-protector
 -fno-PIC, Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-22.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-23.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-26.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-27.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-28.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-3.c: Add -fno-stack-protector.
 * gcc.target/i386/zero-scratch-regs-31.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-4.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-5.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-6.c: Add -fno-stack-protector.
 * gcc.target/i386/zero-scratch-regs-7.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-8.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-9.c: Add -fno-stack-protector.
>>> 
>>> Please use something like the attached (functionally equivalent) patch
>>> for the last hunk of your patch.
>> 
>> Sure, I will update the code.
>>> 
>>> Also, if possible, please use V2SImode as a generic MMX mode instead
>>> of V4HImode.
>> What’s the major purpose of this change?
> 
> Although the generated code is the same, V2SI is used as a "generic"
> MMX move insn in the same way V2DI is used to describe generic SSE
> move instruction.

Thank you!.

FYI, I just committed the patch to the trunk (with updating as you suggested):

https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=0b86943aca51175968e40bbb6f2662dfe3fbfe59

Qing

> 
> Uros.



Re: [patch][gcc13][i386][pr101891]Adjust -fzero-call-used-regs to always use XOR

2022-05-09 Thread Qing Zhao via Gcc-patches
Another question:

I think that this patch might need to be back ported to Gcc12 and GCC11.

What’s your opinion on this?

If so, when can I backport it?

thanks.

Qing

> On May 7, 2022, at 4:06 AM, Uros Bizjak  wrote:
> 
> On Fri, May 6, 2022 at 6:42 PM Qing Zhao  wrote:
>> 
>> 
>> 
>>> On May 6, 2022, at 10:58 AM, Uros Bizjak  wrote:
>>> 
>>> On Fri, May 6, 2022 at 4:29 PM Qing Zhao  wrote:
 
 Hi,
 
 As Kee’s requested in this PR: 
 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101891
 
 =
 
 Currently -fzero-call-used-regs will use a pattern of:
 
 XOR regA,regA
 MOV regA,regB
 MOV regA,regC
 ...
 RET
 
 However, this introduces both a register ordering dependency (e.g. the CPU 
 cannot clear regB without clearing regA first), and while greatly reduces 
 available ROP gadgets, it does technically leave a set of "MOV" ROP 
 gadgets at the end of functions (e.g. "MOV regA,regC; RET").
 
 Please switch to always using XOR:
 
 XOR regA,regA
 XOR regB,regB
 XOR regC,regC
 ...
 RET
 
 ===
 
 This patch switch all MOV to XOR on i386.
 
 Bootstrapped and regresstion tested on x86_64-linux-gnu.
 
 Okay for gcc13?
 
 Thanks.
 
 Qing
 
 ==
>>> 
 gcc/ChangeLog:
 
 * config/i386/i386.cc (zero_all_mm_registers): Use SET to zero instead
 of MOV for zeroing scratch registers.
 (ix86_zero_call_used_regs): Likewise.
 
 gcc/testsuite/ChangeLog:
 
 * gcc.target/i386/zero-scratch-regs-1.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-10.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-13.c: Add -msse.
 * gcc.target/i386/zero-scratch-regs-14.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-15.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-16.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-17.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-18.c: Add -fno-stack-protector
 -fno-PIC, adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-19.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-2.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-20.c: Add -msse.
 * gcc.target/i386/zero-scratch-regs-21.c: Add -fno-stack-protector
 -fno-PIC, Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-22.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-23.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-26.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-27.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-28.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-3.c: Add -fno-stack-protector.
 * gcc.target/i386/zero-scratch-regs-31.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-4.c: Add -fno-stack-protector
 -fno-PIC.
 * gcc.target/i386/zero-scratch-regs-5.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-6.c: Add -fno-stack-protector.
 * gcc.target/i386/zero-scratch-regs-7.c: Likewise.
 * gcc.target/i386/zero-scratch-regs-8.c: Adjust mov to xor.
 * gcc.target/i386/zero-scratch-regs-9.c: Add -fno-stack-protector.
>>> 
>>> Please use something like the attached (functionally equivalent) patch
>>> for the last hunk of your patch.
>> 
>> Sure, I will update the code.
>>> 
>>> Also, if possible, please use V2SImode as a generic MMX mode instead
>>> of V4HImode.
>> What’s the major purpose of this change?
> 
> Although the generated code is the same, V2SI is used as a "generic"
> MMX move insn in the same way V2DI is used to describe generic SSE
> move instruction.
> 
> Uros.



Re: [2/2] PR96463 -- changes to type checking vec_perm_expr in middle end

2022-05-09 Thread Prathamesh Kulkarni via Gcc-patches
On Mon, 9 May 2022 at 19:22, Richard Sandiford
 wrote:
>
> Prathamesh Kulkarni  writes:
> > On Tue, 3 May 2022 at 18:25, Richard Sandiford
> >  wrote:
> >>
> >> Prathamesh Kulkarni  writes:
> >> > On Tue, 4 Jan 2022 at 19:12, Richard Sandiford
> >> >  wrote:
> >> >>
> >> >> Richard Biener  writes:
> >> >> > On Tue, 4 Jan 2022, Richard Sandiford wrote:
> >> >> >
> >> >> >> Richard Biener  writes:
> >> >> >> > On Fri, 17 Dec 2021, Richard Sandiford wrote:
> >> >> >> >
> >> >> >> >> Prathamesh Kulkarni  writes:
> >> >> >> >> > Hi,
> >> >> >> >> > The attached patch rearranges order of type-check for 
> >> >> >> >> > vec_perm_expr
> >> >> >> >> > and relaxes type checking for
> >> >> >> >> > lhs = vec_perm_expr
> >> >> >> >> >
> >> >> >> >> > when:
> >> >> >> >> > rhs1 == rhs2,
> >> >> >> >> > lhs is variable length vector,
> >> >> >> >> > rhs1 is fixed length vector,
> >> >> >> >> > TREE_TYPE (lhs) == TREE_TYPE (rhs1)
> >> >> >> >> >
> >> >> >> >> > I am not sure tho if this check is correct ? My intent was to 
> >> >> >> >> > capture
> >> >> >> >> > case when vec_perm_expr is used to "extend" fixed length vector 
> >> >> >> >> > to
> >> >> >> >> > it's VLA equivalent.
> >> >> >> >>
> >> >> >> >> VLAness isn't really the issue.  We want the same thing to work 
> >> >> >> >> for
> >> >> >> >> -msve-vector-bits=256, -msve-vector-bits=512, etc., even though 
> >> >> >> >> the
> >> >> >> >> vectors are fixed-length in that case.
> >> >> >> >>
> >> >> >> >> The principle is that for:
> >> >> >> >>
> >> >> >> >>   A = VEC_PERM_EXPR ;
> >> >> >> >>
> >> >> >> >> the requirements are:
> >> >> >> >>
> >> >> >> >> - A, B, C and D must be vectors
> >> >> >> >> - A, B and C must have the same element type
> >> >> >> >> - D must have an integer element type
> >> >> >> >> - A and D must have the same number of elements (NA)
> >> >> >> >> - B and C must have the same number of elements (NB)
> >> >> >> >>
> >> >> >> >> The semantics are that we create a joined vector BC (all elements 
> >> >> >> >> of B
> >> >> >> >> followed by all element of C) and that:
> >> >> >> >>
> >> >> >> >>   A[i] = BC[D[i] % (NB+NB)]
> >> >> >> >>
> >> >> >> >> for 0 ≤ i < NA.
> >> >> >> >>
> >> >> >> >> This operation makes sense even if NA != NB.
> >> >> >> >
> >> >> >> > But note that we don't currently expect NA != NB and the optab just
> >> >> >> > has a single mode.
> >> >> >>
> >> >> >> True, but we only need this for constant permutes.  They are already
> >> >> >> special in that they allow the index elements to be wider than the 
> >> >> >> data
> >> >> >> elements.
> >> >> >
> >> >> > OK, then we should reflect this in the stmt verification and only 
> >> >> > relax
> >> >> > the constant permute vector case and also amend the
> >> >> > TARGET_VECTORIZE_VEC_PERM_CONST accordingly.
> >> >>
> >> >> Sounds good.
> >> >>
> >> >> > For non-constant permutes the docs say the mode of vec_perm is
> >> >> > the common mode of operands 1 and 2 whilst the mode of operand 0
> >> >> > is unspecified - even unconstrained by the docs.  I'm not sure
> >> >> > if vec_perm expansion is expected to eventually FAIL.  Updating the
> >> >> > docs of vec_perm would be appreciated as well.
> >> >>
> >> >> Yeah, I guess de facto operand 0 has to be the same mode as operands
> >> >> 1 and 2.  Maybe that was just an oversight, or maybe it seemed obvious
> >> >> or self-explanatory at the time. :-)
> >> >>
> >> >> > As said I prefer to not mangle the existing stmt checking too much
> >> >> > at this stage so minimal adjustment is prefered there.
> >> >>
> >> >> The PR is only an enhancement request rather than a bug, so I think the
> >> >> patch would need to wait for GCC 13 whatever happens.
> >> > Hi,
> >> > In attached patch, the type checking is relaxed only if mask is constant.
> >> > Does this look OK ?
> >> >
> >> > Thanks,
> >> > Prathamesh
> >> >>
> >> >> Thanks,
> >> >> Richard
> >> >
> >> > diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
> >> > index e321d929fd0..02b88f67855 100644
> >> > --- a/gcc/tree-cfg.cc
> >> > +++ b/gcc/tree-cfg.cc
> >> > @@ -4307,6 +4307,24 @@ verify_gimple_assign_ternary (gassign *stmt)
> >> >break;
> >> >
> >> >  case VEC_PERM_EXPR:
> >> > +  /* If permute is constant, then we allow for lhs and rhs
> >> > +  to have different vector types, provided:
> >> > +  (1) lhs, rhs1, rhs2, and rhs3 have same element type.
> >>
> >> This isn't a requirement for rhs3.
> >>
> >> > +  (2) rhs3 vector has integer element type.
> >> > +  (3) len(lhs) == len(rhs3) && len(rhs1) == len(rhs2).  */
> >> > +
> >> > +  if (TREE_CONSTANT (rhs3)
> >> > +   && VECTOR_TYPE_P (lhs_type)
> >> > +   && VECTOR_TYPE_P (rhs1_type)
> >> > +   && VECTOR_TYPE_P (rhs2_type)
> >> > +   && VECTOR_TYPE_P (rhs3_type)
> >> > +   && TREE_TYPE (lhs_type) == TREE_TYPE (rhs1_type)
> >> > +   && TREE_TYPE (lhs_type) == TREE_TYPE (rhs2_type)
> >> > +   && INTEGRAL_TYPE_P (TREE_TYPE (rhs3_type))
> >> > +   && 

Re: [PATCH] ipa-visibility: Optimize TLS access [PR99619]

2022-05-09 Thread Alexander Monakov
On Mon, 2 May 2022, Alexander Monakov wrote:
> > > --- a/gcc/ipa-visibility.cc
> > > +++ b/gcc/ipa-visibility.cc
> > > @@ -872,6 +872,22 @@ function_and_variable_visibility (bool whole_program)
> > >   }
> > >   }
> > >  }
> > > +  FOR_EACH_VARIABLE (vnode)
> > > +{
> > > +  tree decl = vnode->decl;
> > > +  
> > > +  /* Optimize TLS model based on visibility (taking into account
> > > + optimizations done in the preceding loop), unless it was
> > > + specified explicitly.  */
> > > +  
> > > +  if (DECL_THREAD_LOCAL_P (decl)
> > > +  && !lookup_attribute ("tls_model", DECL_ATTRIBUTES (decl)))
> > > +{
> > > +  enum tls_model new_model = decl_default_tls_model (decl);
> > > +  gcc_checking_assert (new_model >= decl_tls_model (decl));
> > > +  set_decl_tls_model (decl, new_model);
> > > +}
> > > +}
> > >  
> > 
> > decl_default_tls_model depends on the global optimize flag, which is
> > almost always problematic in IPA passes.  I was able to make your patch
> > ICE using the vis-attr-hidden.c testcase from your patch with:
> > 
> >   mjambor@virgil:~/gcc/small/tests/tls$ ~/gcc/small/inst/bin/gcc -O2 -fPIC 
> > -flto -c vis-attr-hidden.c
> >   mjambor@virgil:~/gcc/small/tests/tls$ ~/gcc/small/inst/bin/gcc -fPIC -O0 
> > -shared -flto vis-attr-hidden.o
> >   during IPA pass: whole-program
> >   lto1: internal compiler error: in function_and_variable_visibility, at 
> > ipa-visibility.cc:888
> [snip]
> > Note the use of LTO, mismatching -O flags and the -shared flag in the
> > link step.
> 
> Ah, right. The assert is checking that we don't accidentally downgrade decl's
> TLS access model, e.g. from local-dynamic to global-dynamic, and you've shown
> how to trigger that. I didn't realize this code can run twice, and with
> different 'optimize' levels.
> 
> I would suggest to solve this by checking if the new TLS model is stronger,
> i.e. instead of this:
> 
>   gcc_checking_assert (new_model >= decl_tls_model (decl));
>   set_decl_tls_model (decl, new_model);
> 
> do this:
> 
>   if (new_model >= decl_tls_model (decl))
> set_decl_tls_model (decl, new_model);
> 
> Does this look reasonable?

On second thought, it might be better to keep the assert, and place the loop
under 'if (optimize)'?

> > A simple but somewhat lame way to avoid the ICE would be to run your
> > loop over variables only from pass_ipa_function_and_variable_visibility
> > and not from pass_ipa_whole_program_visibility.
> > 
> > I am afraid a real solution would involve copying relevant entries from
> > global_options to the symtab node representing the variable when it is
> > created/finalized, properly streaming them for LTO, and modifying
> > decl_default_tls_model to rely on those rather than global_options
> > itself.
> 
> If we agree on the solution above, then this will not be necessary, after all
> this transformation looks at optimized whole-program visibility status,
> and so initial optimization level should not be relevant.

Alexander


[PATCH] AArch64: Improve address rematerialization costs

2022-05-09 Thread Wilco Dijkstra via Gcc-patches
Improve rematerialization costs of addresses.  The current costs are set too 
high
which results in extra register pressure and spilling.  Using lower costs means
addresses will be rematerialized more often rather than being spilled or causing
spills.  This results in significant codesize reductions and performance gains.
SPECINT2017 improves by 0.27% with LTO and 0.16% without LTO.  Codesize is 0.12%
smaller.

Passes bootstrap and regress. OK for commit?

ChangeLog:
2021-06-01  Wilco Dijkstra  

* config/aarch64/aarch64.cc (aarch64_rtx_costs): Use better 
rematerialization
costs for HIGH, LO_SUM and SYMREF.

---

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 
43d87d1b9c4ef1a85094e51f81745f98f1ef27fb..7341849121ffd6b3b0b77c9730e74e751742e852
 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -14529,45 +14529,28 @@ cost_plus:
  return false;  /* All arguments need to be in registers.  */
}
 
+/* The following costs are used for rematerialization of addresses.
+   Set a low cost for all global accesses - this ensures they are
+   preferred for rematerialization, blocks them from being spilled
+   and reduces register pressure.  The result is significant codesize
+   reductions and performance gains. */
+
 case SYMBOL_REF:
+  *cost = 0;
 
-  if (aarch64_cmodel == AARCH64_CMODEL_LARGE
- || aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC)
-   {
- /* LDR.  */
- if (speed)
-   *cost += extra_cost->ldst.load;
-   }
-  else if (aarch64_cmodel == AARCH64_CMODEL_SMALL
-  || aarch64_cmodel == AARCH64_CMODEL_SMALL_PIC)
-   {
- /* ADRP, followed by ADD.  */
- *cost += COSTS_N_INSNS (1);
- if (speed)
-   *cost += 2 * extra_cost->alu.arith;
-   }
-  else if (aarch64_cmodel == AARCH64_CMODEL_TINY
-  || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)
-   {
- /* ADR.  */
- if (speed)
-   *cost += extra_cost->alu.arith;
-   }
+  /* Use a separate remateralization cost for GOT accesses.  */
+  if (aarch64_cmodel == AARCH64_CMODEL_SMALL_PIC
+ && aarch64_classify_symbol (x, 0) == SYMBOL_SMALL_GOT_4G)
+   *cost = COSTS_N_INSNS (1) / 2;
 
-  if (flag_pic)
-   {
- /* One extra load instruction, after accessing the GOT.  */
- *cost += COSTS_N_INSNS (1);
- if (speed)
-   *cost += extra_cost->ldst.load;
-   }
   return true;
 
 case HIGH:
+  *cost = 0;
+  return true;
+
 case LO_SUM:
-  /* ADRP/ADD (immediate).  */
-  if (speed)
-   *cost += extra_cost->alu.arith;
+  *cost = COSTS_N_INSNS (3) / 4;
   return true;
 
 case ZERO_EXTRACT:



Re: [PATCH] AArch64: Improve address rematerialization costs

2022-05-09 Thread Richard Sandiford via Gcc-patches
Wilco Dijkstra  writes:
> Improve rematerialization costs of addresses.  The current costs are set too 
> high
> which results in extra register pressure and spilling.  Using lower costs 
> means
> addresses will be rematerialized more often rather than being spilled or 
> causing
> spills.  This results in significant codesize reductions and performance 
> gains.
> SPECINT2017 improves by 0.27% with LTO and 0.16% without LTO.  Codesize is 
> 0.12%
> smaller.

I'm not questioning the results, but I think we need to look in more
detail why rematerialisation requires such low costs.  The point of
comparison should be against a spill and reload, so any constant
that is as cheap as a load should be rematerialised.  If that isn't
happening then it sounds like changes are needed elsewhere.

Thanks,
Richard

> Passes bootstrap and regress. OK for commit?
>
> ChangeLog:
> 2021-06-01  Wilco Dijkstra  
>
> * config/aarch64/aarch64.cc (aarch64_rtx_costs): Use better 
> rematerialization
> costs for HIGH, LO_SUM and SYMREF.
>
> ---
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index 
> 43d87d1b9c4ef1a85094e51f81745f98f1ef27fb..7341849121ffd6b3b0b77c9730e74e751742e852
>  100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -14529,45 +14529,28 @@ cost_plus:
>   return false;  /* All arguments need to be in registers.  */
> }
>
> +/* The following costs are used for rematerialization of addresses.
> +   Set a low cost for all global accesses - this ensures they are
> +   preferred for rematerialization, blocks them from being spilled
> +   and reduces register pressure.  The result is significant codesize
> +   reductions and performance gains. */
> +
>  case SYMBOL_REF:
> +  *cost = 0;
>
> -  if (aarch64_cmodel == AARCH64_CMODEL_LARGE
> - || aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC)
> -   {
> - /* LDR.  */
> - if (speed)
> -   *cost += extra_cost->ldst.load;
> -   }
> -  else if (aarch64_cmodel == AARCH64_CMODEL_SMALL
> -  || aarch64_cmodel == AARCH64_CMODEL_SMALL_PIC)
> -   {
> - /* ADRP, followed by ADD.  */
> - *cost += COSTS_N_INSNS (1);
> - if (speed)
> -   *cost += 2 * extra_cost->alu.arith;
> -   }
> -  else if (aarch64_cmodel == AARCH64_CMODEL_TINY
> -  || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)
> -   {
> - /* ADR.  */
> - if (speed)
> -   *cost += extra_cost->alu.arith;
> -   }
> +  /* Use a separate remateralization cost for GOT accesses.  */
> +  if (aarch64_cmodel == AARCH64_CMODEL_SMALL_PIC
> + && aarch64_classify_symbol (x, 0) == SYMBOL_SMALL_GOT_4G)
> +   *cost = COSTS_N_INSNS (1) / 2;
>
> -  if (flag_pic)
> -   {
> - /* One extra load instruction, after accessing the GOT.  */
> - *cost += COSTS_N_INSNS (1);
> - if (speed)
> -   *cost += extra_cost->ldst.load;
> -   }
>return true;
>
>  case HIGH:
> +  *cost = 0;
> +  return true;
> +
>  case LO_SUM:
> -  /* ADRP/ADD (immediate).  */
> -  if (speed)
> -   *cost += extra_cost->alu.arith;
> +  *cost = COSTS_N_INSNS (3) / 4;
>return true;
>
>  case ZERO_EXTRACT:


[PATCH] AArch64: Cleanup CPU option processing code

2022-05-09 Thread Wilco Dijkstra via Gcc-patches

The --with-cpu/--with-arch configure option processing not only checks valid 
arguments
but also sets TARGET_CPU_DEFAULT with a CPU and extension bitmask.  This isn't 
used
however since a --with-cpu is translated into a -mcpu option which is processed 
as if
written on the command-line (so TARGET_CPU_DEFAULT is never accessed).

So remove all the complex processing and bitmask, and just validate the option.
Fix a bug that always reports valid architecture extensions as invalid.  As a 
result
the CPU processing in aarch64.cc can be simplified.

Bootstrap OK, regress pass, OK for commit?

ChangeLog:
2022-04-19  Wilco Dijkstra  

* config.gcc (aarch64*-*-*): Simplify --with-cpu and --with-arch
processing.  Add support for architectural extensions.
* config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Remove
AARCH64_CPU_DEFAULT_FLAGS.
(TARGET_CPU_NBITS): Remove.
(TARGET_CPU_MASK): Remove.
* config/aarch64/aarch64.cc (AARCH64_CPU_DEFAULT_FLAGS): Remove define.
(get_tune_cpu): Assert CPU is always valid.
(get_arch): Assert architecture is always valid.
(aarch64_override_options): Cleanup CPU selection code and simplify 
logic.

---

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 
c5064dd376660c192d5573997b4fc86b6b3e3838..b48d5451e8027c93fb1f614812589183d0a88c4b
 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4178,8 +4178,6 @@ case "${target}" in
  pattern=AARCH64_CORE
fi
 
-   ext_mask=AARCH64_CPU_DEFAULT_FLAGS
-
# Find the base CPU or ARCH id in aarch64-cores.def or
# aarch64-arches.def
if [ x"$base_val" = x ] \
@@ -4187,23 +4185,6 @@ case "${target}" in
${srcdir}/config/aarch64/$def \
> /dev/null; then
 
- if [ $which = arch ]; then
-   base_id=`grep "^$pattern(\"$base_val\"," \
- ${srcdir}/config/aarch64/$def | \
- sed -e 's/^[^,]*,[]*//' | \
- sed -e 's/,.*$//'`
-   # Extract the architecture flags from 
aarch64-arches.def
-   ext_mask=`grep "^$pattern(\"$base_val\"," \
-  ${srcdir}/config/aarch64/$def | \
-  sed -e 's/)$//' | \
-  sed -e 's/^.*,//'`
- else
-   base_id=`grep "^$pattern(\"$base_val\"," \
- ${srcdir}/config/aarch64/$def | \
- sed -e 's/^[^,]*,[]*//' | \
- sed -e 's/,.*$//'`
- fi
-
  # Disallow extensions in --with-tune=cortex-a53+crc.
  if [ $which = tune ] && [ x"$ext_val" != x ]; then
echo "Architecture extensions not supported in 
--with-$which=$val" 1>&2
@@ -4234,25 +4215,7 @@ case "${target}" in
grep "^\"$base_ext\""`
 
if [ x"$base_ext" = x ] \
-   || [[ -n $opt_line ]]; then
-
- # These regexp extract the elements based on
- # their group match index in the regexp.
- ext_canon=`echo -e "$opt_line" | \
-   sed -e "s/$sed_patt/\2/"`
- ext_on=`echo -e "$opt_line" | \
-   sed -e "s/$sed_patt/\3/"`
- ext_off=`echo -e "$opt_line" | \
-   sed -e "s/$sed_patt/\4/"`
-
- if [ $ext = $base_ext ]; then
-   # Adding extension
-   ext_mask="("$ext_mask") | ("$ext_on" | 
"$ext_canon")"
- else
-   # Removing extension
-   ext_mask="("$ext_mask") & ~("$ext_off" 
| "$ext_canon")"
- fi
-
+   || [ x"$opt_line" != x ]; then
  true
else
  echo "Unknown extension used in 
--with-$which=$val" 1>&2
@@ -4261,10 +4224,6 @@ case "${target}" in
ext_val=`echo $ext_val | sed -e 
's/[a-z0-9]\+//'`
  done
 
- ext_mask="(("$ext_mask") << TARGET_CPU_NBITS)"
- if [ x"$base_id" != x ]; then
-   target_cpu_cname="TARGET_CPU_$base_

Re: [PATCH] ipa-visibility: Optimize TLS access [PR99619]

2022-05-09 Thread Jan Hubicka via Gcc-patches
> On Mon, 2 May 2022, Alexander Monakov wrote:
> > > > --- a/gcc/ipa-visibility.cc
> > > > +++ b/gcc/ipa-visibility.cc
> > > > @@ -872,6 +872,22 @@ function_and_variable_visibility (bool 
> > > > whole_program)
> > > > }
> > > > }
> > > >  }
> > > > +  FOR_EACH_VARIABLE (vnode)
> > > > +{
> > > > +  tree decl = vnode->decl;
> > > > +  
> > > > +  /* Optimize TLS model based on visibility (taking into account
> > > > + optimizations done in the preceding loop), unless it was
> > > > + specified explicitly.  */
> > > > +  
> > > > +  if (DECL_THREAD_LOCAL_P (decl)
> > > > +  && !lookup_attribute ("tls_model", DECL_ATTRIBUTES (decl)))
> > > > +{
> > > > +  enum tls_model new_model = decl_default_tls_model (decl);
> > > > +  gcc_checking_assert (new_model >= decl_tls_model (decl));
> > > > +  set_decl_tls_model (decl, new_model);
> > > > +}
> > > > +}
> > > >  
> > > 
> > > decl_default_tls_model depends on the global optimize flag, which is
> > > almost always problematic in IPA passes.  I was able to make your patch
> > > ICE using the vis-attr-hidden.c testcase from your patch with:
> > > 
> > >   mjambor@virgil:~/gcc/small/tests/tls$ ~/gcc/small/inst/bin/gcc -O2 
> > > -fPIC -flto -c vis-attr-hidden.c
> > >   mjambor@virgil:~/gcc/small/tests/tls$ ~/gcc/small/inst/bin/gcc -fPIC 
> > > -O0 -shared -flto vis-attr-hidden.o
> > >   during IPA pass: whole-program
> > >   lto1: internal compiler error: in function_and_variable_visibility, at 
> > > ipa-visibility.cc:888
> > [snip]
> > > Note the use of LTO, mismatching -O flags and the -shared flag in the
> > > link step.
> > 
> > Ah, right. The assert is checking that we don't accidentally downgrade 
> > decl's
> > TLS access model, e.g. from local-dynamic to global-dynamic, and you've 
> > shown
> > how to trigger that. I didn't realize this code can run twice, and with
> > different 'optimize' levels.
> > 
> > I would suggest to solve this by checking if the new TLS model is stronger,
> > i.e. instead of this:
> > 
> >   gcc_checking_assert (new_model >= decl_tls_model (decl));
> >   set_decl_tls_model (decl, new_model);
> > 
> > do this:
> > 
> >   if (new_model >= decl_tls_model (decl))
> > set_decl_tls_model (decl, new_model);
> > 
> > Does this look reasonable?
> 
> On second thought, it might be better to keep the assert, and place the loop
> under 'if (optimize)'?

The problem is that at IPA level it does not make sense to check
optimize flag as it is function specific.  (shlib is OK to check it
anywhere since it is global.)

So I think we really want to run the code only at the WPA time
(symtab_state>=IPA_SSA) and we want to see what is optimization flag of
those function referring the variable since that is what decided codegen
we will produce.

Honza
> 
> > > A simple but somewhat lame way to avoid the ICE would be to run your
> > > loop over variables only from pass_ipa_function_and_variable_visibility
> > > and not from pass_ipa_whole_program_visibility.
> > > 
> > > I am afraid a real solution would involve copying relevant entries from
> > > global_options to the symtab node representing the variable when it is
> > > created/finalized, properly streaming them for LTO, and modifying
> > > decl_default_tls_model to rely on those rather than global_options
> > > itself.
> > 
> > If we agree on the solution above, then this will not be necessary, after 
> > all
> > this transformation looks at optimized whole-program visibility status,
> > and so initial optimization level should not be relevant.
> 
> Alexander


Re: [PATCH] ipa-visibility: Optimize TLS access [PR99619]

2022-05-09 Thread Alexander Monakov
On Mon, 9 May 2022, Jan Hubicka wrote:

> > On second thought, it might be better to keep the assert, and place the loop
> > under 'if (optimize)'?
> 
> The problem is that at IPA level it does not make sense to check
> optimize flag as it is function specific.  (shlib is OK to check it
> anywhere since it is global.)
> 
> So I think we really want to run the code only at the WPA time
> (symtab_state>=IPA_SSA) and we want to see what is optimization flag of
> those function referring the variable since that is what decided codegen
> we will produce.

I'm not sure about the latter. Are you suggesting we give up on upgrading
general-dynamic to local-dynamic if in a mixed-O scenario there is at least
one -O0 function referring to the variable? Why? That function will end up
even more deoptimized if we do that!

Alexander


Re: [PATCH] AArch64: Improve address rematerialization costs

2022-05-09 Thread Wilco Dijkstra via Gcc-patches
Hi Richard,

> I'm not questioning the results, but I think we need to look in more
> detail why rematerialisation requires such low costs.  The point of
> comparison should be against a spill and reload, so any constant
> that is as cheap as a load should be rematerialised.  If that isn't
> happening then it sounds like changes are needed elsewhere.

The simple answer is that rematerializable expressions must have a lower cost
than the spill cost (potentially of something else), otherwise it will never 
happen.
The previous costs were set way too high (eg. 12 for ADRP+LDR vs 4 for a 
reload).
This patch basically ensures that is indeed the case. In principle a zero cost
works fine for anything that can be rematerialized. However it may use more
instructions than a spill (of something else), so a small non-zero cost avoids
bloating codesize.

There isn't really a better way of doing this within the existing costing code.
We could try doubling or quadrupling the spill costs but that would create a
lot of fallout since it affects everything.

Cheers,
Wilco


Re: [PATCH] AArch64: Cleanup CPU option processing code

2022-05-09 Thread Richard Sandiford via Gcc-patches
Wilco Dijkstra via Gcc-patches  writes:
> The --with-cpu/--with-arch configure option processing not only checks valid 
> arguments
> but also sets TARGET_CPU_DEFAULT with a CPU and extension bitmask.  This 
> isn't used
> however since a --with-cpu is translated into a -mcpu option which is 
> processed as if
> written on the command-line (so TARGET_CPU_DEFAULT is never accessed).
>
> So remove all the complex processing and bitmask, and just validate the 
> option.
> Fix a bug that always reports valid architecture extensions as invalid.  As a 
> result
> the CPU processing in aarch64.cc can be simplified.
>
> Bootstrap OK, regress pass, OK for commit?

Although invoking ./cc1 directly only half-works with --with-arch,
it half-works well-enough that I'd still like to keep it working.
But I agree we should apply your change first, then I can follow up
with a patch to make --with-* work with ./cc1 later.  (I have a version
locally and the net result is much simpler than the status quo, as well
as hopefully actually working properly.)

My main question about the patch itself is:

> +  explicit_arch = selected_arch->arch;
>if (!selected_tune)
>  selected_tune = selected_cpu;
> +  explicit_tune_core = selected_tune->ident;
> +
> +  gcc_assert (explicit_tune_core != aarch64_none);
> +  gcc_assert (explicit_arch != aarch64_no_arch);

Do we still need both selected_arch and explicit_arch?  explicit_arch
seems a misnomer now, since it includes implicit as well as explicit
choices.  Same for selected_tune and explicit_tune_core.

aarch64_option_restore has:

  if (opts->x_explicit_tune_core == aarch64_none
  && opts->x_explicit_arch != aarch64_no_arch)
selected_tune = &all_cores[selected_arch->ident];
  else
selected_tune = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);

Is the “if” condition ever true, or can we now restore the tune
info unconditionally?

Thanks,
Richard


Re: [PATCH] AArch64: Improve address rematerialization costs

2022-05-09 Thread Richard Sandiford via Gcc-patches
Wilco Dijkstra via Gcc-patches  writes:
> Hi Richard,
>
>> I'm not questioning the results, but I think we need to look in more
>> detail why rematerialisation requires such low costs.  The point of
>> comparison should be against a spill and reload, so any constant
>> that is as cheap as a load should be rematerialised.  If that isn't
>> happening then it sounds like changes are needed elsewhere.
>
> The simple answer is that rematerializable expressions must have a lower cost
> than the spill cost (potentially of something else), otherwise it will never 
> happen.
> The previous costs were set way too high (eg. 12 for ADRP+LDR vs 4 for a 
> reload).
> This patch basically ensures that is indeed the case. In principle a zero cost
> works fine for anything that can be rematerialized. However it may use more
> instructions than a spill (of something else), so a small non-zero cost avoids
> bloating codesize.
>
> There isn't really a better way of doing this within the existing costing 
> code.

Yeah, I was wondering whether we could change something there.
ADRP+LDR is logically more expensive than a single LDR, especially
when optimising for size, so I think it's reasonable for the rtx_costs
to say so.  But that doesn't/shouldn't mean that spilling is better
(for either size or speed).

So it feels like there's something missing in the way the costs are
being applied.

Thanks,
Richard

> We could try doubling or quadrupling the spill costs but that would create a
> lot of fallout since it affects everything.


Re: [PATCH] PR fortran/105501 - check for non-optional spaces between adjacent keywords

2022-05-09 Thread Mikael Morin

Le 08/05/2022 à 22:17, Harald Anlauf via Fortran a écrit :

Dear all,

the PR correctly notes that a space between keywords 'TYPE' and 'IS' is
required in free-form, but we currently accept 'TYPEIS'.  We shouldn't.
The combinations with non-optional blanks are listed in the standard;
in F2018 this is table 6.2.

While at it, I saw a couple of other keyword combinations in the matcher
and fixed these too.  I cross-checked my findings with Intel, Crayftn,
and NAG (as far as possible).

Regarding the testcase: I do not know how to write a (single!) testcase
that is able to check multiple of those fixes.  I also do not think that
it makes sense to provide a testcase for each single fixed pattern.
Therefore a provided a single, minimal testcase based on the report.

Regtested on x86_64-pc-linux-gnu.  OK for mainline (i.e. 13-master)?

The fix itself looks good.  Regarding the test, I don’t understand the 
problem.  Can’t there be multiple subroutines, each having one (or more) 
problematic statement(s)?


Re: [patch][gcc13][i386][pr101891]Adjust -fzero-call-used-regs to always use XOR

2022-05-09 Thread Uros Bizjak via Gcc-patches
On Mon, May 9, 2022 at 5:44 PM Qing Zhao  wrote:
>
> Another question:
>
> I think that this patch might need to be back ported to Gcc12 and GCC11.
>
> What’s your opinion on this?

It is not a regression, so following general rules, the patch should
not be backported. OTOH, the patch creates functionally equivalent
code, better in some security aspects. The functionality is also
hidden behind some non-default flag, so I think if release managers
(CC'd) are OK with the backport, I'd give it a technical approval.

> If so, when can I backport it?

Let's keep it in the mainline for a week or two, before backporting it
to non-EoL branches.

Uros.

>
> thanks.
>
> Qing
>
> > On May 7, 2022, at 4:06 AM, Uros Bizjak  wrote:
> >
> > On Fri, May 6, 2022 at 6:42 PM Qing Zhao  wrote:
> >>
> >>
> >>
> >>> On May 6, 2022, at 10:58 AM, Uros Bizjak  wrote:
> >>>
> >>> On Fri, May 6, 2022 at 4:29 PM Qing Zhao  wrote:
> 
>  Hi,
> 
>  As Kee’s requested in this PR: 
>  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101891
> 
>  =
> 
>  Currently -fzero-call-used-regs will use a pattern of:
> 
>  XOR regA,regA
>  MOV regA,regB
>  MOV regA,regC
>  ...
>  RET
> 
>  However, this introduces both a register ordering dependency (e.g. the 
>  CPU cannot clear regB without clearing regA first), and while greatly 
>  reduces available ROP gadgets, it does technically leave a set of "MOV" 
>  ROP gadgets at the end of functions (e.g. "MOV regA,regC; RET").
> 
>  Please switch to always using XOR:
> 
>  XOR regA,regA
>  XOR regB,regB
>  XOR regC,regC
>  ...
>  RET
> 
>  ===
> 
>  This patch switch all MOV to XOR on i386.
> 
>  Bootstrapped and regresstion tested on x86_64-linux-gnu.
> 
>  Okay for gcc13?
> 
>  Thanks.
> 
>  Qing
> 
>  ==
> >>>
>  gcc/ChangeLog:
> 
>  * config/i386/i386.cc (zero_all_mm_registers): Use SET to zero instead
>  of MOV for zeroing scratch registers.
>  (ix86_zero_call_used_regs): Likewise.
> 
>  gcc/testsuite/ChangeLog:
> 
>  * gcc.target/i386/zero-scratch-regs-1.c: Add -fno-stack-protector
>  -fno-PIC.
>  * gcc.target/i386/zero-scratch-regs-10.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-13.c: Add -msse.
>  * gcc.target/i386/zero-scratch-regs-14.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-15.c: Add -fno-stack-protector
>  -fno-PIC.
>  * gcc.target/i386/zero-scratch-regs-16.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-17.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-18.c: Add -fno-stack-protector
>  -fno-PIC, adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-19.c: Add -fno-stack-protector
>  -fno-PIC.
>  * gcc.target/i386/zero-scratch-regs-2.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-20.c: Add -msse.
>  * gcc.target/i386/zero-scratch-regs-21.c: Add -fno-stack-protector
>  -fno-PIC, Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-22.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-23.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-26.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-27.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-28.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-3.c: Add -fno-stack-protector.
>  * gcc.target/i386/zero-scratch-regs-31.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-4.c: Add -fno-stack-protector
>  -fno-PIC.
>  * gcc.target/i386/zero-scratch-regs-5.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-6.c: Add -fno-stack-protector.
>  * gcc.target/i386/zero-scratch-regs-7.c: Likewise.
>  * gcc.target/i386/zero-scratch-regs-8.c: Adjust mov to xor.
>  * gcc.target/i386/zero-scratch-regs-9.c: Add -fno-stack-protector.
> >>>
> >>> Please use something like the attached (functionally equivalent) patch
> >>> for the last hunk of your patch.
> >>
> >> Sure, I will update the code.
> >>>
> >>> Also, if possible, please use V2SImode as a generic MMX mode instead
> >>> of V4HImode.
> >> What’s the major purpose of this change?
> >
> > Although the generated code is the same, V2SI is used as a "generic"
> > MMX move insn in the same way V2DI is used to describe generic SSE
> > move instruction.
> >
> > Uros.
>


Re: [PATCH] c++: Implement P2324R2, labels at the end of compound-stmts [PR103539]

2022-05-09 Thread Jason Merrill via Gcc-patches

On 5/8/22 20:26, Marek Polacek wrote:

This patch implements C++23 , which allows
labels at the end of a compound statement.   Its C FE counterpart was
already implemented in r11-4813.

In cp_parser_statement I rely on in_compound to determine whether we're
in a compound-statement, so that the patch doesn't accidentally allow

   void fn(int c) {
 if (c)
   label:
   }

Strangely, in_compound was reset after seeing a label (this is tested in
c-c++-common/gomp/pr63326.c), so I've made a modifiable copy specific
for OpenMP #pragma purposes.

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?


OK.


PR c++/103539

gcc/cp/ChangeLog:

* parser.cc (cp_parser_statement): Constify the in_compound parameter.
Create a modifiable copy.  Allow labels at the end of compound
statements.

gcc/testsuite/ChangeLog:

* g++.dg/cpp23/label1.C: New test.
* g++.dg/cpp23/label2.C: New test.
---
  gcc/cp/parser.cc| 43 +++---
  gcc/testsuite/g++.dg/cpp23/label1.C | 89 +
  gcc/testsuite/g++.dg/cpp23/label2.C | 52 +
  3 files changed, 175 insertions(+), 9 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/cpp23/label1.C
  create mode 100644 gcc/testsuite/g++.dg/cpp23/label2.C

diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index 3ebaa414a3d..a4c3d8aa234 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -12174,7 +12174,7 @@ cp_parser_handle_directive_omp_attributes (cp_parser 
*parser, tree *pattrs,
   atomic-statement
  
IN_COMPOUND is true when the statement is nested inside a

-  cp_parser_compound_statement; this matters for certain pragmas.
+  cp_parser_compound_statement.
  
If IF_P is not NULL, *IF_P is set to indicate whether the statement

is a (possibly labeled) if statement which is not enclosed in braces
@@ -12184,7 +12184,7 @@ cp_parser_handle_directive_omp_attributes (cp_parser 
*parser, tree *pattrs,
  
  static void

  cp_parser_statement (cp_parser* parser, tree in_statement_expr,
-bool in_compound, bool *if_p, vec *chain,
+const bool in_compound, bool *if_p, vec *chain,
 location_t *loc_after_labels)
  {
tree statement, std_attrs = NULL_TREE;
@@ -12192,6 +12192,9 @@ cp_parser_statement (cp_parser* parser, tree 
in_statement_expr,
location_t statement_location, attrs_loc;
bool in_omp_attribute_pragma = parser->lexer->in_omp_attribute_pragma;
bool has_std_attrs;
+  /* A copy of IN_COMPOUND which is set to false after seeing a label.
+ This matters for certain pragmas.  */
+  bool in_compound_for_pragma = in_compound;
  
   restart:

if (if_p != NULL)
@@ -12286,7 +12289,7 @@ cp_parser_statement (cp_parser* parser, tree 
in_statement_expr,
 Parse the label, and then use tail recursion to parse
 the statement.  */
  cp_parser_label_for_labeled_statement (parser, std_attrs);
- in_compound = false;
+ in_compound_for_pragma = false;
  in_omp_attribute_pragma = parser->lexer->in_omp_attribute_pragma;
  goto restart;
  
@@ -12370,7 +12373,21 @@ cp_parser_statement (cp_parser* parser, tree in_statement_expr,

 the statement.  */
  
  	  cp_parser_label_for_labeled_statement (parser, std_attrs);

- in_compound = false;
+
+ /* If there's no statement, it's not a labeled-statement, just
+a label.  That's allowed in C++23, but only if we're at the
+end of a compound-statement.  */
+ if (in_compound
+ && cp_lexer_next_token_is (parser->lexer, CPP_CLOSE_BRACE))
+   {
+ location_t loc = cp_lexer_peek_token (parser->lexer)->location;
+ if (cxx_dialect < cxx23)
+   pedwarn (loc, OPT_Wc__23_extensions,
+"label at end of compound statement only available "
+"with %<-std=c++2b%> or %<-std=gnu++2b%>");
+ return;
+   }
+ in_compound_for_pragma = false;
  in_omp_attribute_pragma = parser->lexer->in_omp_attribute_pragma;
  goto restart;
}
@@ -12393,7 +12410,7 @@ cp_parser_statement (cp_parser* parser, tree 
in_statement_expr,
 the context of a compound, accept the pragma as a "statement" and
 return so that we can check for a close brace.  Otherwise we
 require a real statement and must go back and read one.  */
-  if (in_compound)
+  if (in_compound_for_pragma)
cp_parser_pragma (parser, pragma_compound, if_p);
else if (!cp_parser_pragma (parser, pragma_stmt, if_p))
do_restart = true;
@@ -12544,9 +12561,13 @@ attr_chainon (tree attrs, tree attr)
  
  /* Parse the label for a labeled-statement, i.e.
  
-   identifier :

-   case constant-expression :
-   default :
+   label:
+ attribute-specifier-seq[opt] identifier :
+ attribute-specif

Re: [PATCH] PR fortran/105501 - check for non-optional spaces between adjacent keywords

2022-05-09 Thread Harald Anlauf via Gcc-patches

Hi Mikael,

Am 09.05.22 um 20:24 schrieb Mikael Morin:

The fix itself looks good.  Regarding the test, I don’t understand the
problem.  Can’t there be multiple subroutines, each having one (or more)
problematic statement(s)?


that's why I tried but failed.  Example:

subroutine a
  errorstop
end
subroutine b
  errorstop
end

This now gives just one (the first) error, after which it bails out:

xxx.f90:2:3:

2 |   errorstop
  |   1
Error: Unclassifiable statement at (1)

That is the reason I mentioned it.

I'll commit the patch as-is.

Thanks for the review!
Harald


[PATCH] PR fortran/105526 - [Coarray] Add missing checks for arguments of type TEAM_TYPE

2022-05-09 Thread Harald Anlauf via Gcc-patches
Dear Fortranners,

we were lacking checks for arguments of type TEAM_TYPE to some
coarray intrinsics (FORM TEAM, CHANGE TEAM, and SYNC TEAM).
The attached patch adds these, and as a bonus verifies that
TEAM NUMBER is a scalar integer.

Regtested on x86_64-pc-linux-gnu.  OK for mainline?

Thanks,
Harald

From 9e5aefa51df49a498854b25ce9dacd46bf58eb4e Mon Sep 17 00:00:00 2001
From: Harald Anlauf 
Date: Mon, 9 May 2022 22:14:21 +0200
Subject: [PATCH] Fortran: check TEAM arguments to coarray intrinsics

TEAM arguments to coarray intrinsics must be scalar expressions of type
TEAM_TYPE of intrinsic module ISO_FORTRAN_ENV.

gcc/fortran/ChangeLog:

	PR fortran/105526
	* resolve.cc (check_team): New.
	(gfc_resolve_code): Add checks for arguments to coarray intrinsics
	FORM TEAM, CHANGE TEAM, and SYNC TEAM.

gcc/testsuite/ChangeLog:

	PR fortran/105526
	* gfortran.dg/coarray_50.f90: New test.
---
 gcc/fortran/resolve.cc   | 32 
 gcc/testsuite/gfortran.dg/coarray_50.f90 | 22 
 2 files changed, 54 insertions(+)
 create mode 100644 gcc/testsuite/gfortran.dg/coarray_50.f90

diff --git a/gcc/fortran/resolve.cc b/gcc/fortran/resolve.cc
index 29df531cdb6..c8335f939a9 100644
--- a/gcc/fortran/resolve.cc
+++ b/gcc/fortran/resolve.cc
@@ -11831,6 +11831,23 @@ deferred_op_assign (gfc_code **code, gfc_namespace *ns)
 }


+static bool
+check_team (gfc_expr *team, const char *intrinsic)
+{
+  if (team->rank != 0
+  || team->ts.type != BT_DERIVED
+  || team->ts.u.derived->from_intmod != INTMOD_ISO_FORTRAN_ENV
+  || team->ts.u.derived->intmod_sym_id != ISOFORTRAN_TEAM_TYPE)
+{
+  gfc_error ("TEAM argument to %qs at %L must be a scalar expression "
+		 "of type TEAM_TYPE", intrinsic, &team->where);
+  return false;
+}
+
+  return true;
+}
+
+
 /* Given a block of code, recursively resolve everything pointed to by this
code block.  */

@@ -11999,10 +12016,25 @@ start:
 	  break;

 	case EXEC_FAIL_IMAGE:
+	  break;
+
 	case EXEC_FORM_TEAM:
+	  if (code->expr1 != NULL
+	  && (code->expr1->ts.type != BT_INTEGER || code->expr1->rank))
+	gfc_error ("TEAM NUMBER argument to FORM TEAM at %L must be "
+		   "a scalar INTEGER", &code->expr1->where);
+	  check_team (code->expr2, "FORM TEAM");
+	  break;
+
 	case EXEC_CHANGE_TEAM:
+	  check_team (code->expr1, "CHANGE TEAM");
+	  break;
+
 	case EXEC_END_TEAM:
+	  break;
+
 	case EXEC_SYNC_TEAM:
+	  check_team (code->expr1, "SYNC TEAM");
 	  break;

 	case EXEC_ENTRY:
diff --git a/gcc/testsuite/gfortran.dg/coarray_50.f90 b/gcc/testsuite/gfortran.dg/coarray_50.f90
new file mode 100644
index 000..e88d9d93f0e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/coarray_50.f90
@@ -0,0 +1,22 @@
+! { dg-do compile }
+! { dg-options "-fcoarray=single" }
+!
+! PR fortran/105526 - check TEAM arguments to coarray intrinsics
+
+subroutine p
+  use iso_fortran_env, only: team_type
+  implicit none
+  type(team_type) :: team
+  type t
+ integer :: i
+  end type t
+  type(t) :: z
+  form team (0, team)
+  form team (0, 0)  ! { dg-error "scalar expression of type TEAM_TYPE" }
+  form team (0, [team]) ! { dg-error "scalar expression of type TEAM_TYPE" }
+  form team ([0], team) ! { dg-error "scalar INTEGER" }
+  form team (0., team)  ! { dg-error "scalar INTEGER" }
+  change team (0)   ! { dg-error "scalar expression of type TEAM_TYPE" }
+  end team
+  sync team (0) ! { dg-error "scalar expression of type TEAM_TYPE" }
+end
--
2.35.3



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