Re: [PATCH, ARM] Fix stack red zone bug (PR38644) for GCC 4.6

[Sebastian Huber]

Would someone mind committing this to the 4.6 branch.  Thanks.

The test suite results are only missing for the 4.4 and 4.5 branch.

--
Sebastian Huber, embedded brains GmbH

Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone   : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

[committed]: VMS: remove definition of STANDARD_EXEC_PREFIX

[Tristan Gingold]

Hi,

the definition in vms/xm-vms.h was not correct and the default value is fine.  
So this patch remove the line.

Applied on trunk.

Tristan.

2011-12-21  Tristan Gingold  

* config/vms/xm-vms.h (STANDARD_EXEC_PREFIX): Remove define.

diff --git a/gcc/config/vms/xm-vms.h b/gcc/config/vms/xm-vms.h
index 816935b..9685da7 100644
--- a/gcc/config/vms/xm-vms.h
+++ b/gcc/config/vms/xm-vms.h
@@ -53,5 +53,4 @@ do \
}  \
   } while (0)
 
-#define STANDARD_EXEC_PREFIX "/gnu/libexec/gcc/"
 #define STANDARD_STARTFILE_PREFIX "/gnu/lib/"

[committed]: VMS/ia64 add missing macro in fde-vms.c

[Tristan Gingold]

Hi,

this is a minor adjustment after the move of fde-vms from gcc/ to libgcc/.  
Macro UNW_IVMS_MODE was not defined.
Fixed by this patch, committed on trunk.

Tristan.

libgcc/
2011-12-21  Tristan Gingold  

* config/ia64/fde-vms.c (UNW_IVMS_MODE): Define.


--- a/libgcc/config/ia64/fde-vms.c
+++ b/libgcc/config/ia64/fde-vms.c
@@ -41,6 +41,8 @@
 #define SS$_NORMAL 1
 #endif
 
+#define UNW_IVMS_MODE(HEADER) (((HEADER) >> 44) & 0x3L)
+
 typedef struct
 {
   unsigned long start_offset;

[PATCH] Fix PR41159

[Richard Guenther]

This fixes an ICE with -O0 at LTO link time.  The assertion that
the destination result is equal to the promote_decl_mode result
is only true for pseudos - but with -O0 we commit all autos to
stack variables, so SA.partition_to_pseudo[] can contain MEMs.

Fixed by adjusting the assertion and always using the
SA.partition_to_pseudo[] mode as destination mode.

Bootstrapped and tested on x86_64-unknown-linux-gnu and on alpha by Uros,
committed.

Richard.

2011-12-21  Richard Guenther  

PR lto/41159
* tree-outof-ssa.c (insert_value_copy_on_edge): Use the
mode of the pseudo as destination mode.  Only assert that
is equal to the promoted mode of the decl if it is a REG.

Index: gcc/tree-outof-ssa.c
===
--- gcc/tree-outof-ssa.c(revision 182525)
+++ gcc/tree-outof-ssa.c(working copy)
@@ -237,9 +237,10 @@ insert_value_copy_on_edge (edge e, int d
 
   var = SSA_NAME_VAR (partition_to_var (SA.map, dest));
   src_mode = TYPE_MODE (TREE_TYPE (src));
-  dest_mode = promote_decl_mode (var, &unsignedp);
+  dest_mode = GET_MODE (SA.partition_to_pseudo[dest]);
   gcc_assert (src_mode == TYPE_MODE (TREE_TYPE (var)));
-  gcc_assert (dest_mode == GET_MODE (SA.partition_to_pseudo[dest]));
+  gcc_assert (!REG_P (SA.partition_to_pseudo[dest])
+ || dest_mode == promote_decl_mode (var, &unsignedp));
 
   if (src_mode != dest_mode)
 {

Re: PR middle-end/51472: set DECL_GIMPLE_REG_P on TM vector saves

[Richard Guenther]

On Tue, Dec 20, 2011 at 5:57 PM, Aldy Hernandez  wrote:
> The problem here is a verify_gimple ICE because a vector store's LHS is not
> a gimple register, but the vector type is a gimple_reg_type.
>
>     if (!is_gimple_reg (lhs)
>          && is_gimple_reg_type (TREE_TYPE (lhs)))
>        {
>          error ("invalid rhs for gimple memory store");
>          debug_generic_stmt (lhs);
>          debug_generic_stmt (rhs1);
>          return true;
>        }
>
> The reason that is_gimple_reg() is false, is because the vector variable is
> not marked as DECL_GIMPLE_REG_P.  If I understand DECL_GIMPLE_REG_P
> correctly, it should be true, since the TM saves/restores are not aliased
> and the only store to them are killing assignments.
>
> I also noticed we didn't call update_stmt() after gimple_assign_set_lhs(),
> so I have called it.  However, this part is not strictly necessary for the
> patch.
>
> The attached patch fixes the PR, and causes no regressions to the TM
> testsuite.
>
> OK pending further tests?

You can't simply do

+ if (TREE_CODE (TREE_TYPE (var)) == COMPLEX_TYPE
+ || TREE_CODE (TREE_TYPE (var)) == VECTOR_TYPE)
+   DECL_GIMPLE_REG_P (var) = 1;
+ update_stmt (stmt);

where is 'var' created?  At _that_ point you should do the above
(or use create_tmp_reg instead of create_tmp_var).  Existing uses
of var might prevent DECL_GIMPLE_REG_P from being set
(which also means creating an SSA name of it is not allowed).

Richard.

[committed] VMS: always default to .text section

[Tristan Gingold]

Hi,

like the HP-UX linker, the VMS linker doesn't deal well with named text 
sections.
So, always default to .text section on both Alpha and ia64 VMS.

Committed on trunk.

Tristan.

2011-12-21  Tristan Gingold  

* config/vms/vms-protos.h (vms_function_section): New prototype.
* config/vms/vms.c (vms_function_section): New function.
* config/vms/vms.h (TARGET_ASM_FUNCTION_SECTION): Define.

Index: gcc/config/vms/vms-protos.h
===
--- gcc/config/vms/vms-protos.h (revision 182566)
+++ gcc/config/vms/vms-protos.h (working copy)
@@ -22,3 +22,10 @@
 
 /* vms.c  */
 void vms_patch_builtins (void);
+
+#ifdef TREE_CODE
+extern section *vms_function_section (tree decl ATTRIBUTE_UNUSED,
+  enum node_frequency freq 
ATTRIBUTE_UNUSED,
+  bool startup ATTRIBUTE_UNUSED,
+  bool exit ATTRIBUTE_UNUSED);
+#endif /* TREE_CODE */
Index: gcc/config/vms/vms.c
===
--- gcc/config/vms/vms.c(revision 182566)
+++ gcc/config/vms/vms.c(working copy)
@@ -180,4 +180,15 @@
 }
 }
 
+/* Always default to .text section.  */
+
+section *
+vms_function_section (tree decl ATTRIBUTE_UNUSED,
+  enum node_frequency freq ATTRIBUTE_UNUSED,
+  bool startup ATTRIBUTE_UNUSED,
+  bool exit ATTRIBUTE_UNUSED)
+{
+  return NULL;
+}
+
 #include "gt-vms.h"
Index: gcc/config/vms/vms.h
===
--- gcc/config/vms/vms.h(revision 182566)
+++ gcc/config/vms/vms.h(working copy)
@@ -61,3 +61,7 @@
 #define SIZE_TYPE "unsigned int"
 #undef PTRDIFF_TYPE
 #define PTRDIFF_TYPE "int"
+
+/* VMS doesn't support other sections than .text for code.  */
+
+#define TARGET_ASM_FUNCTION_SECTION vms_function_section

Re: [RFC / Patch] PR 51305

[Paolo Carlini]

Hi again,

Hi,

this is a rejects-valid with constexpr & noexcept, noticed by Daniel 
(and myself time ago). I find it pretty annoying. Anyway, the issue 
is, we reject:


constexpr bool ok() noexcept
{
  typedef int type;
  return true;
}

constexpr auto x = ok();

because of the noexcept. What happens is that massage_constexpr_body 
looks inside MUST_NOT_THROW_EXPR but then doesn't notice that body is 
still a BIND_EXPR.


Thus the obvious idea is processing the latter as we would do if the 
noexcept were not there and that indeed fixes the issue without 
regressions, but I'm not sure if we shouldn't recurse / iterate more 
generically (or do indeed something else entirely)
uhm, if all there is to this issue is just the possibility of a 
BIND_EXPR embedded inside a MUST_NOT_THROW_EXPR we could just trivially 
reorder the conditionals of course (the current order seems just 
accidental). Or, assuming nothing deeper is going on, we can iterate. 
Both patchlets below pass testing.


Thanks,
Paolo.


Index: semantics.c
===
--- semantics.c (revision 182571)
+++ semantics.c (working copy)
@@ -5998,12 +5998,12 @@ massage_constexpr_body (tree fun, tree body)
   (DECL_CONTEXT (fun), body);
   else
 {
-  if (TREE_CODE (body) == BIND_EXPR)
-   body = BIND_EXPR_BODY (body);
   if (TREE_CODE (body) == EH_SPEC_BLOCK)
 body = EH_SPEC_STMTS (body);
   if (TREE_CODE (body) == MUST_NOT_THROW_EXPR)
body = TREE_OPERAND (body, 0);
+  if (TREE_CODE (body) == BIND_EXPR)
+   body = BIND_EXPR_BODY (body);
   body = constexpr_fn_retval (body);
 }
   return body;
Index: semantics.c
===
--- semantics.c (revision 182571)
+++ semantics.c (working copy)
@@ -5998,12 +5998,17 @@ massage_constexpr_body (tree fun, tree body)
   (DECL_CONTEXT (fun), body);
   else
 {
-  if (TREE_CODE (body) == BIND_EXPR)
-   body = BIND_EXPR_BODY (body);
-  if (TREE_CODE (body) == EH_SPEC_BLOCK)
-body = EH_SPEC_STMTS (body);
-  if (TREE_CODE (body) == MUST_NOT_THROW_EXPR)
-   body = TREE_OPERAND (body, 0);
+  while (true)
+   {
+ if (TREE_CODE (body) == BIND_EXPR)
+   body = BIND_EXPR_BODY (body);
+ else if (TREE_CODE (body) == EH_SPEC_BLOCK)
+   body = EH_SPEC_STMTS (body);
+ else if (TREE_CODE (body) == MUST_NOT_THROW_EXPR)
+   body = TREE_OPERAND (body, 0);
+ else
+   break;
+   }
   body = constexpr_fn_retval (body);
 }
   return body;

[PATCH, PR 51600] IPA-CP workaround for negative size cloning estimates

[Martin Jambor]

Hi,

given that we already have a workaround for zero size increase
estimates from estimate_ipcp_clone_size_and_time, I see little reason
not to extend it to negative values too, 0 is really just as bad as -2
that we are getting in the testcase.  Hopefully this will allow peple
who hit this bug proceed with their testing.

Bootstrapped and tested on x86-64-linux with no regressions.
OK for trunk?

Thanks,

Martin


2011-12-20  Martin Jambor  

PR tree-optimization/51600
* ipa-cp.c (estimate_local_effects): Turn also negative size
estimates to plus one.

* gcc/testsuite/g++.dg/ipa/pr51600.C: New test.

Index: src/gcc/ipa-cp.c
===
--- src.orig/gcc/ipa-cp.c
+++ src/gcc/ipa-cp.c
@@ -1409,12 +1409,11 @@ estimate_local_effects (struct cgraph_no
+ devirtualization_time_bonus (node, known_csts, known_binfos)
+ removable_params_cost + emc;
 
- gcc_checking_assert (size >=0);
  /* The inliner-heuristics based estimates may think that in certain
-contexts some functions do not have any size at all but we want
-all specializations to have at least a tiny cost, not least not to
-divide by zero.  */
- if (size == 0)
+contexts some functions do not have any size at all or that given
+the constants it can even shrink, but we want all specializations
+to have at least a tiny positive cost.  */
+ if (size <= 0)
size = 1;
 
  if (dump_file && (dump_flags & TDF_DETAILS))
Index: src/gcc/testsuite/g++.dg/ipa/pr51600.C
===
--- /dev/null
+++ src/gcc/testsuite/g++.dg/ipa/pr51600.C
@@ -0,0 +1,19 @@
+// { dg-do compile }
+// { dg-options "-O3" }
+
+template inline T min(T a, T b) { return a < b ? a : b; }
+double cornerbound(double *P, double (*m)(double, double))
+{
+  double b=m(P[0],P[3]);
+  return m(b,P[12]);
+}
+void bound(double *P, double (*m)(double, double), double b)
+{
+  m(b,cornerbound(P,m));
+}
+void bounds(double fuzz, unsigned maxdepth)
+{
+  double Px[]={};
+  double bx=Px[0];
+  bound(Px,min,bx);
+}

[Patch]: ia64 - remove ia64_promote_function_mode

[Tristan Gingold]

Hi,

config/ia/ia64.c define ia64_promote_function_mode only for the sake of VMS, as 
linux and hp/ux uses default_promote_function_mode.
What is done for VMS could be achieved by defining PROMOTE_MODE.

This patch cleans up ia64.c a little bit, by removing 
ia64_promote_function_mode, and defining PROMOTE_MODE in vms.h

The ABI for VMS is slightly modified but in a more conform way.

I have tested this patch on VMS, a simply compiled gcc (C only) for ia64-linux.

Given that the non-VMS parts are trivial, I plan to commit this patch soon, 
unless someone objects.

Tristan.

2011-12-21  Tristan Gingold  

* config/ia64/ia64.c (ia64_promote_function_mode): Remove.
(TARGET_PROMOTE_FUNCTION_MODE): Use default.
(ia64_function_value): Call promote_function_mode instead of
ia64_promote_function_mode.
* config/ia64/vms.h (PROMOTE_MODE): Define.

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 1635a7e..8fe9b51 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -316,11 +316,6 @@ static const char *ia64_invalid_conversion (const_tree, 
const_tree);
 static const char *ia64_invalid_unary_op (int, const_tree);
 static const char *ia64_invalid_binary_op (int, const_tree, const_tree);
 static enum machine_mode ia64_c_mode_for_suffix (char);
-static enum machine_mode ia64_promote_function_mode (const_tree,
-enum machine_mode,
-int *,
-const_tree,
-int);
 static void ia64_trampoline_init (rtx, tree, rtx);
 static void ia64_override_options_after_change (void);
 
@@ -547,7 +542,7 @@ static const struct attribute_spec ia64_attribute_table[] =
 #endif
 
 #undef TARGET_PROMOTE_FUNCTION_MODE
-#define TARGET_PROMOTE_FUNCTION_MODE ia64_promote_function_mode
+#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode
 
 /* ??? Investigate.  */
 #if 0
@@ -5013,9 +5008,9 @@ ia64_function_value (const_tree valtype,
  return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
}
 
-  mode = ia64_promote_function_mode (valtype, mode, &unsignedp,
-func ? TREE_TYPE (func) : NULL_TREE,
-true);
+  mode = promote_function_mode (valtype, mode, &unsignedp,
+func ? TREE_TYPE (func) : NULL_TREE,
+true);
 
   return gen_rtx_REG (mode, GR_RET_FIRST);
 }
@@ -10984,43 +10979,6 @@ ia64_c_mode_for_suffix (char suffix)
   return VOIDmode;
 }
 
-static enum machine_mode
-ia64_promote_function_mode (const_tree type,
-   enum machine_mode mode,
-   int *punsignedp,
-   const_tree funtype,
-   int for_return)
-{
-  /* Special processing required for OpenVMS ...  */
-
-  if (!TARGET_ABI_OPEN_VMS)
-return default_promote_function_mode(type, mode, punsignedp, funtype,
-for_return);
-
-  /* HP OpenVMS Calling Standard dated June, 2004, that describes
- HP OpenVMS I64 Version 8.2EFT,
- chapter 4 "OpenVMS I64 Conventions"
- section 4.7 "Procedure Linkage"
- subsection 4.7.5.2, "Normal Register Parameters"
-
- "Unsigned integral (except unsigned 32-bit), set, and VAX floating-point
- values passed in registers are zero-filled; signed integral values as
- well as unsigned 32-bit integral values are sign-extended to 64 bits.
- For all other types passed in the general registers, unused bits are
- undefined."  */
-
-  if (for_return != 2
-  && GET_MODE_CLASS (mode) == MODE_INT
-  && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
-{
-  if (mode == SImode)
-   *punsignedp = 0;
-  return DImode;
-}
-  else
-return promote_mode (type, mode, punsignedp);
-}
-   
 static GTY(()) rtx ia64_dconst_0_5_rtx;
 
 rtx
diff --git a/gcc/config/ia64/vms.h b/gcc/config/ia64/vms.h
index 75ea4ad..fada50c 100644
--- a/gcc/config/ia64/vms.h
+++ b/gcc/config/ia64/vms.h
@@ -135,3 +135,22 @@ STATIC func_ptr __CTOR_LIST__[1]   
  \
 
 #undef TARGET_ASM_NAMED_SECTION
 #define TARGET_ASM_NAMED_SECTION ia64_vms_elf_asm_named_section
+
+/* Define this macro if it is advisable to hold scalars in registers
+   in a wider mode than that declared by the program.  In such cases,
+   the value is constrained to be within the bounds of the declared
+   type, but kept valid in the wider mode.  The signedness of the
+   extension may differ from that of the type.
+
+   For ia64, we always store objects in a full register.  32-bit integers
+   are always sign-extended, but smaller objects retain their signedness.  */
+
+#undef PROMOTE_MODE
+#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \
+  

[PATCH] Remove some newlines from tree-into-ssa.c dumps

[Martin Jambor]

Hi,

I know it's stage three but I hope this tiny patch which affects only
dumping is still acceptable.  In SRA passes I wrote dumping so that
when the detailed dump is not requested, it is quite brief and only
writes the decisions, not how it reached those decisions.  Of course,
that means that debugging SRA I make heavy use of detailed dumps.

The slightly annoying thing is that detailed dumps switch on
tree-into-ssa dumps at all, but the really annoying thing is just how
many blank lines it writes into the dump.  The function body and my
dumps are quite far apart and can look quite confusing.  Yesterday I
got fed up to the level that I wrote the patch below which cuts back
on newlines significantly.

It also adds one to the beginning of update_ssa() so that there always
is a blank line dividing these dumps from whatever there is before
them. Otherwise, it just removes superfluous "\n" stuff.

I actually included this in a bootstrap and testsuite run,
unsurprisingly it caused no issues.  OK for trunk now?

Thanks,

Martin



2011-12-20  Martin Jambor  

* tree-into-ssa.c (rewrite_update_stmt): Do not dump extra newlines.
(rewrite_update_enter_block): Likewise.
(dump_update_ssa): Likewise.
(update_ssa): Likewise but also dump a newline at the beginning.

Index: src/gcc/tree-into-ssa.c
===
--- src.orig/gcc/tree-into-ssa.c
+++ src/gcc/tree-into-ssa.c
@@ -2051,7 +2051,6 @@ rewrite_update_stmt (gimple stmt, gimple
 {
   fprintf (dump_file, "Updating SSA information for statement ");
   print_gimple_stmt (dump_file, stmt, 0, TDF_SLIM);
-  fprintf (dump_file, "\n");
 }
 
   /* Rewrite USES included in OLD_SSA_NAMES and USES whose underlying
@@ -2199,7 +2198,7 @@ rewrite_update_enter_block (struct dom_w
   gimple_stmt_iterator gsi;
 
   if (dump_file && (dump_flags & TDF_DETAILS))
-fprintf (dump_file, "\n\nRegistering new PHI nodes in block #%d\n\n",
+fprintf (dump_file, "Registering new PHI nodes in block #%d\n",
 bb->index);
 
   /* Mark the unwind point for this block.  */
@@ -2848,22 +2847,21 @@ dump_update_ssa (FILE *file)
 
   if (!bitmap_empty_p (SYMS_TO_RENAME (cfun)))
 {
-  fprintf (file, "\n\nSymbols to be put in SSA form\n\n");
+  fprintf (file, "\nSymbols to be put in SSA form\n");
   dump_decl_set (file, SYMS_TO_RENAME (cfun));
   fprintf (file, "\n");
 }
 
   if (names_to_release && !bitmap_empty_p (names_to_release))
 {
-  fprintf (file, "\n\nSSA names to release after updating the SSA 
web\n\n");
+  fprintf (file, "\nSSA names to release after updating the SSA web\n\n");
   EXECUTE_IF_SET_IN_BITMAP (names_to_release, 0, i, bi)
{
  print_generic_expr (file, ssa_name (i), 0);
  fprintf (file, " ");
}
+  fprintf (file, "\n");
 }
-
-  fprintf (file, "\n\n");
 }
 
 
@@ -3342,6 +3340,9 @@ update_ssa (unsigned update_flags)
 
   timevar_push (TV_TREE_SSA_INCREMENTAL);
 
+  if (dump_file && (dump_flags & TDF_DETAILS))
+fprintf (dump_file, "\nUpdating SSA:\n");
+
   if (!update_ssa_initialized_fn)
 init_update_ssa (cfun);
   gcc_assert (update_ssa_initialized_fn == cfun);
@@ -3506,14 +3507,14 @@ update_ssa (unsigned update_flags)
 
   dump_update_ssa (dump_file);
 
-  fprintf (dump_file, "Incremental SSA update started at block: %d\n\n",
+  fprintf (dump_file, "Incremental SSA update started at block: %d\n",
   start_bb->index);
 
   c = 0;
   EXECUTE_IF_SET_IN_BITMAP (blocks_to_update, 0, i, bi)
c++;
   fprintf (dump_file, "Number of blocks in CFG: %d\n", last_basic_block);
-  fprintf (dump_file, "Number of blocks to update: %d (%3.0f%%)\n\n",
+  fprintf (dump_file, "Number of blocks to update: %d (%3.0f%%)\n",
   c, PERCENT (c, last_basic_block));
 
   if (dump_flags & TDF_DETAILS)
 

[patch]: ia64 - allow VMS to redefine TARGET_PROMOTE_FUNCTION_MODE

[Tristan Gingold]

Hi,

a follow-up of the previous patch.  Maybe they should be merged.

VMS/ia64 doesn't closely follow the standard ELF ABI, and keep some aspects of 
the Alpha ABI for backward compatibility.

With the previous patch, this patch fixes a convention call ABI issue, as well 
as an ICE that appears while using 32bit pointers.

Ok for trunk ?

Tristan.

2011-12-21  Tristan Gingold  

* config/ia64/ia64.c (TARGET_PROMOTE_FUNCTION_MODE): Move to...
* config/ia64/ia64.h (TARGET_PROMOTE_FUNCTION_MODE): ... Here.
* config/ia64/vms.h (TARGET_PROMOTE_FUNCTION_MODE): Override.

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 8fe9b51..d74eeb6 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -541,9 +541,6 @@ static const struct attribute_spec ia64_attribute_table[] =
 #define TARGET_ASM_OUTPUT_DWARF_DTPREL ia64_output_dwarf_dtprel
 #endif
 
-#undef TARGET_PROMOTE_FUNCTION_MODE
-#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode
-
 /* ??? Investigate.  */
 #if 0
 #undef TARGET_PROMOTE_PROTOTYPES
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index a3ccd6f..aaa2f26 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -157,6 +157,8 @@ do  
\
   }\
 while (0)
 
+#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode
+
 #define PARM_BOUNDARY 64
 
 /* Define this macro if you wish to preserve a certain alignment for the stack
diff --git a/gcc/config/ia64/vms.h b/gcc/config/ia64/vms.h
index fada50c..f34ee78 100644
--- a/gcc/config/ia64/vms.h
+++ b/gcc/config/ia64/vms.h
@@ -154,3 +154,6 @@ STATIC func_ptr __CTOR_LIST__[1]
 \
(UNSIGNEDP) = 0;\
   (MODE) = DImode; \
 }
+
+#undef TARGET_PROMOTE_FUNCTION_MODE
+#define TARGET_PROMOTE_FUNCTION_MODE 
default_promote_function_mode_always_promote

[Patch]: split libgcc/config/ia64/t-ia64 in two

[Tristan Gingold]

Hi,

this patch fixes two build libgcc issues on VMS/ia64.

* Because VMS doesn't define LIBGCC2_HAS_TF_MODE, compatibility thunks 
shouldn't be compiled.  Otherwise, the shared libgcc library fails to build due 
to undefined symbols.

* As VMS isn't fully compliant with ELF, crtstuff.c is used for 
crtbegin/crtend.  This fact was last during the move from gcc/config/ia64 to 
libgcc/config/ia64.

Tested only on ia64-hp-openvms.

Ok for trunk ?

Tristan.

libgcc/
2011-12-21  Tristan Gingold  

* config/ia64/t-ia64 (LIB1ASMFUNCS): Move backward
compatibility thunks...
(CUSTOM_CRTSTUFF, crtbegin.o, crtend.o)
(crtbeginS.o, crtendS.o): ... and these to ...
* config/ia64/t-ia64-elf: ... this new file.
* config.host (ia64*-*-elf*, ia64*-*-freebsd*, ia64*-*-linux*)
(ia64*-*-hpux*): Add ia64/t-ia64-elf in tmake_file.

index a30bf52..13b71b7 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -639,23 +639,23 @@ i[34567]86-*-interix3*)
;;
 ia64*-*-elf*)
extra_parts="$extra_parts crtbeginS.o crtendS.o crtfastmath.o"
-   tmake_file="ia64/t-ia64 ia64/t-eh-ia64 t-crtfm"
+   tmake_file="ia64/t-ia64 ia64/t-ia64-elf ia64/t-eh-ia64 t-crtfm"
;;
 ia64*-*-freebsd*)
extra_parts="$extra_parts crtfastmath.o"
-   tmake_file="$tmake_file ia64/t-ia64 ia64/t-eh-ia64 t-crtfm"
+   tmake_file="$tmake_file ia64/t-ia64 ia64/t-ia64-elf ia64/t-eh-ia64 
t-crtfm"
;;
 ia64*-*-linux*)
# Don't use crtbeginT.o from *-*-linux* default.
extra_parts="crtbegin.o crtend.o crtbeginS.o crtendS.o crtfastmath.o"
-   tmake_file="$tmake_file ia64/t-ia64 t-crtfm t-softfp-tf ia64/t-softfp 
t-softfp ia64/t-softfp-compat ia64/t-eh-ia64 t-libunwind ia64/t-linux"
+   tmake_file="$tmake_file ia64/t-ia64 ia64/t-ia64-elf t-crtfm t-softfp-tf 
ia64/t-softfp t-softfp ia64/t-softfp-compat ia64/t-eh-ia64 t-libunwind 
ia64/t-linux"
if test x$with_system_libunwind != xyes ; then
tmake_file="${tmake_file} t-libunwind-elf 
ia64/t-linux-libunwind"
fi
md_unwind_header=ia64/linux-unwind.h
;;
 ia64*-*-hpux*)
-   tmake_file="ia64/t-ia64 ia64/t-hpux t-slibgcc ia64/t-slibgcc-hpux 
t-slibgcc-hpux"
+   tmake_file="ia64/t-ia64 ia64/t-ia64-elf ia64/t-hpux t-slibgcc 
ia64/t-slibgcc-hpux t-slibgcc-hpux"
;;
 ia64-hp-*vms*)
tmake_file="$tmake_file ia64/t-ia64 ia64/t-eh-ia64 ia64/t-vms 
t-slibgcc-vms"
diff --git a/libgcc/config/ia64/t-ia64 b/libgcc/config/ia64/t-ia64
index d1ec353..1776ddd 100644
--- a/libgcc/config/ia64/t-ia64
+++ b/libgcc/config/ia64/t-ia64
@@ -8,8 +8,7 @@ LIB1ASMSRC= ia64/lib1funcs.S
 LIB1ASMFUNCS  = __divxf3 __divdf3 __divsf3 \
__divdi3 __moddi3 __udivdi3 __umoddi3 \
__divsi3 __modsi3 __udivsi3 __umodsi3 __save_stack_nonlocal \
-   __nonlocal_goto __restore_stack_nonlocal __trampoline \
-   _fixtfdi _fixunstfdi _floatditf
+   __nonlocal_goto __restore_stack_nonlocal __trampoline
 
 # ??? Hack to get -P option used when compiling lib1funcs.S, because Intel
 # assembler does not accept # line number as a comment.
@@ -17,20 +16,3 @@ LIB1ASMFUNCS  = __divxf3 __divdf3 __divsf3 \
 # C++ part of libgcc2, hence it had to be disabled.  Must find some other way
 # to support the Intel assembler.
 #LIBGCC2_DEBUG_CFLAGS = -g1 -P
-
-CUSTOM_CRTSTUFF = yes
-
-# Assemble startup files.
-# FIXME: -I$(gcc_objdir) is necessary to find auto-host.h.  Really?
-crtbegin.o: $(srcdir)/config/ia64/crtbegin.S
-   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp $<
-crtend.o: $(srcdir)/config/ia64/crtend.S
-   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp $<
-crtbeginS.o: $(srcdir)/config/ia64/crtbegin.S
-   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
-   -o $@ -DSHARED $<
-crtendS.o: $(srcdir)/config/ia64/crtend.S
-   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
-   -o $@ -DSHARED $<
-
-SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-ia64.ver
diff --git a/libgcc/config/ia64/t-ia64-elf b/libgcc/config/ia64/t-ia64-elf
new file mode 100644
index 000..08784df
--- /dev/null
+++ b/libgcc/config/ia64/t-ia64-elf
@@ -0,0 +1,20 @@
+LIB1ASMFUNCS  += _fixtfdi _fixunstfdi _floatditf
+
+CUSTOM_CRTSTUFF = yes
+
+# Assemble startup files.
+# FIXME: -I$(gcc_objdir) is necessary to find auto-host.h.  Really?
+crtbegin.o: $(srcdir)/config/ia64/crtbegin.S
+   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+   -o $@ $<
+crtend.o: $(srcdir)/config/ia64/crtend.S
+   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+   -o $@ $<
+crtbeginS.o: $(srcdir)/config/ia64/crtbegin.S
+   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+   -o $@ -DSHARED $<
+crtendS.o: $(srcdir)/config/ia64/crtend.S
+   $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c

Re: [PATCH] Remove some newlines from tree-into-ssa.c dumps

[Richard Guenther]

On Wed, Dec 21, 2011 at 11:32 AM, Martin Jambor  wrote:
> Hi,
>
> I know it's stage three but I hope this tiny patch which affects only
> dumping is still acceptable.  In SRA passes I wrote dumping so that
> when the detailed dump is not requested, it is quite brief and only
> writes the decisions, not how it reached those decisions.  Of course,
> that means that debugging SRA I make heavy use of detailed dumps.
>
> The slightly annoying thing is that detailed dumps switch on
> tree-into-ssa dumps at all, but the really annoying thing is just how
> many blank lines it writes into the dump.  The function body and my
> dumps are quite far apart and can look quite confusing.  Yesterday I
> got fed up to the level that I wrote the patch below which cuts back
> on newlines significantly.
>
> It also adds one to the beginning of update_ssa() so that there always
> is a blank line dividing these dumps from whatever there is before
> them. Otherwise, it just removes superfluous "\n" stuff.
>
> I actually included this in a bootstrap and testsuite run,
> unsurprisingly it caused no issues.  OK for trunk now?

Ok.

Richard.

> Thanks,
>
> Martin
>
>
>
> 2011-12-20  Martin Jambor  
>
>        * tree-into-ssa.c (rewrite_update_stmt): Do not dump extra newlines.
>        (rewrite_update_enter_block): Likewise.
>        (dump_update_ssa): Likewise.
>        (update_ssa): Likewise but also dump a newline at the beginning.
>
> Index: src/gcc/tree-into-ssa.c
> ===
> --- src.orig/gcc/tree-into-ssa.c
> +++ src/gcc/tree-into-ssa.c
> @@ -2051,7 +2051,6 @@ rewrite_update_stmt (gimple stmt, gimple
>     {
>       fprintf (dump_file, "Updating SSA information for statement ");
>       print_gimple_stmt (dump_file, stmt, 0, TDF_SLIM);
> -      fprintf (dump_file, "\n");
>     }
>
>   /* Rewrite USES included in OLD_SSA_NAMES and USES whose underlying
> @@ -2199,7 +2198,7 @@ rewrite_update_enter_block (struct dom_w
>   gimple_stmt_iterator gsi;
>
>   if (dump_file && (dump_flags & TDF_DETAILS))
> -    fprintf (dump_file, "\n\nRegistering new PHI nodes in block #%d\n\n",
> +    fprintf (dump_file, "Registering new PHI nodes in block #%d\n",
>             bb->index);
>
>   /* Mark the unwind point for this block.  */
> @@ -2848,22 +2847,21 @@ dump_update_ssa (FILE *file)
>
>   if (!bitmap_empty_p (SYMS_TO_RENAME (cfun)))
>     {
> -      fprintf (file, "\n\nSymbols to be put in SSA form\n\n");
> +      fprintf (file, "\nSymbols to be put in SSA form\n");
>       dump_decl_set (file, SYMS_TO_RENAME (cfun));
>       fprintf (file, "\n");
>     }
>
>   if (names_to_release && !bitmap_empty_p (names_to_release))
>     {
> -      fprintf (file, "\n\nSSA names to release after updating the SSA 
> web\n\n");
> +      fprintf (file, "\nSSA names to release after updating the SSA 
> web\n\n");
>       EXECUTE_IF_SET_IN_BITMAP (names_to_release, 0, i, bi)
>        {
>          print_generic_expr (file, ssa_name (i), 0);
>          fprintf (file, " ");
>        }
> +      fprintf (file, "\n");
>     }
> -
> -  fprintf (file, "\n\n");
>  }
>
>
> @@ -3342,6 +3340,9 @@ update_ssa (unsigned update_flags)
>
>   timevar_push (TV_TREE_SSA_INCREMENTAL);
>
> +  if (dump_file && (dump_flags & TDF_DETAILS))
> +    fprintf (dump_file, "\nUpdating SSA:\n");
> +
>   if (!update_ssa_initialized_fn)
>     init_update_ssa (cfun);
>   gcc_assert (update_ssa_initialized_fn == cfun);
> @@ -3506,14 +3507,14 @@ update_ssa (unsigned update_flags)
>
>       dump_update_ssa (dump_file);
>
> -      fprintf (dump_file, "Incremental SSA update started at block: %d\n\n",
> +      fprintf (dump_file, "Incremental SSA update started at block: %d\n",
>               start_bb->index);
>
>       c = 0;
>       EXECUTE_IF_SET_IN_BITMAP (blocks_to_update, 0, i, bi)
>        c++;
>       fprintf (dump_file, "Number of blocks in CFG: %d\n", last_basic_block);
> -      fprintf (dump_file, "Number of blocks to update: %d (%3.0f%%)\n\n",
> +      fprintf (dump_file, "Number of blocks to update: %d (%3.0f%%)\n",
>               c, PERCENT (c, last_basic_block));
>
>       if (dump_flags & TDF_DETAILS)
>

[Ada] Add support for fully standalone libraries

[Arnaud Charlet]

The new Library_Standalone attribute is used to select the mode
for the standalone shared libraries.

   No   : This is not a standalone library. Library_Interface should
  not be set.

   Standard : elaboration/finalization local for the library.

   Full : as above, but link only against static libraries.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Pascal Obry  

* prj-attr.adb, snames.ads-tmpl: Add Library_Standalone,
Library_Fully_Standalone_Options and
Library_Fully_Standalone_Supported attributes.
* prj-nmsc.adb (Check_Library): Update check to take into
account fully standalone libraries. Such shared libraries can
only depend on static libraries.
(Check_Stand_Alone_Library): Add support for fully standalone libraries.
(Process_Project_Level_Simple_Attributes): Store value for
configuration attribute Library_Fully_Standalone_Supported.
* prj.ads, makeutl.adb (Standalone): New enumeration type.
(Project_Data): Standalone_Library now of type Standlone.
(Project_Configuration): Add Lib_Fully_Standalone_Supported
field.
(Default_Project_Config): Initialize new Lib_Fully_Standalone_Supported
field.
* clean.adb (Clean_Project): Adjust to new type for Standalone.
* make.adb (Library_Phase): Adjust to new type for Standalone.
(Gnatmake): Likewise.
* mlib-prj.adb (Build_Library): Adjust to new type for
Standalone.

Index: make.adb
===
--- make.adb(revision 182572)
+++ make.adb(working copy)
@@ -4647,7 +4647,7 @@
   Proj1 := Project_Tree.Projects;
   while Proj1 /= null loop
  if Proj1.Project.Extended_By = No_Project then
-if Proj1.Project.Standalone_Library then
+if Proj1.Project.Standalone_Library /= No then
Stand_Alone_Libraries := True;
 end if;
 
@@ -5791,7 +5791,7 @@
   if Osint.Number_Of_Files = 0 then
  if Main_Project /= No_Project and then Main_Project.Library then
 if Do_Bind_Step
-  and then not Main_Project.Standalone_Library
+  and then Main_Project.Standalone_Library = No
 then
Make_Failed ("only stand-alone libraries may be bound");
 end if;
Index: mlib-prj.adb
===
--- mlib-prj.adb(revision 182572)
+++ mlib-prj.adb(working copy)
@@ -317,7 +317,7 @@
 Get_Name_String
   (For_Project.Object_Directory.Display_Name);
 
-  Standalone   : constant Boolean := For_Project.Standalone_Library;
+  Standalone   : constant Boolean := For_Project.Standalone_Library /= No;
 
   Project_Name : constant String := Get_Name_String (For_Project.Name);
 
Index: gnat_ugn.texi
===
--- gnat_ugn.texi   (revision 182572)
+++ gnat_ugn.texi   (working copy)
@@ -16359,6 +16359,28 @@
 imported from Ada units outside of the library. If other units are imported,
 the binding phase will fail.
 
+@noindent
+It is also possible to build a fully standalone library where not only
+the code to elaborate and finalize the library is embedded but also
+ensuring that the library is linked only against static
+libraries. So a fully standalone library only depends on system
+libraries, all other code, including the GNAT runtime, is embedded. To
+build a fully standalone library the attribute
+@code{Library_Standalone} must be set to @code{full}:
+
+@smallexample @c projectfile
+@group
+   for Library_Dir use "lib_dir";
+   for Library_Name use "dummy";
+   for Library_Interface use ("int1", "int1.child");
+   for Library_Standalone use "full";
+@end group
+@end smallexample
+
+@noindent
+The default value for this attribute is @code{standard} in which case
+a not fully standalone library is built.
+
 The attribute @code{Library_Src_Dir} may be specified for a
 Stand-Alone Library. @code{Library_Src_Dir} is a simple attribute that has a
 single string value. Its value must be the path (absolute or relative to the
Index: prj.ads
===
--- prj.ads (revision 182572)
+++ prj.ads (working copy)
@@ -1025,6 +1025,9 @@
   --  The level of library support. Specified in the configuration. Support
   --  is none, static libraries only or both static and shared libraries.
 
+  Lib_Fully_Standalone_Supported : Boolean := False;
+  --  True when building fully standalone libraries supported on the target
+
   Archive_Builder : Name_List_Index := No_Name_List;
   --  The name of the executable to build archives, with the minimum
   --  switches. Specified in the configuration.
@@ -1077,37 +1080,38 @@
end recor

[Ada] Send gnatls/gnatcmd verbose diagnostics to stderr

[Arnaud Charlet]

This change ensures that verbose debugging/diagnostics messages emitted
by gnatls/gnat list are sent to stderr instead of being interspersed with
the normal stdout output.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Thomas Quinot  

* gnatls.adb (Gnatls): Call Set_Standard_Error at startup, and then
Set_Standard_Output just before producing normal (non-diagnostic)
output.
* gnatcmd.adb (Gnatcmd): Call Set_Standard_Error at initialization
(and again after parsing project files).

Index: gnatcmd.adb
===
--- gnatcmd.adb (revision 182572)
+++ gnatcmd.adb (working copy)
@@ -34,7 +34,7 @@
 with Namet;use Namet;
 with Opt;  use Opt;
 with Osint;use Osint;
-with Output;
+with Output;   use Output;
 with Prj;  use Prj;
 with Prj.Env;
 with Prj.Ext;  use Prj.Ext;
@@ -1375,6 +1375,10 @@
 --  Start of processing for GNATCmd
 
 begin
+   --  All output from GNATCmd is debugging or error output: send to stderr
+
+   Set_Standard_Error;
+
--  Initializations
 
Csets.Initialize;
@@ -1901,6 +1905,10 @@
 Env   => Root_Environment,
 Packages_To_Check => Packages_To_Check);
 
+ --  Prj.Pars.Parse calls Set_Standard_Output, reset to stderr
+
+ Set_Standard_Error;
+
  if Project = Prj.No_Project then
 Fail ( & Project_File.all & """ processing failed");
  end if;
Index: gnatls.adb
===
--- gnatls.adb  (revision 182572)
+++ gnatls.adb  (working copy)
@@ -1553,6 +1553,7 @@
--  If -l (output license information) is given, it must be the only switch
 
if License and then Arg_Count /= 2 then
+  Set_Standard_Error;
   Write_Str ("Can't use -l with another switch");
   Write_Eol;
   Usage;
@@ -1713,6 +1714,7 @@
 GNATDIST.Output_No_ALI (Lib_File_Name (Main_File));
 
  else
+Set_Standard_Error;
 Write_Str ("Can't find library info for ");
 Get_Name_String (Main_File);
 Write_Char ('"'); -- "
@@ -1745,6 +1747,10 @@
   end if;
end loop;
 
+   --  Reset default output file descriptor, if needed
+
+   Set_Standard_Output;
+
if Very_Verbose_Mode then
   for A in ALIs.First .. ALIs.Last loop
  GNATDIST.Output_ALI (A);

[Ada] Proper handling of Has_Element in user-defined iterators

[Arnaud Charlet]

To iterate over a user-defined container, it must have a primitive operation
that returns an iterator type, that is to say a type that implements one of the
iterfaces declared in an instance of Ada.Iterator_Interfaces. Has_Element is
a formal of this package. In the expansion of the iterator loop, Has_Element
renames some function of an unrelated name, declared in the package that
declares the container. Therefore the actual subprogram must be obtained from
the declaration in the instance, and not from the container package itself.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Ed Schonberg  

* exp_ch5.adb (Expand_Iterator_Loop): The cursor operation
Has_Element is the formal of Iterator_Interfaces, and within
the instantion of this package it is a renaming of some local
function with an unrelated name. Retrieve the operation from
the instance itself, not from the container package.

Index: exp_ch5.adb
===
--- exp_ch5.adb (revision 182572)
+++ exp_ch5.adb (working copy)
@@ -3049,10 +3049,6 @@
 
 Iter_Type := Etype (Name (I_Spec));
 
-if Is_Iterator (Iter_Type) then
-   Pack := Scope (Pack);
-end if;
-
 --  The "of" case uses an internally generated cursor whose type
 --  is found in the container package. The domain of iteration
 --  is expanded into a call to the default Iterator function, but
@@ -3074,42 +3070,42 @@
begin
   Cursor := Make_Temporary (Loc, 'I');
 
-  if Is_Iterator (Iter_Type) then
- null;
+  --  For an container element iterator, the iterator type
+  --  is obtained from the corresponding aspect.
 
-  else
- Iter_Type := Etype (Default_Iter);
+  Iter_Type := Etype (Default_Iter);
+  Pack := Scope (Iter_Type);
 
- --  Rewrite domain of iteration as a call to the default
- --  iterator for the container type. If the container is
- --  a derived type and the aspect is inherited, convert
- --  container to parent type. The Cursor type is also
- --  inherited from the scope of the parent.
+  --  Rewrite domain of iteration as a call to the default
+  --  iterator for the container type. If the container is
+  --  a derived type and the aspect is inherited, convert
+  --  container to parent type. The Cursor type is also
+  --  inherited from the scope of the parent.
 
- if Base_Type (Etype (Container)) =
-Base_Type (Etype (First_Formal (Default_Iter)))
- then
-Container_Arg := New_Copy_Tree (Container);
+  if Base_Type (Etype (Container)) =
+ Base_Type (Etype (First_Formal (Default_Iter)))
+  then
+ Container_Arg := New_Copy_Tree (Container);
 
- else
-Container_Arg :=
-  Make_Type_Conversion (Loc,
-Subtype_Mark =>
-  New_Occurrence_Of
-(Etype (First_Formal (Default_Iter)), Loc),
-Expression => New_Copy_Tree (Container));
- end if;
-
- Rewrite (Name (I_Spec),
-   Make_Function_Call (Loc,
- Name => New_Occurrence_Of (Default_Iter, Loc),
- Parameter_Associations =>
-   New_List (Container_Arg)));
- Analyze_And_Resolve (Name (I_Spec));
+  else
+ Container_Arg :=
+   Make_Type_Conversion (Loc,
+ Subtype_Mark =>
+   New_Occurrence_Of
+ (Etype (First_Formal (Default_Iter)), Loc),
+ Expression => New_Copy_Tree (Container));
   end if;
 
-  --  Find cursor type in proper container package.
+  Rewrite (Name (I_Spec),
+Make_Function_Call (Loc,
+  Name => New_Occurrence_Of (Default_Iter, Loc),
+  Parameter_Associations =>
+New_List (Container_Arg)));
+  Analyze_And_Resolve (Name (I_Spec));
 
+  --  Find cursor type in proper iterator package, which
+  --  is an instantiation of Iterator_Interfaces.
+
   Ent := First_Entity (Pack);
   while Present (Ent) loop
  if Chars (Ent) = Name_Cursor then

[PATCH, SMS] Prevent the creation of reg-moves for non allocatable definition​s (re-submission)

[Revital Eres]

Hello,

Following Richard's comment
http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01469.html attached is
a new version of the patch to prevent reg-moves for non allocatable definitions.

Currently testing and bootstrap on ppc64-redhat-linux, enabling SMS on
loops with SC 1.

OK for 4.7 once testing completes?

Thanks,
Revital

Changelog:

gcc/
* ddg.c (def_non_allocatable_p): New function.
(add_cross_iteration_register_deps): Call it.

testsuite/
 * gcc.dg/sms-11.c: New file.
Index: ddg.c
===
--- ddg.c   (revision 182479)
+++ ddg.c   (working copy)
@@ -263,6 +263,23 @@ create_ddg_dep_no_link (ddg_ptr g, ddg_n
 add_edge_to_ddg (g, e);
 }
 
+/* Return true if one of the definitions in INSN is not allocatable.
+   Otherwise return false.  */
+static bool
+def_non_allocatable_p (rtx insn)
+{
+  df_ref *def;
+
+  for (def = DF_INSN_DEFS (insn); *def; def++)
+{
+  enum machine_mode mode = GET_MODE (DF_REF_REG (*def));
+
+  if (!have_regs_of_mode[mode])
+   return true;
+}
+
+  return false;
+}
 
 /* Given a downwards exposed register def LAST_DEF (which is the last
definition of that register in the bb), add inter-loop true dependences
@@ -335,7 +352,8 @@ add_cross_iteration_register_deps (ddg_p
   if (DF_REF_ID (last_def) != DF_REF_ID (first_def)
   || !flag_modulo_sched_allow_regmoves
  || JUMP_P (use_node->insn)
-  || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn))
+  || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn)
+ || def_non_allocatable_p (DF_REF_INSN (last_def)))
 create_ddg_dep_no_link (g, use_node, first_def_node, ANTI_DEP,
 REG_DEP, 1);
 
Index: testsuite/gcc.dg/sms-11.c
===
--- testsuite/gcc.dg/sms-11.c   (revision 0)
+++ testsuite/gcc.dg/sms-11.c   (revision 0)
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -fmodulo-sched -fmodulo-sched-allow-regmoves 
-fdump-rtl-sms" } */
+
+extern void abort (void);
+
+float out[4][4] = { 6, 6, 7, 5, 6, 7, 5, 5, 6, 4, 4, 4, 6, 2, 3, 4 };
+
+void
+invert (void)
+{
+  int i, j, k = 0, swap;
+  float tmp[4][4] = { 5, 6, 7, 5, 6, 7, 5, 5, 4, 4, 4, 4, 3, 2, 3, 4 };
+
+  for (i = 0; i < 4; i++)
+{
+  for (j = i + 1; j < 4; j++)
+   if (tmp[j][i] > tmp[i][i])
+ swap = j;
+
+  if (swap != i)
+   tmp[i][k] = tmp[swap][k];
+}
+
+  for (i = 0; i < 4; i++)
+for (j = 0; j < 4; j++)
+  if (tmp[i][j] != out[i][j])
+   abort ();
+}
+
+int
+main ()
+{
+  invert ();
+  return 0;
+}
+
+/* { dg-final { cleanup-rtl-dump "sms" } } */

[Ada] Allow generic iteration on formal lists

[Arnaud Charlet]

This patch allows the use of generic iteration on formal lists.
If L is a formal list of integers, the following loop is now accepted:

for C of L loop
   Put_Line ("Value =>" & C'Img);
end loop;

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Claire Dross  

* a-cfdlli.ads (Constant_Indexing, Default_Iterator,
Iterator_Element): Added to type List.
(Not_No_Element, List_Iterator_Interfaces, Iterate,
Constant_Reference_Type, Constant_Reference): New.
* a-cfdlli.adb (type Iterator, Finalize, First, Last, Next,
Previous, Iterate, Not_No_Element, Constant_Reference): New.

Index: a-cfdlli.adb
===
--- a-cfdlli.adb(revision 182572)
+++ a-cfdlli.adb(working copy)
@@ -26,9 +26,30 @@
 --
 
 with System;  use type System.Address;
+with Ada.Finalization;
 
 package body Ada.Containers.Formal_Doubly_Linked_Lists is
 
+   type Iterator is new Ada.Finalization.Limited_Controlled and
+ List_Iterator_Interfaces.Reversible_Iterator with
+   record
+  Container : List_Access;
+  Node  : Count_Type;
+   end record;
+
+   overriding procedure Finalize (Object : in out Iterator);
+
+   overriding function First (Object : Iterator) return Cursor;
+   overriding function Last  (Object : Iterator) return Cursor;
+
+   overriding function Next
+ (Object   : Iterator;
+  Position : Cursor) return Cursor;
+
+   overriding function Previous
+ (Object   : Iterator;
+  Position : Cursor) return Cursor;
+
---
-- Local Subprograms --
---
@@ -423,6 +444,21 @@
   return Container.Nodes (Position.Node).Element;
end Element;
 
+   --
+   -- Finalize --
+   --
+
+   procedure Finalize (Object : in out Iterator) is
+   begin
+  if Object.Container /= null then
+ declare
+B : Natural renames Object.Container.all.Busy;
+ begin
+B := B - 1;
+ end;
+  end if;
+   end Finalize;
+
--
-- Find --
--
@@ -474,6 +510,28 @@
   return (Node => Container.First);
end First;
 
+   function First (Object : Iterator) return Cursor is
+   begin
+  --  The value of the iterator object's Node component influences the
+  --  behavior of the First (and Last) selector function.
+
+  --  When the Node component is null, this means the iterator object was
+  --  constructed without a start expression, in which case the (forward)
+  --  iteration starts from the (logical) beginning of the entire sequence
+  --  of items (corresponding to Container.First, for a forward iterator).
+
+  --  Otherwise, this is iteration over a partial sequence of items. When
+  --  the Node component is non-null, the iterator object was constructed
+  --  with a start expression, that specifies the position from which the
+  --  (forward) partial iteration begins.
+
+  if Object.Node = 0 then
+ return First (Object.Container.all);
+  else
+ return (Node => Object.Node);
+  end if;
+   end First;
+
---
-- First_Element --
---
@@ -915,6 +973,71 @@
   B := B - 1;
end Iterate;
 
+   function Iterate (Container : List)
+ return List_Iterator_Interfaces.Reversible_Iterator'Class
+   is
+  B : Natural renames Container'Unrestricted_Access.all.Busy;
+
+   begin
+  --  The value of the Node component influences the behavior of the First
+  --  and Last selector functions of the iterator object. When the Node
+  --  component is null (as is the case here), this means the iterator
+  --  object was constructed without a start expression. This is a
+  --  complete iterator, meaning that the iteration starts from the
+  --  (logical) beginning of the sequence of items.
+
+  --  Note: For a forward iterator, Container.First is the beginning, and
+  --  for a reverse iterator, Container.Last is the beginning.
+
+  return It : constant Iterator :=
+Iterator'(Ada.Finalization.Limited_Controlled with
+Container => Container'Unrestricted_Access,
+Node  => 0)
+  do
+ B := B + 1;
+  end return;
+   end Iterate;
+
+   function Iterate (Container : List; Start : Cursor)
+ return List_Iterator_Interfaces.Reversible_Iterator'Class
+   is
+  B  : Natural renames Container'Unrestricted_Access.all.Busy;
+
+   begin
+  --  It was formerly the case that when Start = No_Element, the partial
+  --  iterator was defined to behave the same as for a complete iterator,
+  --  and iterate over the entire sequence of items. However, those
+  --  semantics were unintuitive and arguably error-prone (it is too easy
+  -

Re: [PATCH] atomic test and set re-org.

[Oleg Endo]

On Thu, 2011-11-24 at 15:50 -0500, Andrew MacLeod wrote:
> This patch adds missing pattern support for atomic_test_and_set and 
> atomic_clear operations.   It also restructures the code for 
> atomic_test_and_set, atomic_exchange, and __sync_lock_test_and_set so 
> that it is easier to read and tries things in a rational manner.
> 
> bootstrapped on x86_64-unknown-linux-gnu with no new regressions.
> 
> Andrew

I've tried adding support for the new atomic_test_and_set to the SH
target and ran into problems when compiling code that would use the
return value of the atomic_test_and_set pattern.

The attached patch fixes this problem and also wraps the calls to
gen_atomic_test_and_set in the way it is done by other maybe_emit_*
functions.
Could you please have a look at it?

BTW, currently the only target utilizing the new atomic_test_and_set is
SPARC.  However, as far as I've observed an expander like

(define_expand "atomic_test_and_set"

will never be used, because currently the atomic_test_and_set never has
a mode in its name.  As far as I understand it, atomic_test_and_set is
supposed to operate on a bool only and thus no additional mode info is
needed.  Or is something else missing?

Cheers,
Oleg

2011-12-21  Oleg Endo  

* optab.c (maybe_emit_atomic_test_and_set): New function.
(expand_sync_lock_test_and_set): Use it.
(expand_atomic_test_and_set): Use it.
Index: gcc/optabs.c
===
--- gcc/optabs.c	(revision 182531)
+++ gcc/optabs.c	(working copy)
@@ -7436,10 +7436,35 @@
   return NULL_RTX;
 }
 
+/* This function tries to emit an atomic test and set operation using
+   __atomic_test_and_set, if it is defined in the target.  */
+
+static rtx
+maybe_emit_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
+{
 #ifndef HAVE_atomic_test_and_set
-#define HAVE_atomic_test_and_set 0
-#define gen_atomic_test_and_set(x,y,z)  (gcc_unreachable (), NULL_RTX)
+
+  return NULL_RTX;
+
+#else
+
+  /*  Allow the target to use a different mode than mem for storing
+  the previous value in some target specific way, as in
+  compare_and_swap.
+  This allows test and set conditional operations to be combined
+  better with surrounding code.  */
+  enum insn_code icode = CODE_FOR_atomic_test_and_set;
+  enum machine_mode imode = insn_data[icode].operand[0].mode;
+
+  if (target == NULL_RTX || GET_MODE (target) != imode)
+target = gen_reg_rtx (imode);
+
+  emit_insn (gen_atomic_test_and_set (target, mem, GEN_INT (model)));
+
+  return target;
+
 #endif
+}
 
 /* This function expands the legacy _sync_lock test_and_set operation which is
generally an atomic exchange.  Some limited targets only allow the
@@ -7464,11 +7489,8 @@
 
   /* If there are no other options, try atomic_test_and_set if the value
  being stored is 1.  */
-  if (!ret && val == const1_rtx && HAVE_atomic_test_and_set)
-{
-  ret = gen_atomic_test_and_set (target, mem, GEN_INT (MEMMODEL_ACQUIRE));
-  emit_insn (ret);
-}
+  if (!ret && val == const1_rtx)
+ret = maybe_emit_atomic_test_and_set (target, mem, MEMMODEL_ACQUIRE);
 
   return ret;
 }
@@ -7488,16 +7510,12 @@
   if (target == NULL_RTX)
 target = gen_reg_rtx (mode);
 
-  if (HAVE_atomic_test_and_set)
-{
-  ret = gen_atomic_test_and_set (target, mem, GEN_INT (MEMMODEL_ACQUIRE));
-  emit_insn (ret);
-  return ret;
-}
+  ret = maybe_emit_atomic_test_and_set (target, mem, MEMMODEL_ACQUIRE);
 
   /* If there is no test and set, try exchange, then a compare_and_swap loop,
  then __sync_test_and_set.  */
-  ret = maybe_emit_atomic_exchange (target, mem, const1_rtx, model);
+  if (!ret)
+ret = maybe_emit_atomic_exchange (target, mem, const1_rtx, model);
 
   if (!ret)
 ret = maybe_emit_compare_and_swap_exchange_loop (target, mem, const1_rtx);

[PATCH] Speedup and make LTO type merging consistent for pre-loaded types

[Richard Guenther]

This speeds up LTO type merging by only calling gimple_register_type
on those types that possibly can require fixup (by means on how
the uniquification process is designed).  This makes the behavior
for pre-loaded type nodes consistent, as we do not throw them
at gimple_register_type directly but at the moment we do so
indirectly if they are refered to by any streamed in tree node.

A slightly more complex variant of the patch (un-setting TYPE_VISITED
after processing) has passed LTO bootstrap and regtest on
x86_64-unknown-linux-gnu as well as a SPEC 2k6 build.

Re-bootstrapping and testing together with some other patch now.

Richard.

2011-12-21  Richard Guenther  

lto/
* lto.c (GIMPLE_REGISTER_TYPE): New define.
(LTO_FIXUP_TREE): Use it.
(uniquify_nodes): Mark new non-prevailing types and avoid
calling gimple_register_type on others.
(lto_read_decls): Add comment.

Index: gcc/lto/lto.c
===
*** gcc/lto/lto.c   (revision 182525)
--- gcc/lto/lto.c   (working copy)
*** remember_with_vars (tree t)
*** 306,318 
*(tree *) htab_find_slot (tree_with_vars, t, INSERT) = t;
  }
  
  #define LTO_FIXUP_TREE(tt) \
do \
  { \
if (tt) \
{ \
  if (TYPE_P (tt)) \
!   (tt) = gimple_register_type (tt); \
  if (VAR_OR_FUNCTION_DECL_P (tt) && TREE_PUBLIC (tt)) \
remember_with_vars (t); \
} \
--- 306,321 
*(tree *) htab_find_slot (tree_with_vars, t, INSERT) = t;
  }
  
+ #define GIMPLE_REGISTER_TYPE(tt) \
+(TREE_VISITED (tt) ? gimple_register_type (tt) : tt)
+ 
  #define LTO_FIXUP_TREE(tt) \
do \
  { \
if (tt) \
{ \
  if (TYPE_P (tt)) \
!   (tt) = GIMPLE_REGISTER_TYPE (tt); \
  if (VAR_OR_FUNCTION_DECL_P (tt) && TREE_PUBLIC (tt)) \
remember_with_vars (t); \
} \
*** uniquify_nodes (struct data_in *data_in,
*** 731,737 
  {
tree t = VEC_index (tree, cache->nodes, i);
if (t && TYPE_P (t))
!   gimple_register_type (t);
  }
  
/* Second fixup all trees in the new cache entries.  */
--- 734,747 
  {
tree t = VEC_index (tree, cache->nodes, i);
if (t && TYPE_P (t))
!   {
! tree newt = gimple_register_type (t);
! /* Mark non-prevailing types so we fix them up.  No need
!to reset that flag afterwards - nothing that refers
!to those types is left and they are collected.  */
! if (newt != t)
!   TREE_VISITED (t) = 1;
!   }
  }
  
/* Second fixup all trees in the new cache entries.  */
*** uniquify_nodes (struct data_in *data_in,
*** 749,755 
continue;
  
/* Now try to find a canonical variant of T itself.  */
!   t = gimple_register_type (t);
  
if (t == oldt)
{
--- 759,765 
continue;
  
/* Now try to find a canonical variant of T itself.  */
!   t = GIMPLE_REGISTER_TYPE (t);
  
if (t == oldt)
{
*** uniquify_nodes (struct data_in *data_in,
*** 771,777 
}
  
  /* Query our new main variant.  */
! mv = gimple_register_type (TYPE_MAIN_VARIANT (t));
  
  /* If we were the variant leader and we get replaced ourselves drop
 all variants from our list.  */
--- 781,787 
}
  
  /* Query our new main variant.  */
! mv = GIMPLE_REGISTER_TYPE (TYPE_MAIN_VARIANT (t));
  
  /* If we were the variant leader and we get replaced ourselves drop
 all variants from our list.  */
*** lto_read_decls (struct lto_file_decl_dat
*** 901,906 
--- 919,927 
data_in = lto_data_in_create (decl_data, (const char *) data + 
string_offset,
header->string_size, resolutions);
  
+   /* We do not uniquify the pre-loaded cache entries, those are middle-end
+  internal types that should not be merged.  */
+ 
/* Read the global declarations and types.  */
while (ib_main.p < ib_main.len)
  {

[Ada] Inherited aspects of subtypes

[Arnaud Charlet]

Certain aspects on types apply to their subtypes as well. These include the
aspects involved in iterators. If the type of a container is a subtype, obtain
the iterator aspects from the base type.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Ed Schonberg  

* aspects.ads: New table Base_Aspect, to indicate that an aspect
is defined on a base type.
* aspects.adb (Find_Aspect): If the aspect is a Base_Aspect,
examine the representation items of the base type.

Index: aspects.adb
===
--- aspects.adb (revision 182572)
+++ aspects.adb (working copy)
@@ -125,17 +125,29 @@
 
function Find_Aspect (Ent : Entity_Id; A : Aspect_Id) return Node_Id is
   Ritem : Node_Id;
+  Typ   : Entity_Id;
 
begin
 
   --  If the aspect is an inherited one and the entity is a class-wide
-  --  type, use the aspect of the specific type.
+  --  type, use the aspect of the specific type. If the type is a base
+  --  aspect, examine the rep. items of the base type.
 
-  if Is_Type (Ent)
-and then Is_Class_Wide_Type (Ent)
-and then Inherited_Aspect (A)
-  then
- Ritem := First_Rep_Item (Etype (Ent));
+  if Is_Type (Ent) then
+ if Base_Aspect (A) then
+Typ := Base_Type (Ent);
+ else
+Typ := Ent;
+ end if;
+
+ if Is_Class_Wide_Type (Typ)
+   and then Inherited_Aspect (A)
+ then
+Ritem := First_Rep_Item (Etype (Typ));
+ else
+Ritem := First_Rep_Item (Typ);
+ end if;
+
   else
  Ritem := First_Rep_Item (Ent);
   end if;
Index: aspects.ads
===
--- aspects.ads (revision 182572)
+++ aspects.ads (working copy)
@@ -147,6 +147,24 @@
 Aspect_Post  => True,
 others   => False);
 
+   --  The following array indicates aspects that a subtype inherits from
+   --  its base type. True means that the subtype inherits the aspect from
+   --  its base type. False means it is not inherited.
+
+   Base_Aspect : constant array (Aspect_Id) of Boolean :=
+   (Aspect_Atomic  => True,
+Aspect_Atomic_Components   => True,
+Aspect_Discard_Names   => True,
+Aspect_Independent_Components  => True,
+Aspect_Iterator_Element=> True,
+Aspect_Constant_Indexing   => True,
+Aspect_Default_Iterator=> True,
+Aspect_Type_Invariant  => True,
+Aspect_Unchecked_Union => True,
+Aspect_Variable_Indexing   => True,
+Aspect_Volatile=> True,
+others => False);
+
--  The following array identifies all implementation defined aspects
 
Impl_Defined_Aspects : constant array (Aspect_Id) of Boolean :=

[Ada] Use Encapsulated instead of Fully Standalone library

[Arnaud Charlet]

Attributes Library_Fully_Standalone_Supported and
Library_Fully_Standalone_Options have been renamed
Library_Encapsulated_Supported and Library_Encapsulated_Options
respectively.

No change in behavior.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Pascal Obry  

* gnat_ugn.texi, prj.ads, prj-nmsc.adb, prj-attr.adb, projects.texi,
snames.ads-tmpl: Use Encapsulated instead of Fully Standalone library.

Index: gnat_ugn.texi
===
--- gnat_ugn.texi   (revision 182575)
+++ gnat_ugn.texi   (working copy)
@@ -16360,26 +16360,26 @@
 the binding phase will fail.
 
 @noindent
-It is also possible to build a fully stand-alone library where not only
+It is also possible to build an encapsulated library where not only
 the code to elaborate and finalize the library is embedded but also
 ensuring that the library is linked only against static
-libraries. So a fully stand-alone library only depends on system
+libraries. So an encapsulated library only depends on system
 libraries, all other code, including the GNAT runtime, is embedded. To
-build a fully stand-alone library the attribute
-@code{Library_Standalone} must be set to @code{full}:
+build an encapsulated library the attribute
+@code{Library_Standalone} must be set to @code{encapsulated}:
 
 @smallexample @c projectfile
 @group
for Library_Dir use "lib_dir";
for Library_Name use "dummy";
for Library_Interface use ("int1", "int1.child");
-   for Library_Standalone use "full";
+   for Library_Standalone use "encapsulated";
 @end group
 @end smallexample
 
 @noindent
 The default value for this attribute is @code{standard} in which case
-a not fully stand-alone library is built.
+a stand-alone library is built.
 
 The attribute @code{Library_Src_Dir} may be specified for a
 Stand-Alone Library. @code{Library_Src_Dir} is a simple attribute that has a
Index: prj.ads
===
--- prj.ads (revision 182577)
+++ prj.ads (working copy)
@@ -1033,7 +1033,7 @@
   --  The level of library support. Specified in the configuration. Support
   --  is none, static libraries only or both static and shared libraries.
 
-  Lib_Fully_Standalone_Supported : Boolean := False;
+  Lib_Encapsulated_Supported : Boolean := False;
   --  True when building fully standalone libraries supported on the target
 
   Archive_Builder : Name_List_Index := No_Name_List;
@@ -1106,7 +1106,7 @@
Resp_File_Format   => None,
Resp_File_Options  => No_Name_List,
Lib_Support=> None,
-   Lib_Fully_Standalone_Supported => False,
+   Lib_Encapsulated_Supported => False,
Archive_Builder=> No_Name_List,
Archive_Builder_Append_Option  => No_Name_List,
Archive_Indexer=> No_Name_List,
@@ -1151,7 +1151,7 @@
 
--  The following record describes a project file representation
 
-   type Standalone is (No, Standard, Full);
+   type Standalone is (No, Standard, Encapsulated);
 
type Project_Data (Qualifier : Project_Qualifier := Unspecified) is record
 
Index: prj-nmsc.adb
===
--- prj-nmsc.adb(revision 182578)
+++ prj-nmsc.adb(working copy)
@@ -2220,12 +2220,12 @@
   end;
 
elsif
- Attribute.Name = Name_Library_Fully_Standalone_Supported
+ Attribute.Name = Name_Library_Encapsulated_Supported
then
   declare
  pragma Unsuppress (All_Checks);
   begin
- Project.Config.Lib_Fully_Standalone_Supported :=
+ Project.Config.Lib_Encapsulated_Supported :=
Boolean'Value (Get_Name_String (Attribute.Value.Value));
   exception
  when Constraint_Error =>
@@ -2233,7 +2233,7 @@
   (Data.Flags,
"invalid value """
  & Get_Name_String (Attribute.Value.Value)
- & """ for Library_Fully_Standalone_Supported",
+ & """ for Library_Encapsulated_Supported",
Attribute.Value.Location, Project);
   end;
 
@@ -2955,11 +2955,10 @@
 
 elsif Project.Library_Kind /= Static
   and then not Lib_Standalone.Default
-  and then Get_Name_String (Lib_Standalone.Value) = "full"
+  and then Get_Name_String (Lib_Standalone.Value) = "encapsulated"
   and then Proj.Library_Kind /= Static
  

[Ada] Fixed incorrect comment about conditional insertion

[Arnaud Charlet]

An incorrect comment in Generic_Conditional_Insert was fixed, and the
subprogram was properly documented.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Matthew Heaney  

* a-crbtgk.adb (Generic_Conditional_Insert): Fixed incorrect comment.

Index: a-crbtgk.adb
===
--- a-crbtgk.adb(revision 182572)
+++ a-crbtgk.adb(working copy)
@@ -6,7 +6,7 @@
 --  --
 -- B o d y  --
 --  --
---  Copyright (C) 2004-2009, Free Software Foundation, Inc. --
+--  Copyright (C) 2004-2011, Free Software Foundation, Inc. --
 --  --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -121,6 +121,21 @@
   X : Node_Access := Tree.Root;
 
begin
+  --  This is a "conditional" insertion, meaning that the insertion request
+  --  can "fail" in the sense that no new node is created. If the Key is
+  --  equivalent to an existing node, then we return the existing node and
+  --  Inserted is set to False. Otherwise, we allocate a new node (via
+  --  Insert_Post) and Inserted is set to True.
+
+  --  Note that we are testing for equivalence here, not equality. Key must
+  --  be strictly less than its next neighbor, and strictly greater than
+  --  its previous neighbor, in order for the conditional insertion to
+  --  succeed.
+
+  --  We search the tree to find the nearest neighbor of Key, which is
+  --  either the smallest node greater than Key (Inserted is True), or the
+  --  largest node less or equivalent to Key (Inserted is False).
+
   Inserted := True;
   while X /= null loop
  Y := X;
@@ -128,33 +143,50 @@
  X := (if Inserted then Ops.Left (X) else Ops.Right (X));
   end loop;
 
-  --  If Inserted is True, then this means either that Tree is
-  --  empty, or there was a least one node (strictly) greater than
-  --  Key. Otherwise, it means that Key is equal to or greater than
-  --  every node.
+  if Inserted then
 
-  if Inserted then
+ --  Either Tree is empty, or Key is less than Y. If Y is the first
+ --  node in the tree, then there are no other nodes that we need to
+ --  search for, and we insert a new node into the tree.
+
  if Y = Tree.First then
 Insert_Post (Tree, Y, True, Node);
 return;
  end if;
 
+ --  Y is the next nearest-neighbor of Key. We know that Key is not
+ --  equivalent to Y (because Key is strictly less than Y), so we move
+ --  to the previous node, the nearest-neighbor just smaller or
+ --  equivalent to Key.
+
  Node := Ops.Previous (Y);
 
   else
+ --  Y is the previous nearest-neighbor of Key. We know that Key is not
+ --  less than Y, which means either that Key is equivalent to Y, or
+ --  greater than Y.
+
  Node := Y;
   end if;
 
-  --  Here Node has a value that is less than or equal to Key. We
-  --  now have to resolve whether Key is equal to or greater than
-  --  Node, which determines whether the insertion succeeds.
+  --  Key is equivalent to or greater than Node. We must resolve which is
+  --  the case, to determine whether the conditional insertion succeeds.
 
   if Is_Greater_Key_Node (Key, Node) then
+
+ --  Key is strictly greater than Node, which means that Key is not
+ --  equivalent to Node. In this case, the insertion succeeds, and we
+ --  insert a new node into the tree.
+
  Insert_Post (Tree, Y, Inserted, Node);
  Inserted := True;
  return;
   end if;
 
+  --  Key is equivalent to Node. This is a conditional insertion, so we do
+  --  not insert a new node in this case. We return the existing node and
+  --  report that no insertion has occurred.
+
   Inserted := False;
end Generic_Conditional_Insert;
 

[Ada] Spurious warnings on element iterator whose domain is a function call

[Arnaud Charlet]

This patch suppresses spurious warnings on an iterator of the form: "for E of C"
when C is a parameterless function call, and code expansion is disabled.

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Ed Schonberg  

* sem_ch5.adb (Analyze_Iterator_Specification): If the name
of an element iterator is not an entity name we introduce a
local renaming declaration for it. To prevent spurious warnings
on parameterless function calls that return a container, when
expansion is disabled (either explicitly or because of a previous
errors) the name must be marked as not coming from source.

Index: sem_ch5.adb
===
--- sem_ch5.adb (revision 182572)
+++ sem_ch5.adb (working copy)
@@ -2257,11 +2257,17 @@
  begin
 Typ := Etype (Iter_Name);
 
+--  The name in the renaming declaration may be a function call.
+--  Indicate that it does not come from source, to suppress
+--  spurious warnings on renamings of parameterless functions,
+--  a common enough idiom in user-defined iterators.
+
 Decl :=
   Make_Object_Renaming_Declaration (Loc,
 Defining_Identifier => Id,
 Subtype_Mark=> New_Occurrence_Of (Typ, Loc),
-Name=> Relocate_Node (Iter_Name));
+Name=>
+  New_Copy_Tree (Iter_Name, New_Sloc => Loc));
 
 Insert_Actions (Parent (Parent (N)), New_List (Decl));
 Rewrite (Name (N), New_Occurrence_Of (Id, Loc));

[Ada] Implement conventions Ada_Pass_By_Copy and Ada_Pass_By_Reference

[Arnaud Charlet]

These conventions allow the programmer to control the parameter passing
method used in cases where it would normally be up to the implementation.
The convention is applied to the type, and then affects how parameters
with this type are passed. It is not allowed to specify Ada_Pass_By_Copy
for types for which the language requires pass by reference (for example,
limited types), and it is not allowed to specify Ada_Pass_By_Reference
for types for which the language requires pass by copy (for example
scalar types). Also if a parameter is marked as aliased, it is passed
by reference even if the convention is Pass_By_Copy (this situation
generates a warning, but is not considered to be an error).

The following test shows detection of errors (the output is compiled
with -gnatj60 -gnatld7):

 1. procedure pbycopref1 is
 2.type R is tagged null record;
 3.pragma Convention (Ada_Pass_By_Copy, R);
  |
>>> convention "Ada_Pass_By_Copy" not allowed for
by-reference type

 4.type X is new Integer;
 5.pragma Convention (Ada_Pass_By_Reference, X);
  |
>>> convention "Ada_Pass_By_Reference" not allowed
for by-copy type

 6.procedure Q is begin null; end;
 7.pragma Convention (Ada_Pass_By_Copy, Q);
|
>>> convention "Ada_Pass_By_Copy" only allowed for
types

 8.pragma Convention (Ada_Pass_By_Reference, Q);
 |
>>> convention "Ada_Pass_By_Reference" only allowed
for types

 9. begin
10.null;
11. end;

The following program compiles clean:

 1. with System; use System;
 2. with Text_IO; use Text_IO;
 3. procedure pbycopref2 is
 4.type Typ1 is array (1 .. 100) of Integer;
 5.pragma Convention (Ada_Pass_By_Copy, Typ1);
 6.procedure Test_By_Copy (A, B : in out Typ1) is
 7.begin
 8.   if A'Address = B'Address then
 9.  Put_Line ("Error, unexpected pass by reference");
10.   else
11.  Put_Line (A (1)'Img);
12.  Put_Line (A (2)'Img);
13.  Put_line ("OK");
14.   end if;
15.end;
16.
17.A1 : Typ1 := (others => 0);
18.
19.type Typ2 is array (1 .. 32) of Boolean;
20.pragma Pack (Typ2);
21.pragma Convention (Ada_Pass_By_Reference, Typ2);
22.
23.procedure Test_By_Reference (A, B : in out Typ2) is
24.begin
25.   if A'Address /= B'Address then
26.  Put_Line ("Error, unexpected pass by copy");
27.   else
28.  Put_line ("OK");
29.   end if;
30.end;
31.
32.B1 : Typ2 := (others => False);
33.
34. begin
35.Test_By_Copy (A1, A1);
36.Test_By_Reference (B1, B1);
37. end;

and generates the output:

 0
 0
OK
OK

The following program generates warnings as shown:

 1. pragma Ada_2012;
 2. with System; use System;
 3. with Text_IO; use Text_IO;
 4. procedure pbycopref3 is
 5.type Typ1 is array (1 .. 100) of Integer;
 6.pragma Convention (Ada_Pass_By_Copy, Typ1);
 7.procedure Test_By_Ref (A, B : aliased in out Typ1) is
  1  2
>>> warning: cannot pass aliased parameter "A" by copy
>>> warning: cannot pass aliased parameter "B" by copy

 8.begin
 9.   if A'Address = B'Address then
10.  Put_Line ("Error, unexpected pass by copy");
11.   else
12.  Put_Line (A (1)'Img);
13.  Put_Line (A (2)'Img);
14.  Put_line ("OK");
15.   end if;
16.end;
17.X, Y : aliased Typ1 := (1 => 1, 2 => 2, others => 0);
18. begin
19.Test_By_Ref (X, Y);
20. end;

and generates the output:

 1
 2
OK

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Robert Dewar  

* sem_ch6.adb (Process_Formals): Set proper mechanism for
formals whose types have conventions Ada_Pass_By_Copy or
Ada_Pass_By_Reference.

Index: sem_ch6.adb
===
--- sem_ch6.adb (revision 182572)
+++ sem_ch6.adb (working copy)
@@ -9527,14 +9527,14 @@
Default :=  Expression (Param_Spec);
 
if Is_Scalar_Type (Etype (Default)) then
-  if Nkind
-   (Parameter_Type (Param_Spec)) /= N_Access_Definition
+  if Nkind (Parameter_Type (Param_Spec)) /=
+  N_Access_Definition
   then
  Formal_Type := Entity (Parameter_Type (Param_Spec));
-
   else
- Formal_Type := Access_Definition
-   (Related_Nod, Parameter_Type (Param_Spec));
+  

[Ada] Allocation of coextensions

[Arnaud Charlet]

In certain cases the object designated by an access discriminant can be stack-
allocated, for example when the enclosing object is a local object declaration.
However, if the access discriminant is an aggregate component of a return
expression or a return object, it must be allocated dynamically.

The following must output
42
84

--- 
   gnatmake -q -gnat05 test_driver
   test_driver
---
with test_package;
with Text_IO;
procedure test_driver is
begin
   declare
  foo : test_package.test_type := test_package.get (-1);
  bar : access Integer := new Integer'(69);
   begin
  Text_IO.Put_Line(foo.p_obj.all'img);
   end;

   declare
  foo : test_package.test_type := test_package.get (42);
  bar : access Integer := new Integer'(1234);
   begin
  Text_IO.Put_Line(foo.p_obj.all'img);
   end;
end test_driver;
---
package test_package is
   type test_type (p_obj : access Integer) is limited private;

   function get (X : Integer) return test_type;
private
   type test_type (p_obj : access Integer) is limited null record;
end test_package;
---
package body test_package is
   function get (X : Integer)  return test_type is
   begin
  if X < 0 then
 return test_type'(p_obj => new Integer'(42));
  else
 return result : test_Type := (p_obj => new Integer'(2 * X));
  end if;
   end get;
end test_package;

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Ed Schonberg  

* sem_util.adb (Mark_Coextensions): A coextension for an
object that is part of the expression in a return statement,
or part of the return object in an extended return statement,
must be allocated dynamically.

Index: sem_util.adb
===
--- sem_util.adb(revision 182572)
+++ sem_util.adb(working copy)
@@ -9331,7 +9331,6 @@
   and then Nkind (Expression (Expression (N))) = N_Op_Concat
 then
Set_Is_Dynamic_Coextension (N);
-
 else
Set_Is_Static_Coextension (N);
 end if;
@@ -9346,12 +9345,33 @@
 
begin
   case Nkind (Context_Nod) is
- when N_Assignment_Statement|
-  N_Simple_Return_Statement =>
+
+ --  Comment here ???
+
+ when N_Assignment_Statement=>
 Is_Dynamic := Nkind (Expression (Context_Nod)) = N_Allocator;
 
+ --  An allocator that is a component of a returned aggregate
+ --  must be dynamic.
+
+ when N_Simple_Return_Statement =>
+declare
+   Expr : constant Node_Id := Expression (Context_Nod);
+begin
+   Is_Dynamic :=
+ Nkind (Expr) = N_Allocator
+   or else
+ (Nkind (Expr) = N_Qualified_Expression
+   and then Nkind (Expression (Expr)) = N_Aggregate);
+end;
+
+ --  An alloctor within an object declaration in an extended return
+ --  statement is of necessity dynamic.
+
  when N_Object_Declaration =>
-Is_Dynamic := Nkind (Root_Nod) = N_Allocator;
+Is_Dynamic := Nkind (Root_Nod) = N_Allocator
+  or else
+Nkind (Parent (Context_Nod)) = N_Extended_Return_Statement;
 
  --  This routine should not be called for constructs which may not
  --  contain coextensions.
@@ -9371,9 +9391,9 @@
   Formal : Entity_Id;
 
begin
-  if Ada_Version >= Ada_2005
-and then Present (First_Formal (E))
-  then
+  --  Ada 2005 or later, and formals present
+
+  if Ada_Version >= Ada_2005 and then Present (First_Formal (E)) then
  Formal := Next_Formal (First_Formal (E));
  while Present (Formal) loop
 if No (Default_Value (Formal)) then
@@ -9385,6 +9405,8 @@
 
  return True;
 
+  --  Ada 83/95 or no formals
+
   else
  return False;
   end if;

Re: PR middle-end/51472: set DECL_GIMPLE_REG_P on TM vector saves

[Aldy Hernandez]

You can't simply do

+ if (TREE_CODE (TREE_TYPE (var)) == COMPLEX_TYPE
+ || TREE_CODE (TREE_TYPE (var)) == VECTOR_TYPE)
+   DECL_GIMPLE_REG_P (var) = 1;
+ update_stmt (stmt);

where is 'var' created?  At _that_ point you should do the above
(or use create_tmp_reg instead of create_tmp_var).  Existing uses
of var might prevent DECL_GIMPLE_REG_P from being set
(which also means creating an SSA name of it is not allowed).


Oh neat... create_tmp_reg will do all this for me.

OK?
PR middle-end/51472
* trans-mem.c (tm_log_emit_saves): Call update_stmt.
(tm_log_add): Use create_tmp_var_reg.

Index: testsuite/gcc.dg/tm/pr51472.c
===
--- testsuite/gcc.dg/tm/pr51472.c   (revision 0)
+++ testsuite/gcc.dg/tm/pr51472.c   (revision 0)
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-fgnu-tm -O  --param tm-max-aggregate-size=32" } */
+
+typedef int __attribute__ ((vector_size (16))) vectype;
+vectype v;
+
+void
+foo (int c)
+{
+  vectype *p = __builtin_malloc (sizeof (vectype));
+  __transaction_atomic
+  {
+*p = v;
+if (c)
+  __transaction_cancel;
+  }
+}
Index: trans-mem.c
===
--- trans-mem.c (revision 182542)
+++ trans-mem.c (working copy)
@@ -1003,7 +1003,7 @@ tm_log_add (basic_block entry_block, tre
 special constructors and the like.  */
  && !TREE_ADDRESSABLE (type))
{
- lp->save_var = create_tmp_var (TREE_TYPE (lp->addr), "tm_save");
+ lp->save_var = create_tmp_reg (TREE_TYPE (lp->addr), "tm_save");
  add_referenced_var (lp->save_var);
  lp->stmts = NULL;
  lp->entry_block = entry_block;
@@ -1188,6 +1188,7 @@ tm_log_emit_saves (basic_block entry_blo
{
  lp->save_var = make_ssa_name (lp->save_var, stmt);
  gimple_assign_set_lhs (stmt, lp->save_var);
+ update_stmt (stmt);
}
 
   gsi_insert_before (&gsi, stmt, GSI_SAME_STMT);

[Ada] Ada 2012 type invariants on type completions

[Arnaud Charlet]

In Ada 2012, type invariants can appear in the private part of a package, on
a type declaration that is a completion. This patch analyzes properly the
invariant and creates the invariant procedure for the type, so that it is
applied in the same contexts as an invariant in the visible part.

Compiling wrong_inv.ads must yield:

   wrong_inv.ads:7:31: expected type "Standard.Boolean"
   wrong_inv.ads:7:31: found type universal integer
---
package Wrong_Inv is
   type T is private;
   function Is_OK (Obj : T) return Boolean;
   function Wrong (X : Integer) return T;
private
   type T is new Integer range 1 .. 1
 with Type_Invariant => 1 + 2;
end;
---
The following must execute quietly:

   gnatmake -q -gnat12 -gnata test_invariant
   test_invariant

---
with Ada.Assertions; use Ada.Assertions;
with Typinv; use Typinv;
procedure Test_Invariant is
   Thing : T;
begin
   Thing:= Wrong (5);
   raise Program_Error;
exception
   when Assertion_Error => null;
end;
---
package Typinv is
   type T is private;
   function Is_OK (Obj : T) return Boolean;
   function Wrong (X : Integer) return T;
private
   type T is new Integer range 1 .. 1
  with Type_Invariant => Is_OK (T);
end;
---
package body  Typinv is
   function Is_OK (Obj : T) return Boolean is
   begin
  return Obj mod 7 = 3;
   end;
   function Wrong (X : Integer) return T is
   begin
  return 9;
   end;
end;

Tested on x86_64-pc-linux-gnu, committed on trunk

2011-12-21  Ed Schonberg  

* sem_ch7.adb, sem_ch13.adb (Analyze_Package_Specification): Build the
invariant procedure of a type declaration that is a completion and has
aspect specifications.
(Build_Invariant_Procedure): If the procedure is built for a
type declaration that is a completion, analyze body expliitly
because all private declarations have been already analyzed.

Index: sem_ch7.adb
===
--- sem_ch7.adb (revision 182572)
+++ sem_ch7.adb (working copy)
@@ -1378,6 +1378,16 @@
   ("full view of & does not have preelaborable initialization", E);
  end if;
 
+ --  An invariant may appear on a full view of a type
+
+ if Is_Type (E)
+   and then Has_Private_Declaration (E)
+   and then Nkind (Parent (E)) = N_Full_Type_Declaration
+   and then Has_Aspects (Parent (E))
+ then
+Build_Invariant_Procedure (E, N);
+ end if;
+
  Next_Entity (E);
   end loop;
 
Index: sem_ch13.adb
===
--- sem_ch13.adb(revision 182585)
+++ sem_ch13.adb(working copy)
@@ -4738,6 +4738,14 @@
 --  (this is an error that will be caught elsewhere);
 
 Append_To (Private_Decls, PBody);
+
+--  If the invariant appears on the full view of a type, the
+--  analysis of the private part is complete, and we must
+--  analyze the new body explicitly.
+
+if In_Private_Part (Current_Scope) then
+   Analyze (PBody);
+end if;
  end if;
   end if;
end Build_Invariant_Procedure;

Re: PR middle-end/51472: set DECL_GIMPLE_REG_P on TM vector saves

[Jakub Jelinek]

On Wed, Dec 21, 2011 at 07:52:16AM -0600, Aldy Hernandez wrote:
> Oh neat... create_tmp_reg will do all this for me.

I don't think that update_stmt is needed there.
The stmt is freshly allocated a few lines above it:
stmt = gimple_build_assign (lp->save_var, unshare_expr (lp->addr));
so the modified flag is still set and thus when you gsi_insert_before
it afterwards, it will update_stmt_if_modified, which is the same as
update_stmt when the modified flag is set.

The first hunk looks okay.

> --- trans-mem.c   (revision 182542)
> +++ trans-mem.c   (working copy)
> @@ -1003,7 +1003,7 @@ tm_log_add (basic_block entry_block, tre
>special constructors and the like.  */
> && !TREE_ADDRESSABLE (type))
>   {
> -   lp->save_var = create_tmp_var (TREE_TYPE (lp->addr), "tm_save");
> +   lp->save_var = create_tmp_reg (TREE_TYPE (lp->addr), "tm_save");
> add_referenced_var (lp->save_var);
> lp->stmts = NULL;
> lp->entry_block = entry_block;
> @@ -1188,6 +1188,7 @@ tm_log_emit_saves (basic_block entry_blo
>   {
> lp->save_var = make_ssa_name (lp->save_var, stmt);
> gimple_assign_set_lhs (stmt, lp->save_var);
> +   update_stmt (stmt);
>   }
>  
>gsi_insert_before (&gsi, stmt, GSI_SAME_STMT);


Jakub

RFC: IRA patch to reduce lifetimes

[Bernd Schmidt]

For a customer I've looked into improving code for 456.hmmer on a mips64
target. The benchmark responds to -fsched-pressure, which reduces
lifetimes of a few registers.

This patch was an experiment to see if we can get the same improvement
with modifications to IRA, making it more tolerant to over-aggressive
scheduling. THe idea is that if an instruction sets a register A, and
all its inputs are live and unmodified for the lifetime of A, then
moving the instruction downwards towards its first use is going to be
beneficial from a register pressure point of view.

That alone, however, turns out to be too aggressive, performance drops
presumably because we undo too many scheduling decisions. So, the patch
detects such situations, and splits the pseudo; a new pseudo is
introduced in the original setting instruction, and a copy is added
before the first use. If the new pseudo does not get a hard register, it
is removed again and instead the setting instruction is moved to the
point of the copy.

This gets up to 6.5% on 456.hmmer on the mips target I was working on;
an embedded benchmark suite also seems to have a (small) geomean
improvement. On x86_64, I've tested spec2k, where specint is unchanged
and specfp has a tiny performance regression. All these tests were done
with a gcc-4.6 based tree.

Thoughts? Currently the patch feels somewhat bolted on to the side of
IRA, maybe there's a nicer way to achieve this?


Bernd
* dbgcnt.def (ira_move): New counter.
* ira-int.h (ira_create_new_reg): Declare function.
(first_moveable_pseudo, last_moveable_pseudo): Declare variables.
* ira-emit.c (ira_create_new_reg): Renamed from craete_new_reg and
no longer static.  All callers changed.
* ira.c: Include "dbgcnt.h".
(rtx_moveable_p, insn_dominated_by_p, find_moveable_pseudos,
move_unallocated_pseudos): New static functions.
(first_moveable_pseudo, last_moveable_pseudo): New global variables.
(pseudo_replaced_reg, pseudo_move_insn): New static variables.
(ira): Call find_moveable_pseudos and move_unallocated_pseudos.
* ira-costs.c (find_costs_and_classes): Assign a memory cost of zero
to the pseudos generated in find_moveable_pseudos.
* Makefile.in (ira.o): Add $(DBGCNT_H).

Index: dbgcnt.def
===
--- dbgcnt.def  (revision 182544)
+++ dbgcnt.def  (working copy)
@@ -184,3 +184,4 @@ DEBUG_COUNTER (sms_sched_loop)
 DEBUG_COUNTER (store_motion)
 DEBUG_COUNTER (split_for_sched2)
 DEBUG_COUNTER (tail_call)
+DEBUG_COUNTER (ira_move)
Index: ira-int.h
===
--- ira-int.h   (revision 182544)
+++ ira-int.h   (working copy)
@@ -1411,3 +1411,6 @@ ira_allocate_and_set_or_copy_costs (int
reg_costs[i] = val;
 }
 }
+
+extern rtx ira_create_new_reg (rtx);
+extern int first_moveable_pseudo, last_moveable_pseudo;
Index: ira-emit.c
===
--- ira-emit.c  (revision 182544)
+++ ira-emit.c  (working copy)
@@ -330,8 +330,8 @@ add_to_edge_list (edge e, move_t move, b
 
 /* Create and return new pseudo-register with the same attributes as
ORIGINAL_REG.  */
-static rtx
-create_new_reg (rtx original_reg)
+rtx
+ira_create_new_reg (rtx original_reg)
 {
   rtx new_reg;
 
@@ -623,7 +623,7 @@ change_loop (ira_loop_tree_node_t node)
fprintf (ira_dump_file, "  %i vs parent %i:",
 ALLOCNO_HARD_REGNO (allocno),
 ALLOCNO_HARD_REGNO (parent_allocno));
- set_allocno_reg (allocno, create_new_reg (original_reg));
+ set_allocno_reg (allocno, ira_create_new_reg (original_reg));
}
}
 }
@@ -644,7 +644,7 @@ change_loop (ira_loop_tree_node_t node)
   if (! used_p)
continue;
   bitmap_set_bit (renamed_regno_bitmap, regno);
-  set_allocno_reg (allocno, create_new_reg (allocno_emit_reg (allocno)));
+  set_allocno_reg (allocno, ira_create_new_reg (allocno_emit_reg 
(allocno)));
 }
 }
 
@@ -850,7 +850,7 @@ modify_move_list (move_t list)
ALLOCNO_ASSIGNED_P (new_allocno) = true;
ALLOCNO_HARD_REGNO (new_allocno) = -1;
ALLOCNO_EMIT_DATA (new_allocno)->reg
- = create_new_reg (allocno_emit_reg (set_move->to));
+ = ira_create_new_reg (allocno_emit_reg (set_move->to));
 
/* Make it possibly conflicting with all earlier
   created allocnos.  Cases where temporary allocnos
Index: ira.c
===
--- ira.c   (revision 182544)
+++ ira.c   (working copy)
@@ -384,7 +384,7 @@ along with GCC; see the file COPYING3.
 #include "ggc.h"
 #include "ira-int.h"
 #include "dce.h"
-
+#include "dbgcnt.h"
 
 struct target_ira default_target_ira;
 struct target_ira_int default_targ

Re: PR middle-end/51472: set DECL_GIMPLE_REG_P on TM vector saves

[Aldy Hernandez]

On 12/21/11 08:07, Jakub Jelinek wrote:

On Wed, Dec 21, 2011 at 07:52:16AM -0600, Aldy Hernandez wrote:

Oh neat... create_tmp_reg will do all this for me.


I don't think that update_stmt is needed there.
The stmt is freshly allocated a few lines above it:
stmt = gimple_build_assign (lp->save_var, unshare_expr (lp->addr));
so the modified flag is still set and thus when you gsi_insert_before
it afterwards, it will update_stmt_if_modified, which is the same as
update_stmt when the modified flag is set.


Ok, done.



The first hunk looks okay.


Was that an approval?  Updated patch attached.
PR middle-end/51472
* trans-mem.c (tm_log_add): Use create_tmp_var_reg.

Index: testsuite/gcc.dg/tm/pr51472.c
===
--- testsuite/gcc.dg/tm/pr51472.c   (revision 0)
+++ testsuite/gcc.dg/tm/pr51472.c   (revision 0)
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-fgnu-tm -O  --param tm-max-aggregate-size=32" } */
+
+typedef int __attribute__ ((vector_size (16))) vectype;
+vectype v;
+
+void
+foo (int c)
+{
+  vectype *p = __builtin_malloc (sizeof (vectype));
+  __transaction_atomic
+  {
+*p = v;
+if (c)
+  __transaction_cancel;
+  }
+}
Index: trans-mem.c
===
--- trans-mem.c (revision 182542)
+++ trans-mem.c (working copy)
@@ -1003,7 +1003,7 @@ tm_log_add (basic_block entry_block, tre
 special constructors and the like.  */
  && !TREE_ADDRESSABLE (type))
{
- lp->save_var = create_tmp_var (TREE_TYPE (lp->addr), "tm_save");
+ lp->save_var = create_tmp_reg (TREE_TYPE (lp->addr), "tm_save");
  add_referenced_var (lp->save_var);
  lp->stmts = NULL;
  lp->entry_block = entry_block;

Re: PR middle-end/51472: set DECL_GIMPLE_REG_P on TM vector saves

[Jakub Jelinek]

On Wed, Dec 21, 2011 at 08:15:38AM -0600, Aldy Hernandez wrote:
> >The first hunk looks okay.
> 
> Was that an approval?  Updated patch attached.

Yes.  Thanks.

Jakub

[PATCH] Fix profiledbootstrap failures

[Jakub Jelinek]

Hi!

My profiledbootstrap --enable-checking=release (and lots of other configury
options) failed this morning, I got warnings (promoted to errors due to
-Werror*) because our uninitialized warning code couldn't figure these out.

Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
ok for trunk?

2011-12-21  Jakub Jelinek  

* tree-vect-patterns.c (vect_operation_fits_smaller_type): Initialize
*op0 and *op1 to NULL_TREE first to avoid warnings.
* calls.c (initialize_argument_information): Initialize base to avoid
warnings.

--- gcc/tree-vect-patterns.c.jj 2011-12-21 08:43:48.0 +0100
+++ gcc/tree-vect-patterns.c2011-12-21 09:47:50.908126257 +0100
@@ -900,6 +900,8 @@ vect_operation_fits_smaller_type (gimple
   loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (vinfo_for_stmt (stmt));
   struct loop *loop = LOOP_VINFO_LOOP (loop_info);
 
+  *op0 = NULL_TREE;
+  *op1 = NULL_TREE;
   *new_def_stmt = NULL;
 
   if (!is_gimple_assign (stmt))
--- gcc/calls.c.jj  2011-12-12 22:10:26.0 +0100
+++ gcc/calls.c 2011-12-21 09:03:44.721030991 +0100
@@ -1157,7 +1157,7 @@ initialize_argument_information (int num
 type, argpos < n_named_args))
{
  bool callee_copies;
- tree base;
+ tree base = NULL_TREE;
 
  callee_copies
= reference_callee_copied (args_so_far_pnt, TYPE_MODE (type),

Jakub

Re: [PATCH] Fix profiledbootstrap failures

[Richard Guenther]

On Wed, Dec 21, 2011 at 3:21 PM, Jakub Jelinek  wrote:
> Hi!
>
> My profiledbootstrap --enable-checking=release (and lots of other configury
> options) failed this morning, I got warnings (promoted to errors due to
> -Werror*) because our uninitialized warning code couldn't figure these out.
>
> Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
> ok for trunk?

Ok.

Richard.

> 2011-12-21  Jakub Jelinek  
>
>        * tree-vect-patterns.c (vect_operation_fits_smaller_type): Initialize
>        *op0 and *op1 to NULL_TREE first to avoid warnings.
>        * calls.c (initialize_argument_information): Initialize base to avoid
>        warnings.
>
> --- gcc/tree-vect-patterns.c.jj 2011-12-21 08:43:48.0 +0100
> +++ gcc/tree-vect-patterns.c    2011-12-21 09:47:50.908126257 +0100
> @@ -900,6 +900,8 @@ vect_operation_fits_smaller_type (gimple
>   loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (vinfo_for_stmt (stmt));
>   struct loop *loop = LOOP_VINFO_LOOP (loop_info);
>
> +  *op0 = NULL_TREE;
> +  *op1 = NULL_TREE;
>   *new_def_stmt = NULL;
>
>   if (!is_gimple_assign (stmt))
> --- gcc/calls.c.jj      2011-12-12 22:10:26.0 +0100
> +++ gcc/calls.c 2011-12-21 09:03:44.721030991 +0100
> @@ -1157,7 +1157,7 @@ initialize_argument_information (int num
>                             type, argpos < n_named_args))
>        {
>          bool callee_copies;
> -         tree base;
> +         tree base = NULL_TREE;
>
>          callee_copies
>            = reference_callee_copied (args_so_far_pnt, TYPE_MODE (type),
>
>        Jakub

[PATCH] Reorder AM_CXXFLAGS in libitm

[Jakub Jelinek]

Hi!

In my redhat/gcc-4_7-branch build with -fexceptions in XCFLAGS
(comes from standard Fedora optimization flags) I got many libitm
testsuite failures, because libitm currently relies on -fno-exceptions
as it is not linked against -lstdc++.

Fixed by putting XCFLAGS first and thus overriding those with
-fno-exceptions -fno-rtti.  E.g. gcc/Makefile.in also overrides
user given flags with -fno-rtti -fno-exceptions.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2011-12-21  Jakub Jelinek  

* Makefile.am (AM_CXXFLAGS): Put $(XCFLAGS) first.
* Makefile.in: Regenerated.

--- libitm/Makefile.am.jj   2011-12-15 08:06:53.0 +0100
+++ libitm/Makefile.am  2011-12-21 12:10:21.449165757 +0100
@@ -18,8 +18,8 @@ vpath % $(strip $(search_path))
 
 AM_CPPFLAGS = $(addprefix -I, $(search_path))
 AM_CFLAGS = $(XCFLAGS)
-AM_CXXFLAGS = -std=gnu++0x -funwind-tables -fno-exceptions -fno-rtti \
-   $(XCFLAGS) $(abi_version)
+AM_CXXFLAGS = $(XCFLAGS) -std=gnu++0x -funwind-tables -fno-exceptions \
+   -fno-rtti $(abi_version)
 AM_CCASFLAGS = $(XCFLAGS)
 AM_LDFLAGS = $(XLDFLAGS) $(SECTION_LDFLAGS) $(OPT_LDFLAGS)
 
--- libitm/Makefile.in.jj   2011-12-15 08:06:53.0 +0100
+++ libitm/Makefile.in  2011-12-21 12:10:44.994032058 +0100
@@ -355,8 +355,8 @@ fincludedir = $(libdir)/gcc/$(target_ali
 libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
 AM_CPPFLAGS = $(addprefix -I, $(search_path))
 AM_CFLAGS = $(XCFLAGS)
-AM_CXXFLAGS = -std=gnu++0x -funwind-tables -fno-exceptions -fno-rtti \
-   $(XCFLAGS) $(abi_version)
+AM_CXXFLAGS = $(XCFLAGS) -std=gnu++0x -funwind-tables -fno-exceptions \
+   -fno-rtti $(abi_version)
 
 AM_CCASFLAGS = $(XCFLAGS)
 AM_LDFLAGS = $(XLDFLAGS) $(SECTION_LDFLAGS) $(OPT_LDFLAGS)

Jakub

[PATCH] Fix some further gimple_clobber_p fallout (PR middle-end/51644)

[Jakub Jelinek]

Hi!

The following testcases fail on the trunk, because at -O0
we don't decide to copy the finally stmts if there is more than one
destination.  That is of course desirable for debugging reasons if
there are any real stmts, but if the try/finally has been created only to
hold gimple_clobber_p stmts that will not result in any code generated
in those spots, we really should duplicate those.
The second hunk is to use the right costs for the clobber stmts, they
are expanded to nothing.  Without that for -O2 and perhaps many clobber
stmts we could still decide not to duplicate.  I guess it should help
inlining too if the costs much better the reality.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2011-12-21  Jakub Jelinek  

PR middle-end/51644
PR middle-end/51647
* tree-eh.c (decide_copy_try_finally): At -O0, return true
even when ndests is not 1, if there are only gimple_clobber_p
(or debug) stmts in the finally sequence.
* tree-inline.c (estimate_num_insns): Return 0 for gimple_clobber_p
stmts.

* gcc.dg/pr51644.c: New test.
* g++.dg/warn/Wreturn-4.C: New test.

--- gcc/tree-eh.c.jj2011-12-14 08:11:03.0 +0100
+++ gcc/tree-eh.c   2011-12-21 12:15:49.749301513 +0100
@@ -1538,7 +1538,20 @@ decide_copy_try_finally (int ndests, boo
 }
 
   if (!optimize)
-return ndests == 1;
+{
+  gimple_stmt_iterator gsi;
+
+  if (ndests == 1)
+return true;
+
+  for (gsi = gsi_start (finally); !gsi_end_p (gsi); gsi_next (&gsi))
+   {
+ gimple stmt = gsi_stmt (gsi);
+ if (!is_gimple_debug (stmt) && !gimple_clobber_p (stmt))
+   return false;
+   }
+  return true;
+}
 
   /* Finally estimate N times, plus N gotos.  */
   f_estimate = count_insns_seq (finally, &eni_size_weights);
--- gcc/tree-inline.c.jj2011-12-14 08:11:03.0 +0100
+++ gcc/tree-inline.c   2011-12-21 11:17:04.708413203 +0100
@@ -3482,6 +3482,9 @@ estimate_num_insns (gimple stmt, eni_wei
 likely be a real store, so the cost of the GIMPLE_ASSIGN is the cost
 of moving something into "a", which we compute using the function
 estimate_move_cost.  */
+  if (gimple_clobber_p (stmt))
+   return 0;   /* ={v} {CLOBBER} stmt expands to nothing.  */
+
   lhs = gimple_assign_lhs (stmt);
   rhs = gimple_assign_rhs1 (stmt);
 
--- gcc/testsuite/gcc.dg/pr51644.c.jj   2011-12-21 12:24:22.185537200 +0100
+++ gcc/testsuite/gcc.dg/pr51644.c  2011-12-21 12:32:01.493946505 +0100
@@ -0,0 +1,33 @@
+/* PR middle-end/51644 */
+/* { dg-do compile } */
+/* { dg-options "-Wall -fexceptions" } */
+
+#include 
+
+extern void baz (int, va_list) __attribute__ ((__noreturn__));
+
+__attribute__ ((__noreturn__))
+void
+foo (int s, ...)
+{
+  va_list ap;
+  va_start (ap, s);
+  baz (s, ap);
+  va_end (ap);
+}  /* { dg-bogus "function does return" } */
+
+__attribute__ ((__noreturn__))
+void
+bar (int s, ...)
+{
+  va_list ap1;
+  va_start (ap1, s);
+  {
+va_list ap2;
+va_start (ap2, s);
+baz (s, ap1);
+baz (s, ap2);
+va_end (ap2);
+  }
+  va_end (ap1);
+}  /* { dg-bogus "function does return" } */
--- gcc/testsuite/g++.dg/warn/Wreturn-4.C.jj2011-12-21 12:33:33.328428381 
+0100
+++ gcc/testsuite/g++.dg/warn/Wreturn-4.C   2011-12-21 12:32:44.0 
+0100
@@ -0,0 +1,48 @@
+// PR middle-end/51647
+// { dg-do compile }
+// { dg-options "-Wall" }
+
+enum PropertyAttributes { NONE = 1 };
+enum PropertyType { NORMAL = 0, FIELD = 1 };
+class LookupResult;
+
+template 
+struct Handle
+{
+  inline explicit Handle (T *obj) __attribute__ ((always_inline)) {}
+  inline T *operator-> () const __attribute__ ((always_inline)) { return 0; }
+};
+
+struct JSObject
+{
+  bool IsGlobalObject () { return false; }
+};
+
+struct Isolate
+{
+  LookupResult *top_lookup_result () { return 0; }
+};
+
+struct LookupResult
+{
+  explicit LookupResult (Isolate *isolate) {}
+  JSObject *holder () { return 0; }
+  PropertyType type () { return NORMAL; }
+};
+
+int
+test (LookupResult *lookup)
+{
+  Handle  holder (lookup->holder ());
+  switch (lookup->type ())
+{
+case NORMAL:
+  if (holder->IsGlobalObject ())
+   return 2;
+  else
+   return 3;
+  break;
+default:
+  return 4;
+}
+}  // { dg-bogus "control reaches end of non-void function" }

Jakub

Re: [PATCH] Fix some further gimple_clobber_p fallout (PR middle-end/51644)

[Richard Guenther]

On Wed, 21 Dec 2011, Jakub Jelinek wrote:

> Hi!
> 
> The following testcases fail on the trunk, because at -O0
> we don't decide to copy the finally stmts if there is more than one
> destination.  That is of course desirable for debugging reasons if
> there are any real stmts, but if the try/finally has been created only to
> hold gimple_clobber_p stmts that will not result in any code generated
> in those spots, we really should duplicate those.
> The second hunk is to use the right costs for the clobber stmts, they
> are expanded to nothing.  Without that for -O2 and perhaps many clobber
> stmts we could still decide not to duplicate.  I guess it should help
> inlining too if the costs much better the reality.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

Ok

Thanks,
Richard.

> 2011-12-21  Jakub Jelinek  
> 
>   PR middle-end/51644
>   PR middle-end/51647
>   * tree-eh.c (decide_copy_try_finally): At -O0, return true
>   even when ndests is not 1, if there are only gimple_clobber_p
>   (or debug) stmts in the finally sequence.
>   * tree-inline.c (estimate_num_insns): Return 0 for gimple_clobber_p
>   stmts.
> 
>   * gcc.dg/pr51644.c: New test.
>   * g++.dg/warn/Wreturn-4.C: New test.
> 
> --- gcc/tree-eh.c.jj  2011-12-14 08:11:03.0 +0100
> +++ gcc/tree-eh.c 2011-12-21 12:15:49.749301513 +0100
> @@ -1538,7 +1538,20 @@ decide_copy_try_finally (int ndests, boo
>  }
>  
>if (!optimize)
> -return ndests == 1;
> +{
> +  gimple_stmt_iterator gsi;
> +
> +  if (ndests == 1)
> +return true;
> +
> +  for (gsi = gsi_start (finally); !gsi_end_p (gsi); gsi_next (&gsi))
> + {
> +   gimple stmt = gsi_stmt (gsi);
> +   if (!is_gimple_debug (stmt) && !gimple_clobber_p (stmt))
> + return false;
> + }
> +  return true;
> +}
>  
>/* Finally estimate N times, plus N gotos.  */
>f_estimate = count_insns_seq (finally, &eni_size_weights);
> --- gcc/tree-inline.c.jj  2011-12-14 08:11:03.0 +0100
> +++ gcc/tree-inline.c 2011-12-21 11:17:04.708413203 +0100
> @@ -3482,6 +3482,9 @@ estimate_num_insns (gimple stmt, eni_wei
>likely be a real store, so the cost of the GIMPLE_ASSIGN is the cost
>of moving something into "a", which we compute using the function
>estimate_move_cost.  */
> +  if (gimple_clobber_p (stmt))
> + return 0;   /* ={v} {CLOBBER} stmt expands to nothing.  */
> +
>lhs = gimple_assign_lhs (stmt);
>rhs = gimple_assign_rhs1 (stmt);
>  
> --- gcc/testsuite/gcc.dg/pr51644.c.jj 2011-12-21 12:24:22.185537200 +0100
> +++ gcc/testsuite/gcc.dg/pr51644.c2011-12-21 12:32:01.493946505 +0100
> @@ -0,0 +1,33 @@
> +/* PR middle-end/51644 */
> +/* { dg-do compile } */
> +/* { dg-options "-Wall -fexceptions" } */
> +
> +#include 
> +
> +extern void baz (int, va_list) __attribute__ ((__noreturn__));
> +
> +__attribute__ ((__noreturn__))
> +void
> +foo (int s, ...)
> +{
> +  va_list ap;
> +  va_start (ap, s);
> +  baz (s, ap);
> +  va_end (ap);
> +}/* { dg-bogus "function does return" } */
> +
> +__attribute__ ((__noreturn__))
> +void
> +bar (int s, ...)
> +{
> +  va_list ap1;
> +  va_start (ap1, s);
> +  {
> +va_list ap2;
> +va_start (ap2, s);
> +baz (s, ap1);
> +baz (s, ap2);
> +va_end (ap2);
> +  }
> +  va_end (ap1);
> +}/* { dg-bogus "function does return" } */
> --- gcc/testsuite/g++.dg/warn/Wreturn-4.C.jj  2011-12-21 12:33:33.328428381 
> +0100
> +++ gcc/testsuite/g++.dg/warn/Wreturn-4.C 2011-12-21 12:32:44.0 
> +0100
> @@ -0,0 +1,48 @@
> +// PR middle-end/51647
> +// { dg-do compile }
> +// { dg-options "-Wall" }
> +
> +enum PropertyAttributes { NONE = 1 };
> +enum PropertyType { NORMAL = 0, FIELD = 1 };
> +class LookupResult;
> +
> +template 
> +struct Handle
> +{
> +  inline explicit Handle (T *obj) __attribute__ ((always_inline)) {}
> +  inline T *operator-> () const __attribute__ ((always_inline)) { return 0; }
> +};
> +
> +struct JSObject
> +{
> +  bool IsGlobalObject () { return false; }
> +};
> +
> +struct Isolate
> +{
> +  LookupResult *top_lookup_result () { return 0; }
> +};
> +
> +struct LookupResult
> +{
> +  explicit LookupResult (Isolate *isolate) {}
> +  JSObject *holder () { return 0; }
> +  PropertyType type () { return NORMAL; }
> +};
> +
> +int
> +test (LookupResult *lookup)
> +{
> +  Handle  holder (lookup->holder ());
> +  switch (lookup->type ())
> +{
> +case NORMAL:
> +  if (holder->IsGlobalObject ())
> + return 2;
> +  else
> + return 3;
> +  break;
> +default:
> +  return 4;
> +}
> +}// { dg-bogus "control reaches end of non-void function" }
> 
>   Jakub
> 
> 

-- 
Richard Guenther 
SUSE / SUSE Labs
SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer

[PATCH] Fix make_relative_prefix_1 (PR driver/48306)

[Jakub Jelinek]

Hi!

As reported in the PR, when the gcc (or g++, ...) binary
is not started with full path and somewhere in $PATH earlier
then were gcc binary is is a directory with the same name (gcc, g++, ...),
then execvp will ignore it, but make_relative_prefix will think it
is the path to the driver and derive paths from that, thus likely won't be
able to find cc1 etc.

The following patch fixes it by skipping pathnames that aren't regular
files.  Unfortunately it adds an extra syscall for each path element
successfully statted.  For Linux we could perhaps do better, if
we
#ifdef __linux__
  ssize_t len = readlink ("/proc/self/exe", buf, sizeof buf);
  if (len > 0 && len < sizeof buf)
{
  buf[len] = '\0';
  /* Executable filename is in buf, goto somewhere and
 skip the $PATH loop.  */
}
#endif
but would need to do some portability hacks for that.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2011-12-21  Jakub Jelinek  

* make-relative-prefix.c (make_relative_prefix_1): Avoid
stack overflow if PATH contains just a single entry and
HOST_EXECUTABLE_SUFFIX needs to be used.

PR driver/48306
* make-relative-prefix.c: Include sys/stat.h.
(make_relative_prefix_1): If access succeeds, check also stat
if nstore is a regular file.

--- libiberty/make-relative-prefix.c.jj 2011-02-15 15:40:07.0 +0100
+++ libiberty/make-relative-prefix.c2011-12-19 20:47:02.613081452 +0100
@@ -1,6 +1,6 @@
 /* Relative (relocatable) prefix support.
Copyright (C) 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-   1999, 2000, 2001, 2002, 2006 Free Software Foundation, Inc.
+   1999, 2000, 2001, 2002, 2006, 2011 Free Software Foundation, Inc.
 
 This file is part of libiberty.
 
@@ -58,6 +58,9 @@ relative prefix can be found, return @co
 #ifdef HAVE_UNISTD_H
 #include 
 #endif
+#ifdef HAVE_SYS_STAT_H
+#include 
+#endif
 
 #include 
 
@@ -248,7 +251,11 @@ make_relative_prefix_1 (const char *prog
  if (prefixlen < 2)
prefixlen = 2;
 
- nstore = (char *) alloca (prefixlen + strlen (progname) + 1);
+ nstore = (char *) alloca (prefixlen + strlen (progname) + 1
+#ifdef HAVE_HOST_EXECUTABLE_SUFFIX
+   + strlen (HOST_EXECUTABLE_SUFFIX)
+#endif
+   );
 
  startp = endp = temp;
  while (1)
@@ -263,7 +270,7 @@ make_relative_prefix_1 (const char *prog
}
  else
{
- strncpy (nstore, startp, endp - startp);
+ memcpy (nstore, startp, endp - startp);
  if (! IS_DIR_SEPARATOR (endp[-1]))
{
  nstore[endp - startp] = DIR_SEPARATOR;
@@ -279,8 +286,14 @@ make_relative_prefix_1 (const char *prog
 #endif
  )
{
- progname = nstore;
- break;
+#if defined (HAVE_SYS_STAT_H) && defined (S_ISREG)
+ struct stat st;
+ if (stat (nstore, &st) >= 0 && S_ISREG (st.st_mode))
+#endif
+   {
+ progname = nstore;
+ break;
+   }
}
 
  if (*endp == 0)

Jakub

Re: [patch committed SH] Add atomic patterns

[Oleg Endo]

> > Ugh, I've read the middle end code wrongly.  Then we can remove
> > fetchop_insn which now becomes to be the same one with fetchop_name.
> > Could you propose the patch with that change and the backslash
> > changes rth suggested?  It's pre-approved with those changes.
> > 

Attached patch should do.

Cheers,
Oleg

2011-12-21  Oleg Endo  

* config/sh/sync.md: Add soft atomics ABI description.
(fetchop_name): Use 'or' instead of 'ior'.
(fetchop_insn): Remove.
(atomic_compare_and_swap_soft):
Don't insert aligning nop after the write-back instruction.  Fix
multi-line asm output formatting style.
(atomic_fetch__soft): Likewise.
(atomic_fetch_nand_soft): Likewise.
(atomic__fetch_soft): Likewise.
(atomic_nand_fetch_soft): Likewise.
Index: gcc/config/sh/sync.md
===
--- gcc/config/sh/sync.md	(revision 182531)
+++ gcc/config/sh/sync.md	(working copy)
@@ -17,6 +17,77 @@
 ;; You should have received a copy of the GNU General Public License
 ;; along with GCC; see the file COPYING3.  If not see
 ;; .
+;;
+;;
+;; Atomic integer operations for the Renesas / SuperH SH CPUs.
+;;
+;; On single-core systems there can only be one execution context running
+;; at a given point in time.  This allows the usage of rewindable atomic
+;; sequences, which effectively emulate locked-load / conditional-store
+;; operations.
+;; When an execution context is interrupted while it is an atomic
+;; sequence, the interrupted context's PC is rewound to the beginning of
+;; the atomic sequence by the interrupt / exception handling code, before
+;; transferring control to another execution context.  This is done by
+;; something like...
+;;
+;;	if (interrupted_context_in_atomic_sequence
+;;	&& interrupted_pc < atomic_exitpoint)
+;;	  interrupted_pc = atomic_entrypoint;
+;;
+;; This method is also known as gUSA ("g" User Space Atomicity) and the
+;; Linux kernel for SH3/SH4 implements support for such software
+;; atomic sequences.  However, it can also be implemented in freestanding
+;; environments.
+;;
+;; For this the following atomic sequence ABI is used.
+;;
+;; r15 >= 0:	Execution context is not in an atomic sequence.
+;;
+;; r15  < 0:	Execution context is in an atomic sequence and r15
+;;		holds the negative byte length of the atomic sequence.
+;;		In this case the following applies:
+;;
+;;		r0:	PC of the first instruction after the atomic
+;;			write-back instruction (exit point).
+;;			The entry point PC of the atomic sequence can be 
+;;			determined by doing r0 + r15.
+;;
+;;		r1:	Saved r15 stack pointer before entering the
+;;			atomic sequence.
+;;
+;; An example atomic add sequence would look like:
+;;
+;;	mova	.Lend,r0		! .Lend must be 4-byte aligned.
+;;	mov	r15,r1
+;;	.align 2			! Insert aligning nop if needed.
+;;	mov	#(.Lstart - .Lend),r15	! Enter atomic sequence
+;;.Lstart:
+;;	mov.l	@r4,r2			! read value
+;;	add	r2,r5			! modify value
+;;	mov.l	r5,@r4			! write-back
+;;.Lend:
+;;	mov	r1,r15			! Exit atomic sequence
+;;	! r2 holds the previous value.
+;;	! r5 holds the new value.
+;;
+;; Notice that due to the restrictions of the mova instruction, the .Lend
+;; label must always be 4-byte aligned.  Aligning the .Lend label would
+;; potentially insert a nop after the write-back instruction which could
+;; make the sequence to be rewound, although it has already passed the
+;; write-back instruction.  This would make it execute twice.
+;; For correct operation the atomic sequences must not be rewound after
+;; they have passed the write-back instruction.
+;;
+;; The current implementation is limited to QImode, HImode and SImode 
+;; atomic operations.  DImode operations could also be implemented but
+;; would require some ABI modifications to support multiple-instruction
+;; write-back.  This is because SH1/SH2/SH3/SH4 does not have a DImode
+;; store instruction.  DImode stores must be split into two SImode stores.
+;;
+;; For some operations it would be possible to use insns with an immediate
+;; operand such as add #imm,Rn.  However, since the original value before
+;; the operation also needs to be available, this is not so handy.
 
 (define_c_enum "unspec" [
   UNSPEC_ATOMIC
@@ -35,14 +106,8 @@
 
 (define_code_iterator FETCHOP [plus minus ior xor and])
 (define_code_attr fetchop_name
-  [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
-(define_code_attr fetchop_insn
   [(plus "add") (minus "sub") (ior "or") (xor "xor") (and "and")])
 
-;; Linux specific atomic patterns for the Renesas / SuperH SH CPUs.
-;; Linux kernel for SH3/4 has implemented the support for software
-;; atomic sequences.
-
 (define_expand "atomic_compare_and_swap"
   [(match_operand:QI 0 "register_operand" "")		;; bool success output
(match_operand:I124 1 "register_operand" "")		;; oldval output
@@ -85,20 +150,18 @@
(clobber (reg:SI R0_

Re: [RFC / Patch] PR 51305

[Jason Merrill]

If reordering works, let's just do that.

Jason

[Patch, libfortran] PR 51646 Use POSIX mode flags

[Janne Blomqvist]

Hi,

someone made some effort to build gfortran on an android phone (see
the PR). One problem was that libgfortran was using the old BSD
S_IREAD and S_IWRITE mode flags instead of the POSIX S_IRUSR and
S_IWUSR. The attached patch replaces the usage of these BSD flags with
the POSIX ones. I decided to omit any ifdef dance in case the target
doesn't support the POSIX flags, since it turns out that we have used
those unconditionally in io/unix.c going back at least to the 4.0
branch.

Ok for trunk?

2011-12-21  Janne Blomqvist  
Tobias Burnus  

PR libfortran/51646
* acinclude.m4 (LIBGFOR_CHECK_UNLINK_OPEN_FILE): Use POSIX mode
flags, omit mode argument when flags argument does not have
O_CREAT.
* io/unix.c (tempfile): Use POSIX mode flags.



-- 
Janne Blomqvist
Index: acinclude.m4
===
--- acinclude.m4	(revision 182581)
+++ acinclude.m4	(working copy)
@@ -119,7 +119,7 @@
 {
   int fd;
 
-  fd = open ("testfile", O_RDWR | O_CREAT, S_IWRITE | S_IREAD);
+  fd = open ("testfile", O_RDWR | O_CREAT, S_IWUSR | S_IRUSR);
   if (fd <= 0)
 return 0;
   if (unlink ("testfile") == -1)
@@ -127,7 +127,7 @@
   write (fd, "This is a test\n", 15);
   close (fd);
 
-  if (open ("testfile", O_RDONLY, S_IWRITE | S_IREAD) == -1 && errno == ENOENT)
+  if (open ("testfile", O_RDONLY) == -1 && errno == ENOENT)
 return 0;
   else
 return 1;
Index: io/unix.c
===
--- io/unix.c	(revision 182581)
+++ io/unix.c	(working copy)
@@ -1112,9 +1112,9 @@
 
 #if defined(HAVE_CRLF) && defined(O_BINARY)
   fd = open (template, O_RDWR | O_CREAT | O_EXCL | O_BINARY,
-		 S_IREAD | S_IWRITE);
+		 S_IRUSR | S_IWUSR);
 #else
-  fd = open (template, O_RDWR | O_CREAT | O_EXCL, S_IREAD | S_IWRITE);
+  fd = open (template, O_RDWR | O_CREAT | O_EXCL, S_IRUSR | S_IWUSR);
 #endif
 }
   while (fd == -1 && errno == EEXIST);

Re: [PATCH] Reorder AM_CXXFLAGS in libitm

[Richard Henderson]

On 12/21/2011 06:25 AM, Jakub Jelinek wrote:
> In my redhat/gcc-4_7-branch build with -fexceptions in XCFLAGS
> (comes from standard Fedora optimization flags) 

Really?  Out of curiousity, why?

>   * Makefile.am (AM_CXXFLAGS): Put $(XCFLAGS) first.
>   * Makefile.in: Regenerated.

Ok.


r~

Re: [RFC / Patch] PR 51305

[Paolo Carlini]

On 12/21/2011 04:44 PM, Jason Merrill wrote:

If reordering works, let's just do that.

Sure. Then I'm going to apply the below when re-testing completes. Thanks!

Paolo.

///
/cp
2011-12-21  Paolo Carlini  

PR c++/51305
* semantics.c (massage_constexpr_body): Reorder conditionals, make
sure a BIND_EXPR embedded in a MUST_NOT_THROW_EXPR is handled.

/testsuite
2011-12-21  Paolo Carlini  

PR c++/51305
* g++.dg/cpp0x/constexpr-noexcept6.C: New.
Index: testsuite/g++.dg/cpp0x/constexpr-noexcept6.C
===
--- testsuite/g++.dg/cpp0x/constexpr-noexcept6.C(revision 0)
+++ testsuite/g++.dg/cpp0x/constexpr-noexcept6.C(revision 0)
@@ -0,0 +1,10 @@
+// PR c++/51305
+// { dg-options -std=c++0x }
+
+constexpr bool ok() noexcept
+{
+  typedef int type;
+  return true;
+}
+
+constexpr auto x = ok();
Index: cp/semantics.c
===
--- cp/semantics.c  (revision 182590)
+++ cp/semantics.c  (working copy)
@@ -5998,12 +5998,12 @@ massage_constexpr_body (tree fun, tree body)
   (DECL_CONTEXT (fun), body);
   else
 {
-  if (TREE_CODE (body) == BIND_EXPR)
-   body = BIND_EXPR_BODY (body);
   if (TREE_CODE (body) == EH_SPEC_BLOCK)
 body = EH_SPEC_STMTS (body);
   if (TREE_CODE (body) == MUST_NOT_THROW_EXPR)
body = TREE_OPERAND (body, 0);
+  if (TREE_CODE (body) == BIND_EXPR)
+   body = BIND_EXPR_BODY (body);
   body = constexpr_fn_retval (body);
 }
   return body;

Re: [Patch]: ia64 - remove ia64_promote_function_mode

[Richard Henderson]

On 12/21/2011 02:29 AM, Tristan Gingold wrote:
>  #undef TARGET_PROMOTE_FUNCTION_MODE
> -#define TARGET_PROMOTE_FUNCTION_MODE ia64_promote_function_mode
> +#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode

Delete this entirely.


r~

Re: [PATCH] Reorder AM_CXXFLAGS in libitm

[Jakub Jelinek]

On Wed, Dec 21, 2011 at 08:00:08AM -0800, Richard Henderson wrote:
> On 12/21/2011 06:25 AM, Jakub Jelinek wrote:
> > In my redhat/gcc-4_7-branch build with -fexceptions in XCFLAGS
> > (comes from standard Fedora optimization flags) 
> 
> Really?  Out of curiousity, why?

Because for C it allows more efficient pthread_cleanup_push/pop
(using cleanup attribute).  For C code that doesn't use the cleanup
attribute it should otherwise not have any significant impact (and for C++
it is already a default anyway).

Jakub

Re: [Patch, libfortran] PR 51646 Use POSIX mode flags

[Tobias Burnus]

On 12/21/2011 04:59 PM, Janne Blomqvist wrote:

someone made some effort to build gfortran on an android phone (see
the PR). One problem was that libgfortran was using the old BSD
S_IREAD and S_IWRITE mode flags instead of the POSIX S_IRUSR and
S_IWUSR. The attached patch replaces the usage of these BSD flags with
the POSIX ones. I decided to omit any ifdef dance in case the target
doesn't support the POSIX flags, since it turns out that we have used
those unconditionally in io/unix.c going back at least to the 4.0
branch.

Ok for trunk?


OK. Thanks for the patch!

Tobias


2011-12-21  Janne Blomqvist
Tobias Burnus

PR libfortran/51646
* acinclude.m4 (LIBGFOR_CHECK_UNLINK_OPEN_FILE): Use POSIX mode
flags, omit mode argument when flags argument does not have
O_CREAT.
* io/unix.c (tempfile): Use POSIX mode flags.

Re: [PATCH] atomic test and set re-org.

[Richard Henderson]

On 12/21/2011 04:49 AM, Oleg Endo wrote:
> BTW, currently the only target utilizing the new atomic_test_and_set is
> SPARC.  However, as far as I've observed an expander like
> 
> (define_expand "atomic_test_and_set"

That's a mistake.  The mode is significant -- it's the mode of the memory.
I'm sorry I missed that when reviewing Andrew's patch.

I guess there's more that'll be needed to actually make the code work.


r~

Re: [PATCH, PR 51600] IPA-CP workaround for negative size cloning estimates

[Jan Hubicka]

> Hi,
> 
> given that we already have a workaround for zero size increase
> estimates from estimate_ipcp_clone_size_and_time, I see little reason
> not to extend it to negative values too, 0 is really just as bad as -2
> that we are getting in the testcase.  Hopefully this will allow peple
> who hit this bug proceed with their testing.
> 
> Bootstrapped and tested on x86-64-linux with no regressions.
> OK for trunk?

Hmm, so the size value is not negative because estimate_ipcp_clone_size_and_time
would return 0 or negative value but because of
  size -= stats.n_calls * removable_params_cost
(i.e. the callee function is so small that the program will really shrink 
because
of reduced call overhead)?

In that case I guess the patch is OK, but please update the comment,
in current form it realy is misleading - i.e. we do not estimate functions
to have size of 0.

Honza

RFA: backport fix for PR 48660 (assigning to BLKmode return regs)

[Richard Sandiford]

PR 48660 is about an ICE while trying to assign a value to a BLKmode
result register.  It's already fixed on trunk, but it's a regression
from 4.4 that has no workaround besides changing the source code,
so is it OK for 4.5 and 4.6 as well?  Tested on arm-linux-gnueabi
and x86_64-linux-gnu.

The original patch was:

   http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00558.html

I've attached the 4.6 version below.  As suggested in the message above,
I've avoided backporting the stmt.c part.  The 4.5 version is the same
except that there's no "false" argument to extract_bit_field.

Richard


gcc/
PR middle-end/48660
* expr.h (copy_blkmode_to_reg): Declare.
* expr.c (copy_blkmode_to_reg): New function.
(expand_assignment): Don't expand register RESULT_DECLs before
the lhs.  Use copy_blkmode_to_reg to copy BLKmode values into a
RESULT_DECL register.
(expand_expr_real_1): Handle BLKmode decls when looking for promotion.

gcc/testsuite/
PR middle-end/48660
* g++.dg/pr48660.C: New test.

Index: gcc/expr.h
===
--- gcc/expr.h  2011-03-15 09:21:15.0 +
+++ gcc/expr.h  2011-12-21 14:16:22.076042238 +
@@ -324,6 +324,8 @@ extern void emit_group_store (rtx, rtx, 
 /* Copy BLKmode object from a set of registers.  */
 extern rtx copy_blkmode_from_reg (rtx, rtx, tree);
 
+extern rtx copy_blkmode_to_reg (enum machine_mode, tree);
+
 /* Mark REG as holding a parameter for the next CALL_INSN.  */
 extern void use_reg (rtx *, rtx);
 
Index: gcc/expr.c
===
--- gcc/expr.c  2011-08-18 16:45:15.0 +0100
+++ gcc/expr.c  2011-12-21 14:18:27.566635910 +
@@ -2180,6 +2180,111 @@ copy_blkmode_from_reg (rtx tgtblk, rtx s
   return tgtblk;
 }
 
+/* Copy BLKmode value SRC into a register of mode MODE.  Return the
+   register if it contains any data, otherwise return null.
+
+   This is used on targets that return BLKmode values in registers.  */
+
+rtx
+copy_blkmode_to_reg (enum machine_mode mode, tree src)
+{
+  int i, n_regs;
+  unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
+  unsigned int bitsize;
+  rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
+  enum machine_mode dst_mode;
+
+  gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
+
+  x = expand_normal (src);
+
+  bytes = int_size_in_bytes (TREE_TYPE (src));
+  if (bytes == 0)
+return NULL_RTX;
+
+  /* If the structure doesn't take up a whole number of words, see
+ whether the register value should be padded on the left or on
+ the right.  Set PADDING_CORRECTION to the number of padding
+ bits needed on the left side.
+
+ In most ABIs, the structure will be returned at the least end of
+ the register, which translates to right padding on little-endian
+ targets and left padding on big-endian targets.  The opposite
+ holds if the structure is returned at the most significant
+ end of the register.  */
+  if (bytes % UNITS_PER_WORD != 0
+  && (targetm.calls.return_in_msb (TREE_TYPE (src))
+ ? !BYTES_BIG_ENDIAN
+ : BYTES_BIG_ENDIAN))
+padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
+  * BITS_PER_UNIT));
+
+  n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+  dst_words = XALLOCAVEC (rtx, n_regs);
+  bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
+
+  /* Copy the structure BITSIZE bits at a time.  */
+  for (bitpos = 0, xbitpos = padding_correction;
+   bitpos < bytes * BITS_PER_UNIT;
+   bitpos += bitsize, xbitpos += bitsize)
+{
+  /* We need a new destination pseudo each time xbitpos is
+on a word boundary and when xbitpos == padding_correction
+(the first time through).  */
+  if (xbitpos % BITS_PER_WORD == 0
+ || xbitpos == padding_correction)
+   {
+ /* Generate an appropriate register.  */
+ dst_word = gen_reg_rtx (word_mode);
+ dst_words[xbitpos / BITS_PER_WORD] = dst_word;
+
+ /* Clear the destination before we move anything into it.  */
+ emit_move_insn (dst_word, CONST0_RTX (word_mode));
+   }
+
+  /* We need a new source operand each time bitpos is on a word
+boundary.  */
+  if (bitpos % BITS_PER_WORD == 0)
+   src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
+
+  /* Use bitpos for the source extraction (left justified) and
+xbitpos for the destination store (right justified).  */
+  store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, word_mode,
+  extract_bit_field (src_word, bitsize,
+ bitpos % BITS_PER_WORD, 1, false,
+ NULL_RTX, word_mode, word_mode));
+}
+
+  if (mode == BLKmode)
+{
+  /* Find the smallest

[PATCH v3 00/10] MIPS vectorization improvements

[Richard Henderson]

The second patch you've seen before, updated with your comments.

The rest came from trying to reduce the number of tests failing
to be vectorized when compiling for Loongson.  Eventually I just
had to stop though; the result is still quite a few pattern match
tests fail, but at least there are no execution failures w/ my
version of QEMU hacked up to support Loongson.

Someone with more time will need to examine the failing pattern
matches and determine what's missing causing the vectorization 
to fail.  Then either add the missing rtl patterns or adjust the
testsuite appropriately.

Certainly the result, post elimination of VEC_INTERLEAVE_*_EXPR,
will be a strict improvement.


r~


Richard Henderson (10):
  mips: Allow mode changes between integrals in FP registers.
  mips: Implement vec_perm_const.
  mips: Implement logical operations on vectors for Loongson.
  mips: Support even-odd permutation for Loongson V8QImode.
  mips: Support vec_unpack[su] for Loongson.
  mips: Improve support for vec_init.
  mips: Fix some insn types for Loongson.
  mips: Add sdot_prodv4hi for Loongson.
  mips: Add reduction support for Loongson.
  mips: Add reduction patterns for paired-single

 gcc/config/mips/loongson.h |4 +-
 gcc/config/mips/loongson.md|  570 ++-
 gcc/config/mips/mips-modes.def |   12 +-
 gcc/config/mips/mips-protos.h  |5 +
 gcc/config/mips/mips-ps-3d.md  |  265 -
 gcc/config/mips/mips.c |  646 +--
 gcc/config/mips/predicates.md  |   11 +-
 7 files changed, 1324 insertions(+), 189 deletions(-)

-- 
1.7.7.4

[PATCH 01/10] mips: Allow mode changes between integrals in FP registers.

[Richard Henderson]

We ask for subregs of vectors all of the time, punning them between
different vector modes.  The test below allows punning between DI,
V8QI, V4HI, and V2SI modes.  Without this we get oodles of dummy
copies to and from the general register set for each mode change.


---
 gcc/config/mips/mips.c |   11 +--
 1 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 3866c46..84d4f8b 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -10782,8 +10782,8 @@ mips_class_max_nregs (enum reg_class rclass, enum 
machine_mode mode)
 /* Implement CANNOT_CHANGE_MODE_CLASS.  */
 
 bool
-mips_cannot_change_mode_class (enum machine_mode from ATTRIBUTE_UNUSED,
-  enum machine_mode to ATTRIBUTE_UNUSED,
+mips_cannot_change_mode_class (enum machine_mode from,
+  enum machine_mode to,
   enum reg_class rclass)
 {
   /* There are several problems with changing the modes of values in
@@ -10808,6 +10808,13 @@ mips_cannot_change_mode_class (enum machine_mode from 
ATTRIBUTE_UNUSED,
format.
 
  We therefore disallow all mode changes involving FPRs.  */
+
+  /* Except for Loongson and its integral vectors.  We need to be able
+ to change between those modes easily.  */
+  if (GET_MODE_SIZE (from) == 8 && GET_MODE_SIZE (to) == 8
+  && INTEGRAL_MODE_P (from) && INTEGRAL_MODE_P (to))
+return false;
+
   return reg_classes_intersect_p (FP_REGS, rclass);
 }
 
-- 
1.7.7.4

[PATCH 03/10] mips: Implement logical operations on vectors for Loongson.

[Richard Henderson]

---
 gcc/config/mips/loongson.md |   45 +++
 1 files changed, 45 insertions(+), 0 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 1b1fe0b..325838d 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -197,6 +197,51 @@
   "pandn\t%0,%1,%2"
   [(set_attr "type" "fmul")])
 
+;; Logical AND.
+(define_insn "and3"
+  [(set (match_operand:VWHB 0 "register_operand" "=f")
+   (and:VWHB (match_operand:VWHB 1 "register_operand" "f")
+ (match_operand:VWHB 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "and\t%0,%1,%2"
+  [(set_attr "type" "fmul")])
+
+;; Logical OR.
+(define_insn "ior3"
+  [(set (match_operand:VWHB 0 "register_operand" "=f")
+   (ior:VWHB (match_operand:VWHB 1 "register_operand" "f")
+ (match_operand:VWHB 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "or\t%0,%1,%2"
+  [(set_attr "type" "fmul")])
+
+;; Logical XOR.
+(define_insn "xor3"
+  [(set (match_operand:VWHB 0 "register_operand" "=f")
+   (xor:VWHB (match_operand:VWHB 1 "register_operand" "f")
+ (match_operand:VWHB 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "xor\t%0,%1,%2"
+  [(set_attr "type" "fmul")])
+
+;; Logical NOR.
+(define_insn "*loongson_nor"
+  [(set (match_operand:VWHB 0 "register_operand" "=f")
+   (and:VWHB
+ (not:VWHB (match_operand:VWHB 1 "register_operand" "f"))
+ (not:VWHB (match_operand:VWHB 2 "register_operand" "f"]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "nor\t%0,%1,%2"
+  [(set_attr "type" "fmul")])
+
+;; Logical NOT.
+(define_insn "one_cmpl2"
+  [(set (match_operand:VWHB 0 "register_operand" "=f")
+   (not:VWHB (match_operand:VWHB 1 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "nor\t%0,%1,%1"
+  [(set_attr "type" "fmul")])
+
 ;; Average.
 (define_insn "loongson_pavg"
   [(set (match_operand:VHB 0 "register_operand" "=f")
-- 
1.7.7.4

[PATCH 02/10] mips: Implement vec_perm_const.

[Richard Henderson]

---
 gcc/config/mips/loongson.h |4 +-
 gcc/config/mips/loongson.md|  200 ++-
 gcc/config/mips/mips-modes.def |   12 ++-
 gcc/config/mips/mips-protos.h  |1 +
 gcc/config/mips/mips-ps-3d.md  |  225 +--
 gcc/config/mips/mips.c |  228 ++--
 gcc/config/mips/predicates.md  |   11 ++-
 7 files changed, 557 insertions(+), 124 deletions(-)

diff --git a/gcc/config/mips/loongson.h b/gcc/config/mips/loongson.h
index 6bfd4d7..fcaf553 100644
--- a/gcc/config/mips/loongson.h
+++ b/gcc/config/mips/loongson.h
@@ -449,13 +449,13 @@ psadbh (uint8x8_t s, uint8x8_t t)
 __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
 pshufh_u (uint16x4_t dest, uint16x4_t s, uint8_t order)
 {
-  return __builtin_loongson_pshufh_u (dest, s, order);
+  return __builtin_loongson_pshufh_u (s, order);
 }
 
 __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
 pshufh_s (int16x4_t dest, int16x4_t s, uint8_t order)
 {
-  return __builtin_loongson_pshufh_s (dest, s, order);
+  return __builtin_loongson_pshufh_s (s, order);
 }
 
 /* Shift left logical.  */
diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 225f4d1..1b1fe0b 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -24,10 +24,7 @@
   UNSPEC_LOONGSON_PCMPEQ
   UNSPEC_LOONGSON_PCMPGT
   UNSPEC_LOONGSON_PEXTR
-  UNSPEC_LOONGSON_PINSR_0
-  UNSPEC_LOONGSON_PINSR_1
-  UNSPEC_LOONGSON_PINSR_2
-  UNSPEC_LOONGSON_PINSR_3
+  UNSPEC_LOONGSON_PINSRH
   UNSPEC_LOONGSON_PMADD
   UNSPEC_LOONGSON_PMOVMSK
   UNSPEC_LOONGSON_PMULHU
@@ -231,52 +228,87 @@
   [(set_attr "type" "fadd")])
 
 ;; Extract halfword.
-(define_insn "loongson_pextr"
-  [(set (match_operand:VH 0 "register_operand" "=f")
-(unspec:VH [(match_operand:VH 1 "register_operand" "f")
-   (match_operand:SI 2 "register_operand" "f")]
+(define_insn "loongson_pextrh"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+(unspec:V4HI [(match_operand:V4HI 1 "register_operand" "f")
+ (match_operand:SI 2 "register_operand" "f")]
   UNSPEC_LOONGSON_PEXTR))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pextr\t%0,%1,%2"
+  "pextrh\t%0,%1,%2"
   [(set_attr "type" "fmul")])
 
 ;; Insert halfword.
-(define_insn "loongson_pinsr_0"
-  [(set (match_operand:VH 0 "register_operand" "=f")
-(unspec:VH [(match_operand:VH 1 "register_operand" "f")
-   (match_operand:VH 2 "register_operand" "f")]
-  UNSPEC_LOONGSON_PINSR_0))]
+(define_insn "loongson_pinsrh_0"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+   (vec_select:V4HI
+ (vec_concat:V8HI
+   (match_operand:V4HI 1 "register_operand" "f")
+   (match_operand:V4HI 2 "register_operand" "f"))
+ (parallel [(const_int 4) (const_int 1)
+(const_int 2) (const_int 3)])))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "pinsrh_0\t%0,%1,%2"
+  [(set_attr "type" "fdiv")])
+
+(define_insn "loongson_pinsrh_1"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+   (vec_select:V4HI
+ (vec_concat:V8HI
+   (match_operand:V4HI 1 "register_operand" "f")
+   (match_operand:V4HI 2 "register_operand" "f"))
+ (parallel [(const_int 0) (const_int 4)
+(const_int 2) (const_int 3)])))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pinsr_0\t%0,%1,%2"
+  "pinsrh_1\t%0,%1,%2"
   [(set_attr "type" "fdiv")])
 
-(define_insn "loongson_pinsr_1"
-  [(set (match_operand:VH 0 "register_operand" "=f")
-(unspec:VH [(match_operand:VH 1 "register_operand" "f")
-   (match_operand:VH 2 "register_operand" "f")]
-  UNSPEC_LOONGSON_PINSR_1))]
+(define_insn "loongson_pinsrh_2"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+   (vec_select:V4HI
+ (vec_concat:V8HI
+   (match_operand:V4HI 1 "register_operand" "f")
+   (match_operand:V4HI 2 "register_operand" "f"))
+ (parallel [(const_int 0) (const_int 1)
+(const_int 4) (const_int 3)])))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pinsr_1\t%0,%1,%2"
+  "pinsrh_2\t%0,%1,%2"
   [(set_attr "type" "fdiv")])
 
-(define_insn "loongson_pinsr_2"
-  [(set (match_operand:VH 0 "register_operand" "=f")
-(unspec:VH [(match_operand:VH 1 "register_operand" "f")
-   (match_operand:VH 2 "register_operand" "f")]
-  UNSPEC_LOONGSON_PINSR_2))]
+(define_insn "loongson_pinsrh_3"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+   (vec_select:V4HI
+ (vec_concat:V8HI
+   (match_operand:V4HI 1 "register_operand" "f")
+   (match_operand:V4HI 2 "register_operand" "f"))
+ (parallel [(const_int 0) (const_int 1)
+(const_int 2) (const_int 4)])))]
   "T

[PATCH 04/10] mips: Support even-odd permutation for Loongson V8QImode.

[Richard Henderson]

---
 gcc/config/mips/mips.c |   59 
 1 files changed, 59 insertions(+), 0 deletions(-)

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index a1f06d4..0ac1096 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -16391,6 +16391,63 @@ expand_vselect_vconcat (rtx target, rtx op0, rtx op1,
   return expand_vselect (target, x, perm, nelt);
 }
 
+/* Recognize patterns for even-odd extraction.  */
+
+static bool
+mips_expand_vpc_loongson_even_odd (struct expand_vec_perm_d *d)
+{
+  unsigned i, odd, nelt = d->nelt;
+  rtx t0, t1, t2, t3;
+
+  if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS))
+return false;
+  /* Even-odd for V2SI/V2SFmode is matched by interleave directly.  */
+  if (nelt < 4)
+return false;
+
+  odd = d->perm[0];
+  if (odd > 1)
+return false;
+  for (i = 1; i < nelt; ++i)
+if (d->perm[i] != i * 2 + odd)
+  return false;
+
+  if (d->testing_p)
+return true;
+
+  /* We need 2*log2(N)-1 operations to achieve odd/even with interleave. */
+  t0 = gen_reg_rtx (d->vmode);
+  t1 = gen_reg_rtx (d->vmode);
+  switch (d->vmode)
+{
+case V4HImode:
+  emit_insn (gen_loongson_punpckhhw (t0, d->op0, d->op1));
+  emit_insn (gen_loongson_punpcklhw (t1, d->op0, d->op1));
+  if (odd)
+   emit_insn (gen_loongson_punpckhhw (d->target, t1, t0));
+  else
+   emit_insn (gen_loongson_punpcklhw (d->target, t1, t0));
+  break;
+
+case V8QImode:
+  t2 = gen_reg_rtx (d->vmode);
+  t3 = gen_reg_rtx (d->vmode);
+  emit_insn (gen_loongson_punpckhbh (t0, d->op0, d->op1));
+  emit_insn (gen_loongson_punpcklbh (t1, d->op0, d->op1));
+  emit_insn (gen_loongson_punpckhbh (t2, t1, t0));
+  emit_insn (gen_loongson_punpcklbh (t3, t1, t0));
+  if (odd)
+   emit_insn (gen_loongson_punpckhbh (d->target, t3, t2));
+  else
+   emit_insn (gen_loongson_punpcklbh (d->target, t3, t2));
+  break;
+
+default:
+  gcc_unreachable ();
+}
+  return true;
+}
+
 /* Recognize patterns for the Loongson PSHUFH instruction.  */
 
 static bool
@@ -16445,6 +16502,8 @@ mips_expand_vec_perm_const_1 (struct expand_vec_perm_d 
*d)
return true;
 }
 
+  if (mips_expand_vpc_loongson_even_odd (d))
+return true;
   if (mips_expand_vpc_loongson_pshufh (d))
 return true;
   return false;
-- 
1.7.7.4

[PATCH 10/10] mips: Add reduction patterns for paired-single

[Richard Henderson]

---
 gcc/config/mips/mips-ps-3d.md |   26 ++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md
index 7c3fe85..cc8a4c0 100644
--- a/gcc/config/mips/mips-ps-3d.md
+++ b/gcc/config/mips/mips-ps-3d.md
@@ -371,6 +371,14 @@
   [(set_attr "type" "fadd")
(set_attr "mode" "SF")])
 
+(define_insn "reduc_splus_v2sf"
+  [(set (match_operand:V2SF 0 "register_operand" "=f")
+   (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")
+ (match_dup 1)]
+UNSPEC_ADDR_PS))]
+  "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
+  "")
+
 ; cvt.pw.ps - Floating Point Convert Paired Single to Paired Word
 (define_insn "mips_cvt_pw_ps"
   [(set (match_operand:V2SF 0 "register_operand" "=f")
@@ -736,3 +744,21 @@
 LE, operands[2], operands[1]);
   DONE;
 })
+
+(define_expand "reduc_smin_v2sf"
+  [(match_operand:V2SF 0 "register_operand")
+   (match_operand:V2SF 1 "register_operand")]
+  "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
+{
+  mips_expand_vec_reduc (operands[0], operands[1], gen_sminv2sf3);
+  DONE;
+})
+
+(define_expand "reduc_smax_v2sf"
+  [(match_operand:V2SF 0 "register_operand")
+   (match_operand:V2SF 1 "register_operand")]
+  "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
+{
+  mips_expand_vec_reduc (operands[0], operands[1], gen_smaxv2sf3);
+  DONE;
+})
-- 
1.7.7.4

[PATCH 08/10] mips: Add sdot_prodv4hi for Loongson.

[Richard Henderson]

---
 gcc/config/mips/loongson.md |   25 +++--
 1 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 8743984..e9fa616 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -381,15 +381,28 @@
 })
 
 ;; Multiply and add packed integers.
-(define_insn "loongson_pmadd"
-  [(set (match_operand: 0 "register_operand" "=f")
-(unspec: [(match_operand:VH 1 "register_operand" "f")
- (match_operand:VH 2 "register_operand" "f")]
-UNSPEC_LOONGSON_PMADD))]
+(define_insn "loongson_pmaddhw"
+  [(set (match_operand:V2SI 0 "register_operand" "=f")
+(unspec:V2SI [(match_operand:V4HI 1 "register_operand" "f")
+ (match_operand:V4HI 2 "register_operand" "f")]
+UNSPEC_LOONGSON_PMADD))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pmadd\t%0,%1,%2"
+  "pmaddhw\t%0,%1,%2"
   [(set_attr "type" "fmul")])
 
+(define_expand "sdot_prodv4hi"
+  [(match_operand:V2SI 0 "register_operand" "")
+   (match_operand:V4HI 1 "register_operand" "")
+   (match_operand:V4HI 2 "register_operand" "")
+   (match_operand:V2SI 3 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  rtx t = gen_reg_rtx (V2SImode);
+  emit_insn (gen_loongson_pmaddhw (t, operands[1], operands[2]));
+  emit_insn (gen_addv2si3 (operands[0], t, operands[3]));
+  DONE;
+})
+
 ;; Maximum of signed halfwords.
 (define_insn "smax3"
   [(set (match_operand:VH 0 "register_operand" "=f")
-- 
1.7.7.4

[PATCH 07/10] mips: Fix some insn types for Loongson.

[Richard Henderson]

Tables 63 and 64 show the multimedia insn and the fpu insn on which
it is mapped.  The last bullet of 12.1 explicitly says that this is
meaningful for looking up the latency in Table 61.
---
 gcc/config/mips/loongson.md |   16 
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index c80a45a..8743984 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -143,7 +143,7 @@
  (match_operand:SI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "punpcklwd\t%0,%1,%2"
-  [(set_attr "type" "fdiv")])
+  [(set_attr "type" "fcvt")])
 
 ;; Instruction patterns for SIMD instructions.
 
@@ -239,7 +239,7 @@
  (match_operand:VWHB 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "or\t%0,%1,%2"
-  [(set_attr "type" "fmul")])
+  [(set_attr "type" "fcvt")])
 
 ;; Logical XOR.
 (define_insn "xor3"
@@ -306,7 +306,7 @@
   UNSPEC_LOONGSON_PEXTR))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "pextrh\t%0,%1,%2"
-  [(set_attr "type" "fmul")])
+  [(set_attr "type" "fcvt")])
 
 ;; Insert halfword.
 (define_insn "loongson_pinsrh_0"
@@ -520,7 +520,7 @@
(match_operand:SI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "psll\t%0,%1,%2"
-  [(set_attr "type" "fmul")])
+  [(set_attr "type" "fcvt")])
 
 ;; Shift right arithmetic.
 (define_insn "ashr3"
@@ -529,7 +529,7 @@
  (match_operand:SI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "psra\t%0,%1,%2"
-  [(set_attr "type" "fdiv")])
+  [(set_attr "type" "fcvt")])
 
 ;; Shift right logical.
 (define_insn "lshr3"
@@ -538,7 +538,7 @@
  (match_operand:SI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "psrl\t%0,%1,%2"
-  [(set_attr "type" "fdiv")])
+  [(set_attr "type" "fcvt")])
 
 ;; Subtraction, treating overflow by wraparound.
 (define_insn "sub3"
@@ -616,7 +616,7 @@
  (parallel [(const_int 1) (const_int 3)])))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "punpckhwd\t%0,%1,%2"
-  [(set_attr "type" "fdiv")])
+  [(set_attr "type" "fcvt")])
 
 ;; Unpack low data.
 (define_insn "loongson_punpcklbh"
@@ -654,7 +654,7 @@
  (parallel [(const_int 0) (const_int 2)])))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "punpcklwd\t%0,%1,%2"
-  [(set_attr "type" "fdiv")])
+  [(set_attr "type" "fcvt")])
 
 (define_expand "vec_perm_const"
   [(match_operand:VWHB 0 "register_operand" "")
-- 
1.7.7.4

[PATCH 05/10] mips: Support vec_unpack[su] for Loongson.

[Richard Henderson]

---
 gcc/config/mips/loongson.md   |   36 
 gcc/config/mips/mips-protos.h |1 +
 gcc/config/mips/mips.c|   45 +
 3 files changed, 82 insertions(+), 0 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 325838d..8404bf0 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -643,6 +643,42 @@
 FAIL;
 })
 
+(define_expand "vec_unpacks_lo_"
+  [(match_operand: 0 "register_operand" "")
+   (match_operand:VHB 1 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  mips_expand_vec_unpack (operands, false, false);
+  DONE;
+})
+
+(define_expand "vec_unpacks_hi_"
+  [(match_operand: 0 "register_operand" "")
+   (match_operand:VHB 1 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  mips_expand_vec_unpack (operands, false, true);
+  DONE;
+})
+
+(define_expand "vec_unpacku_lo_"
+  [(match_operand: 0 "register_operand" "")
+   (match_operand:VHB 1 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  mips_expand_vec_unpack (operands, true, false);
+  DONE;
+})
+
+(define_expand "vec_unpacku_hi_"
+  [(match_operand: 0 "register_operand" "")
+   (match_operand:VHB 1 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  mips_expand_vec_unpack (operands, true, true);
+  DONE;
+})
+
 ;; Integer division and modulus.  For integer multiplication, see mips.md.
 
 (define_insn "div3"
diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
index 37c958d..82c8c33 100644
--- a/gcc/config/mips/mips-protos.h
+++ b/gcc/config/mips/mips-protos.h
@@ -329,6 +329,7 @@ extern void mips_expand_atomic_qihi (union mips_gen_fn_ptrs,
 
 extern void mips_expand_vector_init (rtx, rtx);
 extern bool mips_expand_vec_perm_const (rtx op[4]);
+extern void mips_expand_vec_unpack (rtx op[2], bool, bool);
 
 extern bool mips_eh_uses (unsigned int);
 extern bool mips_epilogue_uses (unsigned int);
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 0ac1096..b3a3ad0 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -16611,6 +16611,51 @@ mips_vectorize_vec_perm_const_ok (enum machine_mode 
vmode,
 
   return ret;
 }
+
+/* Expand an integral vector unpack operation.  */
+
+void
+mips_expand_vec_unpack (rtx operands[2], bool unsigned_p, bool high_p)
+{
+  enum machine_mode imode = GET_MODE (operands[1]);
+  rtx (*unpack) (rtx, rtx, rtx);
+  rtx (*cmpgt) (rtx, rtx, rtx);
+  rtx tmp, dest, zero;
+
+  switch (imode)
+{
+case V8QImode:
+  if (high_p)
+   unpack = gen_loongson_punpckhbh;
+  else
+   unpack = gen_loongson_punpcklbh;
+  cmpgt = gen_loongson_pcmpgtb;
+  break;
+case V4HImode:
+  if (high_p)
+   unpack = gen_loongson_punpckhhw;
+  else
+   unpack = gen_loongson_punpcklhw;
+  cmpgt = gen_loongson_pcmpgth;
+  break;
+default:
+  gcc_unreachable ();
+}
+
+  zero = force_reg (imode, CONST0_RTX (imode));
+  if (unsigned_p)
+tmp = zero;
+  else
+{
+  tmp = gen_reg_rtx (imode);
+  emit_insn (cmpgt (tmp, zero, operands[1]));
+}
+
+  dest = gen_reg_rtx (imode);
+  emit_insn (unpack (dest, operands[1], tmp));
+
+  emit_move_insn (operands[0], gen_lowpart (GET_MODE (operands[0]), dest));
+}
 
 /* Initialize the GCC target structure.  */
 #undef TARGET_ASM_ALIGNED_HI_OP
-- 
1.7.7.4

[PATCH 09/10] mips: Add reduction support for Loongson.

[Richard Henderson]

Both plus and min/max.
---
 gcc/config/mips/loongson.md   |  230 +
 gcc/config/mips/mips-protos.h |3 +
 gcc/config/mips/mips.c|   77 ++
 3 files changed, 290 insertions(+), 20 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index e9fa616..4f9cc73 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -39,6 +39,8 @@
   UNSPEC_LOONGSON_PUNPCKL
   UNSPEC_LOONGSON_PADDD
   UNSPEC_LOONGSON_PSUBD
+  UNSPEC_LOONGSON_DSLL
+  UNSPEC_LOONGSON_DSRL
 ])
 
 ;; Mode iterators and attributes.
@@ -58,6 +60,9 @@
 ;; 64-bit vectors of words and halfwords.
 (define_mode_iterator VWH [V2SI V4HI])
 
+;; 64-bit vectors of words and bytes
+(define_mode_iterator VWB [V2SI V8QI])
+
 ;; 64-bit vectors of words, halfwords and bytes.
 (define_mode_iterator VWHB [V2SI V4HI V8QI])
 
@@ -404,39 +409,61 @@
 })
 
 ;; Maximum of signed halfwords.
-(define_insn "smax3"
-  [(set (match_operand:VH 0 "register_operand" "=f")
-(smax:VH (match_operand:VH 1 "register_operand" "f")
-(match_operand:VH 2 "register_operand" "f")))]
+(define_insn "smaxv4hi3"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+(smax:V4HI (match_operand:V4HI 1 "register_operand" "f")
+  (match_operand:V4HI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pmaxs\t%0,%1,%2"
+  "pmaxsh\t%0,%1,%2"
   [(set_attr "type" "fadd")])
 
+(define_expand "smax3"
+  [(match_operand:VWB 0 "register_operand" "")
+   (match_operand:VWB 1 "register_operand" "")
+   (match_operand:VWB 2 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  mips_expand_vec_minmax (operands[0], operands[1], operands[2],
+ gen_loongson_pcmpgt, false);
+  DONE;
+})
+
 ;; Maximum of unsigned bytes.
-(define_insn "umax3"
-  [(set (match_operand:VB 0 "register_operand" "=f")
-(umax:VB (match_operand:VB 1 "register_operand" "f")
-(match_operand:VB 2 "register_operand" "f")))]
+(define_insn "umaxv8qi3"
+  [(set (match_operand:V8QI 0 "register_operand" "=f")
+(umax:V8QI (match_operand:V8QI 1 "register_operand" "f")
+  (match_operand:V8QI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pmaxu\t%0,%1,%2"
+  "pmaxub\t%0,%1,%2"
   [(set_attr "type" "fadd")])
 
 ;; Minimum of signed halfwords.
-(define_insn "smin3"
-  [(set (match_operand:VH 0 "register_operand" "=f")
-(smin:VH (match_operand:VH 1 "register_operand" "f")
-(match_operand:VH 2 "register_operand" "f")))]
+(define_insn "sminv4hi3"
+  [(set (match_operand:V4HI 0 "register_operand" "=f")
+(smin:V4HI (match_operand:V4HI 1 "register_operand" "f")
+  (match_operand:V4HI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pmins\t%0,%1,%2"
+  "pminsh\t%0,%1,%2"
   [(set_attr "type" "fadd")])
 
+(define_expand "smin3"
+  [(match_operand:VWB 0 "register_operand" "")
+   (match_operand:VWB 1 "register_operand" "")
+   (match_operand:VWB 2 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  mips_expand_vec_minmax (operands[0], operands[1], operands[2],
+ gen_loongson_pcmpgt, true);
+  DONE;
+})
+
 ;; Minimum of unsigned bytes.
-(define_insn "umin3"
-  [(set (match_operand:VB 0 "register_operand" "=f")
-(umin:VB (match_operand:VB 1 "register_operand" "f")
-(match_operand:VB 2 "register_operand" "f")))]
+(define_insn "uminv8qi3"
+  [(set (match_operand:V8QI 0 "register_operand" "=f")
+(umin:V8QI (match_operand:V8QI 1 "register_operand" "f")
+  (match_operand:V8QI 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pminu\t%0,%1,%2"
+  "pminub\t%0,%1,%2"
   [(set_attr "type" "fadd")])
 
 ;; Move byte mask.
@@ -506,6 +533,14 @@
   "biadd\t%0,%1"
   [(set_attr "type" "fabs")])
 
+(define_insn "reduc_uplus_v8qi"
+  [(set (match_operand:V8QI 0 "register_operand" "=f")
+   (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "f")]
+UNSPEC_LOONGSON_BIADD))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "biadd\t%0,%1"
+  [(set_attr "type" "fabs")])
+
 ;; Sum of absolute differences.
 (define_insn "loongson_psadbh"
   [(set (match_operand: 0 "register_operand" "=f")
@@ -620,6 +655,20 @@
   "punpckhhw\t%0,%1,%2"
   [(set_attr "type" "fdiv")])
 
+(define_insn "loongson_punpckhhw_qi"
+  [(set (match_operand:V8QI 0 "register_operand" "=f")
+   (vec_select:V8QI
+ (vec_concat:V16QI
+   (match_operand:V8QI 1 "register_operand" "f")
+   (match_operand:V8QI 2 "register_operand" "f"))
+ (parallel [(const_int 4)  (const_int 5)
+(const_int 12) (const_int 13)
+(const_int 6)  (const_int 7)
+(const_int 14) (const_int 15)])))]

[PATCH 06/10] mips: Improve support for vec_init.

[Richard Henderson]

---
 gcc/config/mips/loongson.md   |   26 +
 gcc/config/mips/mips-ps-3d.md |   14 +--
 gcc/config/mips/mips.c|  226 -
 3 files changed, 233 insertions(+), 33 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 8404bf0..c80a45a 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -25,6 +25,7 @@
   UNSPEC_LOONGSON_PCMPGT
   UNSPEC_LOONGSON_PEXTR
   UNSPEC_LOONGSON_PINSRH
+  UNSPEC_LOONGSON_VINIT
   UNSPEC_LOONGSON_PMADD
   UNSPEC_LOONGSON_PMOVMSK
   UNSPEC_LOONGSON_PMULHU
@@ -83,6 +84,9 @@
 ;; but with twice as many elements.
 (define_mode_attr V_squash_double [(V2SI "V4HI") (V4HI "V8QI")])
 
+;; Given a vector type T, the inner mode.
+(define_mode_attr V_inner [(V8QI "QI") (V4HI "HI") (V2SI "SI")])
+
 ;; The Loongson instruction suffixes corresponding to the conversions
 ;; specified by V_half_width.
 (define_mode_attr V_squash_double_suffix [(V2SI "wh") (V4HI "hb")])
@@ -119,6 +123,28 @@
   DONE;
 })
 
+;; Helper for vec_init.  Initialize element 0 of the output from the input.
+;; All other elements are undefined.
+(define_insn "loongson_vec_init1_"
+  [(set (match_operand:VHB 0 "register_operand" "=f")
+   (unspec:VHB [(truncate:
+  (match_operand:DI 1 "reg_or_0_operand" "Jd"))]
+   UNSPEC_LOONGSON_VINIT))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "dmtc1\t%z1,%0"
+  [(set_attr "move_type" "mtc")
+   (set_attr "mode" "DI")])
+
+;; Helper for vec_initv2si.
+(define_insn "*vec_concatv2si"
+  [(set (match_operand:V2SI 0 "register_operand" "=f")
+   (vec_concat:V2SI
+ (match_operand:SI 1 "register_operand" "f")
+ (match_operand:SI 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+  "punpcklwd\t%0,%1,%2"
+  [(set_attr "type" "fdiv")])
+
 ;; Instruction patterns for SIMD instructions.
 
 ;; Pack with signed saturation.
diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md
index fbbb7b0..7c3fe85 100644
--- a/gcc/config/mips/mips-ps-3d.md
+++ b/gcc/config/mips/mips-ps-3d.md
@@ -259,13 +259,11 @@
(match_operand:V2SF 1 "")]
   "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
 {
-  rtx op0 = force_reg (SFmode, XVECEXP (operands[1], 0, 0));
-  rtx op1 = force_reg (SFmode, XVECEXP (operands[1], 0, 1));
-  emit_insn (gen_vec_initv2sf_internal (operands[0], op0, op1));
+  mips_expand_vector_init (operands[0], operands[1]);
   DONE;
 })
 
-(define_insn "vec_initv2sf_internal"
+(define_insn "vec_concatv2sf"
   [(set (match_operand:V2SF 0 "register_operand" "=f")
(vec_concat:V2SF
 (match_operand:SF 1 "register_operand" "f")
@@ -315,7 +313,7 @@
   /* We don't have an insert instruction, so we duplicate the float, and
  then use a PUL instruction.  */
   rtx temp = gen_reg_rtx (V2SFmode);
-  emit_insn (gen_mips_cvt_ps_s (temp, operands[1], operands[1]));
+  emit_insn (gen_vec_concatv2sf (temp, operands[1], operands[1]));
   operands[1] = temp;
   operands[3] = GEN_INT (1 - INTVAL (operands[2]) + 2);
 })
@@ -328,11 +326,9 @@
   "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
 {
   if (BYTES_BIG_ENDIAN)
-emit_insn (gen_vec_initv2sf_internal (operands[0], operands[1],
-  operands[2]));
+emit_insn (gen_vec_concatv2sf (operands[0], operands[1], operands[2]));
   else
-emit_insn (gen_vec_initv2sf_internal (operands[0], operands[2],
-  operands[1]));
+emit_insn (gen_vec_concatv2sf (operands[0], operands[2], operands[1]));
   DONE;
 })
 
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index b3a3ad0..45b8454 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -15932,30 +15932,6 @@ mips_conditional_register_usage (void)
 }
 }
 
-/* Initialize vector TARGET to VALS.  */
-
-void
-mips_expand_vector_init (rtx target, rtx vals)
-{
-  enum machine_mode mode;
-  enum machine_mode inner;
-  unsigned int i, n_elts;
-  rtx mem;
-
-  mode = GET_MODE (target);
-  inner = GET_MODE_INNER (mode);
-  n_elts = GET_MODE_NUNITS (mode);
-
-  gcc_assert (VECTOR_MODE_P (mode));
-
-  mem = assign_stack_temp (mode, GET_MODE_SIZE (mode), 0);
-  for (i = 0; i < n_elts; i++)
-emit_move_insn (adjust_address_nv (mem, inner, i * GET_MODE_SIZE (inner)),
-XVECEXP (vals, 0, i));
-
-  emit_move_insn (target, mem);
-}
-
 /* When generating MIPS16 code, we want to allocate $24 (T_REG) before
other registers for instructions for which it is possible.  This
encourages the compiler to use CMP in cases where an XOR would
@@ -16475,6 +16451,48 @@ mips_expand_vpc_loongson_pshufh (struct 
expand_vec_perm_d *d)
   return true;
 }
 
+/* Recognize broadcast patterns for the Loongson.  */
+
+static bool
+mips_expand_vpc_loongson_bcast (struct expand_vec_perm_d *d)
+{
+  unsigned i, elt;
+  rtx t0, t1;
+
+  if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS))
+return false;
+  /* Note that we've already matched V

Re: Possible wrong-way example in gcc4-4-2 documentation of __builtin_expect

[Jonathan Wakely]

On 21 December 2011 02:00, Jim Avera wrote:
> Ok, here is a patch which improves the example:
>
> --- gcc/doc/extend.texi.ORIG    2011-12-20 17:35:32.236578828 -0800
> +++ gcc/doc/extend.texi    2011-12-20 17:37:10.460583316 -0800
> @@ -7932,7 +7932,7 @@
>
>  @smallexample
>  if (__builtin_expect (ptr != NULL, 1))
> -  error ();
> +  ptr->do_something();
>  @end smallexample
>
>  @noindent

In order to follow the GCC coding style (a space between the function
name and opening parenthesis) and to match the first example for
__builtin_expect, I propose this patch instead:

Index: extend.texi
===
--- extend.texi (revision 182452)
+++ extend.texi (working copy)
@@ -7932,7 +7932,7 @@ expressions for @var{exp}, you should us

 @smallexample
 if (__builtin_expect (ptr != NULL, 1))
-  error ();
+  ptr->foo ();
 @end smallexample

 @noindent


I've CC'd the gcc-patches list, which is where patches should be sent
for review, and included a ChangeLog entry:

2011-12-21  Jonathan Wakely  
Jim Avera  

* doc/extend.texi (__builtin_expect): Improve example.


Can I get approval to check this in to trunk?



>
>
> 
> From: Jonathan Wakely 
> To: Segher Boessenkool 
> Cc: james_av...@yahoo.com; g...@gcc.gnu.org
> Sent: Tuesday, December 20, 2011 5:22 AM
> Subject: Re: Possible wrong-way example in gcc4-4-2 documentation of 
> __builtin_expect
>
> On 20 December 2011 12:49, Segher Boessenkool wrote:
>>
>> The point of the example is that you cannot write
>>
>>          if (__builtin_expect (ptr, 1))
>>            error ();
>>
>> so the "!= NULL" is important here.  But you are right that
>> "error ()" is a bit unexpected; care to send a patch that changes
>> it to e.g. "do_something ()"?
>
> or even ptr->do_something() since that would depend on the value of ptr

Re: Possible wrong-way example in gcc4-4-2 documentation of __builtin_expect

[Jonathan Wakely]

On 21 December 2011 18:03, Jonathan Wakely wrote:
> On 21 December 2011 02:00, Jim Avera wrote:
>> Ok, here is a patch which improves the example:
>>
>> --- gcc/doc/extend.texi.ORIG    2011-12-20 17:35:32.236578828 -0800
>> +++ gcc/doc/extend.texi    2011-12-20 17:37:10.460583316 -0800
>> @@ -7932,7 +7932,7 @@
>>
>>  @smallexample
>>  if (__builtin_expect (ptr != NULL, 1))
>> -  error ();
>> +  ptr->do_something();
>>  @end smallexample
>>
>>  @noindent
>
> In order to follow the GCC coding style (a space between the function
> name and opening parenthesis) and to match the first example for
> __builtin_expect, I propose this patch instead:
>
> Index: extend.texi
> ===
> --- extend.texi (revision 182452)
> +++ extend.texi (working copy)
> @@ -7932,7 +7932,7 @@ expressions for @var{exp}, you should us
>
>  @smallexample
>  if (__builtin_expect (ptr != NULL, 1))
> -  error ();
> +  ptr->foo ();
>  @end smallexample
>
>  @noindent

Then again, maybe foo (*ptr) would be even better, so it looks more
like C not C++ code.

> I've CC'd the gcc-patches list, which is where patches should be sent
> for review, and included a ChangeLog entry:
>
> 2011-12-21  Jonathan Wakely  
>            Jim Avera  
>
>        * doc/extend.texi (__builtin_expect): Improve example.
>
>
> Can I get approval to check this in to trunk?
>
>
>
>>
>>
>> 
>> From: Jonathan Wakely 
>> To: Segher Boessenkool 
>> Cc: james_av...@yahoo.com; g...@gcc.gnu.org
>> Sent: Tuesday, December 20, 2011 5:22 AM
>> Subject: Re: Possible wrong-way example in gcc4-4-2 documentation of 
>> __builtin_expect
>>
>> On 20 December 2011 12:49, Segher Boessenkool wrote:
>>>
>>> The point of the example is that you cannot write
>>>
>>>          if (__builtin_expect (ptr, 1))
>>>            error ();
>>>
>>> so the "!= NULL" is important here.  But you are right that
>>> "error ()" is a bit unexpected; care to send a patch that changes
>>> it to e.g. "do_something ()"?
>>
>> or even ptr->do_something() since that would depend on the value of ptr

Re: [patch] Fix libstdc++/51626

[Jonathan Wakely]

On 19 December 2011 22:39, Jonathan Wakely wrote:
> We don't have allocator_traits in 4.6 so this patch adds a test for
> whether we can call allocator::construct(p) with a single argument and
> calls _Construct(p) if not.
>
>        PR libstdc++/51626
>        * include/bits/stl_uninitialized.h (_Construct_default_a): Define
>        overloaded functions to conditionally use allocator::construct.
>        (_Construct_default_a): Define to dispatch to appropriate
>        _Construct_default_a_impl overload.
>        (__uninitialized_default_a, __uninitialized_default_n_a): Use
>        _Construct_default_a.
>        * testsuite/20_util/allocator/51626.cc
>
> Tested x86_64-linux.
>
> I plan to check this in to the 4.6 branch unless anyone has a better
> suggestion for fixing the bug.

I checked it in, with a corrected ChangeLog and updated copyright year
in stl_uninitialized.h

PR libstdc++/51626
* include/bits/stl_uninitialized.h (_Construct_default_a_impl): Define
overloaded functions to conditionally use allocator::construct.
(_Construct_default_a): Define to dispatch to appropriate
_Construct_default_a_impl overload.
(__uninitialized_default_a, __uninitialized_default_n_a): Use
_Construct_default_a.
* testsuite/20_util/allocator/51626.cc: New.

Re: [patch]: ia64 - allow VMS to redefine TARGET_PROMOTE_FUNCTION_MODE

[Richard Henderson]

On 12/21/2011 02:49 AM, Tristan Gingold wrote:
>   * config/ia64/ia64.c (TARGET_PROMOTE_FUNCTION_MODE): Move to...
>   * config/ia64/ia64.h (TARGET_PROMOTE_FUNCTION_MODE): ... Here.
>   * config/ia64/vms.h (TARGET_PROMOTE_FUNCTION_MODE): Override.

Again, the true default definition in ia64.h is not needed.


r~

Add an extra reload dump file

[Bernd Schmidt]

IRA can make quite a lot of changes to the RTL, but the debugging dumps
are not very helpful as the .ira dump is produced after reload has run.
The patch below splits off reload into its own pass so that we get two
separate dump files. This makes debugging certain classes of problems a
lot easier.

Bootstrapped and regression tested on i686-linux. Ok?


Bernd
* tree-pass.h (pass_reload): Declare.
* ira.c (overall_cost_before, saved_flag_ira_share_spill_slots):
New global variables, moved out of ira.
(do_reload): New static function, split off from the second half
of ...
(ira): ... here.
(gate_true): Renamed from gate_ira.  All uses changed.
(pass_ira): Use TV_IRA, and set flags to TODO_dump_func.
(rest_of_handle_reload): New static function.
(pass_reload): New.

Index: tree-pass.h
===
--- tree-pass.h (revision 182544)
+++ tree-pass.h (working copy)
@@ -541,6 +541,7 @@ extern struct rtl_opt_pass pass_mode_swi
 extern struct rtl_opt_pass pass_sms;
 extern struct rtl_opt_pass pass_sched;
 extern struct rtl_opt_pass pass_ira;
+extern struct rtl_opt_pass pass_reload;
 extern struct rtl_opt_pass pass_postreload;
 extern struct rtl_opt_pass pass_clean_state;
 extern struct rtl_opt_pass pass_branch_prob;
Index: ira.c
===
--- ira.c   (revision 182544)
+++ ira.c   (working copy)
@@ -406,11 +406,12 @@ int ira_spilled_reg_stack_slots_num;
stack slots used in current function so far.  */
 struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
 
-/* Correspondingly overall cost of the allocation, cost of the
-   allocnos assigned to hard-registers, cost of the allocnos assigned
-   to memory, cost of loads, stores and register move insns generated
-   for pseudo-register live range splitting (see ira-emit.c).  */
-int ira_overall_cost;
+/* Correspondingly overall cost of the allocation, overall cost before
+   reload, cost of the allocnos assigned to hard-registers, cost of
+   the allocnos assigned to memory, cost of loads, stores and register
+   move insns generated for pseudo-register live range splitting (see
+   ira-emit.c).  */
+int ira_overall_cost, overall_cost_before;
 int ira_reg_cost, ira_mem_cost;
 int ira_load_cost, ira_store_cost, ira_shuffle_cost;
 int ira_move_loops_num, ira_additional_jumps_num;
@@ -3521,19 +3522,17 @@ struct loops ira_loops;
mode or when the conflict table is too big.  */
 bool ira_conflicts_p;
 
+/* Saved between IRA and reload.  */
+static int saved_flag_ira_share_spill_slots;
+
 /* This is the main entry of IRA.  */
 static void
 ira (FILE *f)
 {
-  int overall_cost_before, allocated_reg_info_size;
+  int allocated_reg_info_size;
   bool loops_p;
   int max_regno_before_ira, ira_max_point_before_emit;
   int rebuild_p;
-  int saved_flag_ira_share_spill_slots;
-  basic_block bb;
-  bool need_dce;
-
-  timevar_push (TV_IRA);
 
   if (flag_caller_saves)
 init_caller_save ();
@@ -3715,17 +3714,22 @@ ira (FILE *f)
  max_regno * sizeof (struct ira_spilled_reg_stack_slot));
 }
   allocate_initial_values (reg_equivs);
+}
 
-  timevar_pop (TV_IRA);
+static void
+do_reload (void)
+{
+  basic_block bb;
+  bool need_dce;
+
+  if (flag_ira_verbose < 10 && dump_file)
+ira_dump_file = dump_file;
 
-  timevar_push (TV_RELOAD);
   df_set_flags (DF_NO_INSN_RESCAN);
   build_insn_chain ();
 
   need_dce = reload (get_insns (), ira_conflicts_p);
 
-  timevar_pop (TV_RELOAD);
-
   timevar_push (TV_IRA);
 
   if (ira_conflicts_p)
@@ -3733,7 +3737,6 @@ ira (FILE *f)
   ira_free (ira_spilled_reg_stack_slots);
 
   ira_finish_assign ();
-
 }
   if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL
   && overall_cost_before != ira_overall_cost)
@@ -3782,11 +3785,9 @@ ira (FILE *f)
 
   timevar_pop (TV_IRA);
 }
-
 
-
 static bool
-gate_ira (void)
+gate_true (void)
 {
   return true;
 }
@@ -3804,16 +3805,42 @@ struct rtl_opt_pass pass_ira =
  {
   RTL_PASS,
   "ira",/* name */
-  gate_ira, /* gate */
+  gate_true,/* gate */
   rest_of_handle_ira,  /* execute */
   NULL, /* sub */
   NULL, /* next */
   0,/* static_pass_number */
-  TV_NONE, /* tv_id */
+  TV_IRA,  /* tv_id */
   0,/* properties_required */
   0,/* properties_provided */
   0,/* properties_destroyed */
   0,/* todo_flags_start */
-  TODO_ggc_collect  /* todo_flags_finish */
+  TODO_dump_func/* todo_flags_finish */
+ }
+};
+
+stati

Re: Possible wrong-way example in gcc4-4-2 documentation of __builtin_expect

[Ian Lance Taylor]

Jonathan Wakely  writes:

> In order to follow the GCC coding style (a space between the function
> name and opening parenthesis) and to match the first example for
> __builtin_expect, I propose this patch instead:
>
> Index: extend.texi
> ===
> --- extend.texi (revision 182452)
> +++ extend.texi (working copy)
> @@ -7932,7 +7932,7 @@ expressions for @var{exp}, you should us
>
>  @smallexample
>  if (__builtin_expect (ptr != NULL, 1))
> -  error ();
> +  ptr->foo ();
>  @end smallexample
>
>  @noindent
>
>
> I've CC'd the gcc-patches list, which is where patches should be sent
> for review, and included a ChangeLog entry:
>
> 2011-12-21  Jonathan Wakely  
> Jim Avera  
>
> * doc/extend.texi (__builtin_expect): Improve example.
>
>
> Can I get approval to check this in to trunk?

This is fine, with or without your proposed change.

Thanks.

Ian

Re: libgcc patch committed: Improve calling non-split-stack code

[Richard Henderson]

On 12/20/2011 03:07 PM, Ian Lance Taylor wrote:
>  __morestack_non_split:
> + .cfi_startproc
>  
>  #ifndef __x86_64__
> - addl$0x4000,4(%esp)
> +
> + # See below for an extended explanation of the CFI instructions.
> + .cfi_offset 8, 8# New PC stored at CFA + 8
> + .cfi_escape 0x15, 4, 0x7d   # DW_CFA_val_offset_sf, %esp, 12/-4
> + # i.e., next %esp is CFA + 12
> +
> + pushl   %eax# Save %eax in case it is a parameter.
> +
> + .cfi_def_cfa %esp,8 # Account for pushed register.
> +
> + movl%esp,%eax   # Current stack,

You'd be better off leaving the CFA where it belongs, at the desired location
of esp after unwind, i.e. esp+12.  That way you don't need to adjust the default
location of the return register, nor use a .cfi_escape.

Begin with ".cfi_def_cfa esp, 12" and that's about it.  Except for the fact you
need to alter your push/pop adjustments.  Those almost certainly should use
.cfi_adjust_cfa_offset instead of explicit absolute adjustments.


r~

Re: Add an extra reload dump file

[Richard Henderson]

On 12/21/2011 10:48 AM, Bernd Schmidt wrote:
>   * tree-pass.h (pass_reload): Declare.
>   * ira.c (overall_cost_before, saved_flag_ira_share_spill_slots):
>   New global variables, moved out of ira.
>   (do_reload): New static function, split off from the second half
>   of ...
>   (ira): ... here.
>   (gate_true): Renamed from gate_ira.  All uses changed.
>   (pass_ira): Use TV_IRA, and set flags to TODO_dump_func.
>   (rest_of_handle_reload): New static function.
>   (pass_reload): New.

Looks good to me except for gate_true.  That can just be NULL in the pass 
structure.


r~

PATCH to doc/standards.texi for C++11

[Jason Merrill]

Joseph pointed out that when I changed most places to talk about C++11 
instead of C++0x, I missed standards.texi.  So this patch remedies that 
oversight.


Applying to trunk.
commit ae87efaee9300b831ef609b88b4c813248dd0a2f
Author: Jason Merrill 
Date:   Wed Dec 21 10:54:04 2011 -0500

	* doc/standards.texi (C++ language): Update for C++11.

diff --git a/gcc/doc/standards.texi b/gcc/doc/standards.texi
index 4e288c6..1813700 100644
--- a/gcc/doc/standards.texi
+++ b/gcc/doc/standards.texi
@@ -175,40 +175,41 @@ information concerning the history of C that is available online, see
 
 @section C++ language
 
-GCC supports the ISO C++ standard (1998) and contains experimental
-support for the upcoming ISO C++ standard (200x).
+GCC supports the original ISO C++ standard (1998) and contains
+experimental support for the second ISO C++ standard (2011).
 
 The original ISO C++ standard was published as the ISO standard (ISO/IEC
 14882:1998) and amended by a Technical Corrigenda published in 2003
 (ISO/IEC 14882:2003). These standards are referred to as C++98 and
 C++03, respectively. GCC implements the majority of C++98 (@code{export}
 is a notable exception) and most of the changes in C++03.  To select
-this standard in GCC, use one of the options @option{-ansi} or
-@option{-std=c++98}; to obtain all the diagnostics required by the
-standard, you should also specify @option{-pedantic} (or
+this standard in GCC, use one of the options @option{-ansi},
+@option{-std=c++98}, or @option{-std=c++03}; to obtain all the diagnostics
+required by the standard, you should also specify @option{-pedantic} (or
 @option{-pedantic-errors} if you want them to be errors rather than
 warnings).
 
-The ISO C++ committee is working on a new ISO C++ standard, dubbed
-C++0x, that is intended to be published by 2009. C++0x contains several
-changes to the C++ language, some of which have been implemented in an
-experimental C++0x mode in GCC@. The C++0x mode in GCC tracks the draft
-working paper for the C++0x standard; the latest working paper is
-available on the ISO C++ committee's web site at
-@uref{http://www.open-std.org/@/jtc1/@/sc22/@/wg21/}. For information
-regarding the C++0x features available in the experimental C++0x mode,
+A revised ISO C++ standard was published in 2011 as ISO/IEC
+14882:2011, and is referred to as C++11; before its publication it was
+commonly referred to as C++0x.  C++11 contains several
+changes to the C++ language, most of which have been implemented in an
+experimental C++11 mode in GCC@.  For information
+regarding the C++11 features available in the experimental C++11 mode,
 see @uref{http://gcc.gnu.org/projects/@/cxx0x.html}. To select this
-standard in GCC, use the option @option{-std=c++0x}; to obtain all the
+standard in GCC, use the option @option{-std=c++11}; to obtain all the
 diagnostics required by the standard, you should also specify
-@option{-pedantic} (or @option{-pedantic-errors} if you want them to be
-errors rather than warnings).
+@option{-pedantic} (or @option{-pedantic-errors} if you want them to
+be errors rather than warnings).
+
+More information about the C++ standards is available on the ISO C++
+committee's web site at @uref{http://www.open-std.org/@/jtc1/@/sc22/@/wg21/}.
 
 By default, GCC provides some extensions to the C++ language; @xref{C++
 Dialect Options,Options Controlling C++ Dialect}.  Use of the
 @option{-std} option listed above will disable these extensions.  You
 may also select an extended version of the C++ language explicitly with
 @option{-std=gnu++98} (for C++98 with GNU extensions) or
-@option{-std=gnu++0x} (for C++0x with GNU extensions).  The default, if
+@option{-std=gnu++11} (for C++11 with GNU extensions).  The default, if
 no C++ language dialect options are given, is @option{-std=gnu++98}.
 
 @section Objective-C and Objective-C++ languages

C++ PATCH for c++/51611 (conversion to vbase in NSDMI)

[Jason Merrill]

We handled use of 'this' in an NSDMI, but conversion to a virtual base 
still broke because it depends on having a function context set up. 
This patch fixes this problem by not building such conversions until we 
use the NSDMI in an actual constructor.


Tested x86_64-pc-linux-gnu, applying to trunk.
commit 1499daa7ea067fd905536a5ead1876107c8fbbc5
Author: Jason Merrill 
Date:   Wed Dec 21 13:42:30 2011 -0500

	PR c++/51611
	* cp-tree.h (CONVERT_EXPR_VBASE_PATH): New.
	* class.c (build_base_path): Defer vbase conversion in an NSDMI.
	* tree.c (bot_replace): Expand it here.
	* cp-gimplify.c (cp_genericize_r): Make sure deferred conversion
	doesn't leak into GENERIC.

diff --git a/gcc/cp/class.c b/gcc/cp/class.c
index c96f7bf..79686a2 100644
--- a/gcc/cp/class.c
+++ b/gcc/cp/class.c
@@ -318,6 +318,19 @@ build_base_path (enum tree_code code,
   return expr;
 }
 
+  /* If we're in an NSDMI, we don't have the full constructor context yet
+ that we need for converting to a virtual base, so just build a stub
+ CONVERT_EXPR and expand it later in bot_replace.  */
+  if (virtual_access && fixed_type_p < 0
+  && current_scope () != current_function_decl)
+{
+  expr = build1 (CONVERT_EXPR, ptr_target_type, expr);
+  CONVERT_EXPR_VBASE_PATH (expr) = true;
+  if (!want_pointer)
+	expr = build_indirect_ref (EXPR_LOCATION (expr), expr, RO_NULL);
+  return expr;
+}
+
   /* Do we need to check for a null pointer?  */
   if (want_pointer && !nonnull)
 {
diff --git a/gcc/cp/cp-gimplify.c b/gcc/cp/cp-gimplify.c
index c68069d..e06c545 100644
--- a/gcc/cp/cp-gimplify.c
+++ b/gcc/cp/cp-gimplify.c
@@ -1100,6 +1100,8 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data)
   wtd->omp_ctx = omp_ctx.outer;
   splay_tree_delete (omp_ctx.variables);
 }
+  else if (TREE_CODE (stmt) == CONVERT_EXPR)
+gcc_assert (!CONVERT_EXPR_VBASE_PATH (stmt));
 
   pointer_set_insert (p_set, *stmt_p);
 
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 633b6b4..6e62bd1 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -74,6 +74,7 @@ c-common.h, not after.
   DECL_OVERRIDE_P (in FUNCTION_DECL)
   IMPLICIT_CONV_EXPR_DIRECT_INIT (in IMPLICIT_CONV_EXPR)
   TRANSACTION_EXPR_IS_STMT (in TRANSACTION_EXPR)
+  CONVERT_EXPR_VBASE_PATH (in CONVERT_EXPR)
1: IDENTIFIER_VIRTUAL_P (in IDENTIFIER_NODE)
   TI_PENDING_TEMPLATE_FLAG.
   TEMPLATE_PARMS_FOR_INLINE.
@@ -4011,6 +4012,11 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter)
   (TREE_CODE (EXPR) == TARGET_EXPR && TREE_LANG_FLAG_2 (EXPR)		\
&& same_type_ignoring_top_level_qualifiers_p (TYPE, TREE_TYPE (EXPR)))
 
+/* True if this CONVERT_EXPR is for a conversion to virtual base in
+   an NSDMI, and should be re-evaluated when used in a constructor.  */
+#define CONVERT_EXPR_VBASE_PATH(NODE) \
+  TREE_LANG_FLAG_0 (CONVERT_EXPR_CHECK (NODE))
+
 /* An enumeration of the kind of tags that C++ accepts.  */
 enum tag_types {
   none_type = 0, /* Not a tag type.  */
diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c
index aabe863..634c267 100644
--- a/gcc/cp/tree.c
+++ b/gcc/cp/tree.c
@@ -1944,6 +1944,20 @@ bot_replace (tree* t,
 	 parsing with the real one for this function.  */
   *t = current_class_ptr;
 }
+  else if (TREE_CODE (*t) == CONVERT_EXPR
+	   && CONVERT_EXPR_VBASE_PATH (*t))
+{
+  /* In an NSDMI build_base_path defers building conversions to virtual
+	 bases, and we handle it here.  */
+  tree basetype = TYPE_MAIN_VARIANT (TREE_TYPE (TREE_TYPE (*t)));
+  VEC(tree,gc) *vbases = CLASSTYPE_VBASECLASSES (current_class_type);
+  int i; tree binfo;
+  FOR_EACH_VEC_ELT (tree, vbases, i, binfo)
+	if (BINFO_TYPE (binfo) == basetype)
+	  break;
+  *t = build_base_path (PLUS_EXPR, TREE_OPERAND (*t, 0), binfo, true,
+			tf_warning_or_error);
+}
 
   return NULL_TREE;
 }
diff --git a/gcc/testsuite/g++.dg/cpp0x/nsdmi-virtual1.C b/gcc/testsuite/g++.dg/cpp0x/nsdmi-virtual1.C
new file mode 100644
index 000..4aa8d48
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/nsdmi-virtual1.C
@@ -0,0 +1,26 @@
+// PR c++/51611
+// { dg-options -std=c++0x }
+// { dg-do run }
+
+struct A
+{
+  A(): i(42) { }
+  int i;
+  int f() { return i; }
+};
+
+struct B : virtual A
+{
+  int j = i + f();
+  int k = A::i + A::f();
+};
+
+struct C: B { int pad; };
+
+int main()
+{
+  C c;
+  if (c.j != 84 || c.k != 84)
+__builtin_abort();
+}
+

Re: Ping^2: Add a prepare_pch_save target hook (fix many MIPS16 PCH failures)

[Richard Henderson]

On 12/20/2011 01:44 PM, Richard Sandiford wrote:
> Ping for this patch to add a prepare_pch_save target hook:
> 
> http://gcc.gnu.org/ml/gcc-patches/2011-12/msg00273.html
> 
> It fixes many PCH failures for MIPS16 (which are a regression from
> earlier releases).

Ok.


r~

Re: [PATCH, SMS] Prevent the creation of reg-moves for definitions with MODE_CC

[Richard Henderson]

On 12/20/2011 09:47 AM, Richard Sandiford wrote:
> Revital Eres  writes:
>> +/* Return true if one of the definitions in INSN has MODE_CC.  Otherwise
>> +   return false.  */
>> +static bool
>> +def_has_ccmode_p (rtx insn)
>> +{
>> +  df_ref *def;
>> +
>> +  for (def = DF_INSN_DEFS (insn); *def; def++)
>> +{
>> +  enum machine_mode mode = GET_MODE (DF_REF_REG (*def));
>> +
>> +  if (GET_MODE_CLASS (mode) == MODE_CC)
>> +   return true;
>> +}
>> +
>> +  return false;
>> +}
> 
> FWIW, an alternative might be to test have_regs_of_mode[(int) mode].
> That says whether there are any allocatable (non-fixed) registers
> of the given mode.

While true, I doubt either PPC or MIPS really benefit from moving around 
registers of CCmode.  Certainly MIPS has no way of easily moving CCmode 
registers around.  It's a rather complicated reload, that.

I'd be very tempted to simply go with the original patch.


r~

[PATCH, i386]: Enable flag_ree also on 32bit targets

[Uros Bizjak]

Hello!

As shown by pr50038.c testcase, recent redundant extension insns
improvements also benefit 32bit targets.  Attached patch enables this
pass for all x86 targets. The patch also moves the testcase to better
place.

2011-12-21  Uros Bizjak  

* config/i386/i386.c (ix86_option_override_internal): Enable flag_ree
also for 32bit targets.

testsuite/ChangeLog:

2011-12-21  Uros Bizjak  

* gcc.dg/pr50038.c: Move to ...
* gcc.target/i386/pr50038.c: ... here.  Test on all targets.

Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN.

Uros.
Index: i386.c
===
--- i386.c  (revision 182601)
+++ i386.c  (working copy)
@@ -3445,12 +3445,14 @@ ix86_option_override_internal (bool main_args_p)
 #define USE_X86_64_FRAME_POINTER 0
 #endif
 
+  /* Enable redundant extension instructions removal at -O2 and higher.  */
+  if (optimize >= 2 && !global_options_set.x_flag_ree)
+flag_ree = 1;
+
   /* Set the default values for switches whose default depends on TARGET_64BIT
  in case they weren't overwritten by command line options.  */
   if (TARGET_64BIT)
 {
-  if (optimize > 1 && !global_options_set.x_flag_ree)
-   flag_ree = 1;
   if (optimize >= 1 && !global_options_set.x_flag_omit_frame_pointer)
flag_omit_frame_pointer = !USE_X86_64_FRAME_POINTER;
   if (flag_asynchronous_unwind_tables == 2)

Re: [Patch] Adjust diag-scans in vect-tests to fix fails on AVX/AVX2

[Uros Bizjak]

On Mon, Dec 19, 2011 at 9:47 AM, Michael Zolotukhin
 wrote:
>> What do you mean no tests require it?  For instance, all of the ones
>> that currently pass with with vect_perm?
> Current implementation of vect_perm doesn't check for SSSE3 - so any
> x86 target is supposed to support permutation.
>
>> Just leave vect_perm alone for now.  That may not be absolutely
>> correct either, but it's the good temporary solution that involves
>> the minimal amount of churn.
> Ok, those were just attempts to adjust dg-scans in slp-perm-9.c, in
> which one more loop was vectorized when compiled with -mavx2. In fact,
> just SSSE3 isn't enough for vectorization of this loop - it seems that
> vector size also matters, so I undid changes in vect_perm and just add
> a vect-size check to the test - could you please check if the changes
> are ok?

It looks to me that the patch introduced some XFAILs on 32bit target  [1]:

XPASS: gcc.dg/vect/vect-multitypes-1.c scan-tree-dump-times vect
"Alignment of access forced using peeling" 2
XPASS: gcc.dg/vect/vect-multitypes-1.c scan-tree-dump-times vect
"Vectorizing an unaligned access" 4
XPASS: gcc.dg/vect/vect-peel-3.c scan-tree-dump-times vect
"Vectorizing an unaligned access" 1
XPASS: gcc.dg/vect/vect-peel-3.c scan-tree-dump-times vect "Alignment
of access forced using peeling" 1
XPASS: gcc.dg/vect/vect-multitypes-1.c -flto scan-tree-dump-times vect
"Alignment of access forced using peeling" 2
XPASS: gcc.dg/vect/vect-multitypes-1.c -flto scan-tree-dump-times vect
"Vectorizing an unaligned access" 4
XPASS: gcc.dg/vect/vect-peel-3.c -flto scan-tree-dump-times vect
"Vectorizing an unaligned access" 1
XPASS: gcc.dg/vect/vect-peel-3.c -flto scan-tree-dump-times vect
"Alignment of access forced using peeling" 1
XPASS: gcc.dg/vect/no-section-anchors-vect-69.c scan-tree-dump-times
vect "Alignment of access forced using peeling" 2

[1] http://gcc.gnu.org/ml/gcc-testresults/2011-12/msg02220.html

Uros.

Re: [Patch, libfortran] PR 51646 Use POSIX mode flags

[Paul Richard Thomas]

Dear All,

I would put Mike Long up with the people that climb the likes of K2!
A remarkable achievement that is nearly but not quite completely
useless.  I hope that teh view made up fo it

On the other hand, he helped us out :-)

Cheers

Paul

On Wed, Dec 21, 2011 at 5:14 PM, Tobias Burnus  wrote:
> On 12/21/2011 04:59 PM, Janne Blomqvist wrote:
>>
>> someone made some effort to build gfortran on an android phone (see
>> the PR). One problem was that libgfortran was using the old BSD
>> S_IREAD and S_IWRITE mode flags instead of the POSIX S_IRUSR and
>> S_IWUSR. The attached patch replaces the usage of these BSD flags with
>> the POSIX ones. I decided to omit any ifdef dance in case the target
>> doesn't support the POSIX flags, since it turns out that we have used
>> those unconditionally in io/unix.c going back at least to the 4.0
>> branch.
>>
>> Ok for trunk?
>
>
> OK. Thanks for the patch!
>
> Tobias
>
>
>> 2011-12-21  Janne Blomqvist
>>        Tobias Burnus
>>
>>        PR libfortran/51646
>>        * acinclude.m4 (LIBGFOR_CHECK_UNLINK_OPEN_FILE): Use POSIX mode
>>        flags, omit mode argument when flags argument does not have
>>        O_CREAT.
>>        * io/unix.c (tempfile): Use POSIX mode flags.
>>
>>
>>
>



-- 
The knack of flying is learning how to throw yourself at the ground and miss.
       --Hitchhikers Guide to the Galaxy

Fix PR target/51552

[Richard Henderson]

As I say in the pr, this is partially a bfin backend bug.  But as it is also
a debug/eh_frame size regression for all targets, I'm fixing it anyway.  This
has the side-effect of re-hiding the bfin backend bug and allowing the build
to finish for bfin-rtems.

For x86_64,

cc1:
before: .eh_frame 000af284  010ed300  010ed300  00ced300  
2**3
after:  .eh_frame 000af16c  010ed260  010ed260  00ced260  
2**3

cc1plus:
before: .eh_frame 000c3a6c  012a4008  012a4008  00ea4008  
2**3
after:  .eh_frame 000c3954  012a3f68  012a3f68  00ea3f68  
2**3

The reason for the minimal size decrease is that almost all of the time the 
space
reclaimed by eliding the advance is taken back by alignment at the end of the 
FDE.
Only occasionally do we get lucky and have the FDE size decrease below a 
multiple
of the word size.

Still, progress is progress, and there are indeed fewer opcodes that need to be
processed at runtime.


r~
PR target/51552
* dwarf2cfi.c (dwarf2out_frame_debug): Move any_cfis_emitted code...
(scan_trace): ... here.


diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 69e6f21..b2721e8 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -1930,9 +1930,6 @@ dwarf2out_frame_debug (rtx insn)
 {
   rtx note, n;
   bool handled_one = false;
-  bool need_flush = false;
-
-  any_cfis_emitted = false;
 
   for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
 switch (REG_NOTE_KIND (note))
@@ -2020,8 +2017,7 @@ dwarf2out_frame_debug (rtx insn)
break;
 
   case REG_CFA_FLUSH_QUEUE:
-   /* The actual flush happens below.  */
-   need_flush = true;
+   /* The actual flush happens elsewhere.  */
handled_one = true;
break;
 
@@ -2029,13 +2025,7 @@ dwarf2out_frame_debug (rtx insn)
break;
   }
 
-  if (handled_one)
-{
-  /* Minimize the number of advances by emitting the entire queue
-once anything is emitted.  */
-  need_flush |= any_cfis_emitted;
-}
-  else
+  if (!handled_one)
 {
   insn = PATTERN (insn);
 do_frame_expr:
@@ -2044,12 +2034,9 @@ dwarf2out_frame_debug (rtx insn)
   /* Check again.  A parallel can save and update the same register.
  We could probably check just once, here, but this is safer than
  removing the check at the start of the function.  */
-  if (any_cfis_emitted || clobbers_queued_reg_save (insn))
-   need_flush = true;
+  if (clobbers_queued_reg_save (insn))
+   dwarf2out_flush_queued_reg_saves ();
 }
-
-  if (need_flush)
-dwarf2out_flush_queued_reg_saves ();
 }
 
 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW.  */
@@ -2489,6 +2476,7 @@ scan_trace (dw_trace_info *trace)
 
  /* Make sure any register saves are visible at the jump target.  */
  dwarf2out_flush_queued_reg_saves ();
+ any_cfis_emitted = false;
 
   /* However, if there is some adjustment on the call itself, e.g.
 a call_pop, that action should be considered to happen after
@@ -2508,6 +2496,7 @@ scan_trace (dw_trace_info *trace)
   || clobbers_queued_reg_save (insn)
   || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
dwarf2out_flush_queued_reg_saves ();
+ any_cfis_emitted = false;
 
  add_cfi_insn = insn;
  scan_insn_after (insn);
@@ -2518,6 +2507,12 @@ scan_trace (dw_trace_info *trace)
 emitted two cfa adjustments.  Do it now.  */
   def_cfa_1 (&this_cfa);
 
+  /* Minimize the number of advances by emitting the entire queue
+once anything is emitted.  */
+  if (any_cfis_emitted
+ || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
+   dwarf2out_flush_queued_reg_saves ();
+
   /* Note that a test for control_flow_insn_p does exactly the
 same tests as are done to actually create the edges.  So
 always call the routine and let it not create edges for

Re: [Patch, fortran] Would this patch - applied to trunk - be OK for the 4.6 branch ?

[Steve Kargl]

On Mon, Dec 19, 2011 at 06:54:08PM +0100, Toon Moene wrote:
> The attached patch makes -finit-= generate default 
> initialization for automatic arrays.
> 
> It was OK for the trunk - is it also OK for the 4.6 branch ?
> 
> Strictly speaking, it doesn't fix a regression, it is a fix for a 
> (non-default) debugging option.
> 

Speaking for myself, it seems that the general rule
of thumb among the gfortran committers is that it
is up to the discretion of the committer if he/she
wants to backport a non-regression patch.  The 2
measures I use are: 1) is the patch fairly local
(ie., only a few lines in at most a couple of files);
2) what is the likelihood for causing a problem
(ie., a regression of breaking bootstrap).

In your particular case, I think the patch is a
useful debugging aid, and the likelihood of causing
a problem is very low.

-- 
Steve

Re: Add -std=c11 option, final __STDC_VERSION__ value, etc.

[Joseph S. Myers]

I've now made corresponding updates to the 4.7 release notes.

Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v
retrieving revision 1.69
diff -u -r1.69 changes.html
--- changes.html12 Dec 2011 15:07:58 -  1.69
+++ changes.html21 Dec 2011 21:00:21 -
@@ -232,12 +232,15 @@
 C
 
   
-There is support for some more features from the C1X revision
-of the ISO C standard.
+There is support for some more features from the C11 revision
+of the ISO C standard.  GCC now accepts the
+options -std=c11 and -std=gnu11, in
+addition to the previous -std=c1x
+and -std=gnu1x.
 
   Unicode strings (previously supported only with options such
-  as -std=gnu1x, now supported
-  with -std=c1x), and the predefined
+  as -std=gnu11, now supported
+  with -std=c11), and the predefined
   macros __STDC_UTF_16__
   and __STDC_UTF_32__.
   Nonreturning functions (_Noreturn

-- 
Joseph S. Myers
jos...@codesourcery.com

libgo patch committed: Catch signals on alternate stack

[Ian Lance Taylor]

This patch to libgo catches most signals on the alternate signal stack.
The only ones caught on the normal stack are the ones which can occur
synchronously: SIGSEGV, SIGBUS, SIGFPE.  While updating the signal code
I also used SA_SIGINFO to distinguish expected signals (null
dereferences, division by zero) from unexpected ones, and to either
panic or throw as appropriate.

That change permits me to tell the split stack code to not bother
disabling signals while splitting the stack, which is also in this
patch.  This is now OK because if some signal arrives while splitting
the stack, it will be handled entirely on the alternate stack.
Admittedly this won't work well if SIGSEGV, SIGBUS, or SIGFPE arrive
while splitting the stack.  Oh well.  At some point I will have to
implement unwinding the stack of a different goroutine, and this issue
can be fixed at that time.

This reduces the number of sigprocmask calls in the net/http test from
26,597 to 2,276 (before my last patch to libgcc it was 3,604,100).

Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu.
Committed to mainline.

Ian

diff -r 950f4ee58444 libgo/runtime/go-panic.c
--- a/libgo/runtime/go-panic.c	Tue Dec 20 10:48:30 2011 -0800
+++ b/libgo/runtime/go-panic.c	Wed Dec 21 14:21:31 2011 -0800
@@ -24,13 +24,13 @@
   if (p->__next != NULL)
 {
   __printpanics (p->__next);
-  printf ("\t");
+  fprintf (stderr, "\t");
 }
-  printf ("panic: ");
+  fprintf (stderr, "panic: ");
   printany (p->__arg);
   if (p->__was_recovered)
-printf (" [recovered]");
-  putchar ('\n');
+fprintf (stderr, " [recovered]");
+  fputc ('\n', stderr);
 }
 
 /* This implements __go_panic which is used for the panic
diff -r 950f4ee58444 libgo/runtime/go-signal.c
--- a/libgo/runtime/go-signal.c	Tue Dec 20 10:48:30 2011 -0800
+++ b/libgo/runtime/go-signal.c	Wed Dec 21 14:21:31 2011 -0800
@@ -17,109 +17,133 @@
   #define SA_RESTART 0
 #endif
 
-/* What to do for a signal.  */
+#ifdef USING_SPLIT_STACK
 
-struct sigtab
-{
-  /* Signal number.  */
-  int sig;
-  /* Nonzero if the signal should be caught.  */
-  _Bool catch;
-  /* Nonzero if the signal should be queued.  */
-  _Bool queue;
-  /* Nonzero if the signal should be ignored.  */
-  _Bool ignore;
-  /* Nonzero if we should restart system calls.  */
-  _Bool restart;
-};
+extern void __splitstack_getcontext(void *context[10]);
 
-/* What to do for signals.  */
+extern void __splitstack_setcontext(void *context[10]);
 
-static struct sigtab signals[] =
-{
-  { SIGHUP, 0, 1, 0, 1 },
-  { SIGINT, 0, 1, 0, 1 },
-  { SIGQUIT, 0, 1, 0, 1 },
-  { SIGALRM, 0, 1, 1, 1 },
-  { SIGTERM, 0, 1, 0, 1 },
+#endif
+
+#define C SigCatch
+#define I SigIgnore
+#define R SigRestart
+#define Q SigQueue
+#define P SigPanic
+
+/* Signal actions.  This collects the sigtab tables for several
+   different targets from the master library.  SIGKILL, SIGCONT, and
+   SIGSTOP are not listed, as we don't want to set signal handlers for
+   them.  */
+
+SigTab runtime_sigtab[] = {
+#ifdef SIGHUP
+  { SIGHUP,	Q + R },
+#endif
+#ifdef SIGINT
+  { SIGINT, 	Q + R },
+#endif
+#ifdef SIGQUIT
+  { SIGQUIT, 	C },
+#endif
 #ifdef SIGILL
-  { SIGILL, 1, 0, 0, 0 },
+  { SIGILL, 	C },
 #endif
 #ifdef SIGTRAP
-  { SIGTRAP, 1, 0, 0, 0 },
+  { SIGTRAP, 	C },
 #endif
 #ifdef SIGABRT
-  { SIGABRT, 1, 0, 0, 0 },
+  { SIGABRT, 	C },
 #endif
 #ifdef SIGBUS
-  { SIGBUS, 1, 0, 0, 0 },
+  { SIGBUS, 	C + P },
 #endif
 #ifdef SIGFPE
-  { SIGFPE, 1, 0, 0, 0 },
+  { SIGFPE, 	C + P },
 #endif
 #ifdef SIGUSR1
-  { SIGUSR1, 0, 1, 1, 1 },
+  { SIGUSR1, 	Q + I + R },
 #endif
 #ifdef SIGSEGV
-  { SIGSEGV, 1, 0, 0, 0 },
+  { SIGSEGV, 	C + P },
 #endif
 #ifdef SIGUSR2
-  { SIGUSR2, 0, 1, 1, 1 },
+  { SIGUSR2, 	Q + I + R },
 #endif
 #ifdef SIGPIPE
-  { SIGPIPE, 0, 0, 1, 0 },
+  { SIGPIPE, 	I },
+#endif
+#ifdef SIGALRM
+  { SIGALRM, 	Q + I + R },
+#endif
+#ifdef SIGTERM
+  { SIGTERM, 	Q + R },
 #endif
 #ifdef SIGSTKFLT
-  { SIGSTKFLT, 1, 0, 0, 0 },
+  { SIGSTKFLT, 	C },
 #endif
 #ifdef SIGCHLD
-  { SIGCHLD, 0, 1, 1, 1 },
+  { SIGCHLD, 	Q + I + R },
 #endif
 #ifdef SIGTSTP
-  { SIGTSTP, 0, 1, 1, 1 },
+  { SIGTSTP, 	Q + I + R },
 #endif
 #ifdef SIGTTIN
-  { SIGTTIN, 0, 1, 1, 1 },
+  { SIGTTIN, 	Q + I + R },
 #endif
 #ifdef SIGTTOU
-  { SIGTTOU, 0, 1, 1, 1 },
+  { SIGTTOU, 	Q + I + R },
 #endif
 #ifdef SIGURG
-  { SIGURG, 0, 1, 1, 1 },
+  { SIGURG, 	Q + I + R },
 #endif
 #ifdef SIGXCPU
-  { SIGXCPU, 0, 1, 1, 1 },
+  { SIGXCPU, 	Q + I + R },
 #endif
 #ifdef SIGXFSZ
-  { SIGXFSZ, 0, 1, 1, 1 },
+  { SIGXFSZ, 	Q + I + R },
 #endif
-#ifdef SIGVTARLM
-  { SIGVTALRM, 0, 1, 1, 1 },
+#ifdef SIGVTALRM
+  { SIGVTALRM, 	Q + I + R },
 #endif
 #ifdef SIGPROF
-  { SIGPROF, 0, 1, 1, 1 },
+  { SIGPROF, 	Q + I + R },
 #endif
 #ifdef SIGWINCH
-  { SIGWINCH, 0, 1, 1, 1 },
+  { SIGWINCH, 	Q + I + R },
 #endif
 #ifdef SIGIO
-  { SIGIO, 0, 1, 1, 1 },
+  { SIGIO, 	Q + I + R },
 #endif
 #ifdef SIGPWR
-  { SIGPWR, 0, 1, 1, 1 },
+  { SIGPWR, 	Q + I + R },
 #endif
 #ifdef SIGSYS
-  { SIGSY

[PATCH][Cilkplus] Array notations as a Condition for If and switch statements

[Iyer, Balaji V]

Hello Everyone,
These patches are for the C-Compiler in Cilkplus branch. It is an extension 
to the patch given in submission: 
http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01473.html. The first patch will 
handle cases where array notations are used as condition for if-then-else and 
switch statements. The second patch will insert test cases for this feature.

Thanking You,

Yours Sincerely,

Balaji V. Iyer.diff --git a/gcc/ChangeLog.cilk b/gcc/ChangeLog.cilk
index 2410953..d53e09e 100644
--- a/gcc/ChangeLog.cilk
+++ b/gcc/ChangeLog.cilk
@@ -1,3 +1,13 @@
+2011-12-23  Balaji V. Iyer  
+
+   * c-array-notations.c (fix_conditional_array_notations): New function.
+   (fix_conditional_array_notations_1): Likewise.
+   (extract_array_notation_exprs): Added a check for STATEMENT_LIST.
+   (replace_array_notations): Likewise.
+   * c-parser.c (c_parser_if_statement): Added a call to the function
+   fix_conditional_array_notations.  Also stored the compound statement
+   to a variable to be passed  into fix_conditional_array_notations.
+
 2011-12-22  Balaji V. Iyer  
 
* c-typeck.c (find_rank): Moved function to c-array-notations.c
diff --git a/gcc/c-array-notation.c b/gcc/c-array-notation.c
index a435d22..0884263 100644
--- a/gcc/c-array-notation.c
+++ b/gcc/c-array-notation.c
@@ -67,6 +67,13 @@ extract_array_notation_exprs (tree node, tree **array_list, 
int *list_size)
   *array_list = new_array_list;
   return;
 }
+  else if (TREE_CODE (node) == STATEMENT_LIST)
+{
+  tree_stmt_iterator ii_tsi;
+  for (ii_tsi = tsi_start (node); !tsi_end_p (ii_tsi); tsi_next (&ii_tsi))
+   extract_array_notation_exprs (*tsi_stmt_ptr (ii_tsi), array_list,
+ list_size);
+}
   else
 {
   for (ii = 0; ii < TREE_CODE_LENGTH (TREE_CODE (node)); ii++)
@@ -93,6 +100,13 @@ replace_array_notations (tree *orig, tree *list, tree 
*array_operand,
*orig = array_operand[ii];
}
 }
+  else if (TREE_CODE (*orig) == STATEMENT_LIST)
+{
+  tree_stmt_iterator ii_tsi;
+  for (ii_tsi = tsi_start (*orig); !tsi_end_p (ii_tsi); tsi_next (&ii_tsi))
+   replace_array_notations (tsi_stmt_ptr (ii_tsi), list, array_operand,
+array_size);
+}
   else
 {
   for (ii = 0; ii < TREE_CODE_LENGTH (TREE_CODE (*orig)); ii++)
@@ -417,7 +431,7 @@ build_array_notation_expr (location_t location, tree lhs, 
tree lhs_origtype,
}
}
}
-   replace_array_notations (&rhs, rhs_list, rhs_array_operand,
+  replace_array_notations (&rhs, rhs_list, rhs_array_operand,
 rhs_list_size);
array_expr_rhs = rhs;
 }
@@ -528,3 +542,295 @@ build_array_notation_expr (location_t location, tree lhs, 
tree lhs_origtype,
 
   return loop;
 }
+
+static tree
+fix_conditional_array_notations_1 (tree stmt)
+{
+  tree *array_list = NULL;
+  int list_size = 0;
+  tree cond = NULL;
+  int rank = 0, ii = 0, jj = 0;
+  tree **array_ops, *array_var, *array_operand, jj_tree, loop;
+  tree **array_value, **array_stride, **array_length, **array_start;
+  tree *body_label, *body_label_expr, *exit_label, *exit_label_expr;
+  tree *compare_expr, *if_stmt_label, *expr_incr, *ind_init;
+  bool **count_down, **array_vector;
+
+  if (TREE_CODE (stmt) == COND_EXPR)
+cond = COND_EXPR_COND (stmt);
+  else if (TREE_CODE (stmt) == SWITCH_EXPR)
+cond = SWITCH_COND (stmt);
+  else if (TREE_CODE (stmt) == FOR_STMT || TREE_CODE (stmt) == CILK_FOR_STMT)
+cond = FOR_COND (stmt);
+  else
+return stmt;
+
+  find_rank (cond, &rank);
+  if (rank == 0)
+return stmt;  
+  
+  extract_array_notation_exprs (cond, &array_list, &list_size);
+
+  if (*array_list == NULL_TREE || list_size == 0)
+return stmt;
+
+  array_ops = (tree **) xmalloc (sizeof (tree *) * list_size);
+  for (ii = 0; ii < list_size; ii++)
+array_ops[ii] = (tree *) xmalloc (sizeof (tree) * rank);
+  
+  array_vector = (bool **) xmalloc (sizeof (bool *) * list_size);
+  for (ii = 0; ii < list_size; ii++)
+array_vector[ii] = (bool *) xmalloc (sizeof (bool) * rank);
+
+  array_value = (tree **) xmalloc (sizeof (tree *) * list_size);
+  array_stride = (tree **) xmalloc (sizeof (tree *) * list_size);
+  array_length = (tree **) xmalloc (sizeof (tree *) * list_size);
+  array_start = (tree **) xmalloc (sizeof (tree *) * list_size);
+
+  for (ii = 0; ii < list_size; ii++)
+{
+  array_value[ii]  = (tree *) xmalloc (sizeof (tree) * rank);
+  array_stride[ii] = (tree *) xmalloc (sizeof (tree) * rank);
+  array_length[ii] = (tree *) xmalloc (sizeof (tree) * rank);
+  array_start[ii]  = (tree *) xmalloc (sizeof (tree) * rank);
+}
+
+  body_label = (tree *) xmalloc(sizeof (tree) * rank);
+  body_label_expr = (tree *) xmalloc (sizeof (tree) * rank);
+  exit_label = (tree *) xmalloc (sizeof (tree) * rank);
+  exit_label_expr = (tree *) xmalloc (si

Re: libgo patch committed: Catch signals on alternate stack

[Richard Henderson]

On 12/21/2011 02:29 PM, Ian Lance Taylor wrote:
> +/* Ignore a signal.  This is called on the alternate signal stack so
> +   it may not split the stack.  */
> +
> +static void sig_ignore (int) __attribute__ ((no_split_stack));
>  
>  static void
>  sig_ignore (int sig __attribute__ ((unused)))
>  {
>  }

Does SIG_IGN not work for some reason?


r~

Re: [patch committed SH] Add atomic patterns

[Kaz Kojima]

Oleg Endo  wrote:
> 2011-12-21  Oleg Endo  
> 
>   * config/sh/sync.md: Add soft atomics ABI description.
>   (fetchop_name): Use 'or' instead of 'ior'.
>   (fetchop_insn): Remove.
>   (atomic_compare_and_swap_soft):
> Don't insert aligning nop after the write-back instruction.  Fix
>   multi-line asm output formatting style.
> (atomic_fetch__soft): Likewise.
> (atomic_fetch_nand_soft): Likewise.
> (atomic__fetch_soft): Likewise.
> (atomic_nand_fetch_soft): Likewise.

OK.  Thanks for the nice comment for software atomics.

Regards,
kaz

Re: libgo patch committed: Catch signals on alternate stack

[Ian Lance Taylor]

Richard Henderson  writes:

> On 12/21/2011 02:29 PM, Ian Lance Taylor wrote:
>> +/* Ignore a signal.  This is called on the alternate signal stack so
>> +   it may not split the stack.  */
>> +
>> +static void sig_ignore (int) __attribute__ ((no_split_stack));
>>  
>>  static void
>>  sig_ignore (int sig __attribute__ ((unused)))
>>  {
>>  }
>
> Does SIG_IGN not work for some reason?

It probably does work.  I was just copying the way the master library
works.  I don't know why it doesn't use SIG_IGN.  Fixing the master
library is something to look into at some later date, I think.

Ian

Re: [PATCH][Cilkplus] Array notations as a Condition for If and switch statements

[Andi Kleen]

"Iyer, Balaji V"  writes:
> new file mode 100644
> index 000..833379b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/cilk-plus/array_notation_tests/if_test.c
> @@ -0,0 +1,162 @@
> +#include 
> +
> +int main (int argc, char **argv)
> +{
> +  int x = 3, y, z, array[10], array2[10], TwodArray[10][10], jj,kk,ll ;
> +  int FourDArray[10][10][10][10];
> +  int ii = 0; 
> +
> +  if (argc != 3)
> +{
> +  fprintf(stderr, "Usage: %s 10 15\n", argv[0]);

Who actually calls the test case with these parameters?

Normally it should run by itself by adding the respective dejagnu
headers and return success/failure. The later also needs some more
self checking I suspect, not just outputting the result.

You want the test suite to fail when the cilk arrays break.

-Andi


-- 
a...@linux.intel.com -- Speaking for myself only

Re: libgcc patch committed: Improve calling non-split-stack code

[Ian Lance Taylor]

Richard Henderson  writes:

> On 12/20/2011 03:07 PM, Ian Lance Taylor wrote:
>>  __morestack_non_split:
>> +.cfi_startproc
>>  
>>  #ifndef __x86_64__
>> -addl$0x4000,4(%esp)
>> +
>> +# See below for an extended explanation of the CFI instructions.
>> +.cfi_offset 8, 8# New PC stored at CFA + 8
>> +.cfi_escape 0x15, 4, 0x7d   # DW_CFA_val_offset_sf, %esp, 12/-4
>> +# i.e., next %esp is CFA + 12
>> +
>> +pushl   %eax# Save %eax in case it is a parameter.
>> +
>> +.cfi_def_cfa %esp,8 # Account for pushed register.
>> +
>> +movl%esp,%eax   # Current stack,
>
> You'd be better off leaving the CFA where it belongs, at the desired location
> of esp after unwind, i.e. esp+12.  That way you don't need to adjust the 
> default
> location of the return register, nor use a .cfi_escape.
>
> Begin with ".cfi_def_cfa esp, 12" and that's about it.  Except for the fact 
> you
> need to alter your push/pop adjustments.  Those almost certainly should use
> .cfi_adjust_cfa_offset instead of explicit absolute adjustments.

Thanks for the suggestion.  I'm still not fully up to speed on this
stuff.  This patch bootstrapped and ran Go testsuite and -fsplit-stack
tests on x86_64-unknown-linux-gnu and i686-unknown-linux-gnu.  Committed
to mainline.

Ian

Index: config/i386/morestack.S
===
--- config/i386/morestack.S	(revision 182607)
+++ config/i386/morestack.S	(working copy)
@@ -100,14 +100,12 @@ __morestack_non_split:
 
 #ifndef __x86_64__
 
-	# See below for an extended explanation of the CFI instructions.
-	.cfi_offset 8, 8		# New PC stored at CFA + 8
-	.cfi_escape 0x15, 4, 0x7d	# DW_CFA_val_offset_sf, %esp, 12/-4
-	# i.e., next %esp is CFA + 12
+	# See below for an extended explanation of this.
+	.cfi_def_cfa %esp,16
 
 	pushl	%eax			# Save %eax in case it is a parameter.
 
-	.cfi_def_cfa %esp,8		# Account for pushed register.
+	.cfi_adjust_cfa_offset 4	# Account for pushed register.
 
 	movl	%esp,%eax		# Current stack,
 	subl	8(%esp),%eax		# less required stack frame size,
@@ -144,16 +142,16 @@ __morestack_non_split:
 
 	popl	%eax			# Restore %eax and stack.
 
-	.cfi_def_cfa %esp,4		# Account for popped register.
+	.cfi_adjust_cfa_offset -4	# Account for popped register.
 
 	ret	$8			# Return to caller, popping args.
 
 2:
-	.cfi_def_cfa %esp,8		# Back to where we were.
+	.cfi_adjust_cfa_offset 4	# Back to where we were.
 
 	popl	%eax			# Restore %eax and stack.
 
-	.cfi_def_cfa %esp,4		# Account for popped register.
+	.cfi_adjust_cfa_offset -4	# Account for popped register.
 
 	addl	$0x5000+BACKOFF,4(%esp)	# Increment space we request.
 
@@ -161,13 +159,12 @@ __morestack_non_split:
 
 #else
 
-	# See below for an extended explanation of the CFI instructions.
-	.cfi_offset 16, 0
-	.cfi_escape 0x15, 7, 0x7f	# DW_CFA_val_offset_sf, %esp, 8/-8
+	# See below for an extended explanation of this.
+	.cfi_def_cfa %rsp,16
 
 	pushq	%rax			# Save %rax in case caller is using
 	# it to preserve original %r10.
-	.cfi_def_cfa %rsp,16		# Adjust for pushed register.
+	.cfi_adjust_cfa_offset 8	# Adjust for pushed register.
 
 	movq	%rsp,%rax		# Current stack,
 	subq	%r10,%rax		# less required stack frame size,
@@ -178,27 +175,21 @@ __morestack_non_split:
 #else
 	cmpl	%fs:0x40,%eax
 #endif
-	jb	2f			# Get more space if we need it.
+	popq	%rax			# Restore register.
 
-	# This breaks call/return prediction, as described above.
-	incq	8(%rsp)			# Increment the return address.
+	.cfi_adjust_cfa_offset -8	# Adjust for popped register.
 
-	popq	%rax			# Restore register.
+	jb	2f			# Get more space if we need it.
 
-	.cfi_def_cfa %rsp,8		# Adjust for popped register.
+	# This breaks call/return prediction, as described above.
+	incq	(%rsp)			# Increment the return address.
 
 	ret# Return to caller.
 
 2:
-	.cfi_def_cfa %rsp,16		# Back to where we were.
-
-	popq	%rax			# Restore register.
-
-	.cfi_def_cfa %rsp,8		# Adjust for popped register.
-
 	addq	$0x5000+BACKOFF,%r10	# Increment space we request.
 
-	# Fall throug into morestack.
+	# Fall through into morestack.
 
 #endif
 
@@ -245,25 +236,22 @@ __morestack:
 	# instruction, and just return to the real caller.
 
 	# Here CFA points just past the return address on the stack,
-	# e.g., on function entry it is %esp + 4.  Later we will
-	# change it to %ebp + 8, as set by .cfi_def_cfa_register and
-	# .cfi_def_cfa_offset above.  The stack looks like this:
+	# e.g., on function entry it is %esp + 4.  The stack looks
+	# like this:
 	#	CFA + 12:	stack pointer after two returns
 	#	CFA + 8:	return address of morestack caller's caller
 	#	CFA + 4:	size of parameters
 	#	CFA:		new stack frame size
 	#	CFA - 4:	return address of this function
 	#	CFA - 8:	previous value of %ebp; %ebp points here
-	# We want to set %esp to the stack pointer after the double
-	# return, which is CFA + 12.
-	

[google] fix ICE when using LIPO profiles for FDO (issue5500068)

[Rong Xu]

This patch is for google_main branch only.

This patch fixes the ICE when using LIPO profiles for regular FDO
compilation. LIPO has INDIR_CALL_TOPN profiles while FDO has
INDIR_CALL profile.

Tested with SPEC2000 INT (with -Wno-coverage-mismatch to work around
the minor pass difference b/w LIPO and FDO)


-Rong

2011-12-21   Rong Xu  

* gcc/profile.c (compute_value_histograms): handle the
  case when INDIR_CALL counters not available in gcda files.

Index: gcc/profile.c
===
--- gcc/profile.c   (revision 182415)
+++ gcc/profile.c   (working copy)
@@ -828,6 +828,19 @@
   t = (int) hist->type;
 
   aact_count = act_count[t];
+  if (aact_count == 0)
+{
+  /* this can only happen when FDO uses LIPO profiles where
+ we have HIST_TYPE_INDIR_CALL_TOPN counters in gcda
+ files.  */
+  gcc_assert (hist->type == HIST_TYPE_INDIR_CALL);
+  if (flag_opt_info >= OPT_INFO_MIN)
+warning (0, "cannot find INDIR_CALL counters. "
+"Using LIPO profiles?\n",
+ DECL_ASSEMBLER_NAME (current_function_decl));
+  hist->n_counters = 0;
+  continue;
+}
   act_count[t] += hist->n_counters;
 
   gimple_add_histogram_value (cfun, stmt, hist);

--
This patch is available for review at http://codereview.appspot.com/5500068

adjust installation docs to discourage installing GMP, MPFR and MPC separately

[Jonathan Wakely]

The most frequently asked question on gcc-help, and a frequently
reported "bug" in bugzilla, is
http://gcc.gnu.org/wiki/FAQ#configure_suffix

It is almost always caused by installing libgmp.so etc. in a
non-standard location and not using ldconfig, DT_RUNPATH,
$LD_LIBRARY_PATH or some other method to tell the dynamic linker how
to find them.  The current installation docs mention --with-gmp right
away, which probably gives the impression that it's the recommended
method, whereas it actually causes problems for the majority of users
who don't understand dynamic linker search paths.  I think rewording
the installation docs to suggest building the support libs as part of
GCC first, and only using --with-gmp second, might steer people in the
right direction.

Separately, I also plan to write an "Installing GCC" page on the GCC
wiki which (among other things) discourages installing the support
libraries by hand, recommending installing prebuilt packages in
standard system dirs instead, or if that's not an option then using
contrib/download_prerequisites to get the sources and build them
in-tree.


* doc/install.text (Prerequisites): Suggest building GMP, MPFR and
MPC as part of GCC before describing configuring with --with-gmp etc.

Tested by running "make doc" and viewing the resulting .info pages, OK
for trunk?
Index: doc/install.texi
===
--- doc/install.texi(revision 182452)
+++ doc/install.texi(working copy)
@@ -333,32 +333,35 @@ newer versions, though.
 @table @asis
 @item GNU Multiple Precision Library (GMP) version 4.3.2 (or later)
 
-Necessary to build GCC@.  If you do not have it installed in your
+Necessary to build GCC@.  If a GMP source distribution is found in a
+subdirectory of your GCC sources named @file{gmp}, it will be built
+together with GCC, this avoids the need to build GMP separately.
+Alternatively, if GMP is already installed but it is not in your
 library search path, you will have to configure with the
 @option{--with-gmp} configure option.  See also @option{--with-gmp-lib}
-and @option{--with-gmp-include}.  Alternatively, if a GMP source
-distribution is found in a subdirectory of your GCC sources named
-@file{gmp}, it will be built together with GCC@.
+and @option{--with-gmp-include}.
 
 @item MPFR Library version 2.4.2 (or later)
 
 Necessary to build GCC@.  It can be downloaded from
-@uref{http://www.mpfr.org/}.  The @option{--with-mpfr} configure
-option should be used if your MPFR Library is not installed in your
-default library search path.  See also @option{--with-mpfr-lib} and
-@option{--with-mpfr-include}.  Alternatively, if a MPFR source
-distribution is found in a subdirectory of your GCC sources named
-@file{mpfr}, it will be built together with GCC@.
+@uref{http://www.mpfr.org/}.  If an MPFR source distribution is found
+in a subdirectory of your GCC sources named @file{mpfr}, it will be
+built together with GCC, this avoids the need to build MPFR separately.
+Alternatively, if MPFR is already installed but it is not in your
+default library search path, the @option{--with-mpfr} configure
+option should be used.  See also @option{--with-mpfr-lib} and
+@option{--with-mpfr-include}.
 
 @item MPC Library version 0.8.1 (or later)
 
 Necessary to build GCC@.  It can be downloaded from
-@uref{http://www.multiprecision.org/}.  The @option{--with-mpc}
-configure option should be used if your MPC Library is not installed
-in your default library search path.  See also @option{--with-mpc-lib}
-and @option{--with-mpc-include}.  Alternatively, if an MPC source
-distribution is found in a subdirectory of your GCC sources named
-@file{mpc}, it will be built together with GCC@.
+@uref{http://www.multiprecision.org/}.  If an MPC source distribution
+is found in a subdirectory of your GCC sources named @file{mpc}, it
+will be built together with GCC, this avoids the need to build MPC
+separately.  Alternatively, if MPC is already installed but it is
+not in your default library search path, the @option{--with-mpc}
+configure option should be used.  See also @option{--with-mpc-lib}
+and @option{--with-mpc-include}.
 
 @item Parma Polyhedra Library (PPL) version 0.11
 

Re: adjust installation docs to discourage installing GMP, MPFR and MPC separately

[Joseph S. Myers]

On Thu, 22 Dec 2011, Jonathan Wakely wrote:

> It is almost always caused by installing libgmp.so etc. in a
> non-standard location and not using ldconfig, DT_RUNPATH,
> $LD_LIBRARY_PATH or some other method to tell the dynamic linker how
> to find them.  The current installation docs mention --with-gmp right

And for the normal case where $build and $host are the same (i.e. not a 
Canadian cross) it should be possible to build and try running a program 
using those libraries, maybe even one that checks the version is the same 
as in the library headers, at an early point in configure, so giving a 
meaningful error if someone is using previously installed libraries 
without proper dynamic linker configuration.

(That's not an argument against your patch; we should improve the 
documentation as well as adding better detection of this common problem.)

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: adjust installation docs to discourage installing GMP, MPFR and MPC separately

[Jonathan Wakely]

On 22 December 2011 00:36, Joseph S. Myers wrote:
> On Thu, 22 Dec 2011, Jonathan Wakely wrote:
>
>> It is almost always caused by installing libgmp.so etc. in a
>> non-standard location and not using ldconfig, DT_RUNPATH,
>> $LD_LIBRARY_PATH or some other method to tell the dynamic linker how
>> to find them.  The current installation docs mention --with-gmp right
>
> And for the normal case where $build and $host are the same (i.e. not a
> Canadian cross) it should be possible to build and try running a program
> using those libraries, maybe even one that checks the version is the same
> as in the library headers, at an early point in configure, so giving a
> meaningful error if someone is using previously installed libraries
> without proper dynamic linker configuration.
>
> (That's not an argument against your patch; we should improve the
> documentation as well as adding better detection of this common problem.)

Yes, better detection of the problem and a more meaningful error
message would help significantly, but doing that is beyond my autoconf
skills.

Go patch committed: Rework range over slice

[Ian Lance Taylor]

This patch to the Go frontend reworks the range over slice support so
that the index operation does not normally require a bounds check.  I
did this by the simple expedient of copying the slice to a temporary
variable before doing the range.  This makes it safe for the optimizers
to eliminate the bounds checks.  I guess I could just avoid generating
the bounds checks in that case, but then the optimizers would get weak
and flabby.  Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu.  Committed to mainline.

Ian

diff -r 61f8e85ea252 go/statements.cc
--- a/go/statements.cc	Wed Dec 21 14:24:19 2011 -0800
+++ b/go/statements.cc	Wed Dec 21 17:57:18 2011 -0800
@@ -5260,7 +5260,11 @@
   //   original statements
   //   }
 
-  if (range_type->array_type() != NULL)
+  if (range_type->is_slice_type())
+this->lower_range_slice(gogo, temp_block, body, range_object, range_temp,
+			index_temp, value_temp, &init, &cond, &iter_init,
+			&post);
+  else if (range_type->array_type() != NULL)
 this->lower_range_array(gogo, temp_block, body, range_object, range_temp,
 			index_temp, value_temp, &init, &cond, &iter_init,
 			&post);
@@ -5346,7 +5350,7 @@
   return Expression::make_call(func, params, false, loc);
 }
 
-// Lower a for range over an array or slice.
+// Lower a for range over an array.
 
 void
 For_range_statement::lower_range_array(Gogo* gogo,
@@ -5438,6 +5442,107 @@
   *ppost = post;
 }
 
+// Lower a for range over a slice.
+
+void
+For_range_statement::lower_range_slice(Gogo* gogo,
+   Block* enclosing,
+   Block* body_block,
+   Named_object* range_object,
+   Temporary_statement* range_temp,
+   Temporary_statement* index_temp,
+   Temporary_statement* value_temp,
+   Block** pinit,
+   Expression** pcond,
+   Block** piter_init,
+   Block** ppost)
+{
+  Location loc = this->location();
+
+  // The loop we generate:
+  //   for_temp := range
+  //   len_temp := len(for_temp)
+  //   for index_temp = 0; index_temp < len_temp; index_temp++ {
+  //   value_temp = for_temp[index_temp]
+  //   index = index_temp
+  //   value = value_temp
+  //   original body
+  //   }
+  //
+  // Using for_temp means that we don't need to check bounds when
+  // fetching range_temp[index_temp].
+
+  // Set *PINIT to
+  //   range_temp := range
+  //   var len_temp int
+  //   len_temp = len(range_temp)
+  //   index_temp = 0
+
+  Block* init = new Block(enclosing, loc);
+
+  Expression* ref = this->make_range_ref(range_object, range_temp, loc);
+  Temporary_statement* for_temp = Statement::make_temporary(NULL, ref, loc);
+  init->add_statement(for_temp);
+
+  ref = Expression::make_temporary_reference(for_temp, loc);
+  Expression* len_call = this->call_builtin(gogo, "len", ref, loc);
+  Temporary_statement* len_temp = Statement::make_temporary(index_temp->type(),
+			len_call, loc);
+  init->add_statement(len_temp);
+
+  mpz_t zval;
+  mpz_init_set_ui(zval, 0UL);
+  Expression* zexpr = Expression::make_integer(&zval, NULL, loc);
+  mpz_clear(zval);
+
+  Temporary_reference_expression* tref =
+Expression::make_temporary_reference(index_temp, loc);
+  tref->set_is_lvalue();
+  Statement* s = Statement::make_assignment(tref, zexpr, loc);
+  init->add_statement(s);
+
+  *pinit = init;
+
+  // Set *PCOND to
+  //   index_temp < len_temp
+
+  ref = Expression::make_temporary_reference(index_temp, loc);
+  Expression* ref2 = Expression::make_temporary_reference(len_temp, loc);
+  Expression* lt = Expression::make_binary(OPERATOR_LT, ref, ref2, loc);
+
+  *pcond = lt;
+
+  // Set *PITER_INIT to
+  //   value_temp = range[index_temp]
+
+  Block* iter_init = NULL;
+  if (value_temp != NULL)
+{
+  iter_init = new Block(body_block, loc);
+
+  ref = Expression::make_temporary_reference(for_temp, loc);
+  Expression* ref2 = Expression::make_temporary_reference(index_temp, loc);
+  Expression* index = Expression::make_index(ref, ref2, NULL, loc);
+
+  tref = Expression::make_temporary_reference(value_temp, loc);
+  tref->set_is_lvalue();
+  s = Statement::make_assignment(tref, index, loc);
+
+  iter_init->add_statement(s);
+}
+  *piter_init = iter_init;
+
+  // Set *PPOST to
+  //   index_temp++
+
+  Block* post = new Block(enclosing, loc);
+  tref = Expression::make_temporary_reference(index_temp, loc);
+  tref->set_is_lvalue();
+  s = Statement::make_inc_statement(tref);
+  post->add_statement(s);
+  *ppost = post;
+}
+
 // Lower a for range over a string.
 
 void
diff -r 61f8e85ea252 go/statements.h
--- a/go/statements.h	Wed Dec 21 14:24:19 2011 -0800
+++ b/go/statements.h	Wed Dec 21 17:57:18 2011 -0800
@@ -1162,6 +1162,11 @@
 		Block**, Expression**, Block**, Block**);
 
   void
+  lower_range_slice(Gogo*, Block*, Block*, Named_object*, Temporary_statement*,
+		Temporary_statement*, Temporary_statement*,
+		Block**, Expre

[PATCH RFA] tree-optimization/PR43491, Unnecessary temporary for global register variable

[Bin Cheng]

Hi,

This patch fixes the bug PR43491, which exists at least on
arm-none-eabi/mips-elf
targets.

The cause is ssa-pre eliminates global register variable when it is the RHS
of
single assign statment, while following passes do not handle the
const/register
attributes of the variable.

This patch skips the elimination of global register variable when it is the
RHS
of a single assignment in SSA-PRE pass.

By doing this,

0) gcc won't generate the redundant move instruction as reported in the bug.
1) normal redundancy elimination on global registers will not be hurt, 
   since sccvn and pre has already detected the true elimination chances 
   and they will be eliminated afterward in function eliminate.
2) the inserted statements(including PHIs) for global register variables
   will not be marked as NECESSARY in function eliminate and will be
   deleted in remove_dead_inserted_code. So no redundant insertions will be
   generated in PRE pass.

Some discussion can be found at:
  http://gcc.gnu.org/ml/gcc/2011-12/msg0.html

The patch is tested on x86 and arm-none-eabi, no failure introduced.

Is it OK?

Thanks

gcc/ChangeLog:
2011-12-21  Bin Cheng  
Richard Guenther  

PR tree-optimization/43491
* tree-ssa-pre.c (eliminate): Don't replace global register variable
when 
it is the RHS of a single assign.

gcc/testsuite/ChangeLog:
2011-12-21  Bin Cheng  

PR tree-optimization/43491
* gcc.dg/tree-ssa/pr43491.c: New test.Index: gcc/testsuite/gcc.dg/tree-ssa/pr43491.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/pr43491.c (revision 0)
+++ gcc/testsuite/gcc.dg/tree-ssa/pr43491.c (revision 0)
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-pre-stats" } */
+
+#define REGISTER register
+
+#if defined __arm__
+# define REG1 asm("r4")
+#elif defined __i386__
+# define REG1 asm("ebx")
+#elif defined __mips__
+# define REG1 asm("s0")
+#elif defined __x86_64__
+# define REG1 asm("rbp")
+#else
+# undef REGISTER
+# define REGISTER
+# define REG1
+#endif
+
+REGISTER long data_0 REG1;
+long data_3; 
+
+long foo(long data, long v)
+{
+   long i;
+   long t, u;
+
+   if (data)
+   i = data_0 + data_3;
+   else {
+   v = 2;
+   i = 5;
+   }
+   t = data_0 + data_3;
+   u = i;
+   return v * t * u;
+}
+/* We should not eliminate global register variable when it is the RHS of
+   a single assignment.  */
+/* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre" { target { 
arm-*-* i?86-*-* mips*-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump-times "Eliminated: 3" 1 "pre" { target { ! { 
arm-*-* i?86-*-* mips*-*-* x86_64-*-* } } } } } */
+/* { dg-final { cleanup-tree-dump "pre" } } */
Index: gcc/tree-ssa-pre.c
===
--- gcc/tree-ssa-pre.c  (revision 182075)
+++ gcc/tree-ssa-pre.c  (working copy)
@@ -4161,28 +4161,40 @@
 {
   for (gsi = gsi_start_bb (b); !gsi_end_p (gsi); gsi_next (&gsi))
{
+ tree lhs = NULL_TREE;
+ tree rhs = NULL_TREE;
+
  stmt = gsi_stmt (gsi);
 
+ if (gimple_has_lhs (stmt))
+   lhs = gimple_get_lhs (stmt);
+
+ if (gimple_assign_single_p (stmt))
+   rhs = gimple_assign_rhs1 (stmt);
+
  /* Lookup the RHS of the expression, see if we have an
 available computation for it.  If so, replace the RHS with
-the available computation.  */
+the available computation.
+
+See PR43491.
+We don't replace global register variable when it is a the RHS of
+a single assign. We do replace local register variable since gcc
+does not guarantee local variable will be allocated in register.  
*/
  if (gimple_has_lhs (stmt)
- && TREE_CODE (gimple_get_lhs (stmt)) == SSA_NAME
+ && TREE_CODE (lhs) == SSA_NAME
  && !gimple_assign_ssa_name_copy_p (stmt)
  && (!gimple_assign_single_p (stmt)
- || !is_gimple_min_invariant (gimple_assign_rhs1 (stmt)))
+ || (!is_gimple_min_invariant (rhs)
+  && (gimple_assign_rhs_code (stmt) != VAR_DECL
+  || !is_global_var (rhs)
+  || !DECL_HARD_REGISTER (rhs
  && !gimple_has_volatile_ops  (stmt)
- && !has_zero_uses (gimple_get_lhs (stmt)))
+ && !has_zero_uses (lhs))
{
- tree lhs = gimple_get_lhs (stmt);
- tree rhs = NULL_TREE;
  tree sprime = NULL;
  pre_expr lhsexpr = get_or_alloc_expr_for_name (lhs);
  pre_expr sprimeexpr;
 
- if (gimple_assign_single_p (stmt))
-   rhs = gimple_assign_rhs1 (stmt);
-
  sprimeexpr = bitmap_find_leader (AVAIL_OUT (b),
  

[RFC / Patch] PR 51494

[Paolo Carlini]

Hi,

the issue is that we are rejecting:

struct A
{
static void f() {}

void foo()
{
[] () { f(); };
}
};


because 'this' is not captured, but we are wrong because f is static.

The problem happens in maybe_dummy_object (called from finish_call_expr) 
because it cannot know that a function is static, thus proceeds 
unconditionally to call lambda_expr_this_capture.


That said, I'm trying to actually fix the issue it by passing an 
additional tree argument to maybe_dummy_object, which is the function 
for the case at issue, otherwise NULL_TREE. Then 
lambda_expr_this_capture etc is involved only if 
non_static_member_function_p. Appears to work, passes testing, should be 
in general rather safe. Looks like a sane approach?


Thanks,
Paolo.

///
Index: typeck.c
===
--- typeck.c(revision 182605)
+++ typeck.c(working copy)
@@ -6078,7 +6078,8 @@ convert_member_func_to_ptr (tree type, tree expr)
 expr = build_address (PTRMEM_CST_MEMBER (expr));
   else
 {
-  decl = maybe_dummy_object (TYPE_PTRMEM_CLASS_TYPE (intype), 0);
+  decl = maybe_dummy_object (TYPE_PTRMEM_CLASS_TYPE (intype), 0,
+NULL_TREE);
   decl = build_address (decl);
   expr = get_member_function_from_ptrfunc (&decl, expr);
 }
Index: init.c
===
--- init.c  (revision 182605)
+++ init.c  (working copy)
@@ -1847,7 +1847,7 @@ build_offset_ref (tree type, tree member, bool add
 }
 
   /* Set up BASEBINFO for member lookup.  */
-  decl = maybe_dummy_object (type, &basebinfo);
+  decl = maybe_dummy_object (type, &basebinfo, NULL_TREE);
 
   /* A lot of this logic is now handled in lookup_member.  */
   if (BASELINK_P (member))
Index: tree.c
===
--- tree.c  (revision 182605)
+++ tree.c  (working copy)
@@ -2521,7 +2521,7 @@ build_dummy_object (tree type)
binfo path from current_class_type to TYPE, or 0.  */
 
 tree
-maybe_dummy_object (tree type, tree* binfop)
+maybe_dummy_object (tree type, tree* binfop, tree fn)
 {
   tree decl, context;
   tree binfo;
@@ -2548,7 +2548,8 @@ tree
  (TREE_TYPE (current_class_ref), context)))
 decl = current_class_ref;
   else if (current != current_class_type
-  && context == nonlambda_method_basetype ())
+  && context == nonlambda_method_basetype ()
+  && (!fn || non_static_member_function_p (fn)))
 /* In a lambda, need to go through 'this' capture.  */
 decl = (build_x_indirect_ref
((lambda_expr_this_capture
Index: semantics.c
===
--- semantics.c (revision 182605)
+++ semantics.c (working copy)
@@ -1530,7 +1530,7 @@ finish_non_static_data_member (tree decl, tree obj
   tree scope = qualifying_scope;
   if (scope == NULL_TREE)
scope = context_for_name_lookup (decl);
-  object = maybe_dummy_object (scope, NULL);
+  object = maybe_dummy_object (scope, NULL, NULL_TREE);
 }
 
   if (object == error_mark_node)
@@ -1772,7 +1772,7 @@ finish_qualified_id_expr (tree qualifying_class,
   /* See if any of the functions are non-static members.  */
   /* If so, the expression may be relative to 'this'.  */
   if (!shared_member_p (expr)
- && (ob = maybe_dummy_object (qualifying_class, NULL),
+ && (ob = maybe_dummy_object (qualifying_class, NULL, NULL_TREE),
  !is_dummy_object (ob)))
expr = (build_class_member_access_expr
(ob,
@@ -2124,7 +2124,7 @@ finish_call_expr (tree fn, VEC(tree,gc) **args, bo
part of the access, so we pass 'B' to maybe_dummy_object.  */
 
   object = maybe_dummy_object (BINFO_TYPE (BASELINK_ACCESS_BINFO (fn)),
-  NULL);
+  NULL, fn);
 
   if (processing_template_decl)
{
@@ -3321,7 +3321,7 @@ finish_id_expression (tree id_expression,
  && !shared_member_p (decl))
{
  /* A set of member functions.  */
- decl = maybe_dummy_object (DECL_CONTEXT (first_fn), 0);
+ decl = maybe_dummy_object (DECL_CONTEXT (first_fn), 0, NULL_TREE);
  return finish_class_member_access_expr (decl, id_expression,
  /*template_p=*/false,
  tf_warning_or_error);
Index: cp-tree.h
===
--- cp-tree.h   (revision 182605)
+++ cp-tree.h   (working copy)
@@ -5697,7 +5697,7 @@ extern bool cp_tree_equal (tree, tree);
 extern tree no_linkage_check   (tree, bool);
 extern void debug_binfo(tree);
 extern tree build_dummy_object 

[PATCH] PR33919/preprocessor fix __BASE_FILE__ when included from the command line

[Gary Funck]

Attached is a suggested fix for a long-standing C pre-processor bug.
Ref: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33919
Ref: http://gcc.gnu.org/ml/gcc/2004-10/msg00534.html

The patch implements the approach suggested by Harald van Dijk
in the cited bug report.

I am not familiar with the subtleties of the C pre-processor,
and do not know if there may be some surprises or special
cases not covered.  The fix does appear to provide the
expected result as demonstrated by the included test case.

I have a specific question re: this new code.

+   name = _cpp_get_file_name (pfile->main_file);
+   if (!name)
+ name = "";

I wasn't sure whether 'name' can have a NULL value, and handled
that case as shown above.  Would a gcc_assert() be more
appropriate, or is it safe to simply assume that the name
value is not NULL?

Please review.

Thanks,
- Gary
Index: gcc/testsuite/gcc.dg/pr33919-2.h
===
--- gcc/testsuite/gcc.dg/pr33919-2.h(revision 0)
+++ gcc/testsuite/gcc.dg/pr33919-2.h(revision 0)
@@ -0,0 +1 @@
+char *nested_inc_base_file = __BASE_FILE__;
Index: gcc/testsuite/gcc.dg/pr33919.c
===
--- gcc/testsuite/gcc.dg/pr33919.c  (revision 0)
+++ gcc/testsuite/gcc.dg/pr33919.c  (revision 0)
@@ -0,0 +1,20 @@
+/* PR preprocessor/pr33919 */
+/* { dg-do run } */
+/* { dg-options "-I . -include ${srcdir}/gcc.dg/pr33919-0.h" } */
+
+#include "pr33919-1.h"
+
+extern int strcmp (const char *, const char *);
+extern void abort(void);
+
+int
+main ()
+{
+  if (strcmp (base_file, __FILE__))
+abort ();
+  if (strcmp (inc_base_file, __FILE__))
+abort ();
+  if (strcmp (nested_inc_base_file, __FILE__))
+abort ();
+  return 0;
+}
Index: gcc/testsuite/gcc.dg/pr33919-0.h
===
--- gcc/testsuite/gcc.dg/pr33919-0.h(revision 0)
+++ gcc/testsuite/gcc.dg/pr33919-0.h(revision 0)
@@ -0,0 +1 @@
+char *base_file = __BASE_FILE__;
Index: gcc/testsuite/gcc.dg/pr33919-1.h
===
--- gcc/testsuite/gcc.dg/pr33919-1.h(revision 0)
+++ gcc/testsuite/gcc.dg/pr33919-1.h(revision 0)
@@ -0,0 +1,2 @@
+#include "pr33919-2.h"
+char *inc_base_file = __BASE_FILE__;
Index: gcc/testsuite/ChangeLog
===
--- gcc/testsuite/ChangeLog (revision 182601)
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,11 @@
+2011-12-21  Gary Funck  
+
+   PR preprocessor/pr33919
+   * gcc.dg/pr33919.c: New test.
+   * gcc.dg/pr33919-0.h: New test header file.
+   * gcc.dg/pr33919-1.h: Ditto.
+   * gcc.dg/pr33919-2.h: Ditto.
+
 2011-12-21  Paolo Carlini  
 
PR c++/51305
Index: libcpp/macro.c
===
--- libcpp/macro.c  (revision 182601)
+++ libcpp/macro.c  (working copy)
@@ -278,10 +278,9 @@ _cpp_builtin_macro_text (cpp_reader *pfi
 
pfile->line_table->highest_line);
else
  {
-   map = linemap_lookup (pfile->line_table, 
pfile->line_table->highest_line);
-   while (! MAIN_FILE_P (map))
- map = INCLUDED_FROM (pfile->line_table, map);
-   name = ORDINARY_MAP_FILE_NAME (map);
+   name = _cpp_get_file_name (pfile->main_file);
+   if (!name)
+ name = "";
  }
len = strlen (name);
buf = _cpp_unaligned_alloc (pfile, len * 2 + 3);
Index: libcpp/files.c
===
--- libcpp/files.c  (revision 182601)
+++ libcpp/files.c  (working copy)
@@ -1370,6 +1370,13 @@ _cpp_pop_file_buffer (cpp_reader *pfile,
 }
 }
 
+/* Return the file name associated with FILE.  */
+const char *
+_cpp_get_file_name (_cpp_file *file)
+{
+  return file->name;
+}
+
 /* Inteface to file statistics record in _cpp_file structure. */
 struct stat *
 _cpp_get_file_stat (_cpp_file *file)
Index: libcpp/ChangeLog
===
--- libcpp/ChangeLog(revision 182601)
+++ libcpp/ChangeLog(working copy)
@@ -1,3 +1,12 @@
+2011-12-21  Gary Funck  
+
+   PR preprocessor/pr33919
+   * files.c (_cpp_get_file_name): New. Implement file name
+   access function.
+   * internal.h (_cpp_get_file_name): New prototype.
+   * macro.c (_cpp_builtin_macro_text): Call _cpp_get_file_name()
+   in lieu of traversing INCLUDED_FROM chain.
+
 2011-12-20  Joseph Myers  
 
* include/cpplib.h (CLK_GNUC1X): Change to CLK_GNUC11.
Index: libcpp/internal.h
===
--- libcpp/internal.h   (revision 182601)
+++ libcpp/internal.h   (working copy)
@@ -635,6 +635,7 @@ extern void _cpp_cleanup_files (cpp_read
 exter

gcov-io.h type typo

[DJ Delorie]

This field is built as a gcov_unsigned_t but declared
as a plain "unsigned", which breaks all int16 targets:

  /* n_functions */
  field = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE,
  get_gcov_unsigned_t ());
  DECL_CHAIN (field) = fields;
  fields = field;

Assuming we want to support more then 65536 functions on int16
targets, how about this semi-obvious patch?

Index: gcov-io.h
===
--- gcov-io.h   (revision 182614)
+++ gcov-io.h   (working copy)
@@ -444,13 +444,13 @@ struct gcov_info
   gcov_unsigned_t stamp;   /* uniquifying time stamp */
   const char *filename;/* output file name */
 
   gcov_merge_fn merge[GCOV_COUNTERS];  /* merge functions (null for
  unused) */
   
-  unsigned n_functions;/* number of functions */
+  gcov_unsigned_t n_functions; /* number of functions */
   const struct gcov_fn_info *const *functions; /* pointer to pointers
  to function information  */
 };
 
 /* Register a new object file module.  */
 extern void __gcov_init (struct gcov_info *) ATTRIBUTE_HIDDEN;

RE: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change

[Xinyu Qi]

At 2011-12-15 00:47:48,"Richard Earnshaw"  wrote: 
> On 14/07/11 08:35, Xinyu Qi wrote:
> >>> Hi,
> >>>
> >>> It is the first part of iWMMXt maintenance.
> >>>
> >>> *config/arm/arm.c (arm_option_override):
> >>>   Enable iWMMXt with VFP. iWMMXt and NEON are incompatible.
> >> iWMMXt unsupported under Thumb-2 mode.
> >>>   (arm_expand_binop_builtin): Accept immediate op (with mode VOID)
> >>> *config/arm/arm.md:
> >>>   Resettle include location of iwmmxt.md so that *arm_movdi
> >> and *arm_movsi_insn could be used when iWMMXt is enabled.
> >>
> >> With the current work in trunk to handle enabled attributes
> >> and per-alternative predicable attributes (Thanks Bernd) we
> >> should be able to get rid of *cond_iwmmxt_movsi_insn"  in
> >> iwmmxt.md file. It's not a matter for this patch but for a
> >> follow-up patch.
> >>
> >> Actually we should probably do the same for the various insns
> >> that are dotted around all over the place with final
> >> conditions that prevent matching - atleast makes the backend
> >> description slightly smaller :).
> >>
> >>>   Add pipeline description file include.
> >>
> >> It is enough to say
> >>
> >>  (): Include.
> >>
> >> in the changelog entry.
> >>
> >> The include for the pipeline description file should be with
> >> the patch that you add this in i.e. patch #5. Please add this
> >> to MD_INCLUDES in t-arm as well.
> >>
> >> Also as a general note, please provide a correct Changelog entry.
> >>
> >> This is not the format that we expect Changelog entries to be in.
> >> Please look at the coding standards on the website for this
> >> or at other patches submitted with respect to Changelog
> >> entries. Please fix this for each patch in the patch stack.
> >>
> >>
> >> cheers
> >> Ramana
> >
> > Thanks for reviewing. I have updated the patches and the Changelog.
> >
> > *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP.
> >  (arm_expand_binop_builtin): Accept VOIDmode op.
> > *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove
> condition !TARGET_IWMMXT.
> >  (iwmmxt.md): Include location.
> >
> > Thanks,
> > Xinyu=
> >
> 
> + VFP and iWMMXt however can coexist.  */
> +  if (TARGET_IWMMXT && TARGET_HARD_FLOAT && !TARGET_VFP)
> +sorry ("iWMMXt and non-VFP floating point unit");
> +
> +  /* iWMMXt and NEON are incompatible.  */
> +  if (TARGET_IWMMXT && TARGET_NEON)
> +sorry ("iWMMXt and NEON");
> 
> -  /* ??? iWMMXt insn patterns need auditing for Thumb-2.  */
> +  /* iWMMXt unsupported under Thumb-2 mode.  */
>if (TARGET_THUMB2 && TARGET_IWMMXT)
>  sorry ("Thumb-2 iWMMXt");
> 
> Don't use sorry() when a feature is not supported by the hardware;
> sorry() is used when GCC is currently unable to support something that
> it should.  Use error() in these cases.
> 
> Secondly, iWMMXt is incompatible with the entire Thumb ISA, not just the
> Thumb-2 extensions to the Thumb ISA.

Done.

> 
> 
> +;; Load the Intel Wireless Multimedia Extension patterns
> +(include "iwmmxt.md")
> +
> 
> 
> No, the extension patterns need to come at the end of the main machine
> description.  The list at the top of the MD file is purely for pipeline
> descriptions.  Why do you think this is needed?

This modification is needless right now since *iwmmxt_movsi_insn and 
*iwmmxt_arm_movdi
have been corrected in the fourth part of the patch. Revert it.
The new modified patch is attached.

* config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP.
Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode.
(arm_expand_binop_builtin): Accept VOIDmode op.

Thanks,
Xinyu

> 
> Other bits are ok.
> 
> R.



1_generic.diff
Description: 1_generic.diff

RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description

[Xinyu Qi]

At 2011-12-15 01:32:13,"Richard Earnshaw"  wrote:
> On 24/11/11 01:33, Xinyu Qi wrote:
> > Hi Ramana,
> >
> > I solve the conflict, please try again. The new diff is attached.
> >
> > Thanks,
> > Xinyu
> >
> > At 2011-11-19 07:36:15,"Ramana Radhakrishnan"
>  wrote:
> >>
> >> Hi Xinyu,
> >>
> >> This doesn't apply cleanly currently on trunk and the reject appears
> >> to come from iwmmxt.md and I've not yet investigated why.
> >>
> >> Can you have a look ?
> >>
>
> This patch is NOT ok.
>
> You're adding features that were new in iWMMXt2 (ie not in the original
> implementation) but you've provided no means by which the compiler can
> detect which operations are only available on the new cores.

Hi Richard,

All of the WMMX chips support WMMX2 instructions.
What I do is to complement the WMMX2 intrinsic support in GCC.
I don't think it is necessary for users to consider whether one WMMX insn is a 
WMMX2 insn or not.

> Further, I don't like the way you have separate patterns for the rotates
> with immediate.  Please investigate using the alternative enable feature
> to reduce these down to single patterns.  Once you've done all this,
> some of your tricky builtin expand code in patch 3/5 should then
> simplify significantly as you won't need separate expand codes for those
> alternatives.

Done. Combine immediate and register alternative into one pattern for all shift 
patterns.
Also update the part three. Send it in another mail.
The new diff is attached. The new Changlog:

* config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function.
(arm_output_iwmmxt_tinsr): Likewise.
* config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare.
(arm_output_iwmmxt_tinsr): Likewise.
* config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant.
(iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete.
(rorv4hi3, rorv2si3, rordi3): Likewise.
(rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise.
(ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise.
(lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise.
(ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise.
(iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise
(*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise.
(tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern.
(iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise.
(*and3_iwmmxt, *ior3_iwmmxt, *xor3_iwmmxt): Likewise.
(ror3, ror3_di): Likewise.
(ashr3_di, lshr3_di, ashl3_di): Likewise.
(ashli3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise.
(iwmmxt_walignr0, iwmmxt_walignr1): Likewise.
(iwmmxt_walignr2, iwmmxt_walignr3): Likewise.
(iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise.
(iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise.
(iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise.
(iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise.
(All instruction patterns): Add wtype attribute.
(*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp.
(iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern.
(iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise.
(ashr3_iwmmxt, ashl3_iwmmxt, lshr3_iwmmxt): Likewise.
(iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise.
(eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise.
(gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise.
(iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise.
(iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise.
(iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise.
(iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise.
(iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise.
(iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise.
(iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise.
(iwmmxt2.md): Include.
* config/arm/iwmmxt2.md: New file.
* config/arm/iterators.md (VMMX2): New mode_iterator.
* config/arm/arm.md (wtype): New attribute.
(UNSPEC_WMADDS, UNSPEC_WMADDU): Delete.
(UNSPEC_WALIGNI): New unspec.
* config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md.
* config/arm/predicates.md (imm_or_reg_operand): New predicate.

Thanks,
Xinyu

> R.
>
> >> cheers
> >> Ramana
> >>
> >> On 26 September 2011 04:22, Xinyu Qi  wrote:
> >>> Ping.
> >>>
> >>> http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00279.html
> >>>
> >>>* config/arm/arm.c (arm_output_iwmmxt_shift_immediate):
> New
> >> function.
> >>>(arm_output_iwmmxt_tinsr): Likewise.
> >>>* config/arm/arm-protos.h
> >> (arm_output_iwmmxt_shift_immediate): Declare.
> >>>(arm_output_iwmmxt_tinsr): Likewise.
> >>>* config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3):
> >> New constant.
> >>>(iwmmxt_psa

RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand

[Xinyu Qi]

At 2011-11-24 09:27:04,"Xinyu Qi"  wrote:  
> At 2011-11-19 07:08:22,"Ramana Radhakrishnan"
>  wrote:
> > On 20 October 2011 08:39, Xinyu Qi  wrote:
> > > Ping
> > >
> > > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
> > >
> > >        * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> > >        (builtin_description bdesc_2arg): Revise built in declaration.
> > >        (builtin_description bdesc_1arg): Likewise.
> > >        (arm_init_iwmmxt_builtins): Revise built in initialization.
> > >        (arm_expand_builtin): Revise built in expansion.
> > >
> >
> > This currently doesn't apply - can you take a look ?
> 
> Hi Ramana,
> 
> I resolve the patch conflict with the newest trunk gcc. The resolved diff is
> attached.
> 
> Thanks,
> Xinyu

Update the built in expand. Remove some redundant code.
New diff is attached.

Thanks,
Xinyu


3_arm_c.diff
Description: 3_arm_c.diff

RE: PING: [PATCH, ARM, iWMMXt][5/5]: pipeline description

[Xinyu Qi]

At 2011-10-20 20:36:53,"Ramana Radhakrishnan"  
wrote:  
> On 20 October 2011 08:42, Xinyu Qi  wrote:
> > Ping
> >
> > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html
> > Index: gcc/config/arm/marvell-f-iwmmxt.md
> >
> 
> ===
> > --- gcc/config/arm/marvell-f-iwmmxt.md  (revision 0)
> > +++ gcc/config/arm/marvell-f-iwmmxt.md  (revision 0)
> >@@ -0,0 +1,179 @@
> >+
> >+;; instructions classes
> 
> s/instructions/Instruction.
> 
> Otherwise OK.
> 
> Ramana

Fix the typo. New diff is attached.

* config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md.
* config/arm/marvell-f-iwmmxt.md: New file.
* config/arm/arm.md (marvell-f-iwmmxt.md): Include.

Thanks,
Xinyu


5_pipeline.diff
Description: 5_pipeline.diff

Re: [Patch] Adjust diag-scans in vect-tests to fix fails on AVX/AVX2

[Michael Zolotukhin]

Thanks!
Yes, those xpasses were introduced by the changes in dg-scans I
recently made, but I'm not sure if there is an error in them: in these
three tests compiler for some reason assume that arrays are aligned to
16 byte even in 32-bit mode (AFAIK, ABI requirement for arrays
alignment is alignment of their elements, that is 4 bytes for int, 2
bytes for short). Is it a correct behaviour of the compiler? If so,
dg-scan could be adjusted one more time - we could separate AVX-mode
from all other modes using vect_sizes_32B_16B and that'll solve the
problem (please check the corresponding changes in the attached
patch).

On 22 December 2011 00:16, Uros Bizjak  wrote:
> On Mon, Dec 19, 2011 at 9:47 AM, Michael Zolotukhin
>  wrote:
>>> What do you mean no tests require it?  For instance, all of the ones
>>> that currently pass with with vect_perm?
>> Current implementation of vect_perm doesn't check for SSSE3 - so any
>> x86 target is supposed to support permutation.
>>
>>> Just leave vect_perm alone for now.  That may not be absolutely
>>> correct either, but it's the good temporary solution that involves
>>> the minimal amount of churn.
>> Ok, those were just attempts to adjust dg-scans in slp-perm-9.c, in
>> which one more loop was vectorized when compiled with -mavx2. In fact,
>> just SSSE3 isn't enough for vectorization of this loop - it seems that
>> vector size also matters, so I undid changes in vect_perm and just add
>> a vect-size check to the test - could you please check if the changes
>> are ok?
>
> It looks to me that the patch introduced some XFAILs on 32bit target  [1]:
>
> XPASS: gcc.dg/vect/vect-multitypes-1.c scan-tree-dump-times vect
> "Alignment of access forced using peeling" 2
> XPASS: gcc.dg/vect/vect-multitypes-1.c scan-tree-dump-times vect
> "Vectorizing an unaligned access" 4
> XPASS: gcc.dg/vect/vect-peel-3.c scan-tree-dump-times vect
> "Vectorizing an unaligned access" 1
> XPASS: gcc.dg/vect/vect-peel-3.c scan-tree-dump-times vect "Alignment
> of access forced using peeling" 1
> XPASS: gcc.dg/vect/vect-multitypes-1.c -flto scan-tree-dump-times vect
> "Alignment of access forced using peeling" 2
> XPASS: gcc.dg/vect/vect-multitypes-1.c -flto scan-tree-dump-times vect
> "Vectorizing an unaligned access" 4
> XPASS: gcc.dg/vect/vect-peel-3.c -flto scan-tree-dump-times vect
> "Vectorizing an unaligned access" 1
> XPASS: gcc.dg/vect/vect-peel-3.c -flto scan-tree-dump-times vect
> "Alignment of access forced using peeling" 1
> XPASS: gcc.dg/vect/no-section-anchors-vect-69.c scan-tree-dump-times
> vect "Alignment of access forced using peeling" 2
>
> [1] http://gcc.gnu.org/ml/gcc-testresults/2011-12/msg02220.html
>
> Uros.



-- 
---
Best regards,
Michael V. Zolotukhin,
Software Engineer
Intel Corporation.


vec-tests-avx2_fixes-7.patch
Description: Binary data