--- gcc/config/mips/loongson.md | 45 +++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md index 1b1fe0b..325838d 100644 --- a/gcc/config/mips/loongson.md +++ b/gcc/config/mips/loongson.md @@ -197,6 +197,51 @@ "pandn\t%0,%1,%2" [(set_attr "type" "fmul")]) +;; Logical AND. +(define_insn "and<mode>3" + [(set (match_operand:VWHB 0 "register_operand" "=f") + (and:VWHB (match_operand:VWHB 1 "register_operand" "f") + (match_operand:VWHB 2 "register_operand" "f")))] + "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" + "and\t%0,%1,%2" + [(set_attr "type" "fmul")]) + +;; Logical OR. +(define_insn "ior<mode>3" + [(set (match_operand:VWHB 0 "register_operand" "=f") + (ior:VWHB (match_operand:VWHB 1 "register_operand" "f") + (match_operand:VWHB 2 "register_operand" "f")))] + "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" + "or\t%0,%1,%2" + [(set_attr "type" "fmul")]) + +;; Logical XOR. +(define_insn "xor<mode>3" + [(set (match_operand:VWHB 0 "register_operand" "=f") + (xor:VWHB (match_operand:VWHB 1 "register_operand" "f") + (match_operand:VWHB 2 "register_operand" "f")))] + "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" + "xor\t%0,%1,%2" + [(set_attr "type" "fmul")]) + +;; Logical NOR. +(define_insn "*loongson_nor" + [(set (match_operand:VWHB 0 "register_operand" "=f") + (and:VWHB + (not:VWHB (match_operand:VWHB 1 "register_operand" "f")) + (not:VWHB (match_operand:VWHB 2 "register_operand" "f"))))] + "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" + "nor\t%0,%1,%2" + [(set_attr "type" "fmul")]) + +;; Logical NOT. +(define_insn "one_cmpl<mode>2" + [(set (match_operand:VWHB 0 "register_operand" "=f") + (not:VWHB (match_operand:VWHB 1 "register_operand" "f")))] + "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" + "nor\t%0,%1,%1" + [(set_attr "type" "fmul")]) + ;; Average. (define_insn "loongson_pavg<V_suffix>" [(set (match_operand:VHB 0 "register_operand" "=f") -- 1.7.7.4
