from:"Ben Shi via Phabricator via cfe\-commits"

[PATCH] D128133: [Driver] Support linking to compiler-rt for target AVR

2022-07-02 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

ping ...


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128133/new/

https://reviews.llvm.org/D128133

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D127501: [AVR] Fixed broken linking using `avr-gcc`.

2022-07-07 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rG2d01a8572076: [Driver] Improve linking options for target 
AVR (authored by KOLANICH, committed by benshi001).
Herald added a subscriber: cfe-commits.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127501/new/

https://reviews.llvm.org/D127501

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-ld.c


Index: clang/test/Driver/avr-ld.c
===
--- clang/test/Driver/avr-ld.c
+++ clang/test/Driver/avr-ld.c
@@ -1,44 +1,44 @@
 // RUN: %clang -### --target=avr -mmcu=at90s2313 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKA %s
-// LINKA: {{".*ld.*"}} {{.*}} {{"-L.*tiny-stack"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-lat90s2313" "--end-group" "-mavr2"
+// LINKA: {{".*ld.*"}} {{.*}} {{"-L.*tiny-stack"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-lat90s2313" {{.*}} "--end-group" "-mavr2"
 
 // RUN: %clang -### --target=avr -mmcu=at90s8515 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKB %s
-// LINKB: {{".*ld.*"}} {{.*}} "-Tdata=0x800060" "--start-group" {{.*}} 
"-lat90s8515" "--end-group" "-mavr2"
+// LINKB: {{".*ld.*"}} {{.*}} "-Tdata=0x800060" "--start-group" {{.*}} 
"-lat90s8515" {{.*}} "--end-group" "-mavr2"
 
 // RUN: %clang -### --target=avr -mmcu=attiny13 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKC %s
-// LINKC: {{".*ld.*"}} {{.*}} {{"-L.*avr25/tiny-stack"}} {{.*}} 
"-Tdata=0x800060" "--start-group" {{.*}} "-lattiny13" "--end-group" "-mavr25"
+// LINKC: {{".*ld.*"}} {{.*}} {{"-L.*avr25/tiny-stack"}} {{.*}} 
"-Tdata=0x800060" "--start-group" {{.*}} "-lattiny13" {{.*}} "--end-group" 
"-mavr25"
 
 // RUN: %clang -### --target=avr -mmcu=attiny44 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKD %s
-// LINKD: {{".*ld.*"}} {{.*}} {{"-L.*avr25"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-lattiny44" "--end-group" "-mavr25"
+// LINKD: {{".*ld.*"}} {{.*}} {{"-L.*avr25"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-lattiny44" {{.*}} "--end-group" "-mavr25"
 
 // RUN: %clang -### --target=avr -mmcu=atmega103 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKE %s
-// LINKE: {{".*ld.*"}} {{.*}} {{"-L.*avr31"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-latmega103" "--end-group" "-mavr31"
+// LINKE: {{".*ld.*"}} {{.*}} {{"-L.*avr31"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-latmega103" {{.*}} "--end-group" "-mavr31"
 
 // RUN: %clang -### --target=avr -mmcu=atmega8u2 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKF %s
-// LINKF: {{".*ld.*"}} {{.*}} {{"-L.*avr35"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega8u2" "--end-group" "-mavr35"
+// LINKF: {{".*ld.*"}} {{.*}} {{"-L.*avr35"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega8u2" {{.*}} "--end-group" "-mavr35"
 
 // RUN: %clang -### --target=avr -mmcu=atmega48pa --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKG %s
-// LINKG: {{".*ld.*"}} {{.*}} {{"-L.*avr4"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega48pa" "--end-group" "-mavr4"
+// LINKG: {{".*ld.*"}} {{.*}} {{"-L.*avr4"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega48pa" {{.*}} "--end-group" "-mavr4"
 
 // RUN: %clang -### --target=avr -mmcu=atmega328 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKH %s
-// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega328" "--end-group" "-mavr5"
+// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega328" {{.*}} "--end-group" "-mavr5"
 
 // RUN: %clang -### --target=avr -mmcu=atmega1281 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKI %s
-// LINKI: {{".*ld.*"}} {{.*}} {{"-L.*avr51"}} {{.*}} "-Tdata=0x800200" 
"--start-group" {{.*}} "-latmega1281" "--end-group" "-mavr51"
+// LINKI: {{".*ld.*"}} {{.*}} {{"-L.*avr51"}} {{.*}} "-Tdata=0x800200" 
"--start-group" {{.*}} "-latmega1281" {{.*}} "--end-group" "-mavr51"
 
 // RUN: %clang -### --target=avr -mmcu=atmega2560 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKJ %s
-// LINKJ: {{".*ld.*"}} {{.*}} {{"-L.*avr6"}} {{.*}} "-Tdata=0x800200" 
"--start-group" {{.*}} "-latmega2560" "--end-group" "-mavr6"
+// LINKJ: {{".*ld.*"}} {{.*}} {{"-L.*avr6"}} {{.*}} "-Tdata=0x800200" 
"--start-group" {{.*}} "-latmega2560" {{.*}} "--end-group" "-mavr6"
 
 // RUN: %clang -### --target=avr -mmcu=attiny10 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKK %s
-// LINKK: {{".*ld.*"}} {{.*}} {{"-L.*avrtiny"}} {{.*}} "-Tdata=0x800040" 
"--start-group" {{.*}} "-lattiny10" "--end-group" "-mavrtiny"
+// LINKK: {{".*ld.*"}} {{.*}} {{"-L.*avrtiny"}} {{.*}} "

[PATCH] D120720: [clang][AVR] Implement standard calling convention for AVR and AVRTiny

2022-03-23 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rG51585aa240de: [clang][AVR] Implement standard calling 
convention for AVR and AVRTiny (authored by benshi001).

Changed prior to commit:
  https://reviews.llvm.org/D120720?vs=415734&id=417811#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120720/new/

https://reviews.llvm.org/D120720

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/avr/argument.c
  clang/test/CodeGen/avr/struct.c

Index: clang/test/CodeGen/avr/struct.c
===
--- clang/test/CodeGen/avr/struct.c
+++ clang/test/CodeGen/avr/struct.c
@@ -1,15 +1,23 @@
-// RUN: %clang_cc1 -triple avr -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple avr -target-cpu atmega328 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=AVR
+// RUN: %clang_cc1 -triple avr -target-cpu attiny40 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=TINY
 
 // Structure that is more than 8 bytes.
 struct s10 {
   int a, b, c, d, e;
 };
 
-// Structure that is less than 8 bytes.
+// Structure that is less than 8 bytes but more than 4 bytes.
 struct s06 {
   int a, b, c;
 };
 
+// Structure that is less than 4 bytes.
+struct s04 {
+  int a, b;
+};
+
 struct s10 foo10(int a, int b, int c) {
   struct s10 a0;
   return a0;
@@ -20,7 +28,21 @@
   return a0;
 }
 
-// CHECK: %struct.s10 = type { i16, i16, i16, i16, i16 }
-// CHECK: %struct.s06 = type { i16, i16, i16 }
-// CHECK: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
-// CHECK: define{{.*}} %struct.s06 @foo06(i16 noundef %a, i16 noundef %b, i16 noundef %c)
+struct s04 foo04(int a, int b) {
+  struct s04 a0;
+  return a0;
+}
+
+// AVR: %struct.s10 = type { i16, i16, i16, i16, i16 }
+// AVR: %struct.s06 = type { i16, i16, i16 }
+// AVR: %struct.s04 = type { i16, i16 }
+// AVR: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// AVR: define{{.*}} %struct.s06 @foo06(i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// AVR: define{{.*}} %struct.s04 @foo04(i16 noundef %a, i16 noundef %b)
+
+// TINY: %struct.s10 = type { i16, i16, i16, i16, i16 }
+// TINY: %struct.s06 = type { i16, i16, i16 }
+// TINY: %struct.s04 = type { i16, i16 }
+// TINY: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// TINY: define{{.*}} void @foo06(%struct.s06* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// TINY: define{{.*}} %struct.s04 @foo04(i16 noundef %a, i16 noundef %b)
Index: clang/test/CodeGen/avr/argument.c
===
--- /dev/null
+++ clang/test/CodeGen/avr/argument.c
@@ -0,0 +1,116 @@
+// RUN: %clang_cc1 -triple avr -target-cpu atmega328 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix AVR
+// RUN: %clang_cc1 -triple avr -target-cpu attiny40 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix TINY
+
+// NOTE: All arguments are passed via the stack for functions with variable arguments.
+// AVR:  define {{.*}} i8 @foo0(i8 {{.*}}, i8 {{.*}}, ...)
+// TINY: define {{.*}} i8 @foo0(i8 {{.*}}, i8 {{.*}}, ...)
+// AVR-NOT:  define {{.*}} i8 @foo0(i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}}, ...)
+// TINY-NOT: define {{.*}} i8 @foo0(i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}}, ...)
+char foo0(char a, char b, ...) {
+  return a + b;
+}
+
+// NOTE: All arguments are passed via registers on both avr and avrtiny.
+// AVR:  define {{.*}} i8 @foo1(i32 {{.*}}, i8 {{.*}} signext {{.*}})
+// TINY: define {{.*}} i8 @foo1(i32 {{.*}}, i8 {{.*}} signext {{.*}})
+char foo1(long a, char b) {
+  return a + b;
+}
+
+// NOTE: The argument `char c` is passed via registers on avr, while via the stack on avrtiny.
+//   The argument `char b` costs 2 registers, so there is no vacant register left for
+//   `char c` on avrtiny.
+// AVR:  define {{.*}} i8 @foo2(i32 {{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+// TINY: define {{.*}} i8 @foo2(i32 {{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}})
+// TINY-NOT: define {{.*}} i8 @foo2(i32 {{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+char foo2(long a, char b, char c) {
+  return a + b + c;
+}
+
+// NOTE: On avr, the argument `a` costs 16 registers and `b` costs 2 registers, so
+//   `c` has to be passed via the stack.
+// AVR:  define {{.*}} i8 @foo3({{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}})
+// AVR-NOT:  define {{.*}} i8 @foo3({{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+// TINY: define {{.*}} i8 @foo3({{.*}}, i8 {{.*}}, i8 {{.*}})
+// TINY-NOT: define {{.*}} i8 @foo3({{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+struct s15 {
+  char arr[15];
+};
+char foo3(struct s15 a, char b,

[PATCH] D122401: [AVR] Add more devices

2022-03-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, dylanmckay.
Herald added subscribers: Jim, hiraditya.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, jacquesguan.
Herald added projects: clang, LLVM.

Synchronize device list with avr-gcc 7.3.0 and avrlibc 2.0.0.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D122401

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-link-mcu-family-unimplemented.c
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td

Index: llvm/lib/Target/AVR/AVRDevices.td
===
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -191,6 +191,12 @@
  [FamilyAVR0, FeatureBREAK, FeatureSRAM, FeatureTinyEncoding,
   FeatureSmallStack]>;
 
+def FamilyXMEGA3 : Family<"xmega3",
+  [FamilyAVR0, FeatureLPM, FeatureIJMPCALL,
+   FeatureADDSUBIW, FeatureSRAM, FeatureJMPCALL,
+   FeatureMultiplication, FeatureMOVW, FeatureLPMX,
+   FeatureBREAK]>;
+
 def FamilyXMEGA : Family<"xmega",
  [FamilyAVR0, FeatureLPM, FeatureIJMPCALL,
   FeatureADDSUBIW, FeatureSRAM, FeatureJMPCALL,
@@ -236,7 +242,7 @@
 def : Device<"avr6", FamilyAVR6, ELFArchAVR6>;
 def : Device<"avrxmega1", FamilyXMEGA, ELFArchXMEGA1>;
 def : Device<"avrxmega2", FamilyXMEGA, ELFArchXMEGA2>;
-def : Device<"avrxmega3", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"avrxmega3", FamilyXMEGA3, ELFArchXMEGA3>;
 def : Device<"avrxmega4", FamilyXMEGA, ELFArchXMEGA4>;
 def : Device<"avrxmega5", FamilyXMEGA, ELFArchXMEGA5>;
 def : Device<"avrxmega6", FamilyXMEGA, ELFArchXMEGA6>;
@@ -265,6 +271,7 @@
 def : Device<"at90c8534", FamilyAVR2, ELFArchAVR2>;
 def : Device<"at90s8535", FamilyAVR2, ELFArchAVR2>;
 def : Device<"ata5272", FamilyAVR25, ELFArchAVR25>;
+def : Device<"ata6616c", FamilyAVR25, ELFArchAVR25>;
 def : Device<"attiny13", FamilyAVR25, ELFArchAVR25, [FeatureSmallStack]>;
 def : Device<"attiny13a", FamilyAVR25, ELFArchAVR25, [FeatureSmallStack]>;
 def : Device<"attiny2313", FamilyAVR25, ELFArchAVR25, [FeatureSmallStack]>;
@@ -473,7 +480,6 @@
 def : Device<"atxmega32e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega16e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega8e5", FamilyXMEGAU, ELFArchXMEGA2>;
-def : Device<"atxmega32x1", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega64a3", FamilyXMEGA, ELFArchXMEGA4>;
 def : Device<"atxmega64a3u", FamilyXMEGAU, ELFArchXMEGA4>;
 def : Device<"atxmega64a4u", FamilyXMEGAU, ELFArchXMEGA4>;
@@ -514,28 +520,39 @@
 def : Device<"attiny40", FamilyTiny, ELFArchTiny>;
 def : Device<"attiny102", FamilyTiny, ELFArchTiny>;
 def : Device<"attiny104", FamilyTiny, ELFArchTiny>;
-def : Device<"attiny202", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny402", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny204", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny404", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny804", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1604", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny406", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny806", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1606", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny807", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1607", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny212", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny412", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny214", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny414", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny814", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1614", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny416", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny816", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1616", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny3216", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny417", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny817", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1617", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny3217", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny202", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny402", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny204", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny404", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny804", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny1604", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny406", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny806", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny1606", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny807", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny1607", FamilyX

[PATCH] D122401: [AVR] Add more devices

2022-03-24 Thread Ben Shi via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb62ea9b38b62: [AVR] Add more devices (authored by benshi001).
Herald added a subscriber: MaskRay.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122401/new/

https://reviews.llvm.org/D122401

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-link-mcu-family-unimplemented.c
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td

Index: llvm/lib/Target/AVR/AVRDevices.td
===
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -191,6 +191,12 @@
  [FamilyAVR0, FeatureBREAK, FeatureSRAM, FeatureTinyEncoding,
   FeatureSmallStack]>;
 
+def FamilyXMEGA3 : Family<"xmega3",
+  [FamilyAVR0, FeatureLPM, FeatureIJMPCALL,
+   FeatureADDSUBIW, FeatureSRAM, FeatureJMPCALL,
+   FeatureMultiplication, FeatureMOVW, FeatureLPMX,
+   FeatureBREAK]>;
+
 def FamilyXMEGA : Family<"xmega",
  [FamilyAVR0, FeatureLPM, FeatureIJMPCALL,
   FeatureADDSUBIW, FeatureSRAM, FeatureJMPCALL,
@@ -236,7 +242,7 @@
 def : Device<"avr6", FamilyAVR6, ELFArchAVR6>;
 def : Device<"avrxmega1", FamilyXMEGA, ELFArchXMEGA1>;
 def : Device<"avrxmega2", FamilyXMEGA, ELFArchXMEGA2>;
-def : Device<"avrxmega3", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"avrxmega3", FamilyXMEGA3, ELFArchXMEGA3>;
 def : Device<"avrxmega4", FamilyXMEGA, ELFArchXMEGA4>;
 def : Device<"avrxmega5", FamilyXMEGA, ELFArchXMEGA5>;
 def : Device<"avrxmega6", FamilyXMEGA, ELFArchXMEGA6>;
@@ -265,6 +271,7 @@
 def : Device<"at90c8534", FamilyAVR2, ELFArchAVR2>;
 def : Device<"at90s8535", FamilyAVR2, ELFArchAVR2>;
 def : Device<"ata5272", FamilyAVR25, ELFArchAVR25>;
+def : Device<"ata6616c", FamilyAVR25, ELFArchAVR25>;
 def : Device<"attiny13", FamilyAVR25, ELFArchAVR25, [FeatureSmallStack]>;
 def : Device<"attiny13a", FamilyAVR25, ELFArchAVR25, [FeatureSmallStack]>;
 def : Device<"attiny2313", FamilyAVR25, ELFArchAVR25, [FeatureSmallStack]>;
@@ -473,7 +480,6 @@
 def : Device<"atxmega32e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega16e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega8e5", FamilyXMEGAU, ELFArchXMEGA2>;
-def : Device<"atxmega32x1", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega64a3", FamilyXMEGA, ELFArchXMEGA4>;
 def : Device<"atxmega64a3u", FamilyXMEGAU, ELFArchXMEGA4>;
 def : Device<"atxmega64a4u", FamilyXMEGAU, ELFArchXMEGA4>;
@@ -514,28 +520,39 @@
 def : Device<"attiny40", FamilyTiny, ELFArchTiny>;
 def : Device<"attiny102", FamilyTiny, ELFArchTiny>;
 def : Device<"attiny104", FamilyTiny, ELFArchTiny>;
-def : Device<"attiny202", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny402", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny204", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny404", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny804", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1604", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny406", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny806", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1606", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny807", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1607", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny212", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny412", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny214", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny414", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny814", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1614", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny416", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny816", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1616", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny3216", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny417", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny817", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny1617", FamilyXMEGA, ELFArchXMEGA3>;
-def : Device<"attiny3217", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny202", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny402", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny204", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny404", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny804", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny1604", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny406", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny806", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny1606", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny807", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny1607", FamilyXMEGA3, ELFArchXMEGA3>;
+def : Device<"attiny212"

[PATCH] D118095: [clang][AVR] Reject non assembly source files for the avr1 family

2022-03-26 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D118095#3408037 , @aykevl wrote:

> @MaskRay it was my suggestion to move this from the toolchain specific file 
> to the generic file, because it makes the implementation much simpler. See my 
> comment D117423#3251110  for 
> details.
>
> In D118095#3282039 , @MaskRay wrote:
>
>> Rejecting some -mmcu= for C source files looks quite dubious. Does it really 
>> help users?
>
> For context: the avr1 family isn't supported by avr-gcc either. It's a old 
> and rather limited subset of the AVR instruction set. I assume it's going to 
> be rather difficult (and not worth the trouble) to write a C compiler for it, 
> as it doesn't even have a fully functional stack. From Wikipedia 
> :
>
>> The AVR1 subset was not popular and no new models have been introduced since 
>> 2000. It omits all RAM except for the 32 registers mapped at address 0–31 
>> and the I/O ports at addresses 32–95. The stack is replaced by a 3-level 
>> hardware stack, and the PUSH and POP instructions are deleted. All 16-bit 
>> operations are deleted, as are IJMP, ICALL, and all load and store 
>> addressing modes except indirect via Z.
>
> So I think the idea is to disallow this family so that users won't 
> accidentally try to use a C compiler for these chips. However, writing 
> assembly might still make sense.

My opinion is: we indeed need to be compatible with avr-gcc (accept assembly 
but reject c progarms), but we do it in AVR specific files and let common code 
clean.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118095/new/

https://reviews.llvm.org/D118095

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [clang][AVR] Eliminate link warnings when '-S' is specified

2022-03-26 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, MaskRay.
Herald added subscribers: StephenFan, Jim, dylanmckay.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D122524

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c


Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -35,3 +35,10 @@
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 
-nostdinc | FileCheck --check-prefix=NOSTDINC %s
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 
-nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 | 
FileCheck --check-prefix=LINK %s
+// LINK: warning: standard library not linked and so no interrupt vector table 
or compiler runtime routines will be linked
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -S 2>&1 
| FileCheck --check-prefix=NOLINK %s
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -c 2>&1 
| FileCheck --check-prefix=NOLINK %s
+// NOLINK-NOT: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -372,6 +372,7 @@
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs) &&
+  !Args.hasArg(options::OPT_S) &&
   !Args.hasArg(options::OPT_c /* does not apply when not linking */)) {
 std::string CPU = getCPUName(D, Args, Triple);
 


Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -35,3 +35,10 @@
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 -nostdinc | FileCheck --check-prefix=NOSTDINC %s
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 -nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 | FileCheck --check-prefix=LINK %s
+// LINK: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -S 2>&1 | FileCheck --check-prefix=NOLINK %s
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -c 2>&1 | FileCheck --check-prefix=NOLINK %s
+// NOLINK-NOT: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -372,6 +372,7 @@
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs) &&
+  !Args.hasArg(options::OPT_S) &&
   !Args.hasArg(options::OPT_c /* does not apply when not linking */)) {
 std::string CPU = getCPUName(D, Args, Triple);
 
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [clang][AVR] Eliminate link warnings when '-S' is specified

2022-03-26 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 418387.
benshi001 added a comment.

1. If '-S'/'-c' is specified, do not generate link warnings;
2. If '-S'/'-c' is not specified, '-mmcu' is specified and there is valid GCC 
installation, do not generate link warnings;
3. If '-S'/'-c' is not specified, and '-mmcu' is not specified, genereate link 
warnings;
4. If '-S'/'-c' is not specified, and there is no valid GCC installation, 
genereate link warnings.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c


Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -35,3 +35,30 @@
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 
-nostdinc | FileCheck --check-prefix=NOSTDINC %s
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 
-nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 
-mmcu=atmega328 2>&1 | FileCheck --check-prefix=CHECK5 %s
+// CHECK5-NOT: warning: no target microcontroller specified on command line, 
cannot link standard libraries
+// CHECK5-NOT: warning: no avr-gcc installation can be found on the system, 
cannot link standard libraries
+// CHECK5-NOT: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/ -mmcu=atmega328 2>&1 | 
FileCheck --check-prefix=CHECK6 %s
+// CHECK6-NOT: warning: no target microcontroller specified on command line, 
cannot link standard libraries
+// CHECK6: warning: no avr-gcc installation can be found on the system, cannot 
link standard libraries
+// CHECK6: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 | 
FileCheck --check-prefix=CHECK7 %s
+// CHECK7: warning: no target microcontroller specified on command line, 
cannot link standard libraries
+// CHECK7-NOT: warning: no avr-gcc installation can be found on the system, 
cannot link standard libraries
+// CHECK7: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -c 2>&1 
| FileCheck --check-prefix=CHECK8 %s
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -S 2>&1 
| FileCheck --check-prefix=CHECK8 %s
+// CHECK8: warning: no target microcontroller specified on command line, 
cannot link standard libraries
+// CHECK8-NOT: warning: no avr-gcc installation can be found on the system, 
cannot link standard libraries
+// CHECK8-NOT: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 
-mmcu=atmega328 -c 2>&1 | FileCheck --check-prefix=CHECK9 %s
+// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 
-mmcu=atmega328 -S 2>&1 | FileCheck --check-prefix=CHECK9 %s
+// CHECK9-NOT: warning: no target microcontroller specified on command line, 
cannot link standard libraries
+// CHECK9-NOT: warning: no avr-gcc installation can be found on the system, 
cannot link standard libraries
+// CHECK9-NOT: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -369,16 +369,18 @@
 : Generic_ELF(D, Triple, Args), LinkStdlib(false) {
   GCCInstallation.init(Triple, Args);
 
+  std::string CPU = getCPUName(D, Args, Triple);
+  if (CPU.empty())
+D.Diag(diag::warn_drv_avr_mcu_not_specified);
+
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs) &&
+  !Args.hasArg(options::OPT_S) &&
   !Args.hasArg(options::OPT_c /* does not apply when not linking */)) {
-std::string CPU = getCPUName(D, Args, Triple);
 
-if (CPU.empty()) {
-  // We cannot link any standard libraries without an MCU specified.
-  D.Diag(diag::warn_drv_avr_mcu_not_specified);
-} else {
+// We cannot link any standard libraries without an MCU specified.
+if (!CPU.empty()) {
   Optional FamilyName = GetMCUFamilyName(CPU);
   Optional AVRLibcRoot = findAVRLibcInstallation();
 


Index: clang/test/Driver/avr-toolchain.c
==

[PATCH] D122524: [clang][AVR] Eliminate link warnings when '-S' is specified

2022-03-26 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

1. If '-S'/'-c' is specified, do not generate link warnings;
  - User should be clear that he does not want link, so there is no link 
warning.

2. If '-S'/'-c' is not specified, '-mmcu' is specified and there is valid GCC 
installation, do not generate link warnings;
  - This is the normal case, link should be succesful.

3. If '-S'/'-c' is not specified, and '-mmcu' is not specified, genereate link 
warnings;
  - Since no MCU is specified, we should warn the user that no device library 
is linked.

4. If '-S'/'-c' is not specified, and there is no valid avr-GCC installation, 
genereate link warnings.
  - Since there is no avr-ld installed, we should warn the user that there is 
no link happens. That may changes if we choose to use lld in the future.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

I have built (with -DCMAKE_BUILD_TYPE=Debug) and tested your patch, but got the 
following failure

  FAIL: LLVM :: CodeGen/AVR/pseudo/STDWPtrQRr.mir (150 of 152)
   TEST 'LLVM :: CodeGen/AVR/pseudo/STDWPtrQRr.mir' FAILED 

  Script:
  --
  : 'RUN: at line 1';   /home/shiben/work/llvm-project/build-x/bin/llc -O0 
-run-pass=avr-expand-pseudo 
/home/shiben/work/llvm-project/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir -o - 
| /home/shiben/work/llvm-project/build-x/bin/FileCheck 
/home/shiben/work/llvm-project/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
  --
  Exit Code: 2
  
  Command Output (stderr):
  --
  
  # After AVR pseudo instruction expansion pass
  # Machine code for function test: IsSSA, NoPHIs, TracksLiveness, NoVRegs
  
  bb.0.entry:
STDPtrQRr $r29r28, 3, $r0
STDPtrQRr $r29r28, 4, $r1
STDPtrQRr $r29r28, 3, $r0
STDPtrQRr killed $r29r28, 4, $r1
STDPtrQRr $r29r28, 3, killed $r0
STDPtrQRr $r29r28, 4, killed $r1
STDPtrQRr $r29r28, 62, $r0
STDPtrQRr $r29r28, 63, $r1
PUSHRr $r28, implicit-def $sp, implicit $sp
PUSHRr $r29, implicit-def $sp, implicit $sp
$r28 = SBCIRdK killed $r28(tied-def 0), 193, implicit-def $sreg, implicit 
killed $sreg
$r29 = SBCIRdK killed $r29(tied-def 0), 255, implicit-def $sreg, implicit 
killed $sreg
STPtrRr $r29r28, $r0
STDPtrQRr $r29r28, 1, $r1
$r29 = POPRd implicit-def $sp, implicit $sp
$r28 = POPRd implicit-def $sp, implicit $sp
$r28 = SBCIRdK killed $r28(tied-def 0), 193, implicit-def $sreg, implicit 
killed $sreg
$r29 = SBCIRdK killed $r29(tied-def 0), 255, implicit-def $sreg, implicit 
killed $sreg
STPtrRr $r29r28, $r0
STDPtrQRr $r29r28, 1, $r1
PUSHRr $r28, implicit-def $sp, implicit $sp
PUSHRr $r29, implicit-def $sp, implicit $sp
$r28 = SBCIRdK killed $r28(tied-def 0), 193, implicit-def $sreg, implicit 
killed $sreg
$r29 = SBCIRdK killed $r29(tied-def 0), 255, implicit-def $sreg, implicit 
killed $sreg
STPtrRr $r29r28, killed $r0
STDPtrQRr $r29r28, 1, killed $r1
$r29 = POPRd implicit-def $sp, implicit $sp
$r28 = POPRd implicit-def $sp, implicit $sp
  
  # End machine code for function test.
  
  *** Bad machine code: Using an undefined physical register ***
  - function:test
  - basic block: %bb.0 entry (0x563a083b79e8)
  - instruction: $r28 = SBCIRdK killed $r28(tied-def 0), 193, implicit-def 
$sreg, implicit killed $sreg
  - operand 4:   implicit killed $sreg
  LLVM ERROR: Found 1 machine code errors.
  PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ 
and include the crash backtrace.
  Stack dump:
  0.  Program arguments: /home/shiben/work/llvm-project/build-x/bin/llc -O0 
-run-pass=avr-expand-pseudo 
/home/shiben/work/llvm-project/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir -o -
  1.  Running pass 'Function Pass Manager' on module 
'/home/shiben/work/llvm-project/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir'.
  2.  Running pass 'Verify generated machine code' on function '@test'
   #0 0x563a036e61a8 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) 
/home/shiben/work/llvm-project/llvm/lib/Support/Unix/Signals.inc:565:0
   #1 0x563a036e625f PrintStackTraceSignalHandler(void*) 
/home/shiben/work/llvm-project/llvm/lib/Support/Unix/Signals.inc:632:0
   #2 0x563a036e3e22 llvm::sys::RunSignalHandlers() 
/home/shiben/work/llvm-project/llvm/lib/Support/Signals.cpp:103:0
   #3 0x563a036e5b29 SignalHandler(int) 
/home/shiben/work/llvm-project/llvm/lib/Support/Unix/Signals.inc:407:0
   #4 0x7f1480842980 __restore_rt 
(/lib/x86_64-linux-gnu/libpthread.so.0+0x12980)
   #5 0x7f147f4f2e87 raise 
/build/glibc-uZu3wS/glibc-2.27/signal/../sysdeps/unix/sysv/linux/raise.c:51:0
   #6 0x7f147f4f47f1 abort 
/build/glibc-uZu3wS/glibc-2.27/stdlib/abort.c:81:0
   #7 0x563a036202ea llvm::install_bad_alloc_error_handler(void (*)(void*, 
char const*, bool), void*) 
/home/shiben/work/llvm-project/llvm/lib/Support/ErrorHandling.cpp:126:0
   #8 0x563a026cec3f (anonymous 
namespace)::MachineVerifierPass::runOnMachineFunction(llvm::MachineFunction&) 
/home/shiben/work/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp:307:0
   #9 0x563a0259c657 
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) 
/home/shiben/work/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:73:0
  #10 0x563a02c7f2b3 llvm::FPPassManager::runOnFunction(llvm::Function&) 
/home/shiben/work/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1430:0
  #11 0x563a02c7f633 llvm::FPPassManager::runOnModule(llvm::Module&) 
/home/shiben/work/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1476:0
  #12 0x563a02c7fa7b (anonymous 
namespace)::MPPassManager::runOnModule(llvm::Module&) 
/home/shiben/work/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1545:0
  #13 0x563a02c7a95b llvm::legacy::PassManagerImpl::run(llvm::Module&) 
/home/shiben/work/llvm-project/llvm/li

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1174
 
-  auto MIBLO = buildMI(MBB, MBBI, OpLo)
-   .addReg(DstReg)
-   .addImm(Imm)
-   .addReg(SrcLoReg, getKillRegState(SrcIsKill));
+buildMI(MBB, MBBI, AVR::SBCIWRdK)
+.addReg(DstReg, RegState::Define)

The above built error is caused by this line, this should be a SUBI other than 
a SBCI.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D122533#3410064 , @Patryk27 wrote:

> Hmm, that's weird - I've just re-checked and everything's working correctly 
> on my side; maybe you're testing it on an older LLVM revision? (for 
> reference, my patch is based off of the current LLVM's main branch, which - 
> at the time of writing this comment - is the 
> d9cea8d3a8fff86672174780312674871729578c 
>  commit).

I tested based on 
https://github.com/llvm/llvm-project/commit/674d52e8ced27bf427b3ea2c763a566ca9b8212a,
 which is also today's (March 27) revision. Did you build LLVM with 
-DCMAKE_BUILD_TYPE=Debug , it seems only debug version of llvm will get this 
issue be triggered.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir:1
-# RUN: llc -O0 -run-pass=avr-expand-pseudo  %s -o - | FileCheck %s
+# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
 

You can trigger the bug, with `-verify-machineinstrs` option after the 
`-run-pass=avr-expand-pseudo` option.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1174
 
-  auto MIBLO = buildMI(MBB, MBBI, OpLo)
-   .addReg(DstReg)
-   .addImm(Imm)
-   .addReg(SrcLoReg, getKillRegState(SrcIsKill));
+buildMI(MBB, MBBI, AVR::SBCIWRdK)
+.addReg(DstReg, RegState::Define)

Patryk27 wrote:
> benshi001 wrote:
> > The above built error is caused by this line, this should be a SUBI other 
> > than a SBCI.
> Out of curiosity, why SUBI? (just trying to understand what is the difference 
> between both)
> 
> It looks like currently - 
> https://github.com/llvm/llvm-project/blob/d9cea8d3a8fff86672174780312674871729578c/llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp#L101
>  - we expand to SBCI.
I thought this should be an old bug which has never been triggered. Actually if 
C bit in SREG is set before current `STWPtrPdRr`, then it is sure to run into  
wrong.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D122533#3410072 , @Patryk27 wrote:

> I think I'm using `=Release` instead of `=Debug`, that would explain the 
> difference, yeah;

You need not Debug, just add `-verify-machineinstrs` option after the 
`-run-pass=avr-expand-pseudo`, then the bug will also be triggered.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1174
 
-  auto MIBLO = buildMI(MBB, MBBI, OpLo)
-   .addReg(DstReg)
-   .addImm(Imm)
-   .addReg(SrcLoReg, getKillRegState(SrcIsKill));
+buildMI(MBB, MBBI, AVR::SBCIWRdK)
+.addReg(DstReg, RegState::Define)

benshi001 wrote:
> Patryk27 wrote:
> > benshi001 wrote:
> > > The above built error is caused by this line, this should be a SUBI other 
> > > than a SBCI.
> > Out of curiosity, why SUBI? (just trying to understand what is the 
> > difference between both)
> > 
> > It looks like currently - 
> > https://github.com/llvm/llvm-project/blob/d9cea8d3a8fff86672174780312674871729578c/llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp#L101
> >  - we expand to SBCI.
> I thought this should be an old bug which has never been triggered. Actually 
> if C bit in SREG is set before current `STWPtrPdRr`, then it is sure to run 
> into  wrong.
Sorry, I think this should be a SUBIW, neither SBCIW nor SUBI.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir:1
-# RUN: llc -O0 -run-pass=avr-expand-pseudo  %s -o - | FileCheck %s
+# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
 

benshi001 wrote:
> You can trigger the bug, with `-verify-machineinstrs` option after the 
> `-run-pass=avr-expand-pseudo` option.
I still suggest you add a `-verify-machineinstrs` option after the 
`-run-pass=avr-expand-pseudo` option.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 accepted this revision.
benshi001 added a comment.
This revision is now accepted and ready to land.

@aykevl How about your opinion? I think current form is good!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D122533#3410259 , @Patryk27 wrote:

> Ok, I have added the switch; I think a separate patch that adds that switch 
> to all of the AVR tests could come handy - what do you think?

No. `-verify-machineinstrs` might be default in the future, which is still 
under discuss. Currently we just make highly risky case with explicit 
`-verify-machineinstrs`, such as yours. ^_^

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [clang][AVR] Generate link warnings properly

2022-03-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 418481.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -1,7 +1,7 @@
 // UNSUPPORTED: system-windows
 // A basic clang -cc1 command-line.
 
-// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree -resource-dir=%S/Inputs/resource_dir 2>&1 | FileCheck --check-prefix=CHECK1 %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -resource-dir=%S/Inputs/resource_dir 2>&1 | FileCheck --check-prefix=CHECK1 %s
 // CHECK1: clang{{.*}} "-cc1" "-triple" "avr"
 // CHECK1-SAME: "-resource-dir" "[[RESOURCE:[^"]+]]"
 // CHECK1-SAME: "-isysroot" "[[SYSROOT:[^"]+/basic_avr_tree]]"
@@ -12,26 +12,57 @@
 // CHECK1-SAME: "-o" "a.out"
 // CHECK1-SAME: {{^}} "--gc-sections"
 
-// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree_2/opt/local -S 2>&1 | FileCheck --check-prefix=CHECK2 %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree_2/opt/local -S 2>&1 | FileCheck --check-prefix=CHECK2 %s
 // CHECK2: clang{{.*}} "-cc1" "-triple" "avr"
 // CHECK2-SAME: "-isysroot" "[[SYSROOT:[^"]+/basic_avr_tree_2/opt/local]]"
 // CHECK2-SAME: "-internal-isystem"
 // CHECK2-SAME: {{^}} "[[SYSROOT]]/lib/gcc/avr/10.3.0/../../../../avr/include"
 
-// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree_2 -S 2>&1 | FileCheck --check-prefix=CHECK3 %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree_2 -S 2>&1 | FileCheck --check-prefix=CHECK3 %s
 // CHECK3: clang{{.*}} "-cc1" "-triple" "avr"
 // CHECK3-SAME: "-isysroot" "[[SYSROOT:[^"]+/basic_avr_tree_2]]"
 // CHECK3-SAME: "-internal-isystem"
 // CHECK3-SAME: {{^}} "[[SYSROOT]]/usr/avr/include"
 
-// RUN: %clang %s -### -target avr 2>&1 | FileCheck -check-prefix=CC1 %s
+// RUN: %clang %s -### --target=avr 2>&1 | FileCheck -check-prefix=CC1 %s
 // CC1: clang{{.*}} "-cc1" "-triple" "avr" {{.*}} "-fno-use-init-array" "-fno-use-cxa-atexit"
 
-// RUN: %clang %s -### -target avr -fuse-init-array -fuse-cxa-atexit 2>&1 | FileCheck -check-prefix=CHECK4 %s
+// RUN: %clang %s -### --target=avr -fuse-init-array -fuse-cxa-atexit 2>&1 | FileCheck -check-prefix=CHECK4 %s
 // CHECK4: clang{{.*}} "-cc1" "-triple" "avr"
 // CHECK4-NOT: "-fno-use-init-array"
 // CHECK4-NOT: "-fno-use-cxa-atexit"
 
-// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 -nostdinc | FileCheck --check-prefix=NOSTDINC %s
-// RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 -nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree 2>&1 -nostdinc | FileCheck --check-prefix=NOSTDINC %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree 2>&1 -nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
+
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -mmcu=atmega328 2>&1 | FileCheck --check-prefix=CHECK5 %s
+// CHECK5-NOT: warning: no {{.*}} microcontroller
+// CHECK5-NOT: warning: no avr-gcc
+// CHECK5-NOT: warning: {{.*}} library not linked
+
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/ -mmcu=atmega328 2>&1 | FileCheck --check-prefix=CHECK6 %s
+// CHECK6-NOT: warning: no {{.*}} microcontroller
+// CHECK6: warning: no avr-gcc installation can be found on the system, cannot link standard libraries
+// CHECK6: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree 2>&1 | FileCheck --check-prefix=CHECK7 %s
+// CHECK7: warning: no target microcontroller specified on command line, cannot link standard libraries
+// CHECK7-NOT: warning: no avr-gcc
+// CHECK7: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
+
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -c 2>&1 | FileCheck --check-prefix=CHECK8 %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -S 2>&1 | FileCheck --check-prefix=CHECK8 %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -E 2>&1 | FileCheck --check-prefix=CHECK8 %s
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -fsyntax-only 2>&1 | FileCheck --check-prefix=CHECK8 %s
+// CHECK8: warning: no target microcontroller specified on command line, cannot link standard libraries
+// CHECK8-NOT: warning: no avr-gcc
+// CHECK8-NOT: warning: {{.*}} library not linked
+
+// RUN: %clang %s -### --target=avr --sysroot %S/Inputs/basic_avr_tree -mmcu=atmega328 -c 2>&1 | FileCheck --

[PATCH] D122553: [Driver][AVR] Fix warn_drv_avr_stdlib_not_linked condition

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 accepted this revision.
benshi001 added inline comments.
This revision is now accepted and ready to land.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:451
+  !Args.hasArg(options::OPT_nodefaultlibs)) {
+if (CPU.empty()) {
+  // We cannot link any standard libraries without an MCU specified.

I think we should warn empty CPU name in the compile stage. For example, if 
user specified `-c` but not `-mmcu`, then we can not run to here to warn cpu is 
empty.

So I will accept and rebase on your code.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122553/new/

https://reviews.llvm.org/D122553

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [clang][AVR] Emit proper warnings

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 418634.
benshi001 marked an inline comment as done.
benshi001 retitled this revision from "[clang][AVR] Generate link warnings 
properly" to "[clang][AVR] Emit proper warnings".
benshi001 edited the summary of this revision.
benshi001 set the repository for this revision to rG LLVM Github Monorepo.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c


Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -36,10 +36,38 @@
 // RUN: %clang %s -### -target avr --sysroot %S/Inputs/basic_avr_tree 2>&1 
-nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
 
-// RUN: %clang -### --target=avr %s 2>&1 | FileCheck 
--check-prefix=WARN_STDLIB %s
-// RUN: %clang -### --target=avr -mmcu=atmega328 %s 2>&1 | FileCheck 
--check-prefix=NOWARN_STDLIB %s
-// RUN: %clang -### --target=avr -c %s 2>&1 | FileCheck 
--check-prefix=NOWARN_STDLIB %s
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs/basic_avr_tree 
-mmcu=atmega328 2>&1 | FileCheck --check-prefix=NOWARN %s
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs/basic_avr_tree 
-mmcu=atmega328 -S 2>&1 | FileCheck --check-prefix=NOWARN %s
+// NOWARN-NOT: warning:
 
-// WARN_STDLIB: warning: no target microcontroller specified on command line, 
cannot link standard libraries, please pass -mmcu=
-// WARN_STDLIB: warning: standard library not linked and so no interrupt 
vector table or compiler runtime routines will be linked
-// NOWARN_STDLIB-NOT: warning:
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs -S 2>&1 | FileCheck 
--check-prefixes=NOLINKA,NOLINK %s
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs/basic_avr_tree -S 2>&1 
| FileCheck --check-prefixes=NOLINKB,NOLINK %s
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs -mmcu=atmega328 -S 
2>&1 | FileCheck --check-prefixes=NOLINKC,NOLINK %s
+// NOLINKA: warning: no target microcontroller specified on command line, 
cannot link standard libraries, please pass -mmcu=
+// NOLINKA: warning: no avr-gcc installation can be found on the system, 
cannot link standard libraries
+// NOLINKB: warning: no target microcontroller specified on command line, 
cannot link standard libraries, please pass -mmcu=
+// NOLINKC: warning: no avr-gcc installation can be found on the system, 
cannot link standard libraries
+// NOLINK-NOT: warning: {{.*}} avr-libc
+// NOLINK-NOT: warning: {{.*}} interrupt vector
+// NOLINK-NOT: warning: {{.*}} data section address
+// NOLINKB-NOT: warning: {{.*}} microcontroller
+// NOLINKC-NOT: warning: {{.*}} avr-gcc
+
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs 2>&1 | FileCheck 
--check-prefixes=LINKA1,LINKA %s
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs/basic_avr_tree 2>&1 | 
FileCheck --check-prefixes=LINKA2,LINKA %s
+// LINKA: warning: no target microcontroller specified on command line, cannot 
link standard libraries, please pass -mmcu=
+// LINKA1: warning: no avr-gcc installation can be found on the system, cannot 
link standard libraries
+// LINKA: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+// LINKA: support for passing the data section address to the linker for 
microcontroller '' is not implemented
+// LINKA2-NOT: warning: {{.*}} avr-gcc
+// LINKA-NOT: warning: {{.*}} avr-libc
+
+// RUN: %clang -### --target=avr %s --sysroot %S/Inputs 2>&1 | FileCheck 
--check-prefixes=LINKB1,LINKB %s
+// LINKB1: warning: no target microcontroller specified on command line, 
cannot link standard libraries, please pass -mmcu=
+// LINKB: warning: no avr-gcc installation can be found on the system, cannot 
link standard libraries
+// LINKB2: warning: no avr-libc installation can be found on the system, 
cannot link standard libraries
+// LINKB: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+// LINKB1: support for passing the data section address to the linker for 
microcontroller '' is not implemented
+// LINKB2-NOT: warning: {{.*}} microcontroller
+// LINKB1-NOT: warning: {{.*}} avr-libc
+// LINKB2-NOT: warning: {{.*}} data section address
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -369,6 +369,10 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
+  std::string CPU = getCPUName(D, Args, Triple);
+  if (CPU.empty())
+D.Diag(diag::warn_drv_avr_mcu_not_specified);
+
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!A

[PATCH] D122524: [clang][AVR] Emit proper warnings

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D122524#3410542 , @MaskRay wrote:

> I think it is excessive to add so many RUN lines. I do not understand much 
> about AVR -mcpu. That said, I created D122553 
>  for what I think should be done for the 
> `-c/-S/-fsyntax-only` condition. More tests would just be excessive.
>
> You may adjust the patch to do the rest cleanups/fixes.

I have made some changes based on your https://reviews.llvm.org/D122553, it 
seems you have reverted. I suggest you recommit, since I have fixed the 
failures of lacking avr-gcc.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [Driver][AVR] Emit proper warnings for different options

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 418764.
benshi001 retitled this revision from "[clang][AVR] Emit proper warnings" to 
"[Driver][AVR] Emit proper warnings for different options".

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c


Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -36,10 +36,25 @@
 // RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 2>&1 
-nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
 
-// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree %s 2>&1 | 
FileCheck --check-prefix=WARN_STDLIB %s
-// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 
-mmcu=atmega328 %s 2>&1 | FileCheck --check-prefix=NOWARN_STDLIB %s
-// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -c %s 2>&1 
| FileCheck --check-prefix=NOWARN_STDLIB %s
-
-// WARN_STDLIB: warning: no target microcontroller specified on command line, 
cannot link standard libraries, please pass -mmcu=
-// WARN_STDLIB: warning: standard library not linked and so no interrupt 
vector table or compiler runtime routines will be linked
-// NOWARN_STDLIB-NOT: warning:
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 
-mmcu=atmega328 %s 2>&1 | FileCheck --check-prefix=NOWARN %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 
-mmcu=atmega328 -S %s 2>&1 | FileCheck --check-prefix=NOWARN %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 -S %s 
2>&1 | FileCheck --check-prefix=NOWARN %s
+// NOWARN-NOT: warning:
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -S %s 2>&1 
| FileCheck --check-prefixes=NOMCU,LINKA %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -S %s 2>&1 | FileCheck 
--check-prefixes=NOMCU,LINKA %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree %s 2>&1 | 
FileCheck --check-prefixes=NOMCU,LINKB %s
+// NOMCU: warning: no target microcontroller specified on command line, cannot 
link standard libraries, please pass -mmcu=
+// LINKB: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+// LINKB: warning: support for passing the data section address to the linker 
for microcontroller '' is not implemented
+// NOMCU-NOT: warning: {{.*}} avr-gcc
+// NOMCU-NOT: warning: {{.*}} avr-libc
+// LINKA-NOT: warning: {{.*}} interrupt vector
+// LINKA-NOT: warning: {{.*}} data section address
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 %s 2>&1 
| FileCheck --check-prefixes=NOGCC %s
+// NOGCC: warning: no avr-gcc installation can be found on the system, cannot 
link standard libraries
+// NOGCC: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+// NOGCC-NOT: warning: {{.*}} microcontroller
+// NOGCC-NOT: warning: {{.*}} avr-libc
+// NOGCC-NOT: warning: {{.*}} data section address
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -369,16 +369,17 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
+  std::string CPU = getCPUName(D, Args, Triple);
+  if (CPU.empty())
+D.Diag(diag::warn_drv_avr_mcu_not_specified);
+
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
-  !Args.hasArg(options::OPT_nodefaultlibs)) {
-if (GCCInstallation.isValid()) {
-  GCCInstallPath = GCCInstallation.getInstallPath();
-  std::string GCCParentPath(GCCInstallation.getParentLibPath());
-  getProgramPaths().push_back(GCCParentPath + "/../bin");
-} else {
-  D.Diag(diag::warn_drv_avr_gcc_not_found);
-}
+  !Args.hasArg(options::OPT_nodefaultlibs) &&
+  GCCInstallation.isValid()) {
+GCCInstallPath = GCCInstallation.getInstallPath();
+std::string GCCParentPath(GCCInstallation.getParentLibPath());
+getProgramPaths().push_back(GCCParentPath + "/../bin");
   }
 }
 
@@ -448,10 +449,7 @@
   bool LinkStdlib = false;
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs)) {
-if (CPU.empty()) {
-  // We cannot link any standard libraries without an MCU specified.
-  D.Diag(diag::warn_drv_avr_mcu_not_specified);
-} else {
+if (!CPU.empty()) {
   Optional FamilyName = GetMCUFamilyName(CPU);
   Optional AVRLibcRoot = TC.findAVRLibcInstallation();
 
@@ -460,10 +458,13 @@
 // mapping table yet.
 D.Diag(diag::warn_drv_avr_family_linking_stdlibs_not_implemente

[PATCH] D122524: [Driver][AVR] Emit proper warnings for different options

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D122524#3411879 , @MaskRay wrote:

> In D122524#3411872 , @benshi001 
> wrote:
>
>> In D122524#3410542 , @MaskRay 
>> wrote:
>>
>>> I think it is excessive to add so many RUN lines. I do not understand much 
>>> about AVR -mcpu. That said, I created D122553 
>>>  for what I think should be done for the 
>>> `-c/-S/-fsyntax-only` condition. More tests would just be excessive.
>>>
>>> You may adjust the patch to do the rest cleanups/fixes.
>>
>> I have made some changes based on your https://reviews.llvm.org/D122553, it 
>> seems you have reverted. I suggest you recommit, since I have fixed the 
>> failures of lacking avr-gcc.
>
> I did not specify --sysroot so the new tests failed on systems without 
> avr-gcc. Relanded.

I have made some changes based on your code:

1. We should always warn if there is no mmcu specified, since its info 
(instruction set version) is used by the llvm backend.
2. We need no warn no avr-gcc&avr-libc if `-S`/`-c` is specified, since the 
compiling stage need neither avr-gcc nor avr-libc.

Thanks for your way to avoid checking so many `-c`/`-S`/`-fsyntax-only`/... 
conditions.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [Driver][AVR] Emit proper warnings for different options

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 marked an inline comment as done.
benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:451
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs)) {
+if (!CPU.empty()) {

MaskRay wrote:
> The two if can be combined.
I will do it when committing.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [Driver][AVR] Emit proper warnings for different options

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 marked an inline comment as done.
benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:477
 
 if (!LinkStdlib)
   D.Diag(diag::warn_drv_avr_stdlib_not_linked);

We should not merge the above two `if`, due to this check.

So I will keep my orginal form when committing. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122524: [Driver][AVR] Emit proper warnings for different options

2022-03-28 Thread Ben Shi via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG50de68bc2ffc: [Driver][AVR] Emit proper warnings for 
different options (authored by benshi001).

Changed prior to commit:
  https://reviews.llvm.org/D122524?vs=418764&id=418775#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122524/new/

https://reviews.llvm.org/D122524

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c


Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -36,10 +36,25 @@
 // RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 2>&1 
-nostdlibinc | FileCheck --check-prefix=NOSTDINC %s
 // NOSTDINC-NOT: "-internal-isystem" {{".*avr/include"}}
 
-// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree %s 2>&1 | 
FileCheck --check-prefix=WARN_STDLIB %s
-// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 
-mmcu=atmega328 %s 2>&1 | FileCheck --check-prefix=NOWARN_STDLIB %s
-// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -c %s 2>&1 
| FileCheck --check-prefix=NOWARN_STDLIB %s
-
-// WARN_STDLIB: warning: no target microcontroller specified on command line, 
cannot link standard libraries, please pass -mmcu=
-// WARN_STDLIB: warning: standard library not linked and so no interrupt 
vector table or compiler runtime routines will be linked
-// NOWARN_STDLIB-NOT: warning:
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 
-mmcu=atmega328 %s 2>&1 | FileCheck --check-prefix=NOWARN %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree 
-mmcu=atmega328 -S %s 2>&1 | FileCheck --check-prefix=NOWARN %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 -S %s 
2>&1 | FileCheck --check-prefix=NOWARN %s
+// NOWARN-NOT: warning:
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -S %s 2>&1 
| FileCheck --check-prefixes=NOMCU,LINKA %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -S %s 2>&1 | FileCheck 
--check-prefixes=NOMCU,LINKA %s
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree %s 2>&1 | 
FileCheck --check-prefixes=NOMCU,LINKB %s
+// NOMCU: warning: no target microcontroller specified on command line, cannot 
link standard libraries, please pass -mmcu=
+// LINKB: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+// LINKB: warning: support for passing the data section address to the linker 
for microcontroller '' is not implemented
+// NOMCU-NOT: warning: {{.*}} avr-gcc
+// NOMCU-NOT: warning: {{.*}} avr-libc
+// LINKA-NOT: warning: {{.*}} interrupt vector
+// LINKA-NOT: warning: {{.*}} data section address
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 %s 2>&1 
| FileCheck --check-prefixes=NOGCC %s
+// NOGCC: warning: no avr-gcc installation can be found on the system, cannot 
link standard libraries
+// NOGCC: warning: standard library not linked and so no interrupt vector 
table or compiler runtime routines will be linked
+// NOGCC-NOT: warning: {{.*}} microcontroller
+// NOGCC-NOT: warning: {{.*}} avr-libc
+// NOGCC-NOT: warning: {{.*}} data section address
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -369,16 +369,17 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
+  std::string CPU = getCPUName(D, Args, Triple);
+  if (CPU.empty())
+D.Diag(diag::warn_drv_avr_mcu_not_specified);
+
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
-  !Args.hasArg(options::OPT_nodefaultlibs)) {
-if (GCCInstallation.isValid()) {
-  GCCInstallPath = GCCInstallation.getInstallPath();
-  std::string GCCParentPath(GCCInstallation.getParentLibPath());
-  getProgramPaths().push_back(GCCParentPath + "/../bin");
-} else {
-  D.Diag(diag::warn_drv_avr_gcc_not_found);
-}
+  !Args.hasArg(options::OPT_nodefaultlibs) &&
+  GCCInstallation.isValid()) {
+GCCInstallPath = GCCInstallation.getInstallPath();
+std::string GCCParentPath(GCCInstallation.getParentLibPath());
+getProgramPaths().push_back(GCCParentPath + "/../bin");
   }
 }
 
@@ -448,22 +449,22 @@
   bool LinkStdlib = false;
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs)) {
-if (CPU.empty()) {
-  // We cannot link any standard libraries without an MCU specified.
-  D.Diag(diag::warn_drv_avr_mcu_not_specified);
-} else {
-  Optional FamilyName = GetMCUFamilyName(CPU);
-  Optional AVRLibcRoot

[PATCH] D122712: Make test case warning more specific for pattern match

2022-03-30 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

I do not like this change, since

1. actually there may be many kinds of warnings emitted by the clang-driver-avr 
depending on different options, and this single line `// NOWARN-NOT: warning:` 
means non of these possible warnings will be emitted.

2. we may add/delete/modify warnings in the future, so we should not make it 
specific .


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122712/new/

https://reviews.llvm.org/D122712

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][AVR] Add initial support of target AVR

2022-04-06 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: MaskRay, ddunbar, howard.hinnant, samsonov, aykevl.
Herald added subscribers: StephenFan, Jim, mgorny, dberris, dylanmckay.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: Sanitizers, cfe-commits, jacquesguan, aheejin.
Herald added projects: clang, Sanitizers.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D123200

Files:
  clang/lib/Basic/Targets/AVR.cpp
  compiler-rt/cmake/Modules/CompilerRTUtils.cmake
  compiler-rt/cmake/base-config-ix.cmake
  compiler-rt/cmake/builtin-config-ix.cmake
  compiler-rt/cmake/config-ix.cmake
  compiler-rt/lib/builtins/CMakeLists.txt

Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -668,6 +668,11 @@
   ${GENERIC_TF_SOURCES}
   ${GENERIC_SOURCES})
 
+set(avr_SOURCES
+  ${GENERIC_TF_SOURCES}
+  ${GENERIC_SOURCES}
+)
+
 add_custom_target(builtins)
 set_target_properties(builtins PROPERTIES FOLDER "Compiler-RT Misc")
 
Index: compiler-rt/cmake/config-ix.cmake
===
--- compiler-rt/cmake/config-ix.cmake
+++ compiler-rt/cmake/config-ix.cmake
@@ -203,8 +203,10 @@
 
 # Detect whether the current target platform is 32-bit or 64-bit, and setup
 # the correct commandline flags needed to attempt to target 32-bit and 64-bit.
+# AVR and MSP430 are omitted since they have 16-bit pointers.
 if (NOT CMAKE_SIZEOF_VOID_P EQUAL 4 AND
-NOT CMAKE_SIZEOF_VOID_P EQUAL 8)
+NOT CMAKE_SIZEOF_VOID_P EQUAL 8 AND
+NOT ${arch} MATCHES "avr|msp430")
   message(FATAL_ERROR "Please use architecture with 4 or 8 byte pointers.")
 endif()
 
Index: compiler-rt/cmake/builtin-config-ix.cmake
===
--- compiler-rt/cmake/builtin-config-ix.cmake
+++ compiler-rt/cmake/builtin-config-ix.cmake
@@ -52,6 +52,7 @@
 set(WASM32 wasm32)
 set(WASM64 wasm64)
 set(VE ve)
+set(AVR avr)
 
 if(APPLE)
   set(ARM64 arm64 arm64e)
@@ -63,7 +64,7 @@
   ${X86} ${X86_64} ${ARM32} ${ARM64}
   ${HEXAGON} ${MIPS32} ${MIPS64} ${PPC32} ${PPC64}
   ${RISCV32} ${RISCV64} ${SPARC} ${SPARCV9}
-  ${WASM32} ${WASM64} ${VE})
+  ${WASM32} ${WASM64} ${VE} ${AVR})
 
 include(CompilerRTUtils)
 include(CompilerRTDarwinUtils)
Index: compiler-rt/cmake/base-config-ix.cmake
===
--- compiler-rt/cmake/base-config-ix.cmake
+++ compiler-rt/cmake/base-config-ix.cmake
@@ -248,6 +248,8 @@
   test_target_arch(wasm64 "" "--target=wasm64-unknown-unknown")
 elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "ve")
   test_target_arch(ve "__ve__" "--target=ve-unknown-none")
+elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "avr")
+  test_target_arch(avr "__avr__" "--target=avr")
 endif()
 set(COMPILER_RT_OS_SUFFIX "")
   endif()
Index: compiler-rt/cmake/Modules/CompilerRTUtils.cmake
===
--- compiler-rt/cmake/Modules/CompilerRTUtils.cmake
+++ compiler-rt/cmake/Modules/CompilerRTUtils.cmake
@@ -168,6 +168,7 @@
   check_symbol_exists(__wasm32__ "" __WEBASSEMBLY32)
   check_symbol_exists(__wasm64__ "" __WEBASSEMBLY64)
   check_symbol_exists(__ve__ "" __VE)
+  check_symbol_exists(__avr__ "" __AVR)
   if(__ARM)
 add_default_target_arch(arm)
   elseif(__AARCH64)
@@ -212,6 +213,8 @@
 add_default_target_arch(wasm64)
   elseif(__VE)
 add_default_target_arch(ve)
+  elseif(__AVR)
+add_default_target_arch(avr)
   endif()
 endmacro()
 
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -377,7 +377,9 @@
  MacroBuilder &Builder) const {
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
+  Builder.defineMacro("__avr");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__avr__");
   Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][AVR] Add initial support of target AVR

2022-04-06 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

Build `libclang_rt.builtins-avr.a` which contains math functions, such as 
`mulsi3`, `divmodsi4`, `mulsf3`, ...


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D106854: Pass `--start-group` and `--end-group` to the linker when using the AVR toolchain

2021-07-27 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:430
 
+CmdArgs.push_back("--end-group");
+

You are appreciated to use 'git show -U99' or 'git diff -U99' for 
better context display.



Comment at: clang/test/Driver/avr-ld.c:23
 // RUN: %clang -### --target=avr -mmcu=atmega328 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKH %s
-// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" {{.*}} 
"-latmega328" "-mavr5"
+// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" {{.*}} 
"-latmega328" {{.*}} "-mavr5"
 

could you add explict options (which you added) to these tests ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106854/new/

https://reviews.llvm.org/D106854

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D106854: Pass `--start-group` and `--end-group` to the linker when using the AVR toolchain

2021-07-29 Thread Ben Shi via Phabricator via cfe-commits

benshi001 accepted this revision.
benshi001 added a comment.
This revision is now accepted and ready to land.

Do you need I land your patch for you?

What name and email do you expected to see in the commit message ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106854/new/

https://reviews.llvm.org/D106854

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D106854: Pass `--start-group` and `--end-group` to the linker when using the AVR toolchain

2021-07-29 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

Do you mind if I change the title to "Pass --start-group and --end-group to 
avr-ld in clang driver" ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106854/new/

https://reviews.llvm.org/D106854

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D106854: Pass `--start-group` and `--end-group` to the linker when using the AVR toolchain

2021-07-29 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rG1e6a93f15c7e: [AVR][clang] Pass '--start-group' 
and '--end-group' options to avr-ld (authored by mhjacobson, 
committed by benshi001).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106854/new/

https://reviews.llvm.org/D106854

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-ld.c


Index: clang/test/Driver/avr-ld.c
===
--- clang/test/Driver/avr-ld.c
+++ clang/test/Driver/avr-ld.c
@@ -1,44 +1,44 @@
 // RUN: %clang -### --target=avr -mmcu=at90s2313 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKA %s
-// LINKA: {{".*ld.*"}} {{.*}} {{"-L.*tiny-stack"}} {{.*}} "-Tdata=0x800060" 
{{.*}} "-lat90s2313" "-mavr2"
+// LINKA: {{".*ld.*"}} {{.*}} {{"-L.*tiny-stack"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-lat90s2313" "--end-group" "-mavr2"
 
 // RUN: %clang -### --target=avr -mmcu=at90s8515 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKB %s
-// LINKB: {{".*ld.*"}} {{.*}} "-Tdata=0x800060" {{.*}} "-lat90s8515" "-mavr2"
+// LINKB: {{".*ld.*"}} {{.*}} "-Tdata=0x800060" "--start-group" {{.*}} 
"-lat90s8515" "--end-group" "-mavr2"
 
 // RUN: %clang -### --target=avr -mmcu=attiny13 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKC %s
-// LINKC: {{".*ld.*"}} {{.*}} {{"-L.*avr25/tiny-stack"}} {{.*}} 
"-Tdata=0x800060" {{.*}} "-lattiny13" "-mavr25"
+// LINKC: {{".*ld.*"}} {{.*}} {{"-L.*avr25/tiny-stack"}} {{.*}} 
"-Tdata=0x800060" "--start-group" {{.*}} "-lattiny13" "--end-group" "-mavr25"
 
 // RUN: %clang -### --target=avr -mmcu=attiny44 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKD %s
-// LINKD: {{".*ld.*"}} {{.*}} {{"-L.*avr25"}} {{.*}} "-Tdata=0x800060" {{.*}} 
"-lattiny44" "-mavr25"
+// LINKD: {{".*ld.*"}} {{.*}} {{"-L.*avr25"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-lattiny44" "--end-group" "-mavr25"
 
 // RUN: %clang -### --target=avr -mmcu=atmega103 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKE %s
-// LINKE: {{".*ld.*"}} {{.*}} {{"-L.*avr31"}} {{.*}} "-Tdata=0x800060" {{.*}} 
"-latmega103" "-mavr31"
+// LINKE: {{".*ld.*"}} {{.*}} {{"-L.*avr31"}} {{.*}} "-Tdata=0x800060" 
"--start-group" {{.*}} "-latmega103" "--end-group" "-mavr31"
 
 // RUN: %clang -### --target=avr -mmcu=atmega8u2 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKF %s
-// LINKF: {{".*ld.*"}} {{.*}} {{"-L.*avr35"}} {{.*}} "-Tdata=0x800100" {{.*}} 
"-latmega8u2" "-mavr35"
+// LINKF: {{".*ld.*"}} {{.*}} {{"-L.*avr35"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega8u2" "--end-group" "-mavr35"
 
 // RUN: %clang -### --target=avr -mmcu=atmega48pa --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKG %s
-// LINKG: {{".*ld.*"}} {{.*}} {{"-L.*avr4"}} {{.*}} "-Tdata=0x800100" {{.*}} 
"-latmega48pa" "-mavr4"
+// LINKG: {{".*ld.*"}} {{.*}} {{"-L.*avr4"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega48pa" "--end-group" "-mavr4"
 
 // RUN: %clang -### --target=avr -mmcu=atmega328 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKH %s
-// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" {{.*}} 
"-latmega328" "-mavr5"
+// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" 
"--start-group" {{.*}} "-latmega328" "--end-group" "-mavr5"
 
 // RUN: %clang -### --target=avr -mmcu=atmega1281 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKI %s
-// LINKI: {{".*ld.*"}} {{.*}} {{"-L.*avr51"}} {{.*}} "-Tdata=0x800200" {{.*}} 
"-latmega1281" "-mavr51"
+// LINKI: {{".*ld.*"}} {{.*}} {{"-L.*avr51"}} {{.*}} "-Tdata=0x800200" 
"--start-group" {{.*}} "-latmega1281" "--end-group" "-mavr51"
 
 // RUN: %clang -### --target=avr -mmcu=atmega2560 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKJ %s
-// LINKJ: {{".*ld.*"}} {{.*}} {{"-L.*avr6"}} {{.*}} "-Tdata=0x800200" {{.*}} 
"-latmega2560" "-mavr6"
+// LINKJ: {{".*ld.*"}} {{.*}} {{"-L.*avr6"}} {{.*}} "-Tdata=0x800200" 
"--start-group" {{.*}} "-latmega2560" "--end-group" "-mavr6"
 
 // RUN: %clang -### --target=avr -mmcu=attiny10 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKK %s
-// LINKK: {{".*ld.*"}} {{.*}} {{"-L.*avrtiny"}} {{.*}} "-Tdata=0x800040" 
{{.*}} "-lattiny10" "-mavrtiny"
+// LINKK: {{".*ld.*"}} {{.*}} {{"-L.*avrtiny"}} {{.*}} "-Tdata=0x800040" 
"--start-group" {{.*}} "-lattiny10" "--end-group" "-mavrtiny"
 
 // RUN: %clang -### --target=avr -mmcu=atxmega16a4 --sysroot 
%S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKL %s
-// LINKL: {{".*ld.*"}} {{.*}} {{"-L.*avrxmega2"}} {{.*}} "-Tdata=0x802000" 
{{.*}} "-latxmega16a4" "-mavrxmega2"
+// LINKL: {{".*ld.*"}} {{.*}} {{"-L.*avrxmega2"}} {{.*}} "-Tdata=0x802000" 
"--start-grou

[PATCH] D121359: [AVR] Synchronize device list with gcc-avr 5.4.0 and avr-libc 2.0.0

2022-03-10 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: dylanmckay, aykevl.
Herald added subscribers: Jim, hiraditya.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, jacquesguan.
Herald added projects: clang, LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D121359

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td

Index: llvm/lib/Target/AVR/AVRDevices.td
===
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -245,6 +245,7 @@
 def : Device<"avrtiny", FamilyTiny, ELFArchTiny>;
 
 // Specific MCUs
+// NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
 def : Device<"at90s1200", FamilyAVR0, ELFArchAVR1>;
 def : Device<"attiny11", FamilyAVR1, ELFArchAVR1>;
 def : Device<"attiny12", FamilyAVR1, ELFArchAVR1>;
@@ -299,6 +300,8 @@
 def : Device<"at90usb82", FamilyAVR35, ELFArchAVR35>;
 def : Device<"at90usb162", FamilyAVR35, ELFArchAVR35>;
 def : Device<"ata5505", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata6617c", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata664251", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega8u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega16u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega32u2", FamilyAVR35, ELFArchAVR35>;
@@ -310,6 +313,7 @@
  [FeatureMultiplication, FeatureMOVW, FeatureLPMX, FeatureSPM]>;
 def : Device<"ata6285", FamilyAVR4, ELFArchAVR4>;
 def : Device<"ata6286", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata6612c", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48a", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48pa", FamilyAVR4, ELFArchAVR4>;
@@ -331,8 +335,17 @@
 def : Device<"at90pwm3", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm3b", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm81", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata5702m322", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5782", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5790", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5790n", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5791", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5795", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5831", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6613c", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6614q", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8210", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8510", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16a", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega161", FamilyAVR3, ELFArchAVR5,
@@ -411,6 +424,7 @@
 def : Device<"atmega32hvb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega32hvbrevb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega64hve", FamilyAVR5, ELFArchAVR5>;
+def : Device<"atmega64hve2", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can32", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can64", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90pwm161", FamilyAVR5, ELFArchAVR5>;
@@ -452,7 +466,9 @@
 def : Device<"atxmega16d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4u", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32c3", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega32c4", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32d3", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega16e5", FamilyXMEGAU, ELFArchXMEGA2>;
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -77,7 +77,7 @@
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'
-// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, atmega8u2, atmega16u2, atmega32u2, attiny1634, atm

[PATCH] D121359: [AVR] Add more devices

2022-03-10 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 414319.
benshi001 edited the summary of this revision.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121359/new/

https://reviews.llvm.org/D121359

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td

Index: llvm/lib/Target/AVR/AVRDevices.td
===
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -245,6 +245,7 @@
 def : Device<"avrtiny", FamilyTiny, ELFArchTiny>;
 
 // Specific MCUs
+// NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
 def : Device<"at90s1200", FamilyAVR0, ELFArchAVR1>;
 def : Device<"attiny11", FamilyAVR1, ELFArchAVR1>;
 def : Device<"attiny12", FamilyAVR1, ELFArchAVR1>;
@@ -299,6 +300,8 @@
 def : Device<"at90usb82", FamilyAVR35, ELFArchAVR35>;
 def : Device<"at90usb162", FamilyAVR35, ELFArchAVR35>;
 def : Device<"ata5505", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata6617c", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata664251", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega8u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega16u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega32u2", FamilyAVR35, ELFArchAVR35>;
@@ -310,6 +313,7 @@
  [FeatureMultiplication, FeatureMOVW, FeatureLPMX, FeatureSPM]>;
 def : Device<"ata6285", FamilyAVR4, ELFArchAVR4>;
 def : Device<"ata6286", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata6612c", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48a", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48pa", FamilyAVR4, ELFArchAVR4>;
@@ -331,8 +335,17 @@
 def : Device<"at90pwm3", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm3b", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm81", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata5702m322", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5782", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5790", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5790n", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5791", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5795", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5831", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6613c", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6614q", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8210", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8510", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16a", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega161", FamilyAVR3, ELFArchAVR5,
@@ -411,6 +424,7 @@
 def : Device<"atmega32hvb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega32hvbrevb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega64hve", FamilyAVR5, ELFArchAVR5>;
+def : Device<"atmega64hve2", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can32", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can64", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90pwm161", FamilyAVR5, ELFArchAVR5>;
@@ -452,7 +466,9 @@
 def : Device<"atxmega16d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4u", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32c3", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega32c4", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32d3", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega16e5", FamilyXMEGAU, ELFArchXMEGA2>;
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -77,7 +77,7 @@
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'
-// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, atmega8u2, atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmega8a, ata6285, ata6286, atmega48, atmega48a, atmega48pa, atmega48pb, atmega48p, atmega88, atmega88a, atmega88p, atmega88pa, atmega88pb, atmega8515, atmega85

[PATCH] D121359: [AVR] Add more devices

2022-03-10 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 414538.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121359/new/

https://reviews.llvm.org/D121359

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td

Index: llvm/lib/Target/AVR/AVRDevices.td
===
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -245,6 +245,7 @@
 def : Device<"avrtiny", FamilyTiny, ELFArchTiny>;
 
 // Specific MCUs
+// NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
 def : Device<"at90s1200", FamilyAVR0, ELFArchAVR1>;
 def : Device<"attiny11", FamilyAVR1, ELFArchAVR1>;
 def : Device<"attiny12", FamilyAVR1, ELFArchAVR1>;
@@ -299,6 +300,8 @@
 def : Device<"at90usb82", FamilyAVR35, ELFArchAVR35>;
 def : Device<"at90usb162", FamilyAVR35, ELFArchAVR35>;
 def : Device<"ata5505", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata6617c", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata664251", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega8u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega16u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega32u2", FamilyAVR35, ELFArchAVR35>;
@@ -310,6 +313,7 @@
  [FeatureMultiplication, FeatureMOVW, FeatureLPMX, FeatureSPM]>;
 def : Device<"ata6285", FamilyAVR4, ELFArchAVR4>;
 def : Device<"ata6286", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata6612c", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48a", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48pa", FamilyAVR4, ELFArchAVR4>;
@@ -331,8 +335,17 @@
 def : Device<"at90pwm3", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm3b", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm81", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata5702m322", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5782", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5790", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5790n", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5791", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5795", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5831", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6613c", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6614q", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8210", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8510", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16a", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega161", FamilyAVR3, ELFArchAVR5,
@@ -411,6 +424,7 @@
 def : Device<"atmega32hvb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega32hvbrevb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega64hve", FamilyAVR5, ELFArchAVR5>;
+def : Device<"atmega64hve2", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can32", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can64", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90pwm161", FamilyAVR5, ELFArchAVR5>;
@@ -452,7 +466,9 @@
 def : Device<"atxmega16d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4u", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32c3", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega32c4", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32d3", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega16e5", FamilyXMEGAU, ELFArchXMEGA2>;
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -77,7 +77,7 @@
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'
-// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, atmega8u2, atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmega8a, ata6285, ata6286, atmega48, atmega48a, atmega48pa, atmega48pb, atmega48p, atmega88, atmega88a, atmega88p, atmega88pa, atmega88pb, atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b,

[PATCH] D120720: [clang][AVR] Implement standard calling convention for AVR and AVRTiny

2022-03-12 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

This patch fixes the issue https://github.com/llvm/llvm-project/issues/45485 .


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120720/new/

https://reviews.llvm.org/D120720

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D120720: [clang][AVR] Implement standard calling convention for AVR and AVRTiny

2022-03-16 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 415734.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120720/new/

https://reviews.llvm.org/D120720

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/avr/argument.c
  clang/test/CodeGen/avr/struct.c

Index: clang/test/CodeGen/avr/struct.c
===
--- clang/test/CodeGen/avr/struct.c
+++ clang/test/CodeGen/avr/struct.c
@@ -1,15 +1,23 @@
-// RUN: %clang_cc1 -triple avr -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple avr -target-cpu atmega328 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=AVR
+// RUN: %clang_cc1 -triple avr -target-cpu attiny40 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=TINY
 
 // Structure that is more than 8 bytes.
 struct s10 {
   int a, b, c, d, e;
 };
 
-// Structure that is less than 8 bytes.
+// Structure that is less than 8 bytes but more than 4 bytes.
 struct s06 {
   int a, b, c;
 };
 
+// Structure that is less than 4 bytes.
+struct s04 {
+  int a, b;
+};
+
 struct s10 foo10(int a, int b, int c) {
   struct s10 a0;
   return a0;
@@ -20,7 +28,21 @@
   return a0;
 }
 
-// CHECK: %struct.s10 = type { i16, i16, i16, i16, i16 }
-// CHECK: %struct.s06 = type { i16, i16, i16 }
-// CHECK: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
-// CHECK: define{{.*}} %struct.s06 @foo06(i16 noundef %a, i16 noundef %b, i16 noundef %c)
+struct s04 foo04(int a, int b) {
+  struct s04 a0;
+  return a0;
+}
+
+// AVR: %struct.s10 = type { i16, i16, i16, i16, i16 }
+// AVR: %struct.s06 = type { i16, i16, i16 }
+// AVR: %struct.s04 = type { i16, i16 }
+// AVR: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// AVR: define{{.*}} %struct.s06 @foo06(i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// AVR: define{{.*}} %struct.s04 @foo04(i16 noundef %a, i16 noundef %b)
+
+// TINY: %struct.s10 = type { i16, i16, i16, i16, i16 }
+// TINY: %struct.s06 = type { i16, i16, i16 }
+// TINY: %struct.s04 = type { i16, i16 }
+// TINY: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// TINY: define{{.*}} void @foo06(%struct.s06* {{.*}}, i16 noundef %a, i16 noundef %b, i16 noundef %c)
+// TINY: define{{.*}} %struct.s04 @foo04(i16 noundef %a, i16 noundef %b)
Index: clang/test/CodeGen/avr/argument.c
===
--- /dev/null
+++ clang/test/CodeGen/avr/argument.c
@@ -0,0 +1,116 @@
+// RUN: %clang_cc1 -triple avr -target-cpu atmega328 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix AVR
+// RUN: %clang_cc1 -triple avr -target-cpu attiny40 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix TINY
+
+// NOTE: All arguments are passed via the stack for functions with variable arguments.
+// AVR:  define {{.*}} i8 @foo0(i8 {{.*}}, i8 {{.*}}, ...)
+// TINY: define {{.*}} i8 @foo0(i8 {{.*}}, i8 {{.*}}, ...)
+// AVR-NOT:  define {{.*}} i8 @foo0(i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}}, ...)
+// TINY-NOT: define {{.*}} i8 @foo0(i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}}, ...)
+char foo0(char a, char b, ...) {
+  return a + b;
+}
+
+// NOTE: All arguments are passed via registers on both avr and avrtiny.
+// AVR:  define {{.*}} i8 @foo1(i32 {{.*}}, i8 {{.*}} signext {{.*}})
+// TINY: define {{.*}} i8 @foo1(i32 {{.*}}, i8 {{.*}} signext {{.*}})
+char foo1(long a, char b) {
+  return a + b;
+}
+
+// NOTE: The argument `char c` is passed via registers on avr, while via the stack on avrtiny.
+//   The argument `char b` costs 2 registers, so there is no vacant register left for
+//   `char c` on avrtiny.
+// AVR:  define {{.*}} i8 @foo2(i32 {{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+// TINY: define {{.*}} i8 @foo2(i32 {{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}})
+// TINY-NOT: define {{.*}} i8 @foo2(i32 {{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+char foo2(long a, char b, char c) {
+  return a + b + c;
+}
+
+// NOTE: On avr, the argument `a` costs 16 registers and `b` costs 2 registers, so
+//   `c` has to be passed via the stack.
+// AVR:  define {{.*}} i8 @foo3({{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}})
+// AVR-NOT:  define {{.*}} i8 @foo3({{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+// TINY: define {{.*}} i8 @foo3({{.*}}, i8 {{.*}}, i8 {{.*}})
+// TINY-NOT: define {{.*}} i8 @foo3({{.*}}, i8 {{.*}} signext {{.*}}, i8 {{.*}} signext {{.*}})
+struct s15 {
+  char arr[15];
+};
+char foo3(struct s15 a, char b, char c) {
+  return a.arr[b] + a.arr[c];
+}
+
+// NOTE: On avr, `a` only costs 16 registers, though there are 2 vacant registers,
+//   both `b` and `c` have to be passed via the stack.
+// AVR:  define {{.*}} i8 @foo4({{.*}}, i32 {{.*}}, i8 {{.*}})
+// AVR-NOT:  define {

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

It would be better to write a clear commit message with clear title.

  [AVR] Expand pseudo instructions STDWSPQRr & STDSPQRr
  
  1. What is the issue / Why there is a failure in instruction selection ?
  2. How you fix it. 

This is just my suggestion, a unique clear commit message is necessary when 
committing to the main branch, nobody would like to track links to learn all 
about your work.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

I find some test files locations are moved, I suggested you create a seperate 
patch for that, and this patch only focuses on fixing the instruction selection 
failure.

Also I can help review and commit the other patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1246
+  // few operations
+  if (Imm >= 63) {
+if (!DstIsKill) {

I suggest we make another patch for merge `AVRRelaxMem::relax` 
into `expand`, for the case `Imm >= 63`. And we select that 
merge patch as baseline / parent of current patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1234
+
+  MachineOperand &Dst = MI.getOperand(0);
+  Register DstReg = Dst.getReg();

Why we need an extra `Dst` local variable here? I did not find there is any 
more use besides `.getReg()` .


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1240
+
+  MachineOperand &Src = MI.getOperand(2);
+  Register SrcReg = Src.getReg();

Also, I did not find any other use of `Src`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1253
+.addReg(DstReg, RegState::Define)
+.addReg(DstReg)
+.addImm(-Imm);

```
buildMI(MBB, MBBI, AVR::SBCIWRdK)
.addReg(DstReg, RegState::Define)
.addReg(DstReg, RegState::Kill)
.addImm(-Imm);
```
The original DstReg is indeed killed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1256
 
-  auto MIBHI = buildMI(MBB, MBBI, OpHi)
-   .addReg(DstReg, getKillRegState(DstIsKill))
-   .addImm(Imm + 1)
-   .addReg(SrcHiReg, getKillRegState(SrcIsKill));
+buildMI(MBB, MBBI, AVR::STWPtrRr)
+.addReg(Dst.getReg())

```
buildMI(MBB, MBBI, AVR::STWPtrRr)
.addReg(Dst.getReg(), RegState::Kill)
.addReg(Src.getReg(), getKillRegState(SrcIsKill));
```

No matter `DstIsKill` is true or false, the new `DstReg` is always killed.



Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1261
+if (!DstIsKill) {
+  buildMI(MBB, MBBI, AVR::POPWRd).addDef(Dst.getReg());
+}

I think 

```
   if (!DstIsKill)
  buildMI(MBB, MBBI, AVR::POPWRd).addReg(DstReg, RegState::Define);
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2

2022-03-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

I summary my suggestion in general, excluding some inline comments about coding 
details.

1. Seperate the location movement of test files into a different patch A.
2. Seperate the elimination of `AVRRelaxMemPass` / combination into 
`expand` to a different patch B.

3. I also concern current solution is a bit agresssive, so I would like to 
suggest a moderate way.

3.1 Kill the function `fixStackStores` and its orginal calls.
3.2 Mark the definition of `STDWSPQRr`/`STDSPQRr` with `Defs = [R31R30]` (Most 
ordinary `STDWSPQRr`/`STDSPQRr` will be substituted before regalloc, so that is 
fine.)
3.3 Still implement `expand` and `expand` as 
current patch does, but do not substitute to 
`AVR::STDPtrQRr`/`AVR::STDWPtrQRr`, we should do real instruction expansion 
with several `buildMI` calls. Since we have marked `Defs = [R31R30]` to 
`STDWSPQRr`/`STDSPQRr`, it is safe to expand to

  in r30, 62
  in r31, 63
  subiw z, offset
  std z, Rsrc


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114611/new/

https://reviews.llvm.org/D114611

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D121359: [AVR] Add more devices

2022-03-22 Thread Ben Shi via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG6edfe45a6312: [AVR] Add more devices (authored by benshi001).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121359/new/

https://reviews.llvm.org/D121359

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td

Index: llvm/lib/Target/AVR/AVRDevices.td
===
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -245,6 +245,7 @@
 def : Device<"avrtiny", FamilyTiny, ELFArchTiny>;
 
 // Specific MCUs
+// NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
 def : Device<"at90s1200", FamilyAVR0, ELFArchAVR1>;
 def : Device<"attiny11", FamilyAVR1, ELFArchAVR1>;
 def : Device<"attiny12", FamilyAVR1, ELFArchAVR1>;
@@ -299,6 +300,8 @@
 def : Device<"at90usb82", FamilyAVR35, ELFArchAVR35>;
 def : Device<"at90usb162", FamilyAVR35, ELFArchAVR35>;
 def : Device<"ata5505", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata6617c", FamilyAVR35, ELFArchAVR35>;
+def : Device<"ata664251", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega8u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega16u2", FamilyAVR35, ELFArchAVR35>;
 def : Device<"atmega32u2", FamilyAVR35, ELFArchAVR35>;
@@ -310,6 +313,7 @@
  [FeatureMultiplication, FeatureMOVW, FeatureLPMX, FeatureSPM]>;
 def : Device<"ata6285", FamilyAVR4, ELFArchAVR4>;
 def : Device<"ata6286", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata6612c", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48a", FamilyAVR4, ELFArchAVR4>;
 def : Device<"atmega48pa", FamilyAVR4, ELFArchAVR4>;
@@ -331,8 +335,17 @@
 def : Device<"at90pwm3", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm3b", FamilyAVR4, ELFArchAVR4>;
 def : Device<"at90pwm81", FamilyAVR4, ELFArchAVR4>;
+def : Device<"ata5702m322", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5782", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5790", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5790n", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5791", FamilyAVR5, ELFArchAVR5>;
 def : Device<"ata5795", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata5831", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6613c", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata6614q", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8210", FamilyAVR5, ELFArchAVR5>;
+def : Device<"ata8510", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega16a", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega161", FamilyAVR3, ELFArchAVR5,
@@ -411,6 +424,7 @@
 def : Device<"atmega32hvb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega32hvbrevb", FamilyAVR5, ELFArchAVR5>;
 def : Device<"atmega64hve", FamilyAVR5, ELFArchAVR5>;
+def : Device<"atmega64hve2", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can32", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90can64", FamilyAVR5, ELFArchAVR5>;
 def : Device<"at90pwm161", FamilyAVR5, ELFArchAVR5>;
@@ -452,7 +466,9 @@
 def : Device<"atxmega16d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32a4u", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32c3", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega32c4", FamilyXMEGAU, ELFArchXMEGA2>;
+def : Device<"atxmega32d3", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32d4", FamilyXMEGA, ELFArchXMEGA2>;
 def : Device<"atxmega32e5", FamilyXMEGAU, ELFArchXMEGA2>;
 def : Device<"atxmega16e5", FamilyXMEGAU, ELFArchXMEGA2>;
Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -77,7 +77,7 @@
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'
-// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, atmega8u2, atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmeg

[PATCH] D123200: [compiler-rt][CMake] Add initial support of target AVR

2022-04-07 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D123200#3436043 , @aykevl wrote:

> What about chip families other than avr2 (the default)? Some have a different 
> PC pointer size (1-3 bytes, therefore affecting the ABI), some have different 
> instructions, etc.

There are two options `CMAKE_CXX_FLAGS` and `CMAKE_C_FLAGS" can be specified 
when doing cmake compiler-rt, we can specify the instruction set via them.

Since libgcc-avr has unique source code but built into several different 
libgcc.a files with different instruction set, I expect compiler-rt would be 
done in the way.

And of cource this patch just is an initial support, we still need much more 
patches to make it fully functional.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D122533: [AVR] Remove AVRRelaxMemOperations

2022-04-10 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd16a631c124f: [AVR] Merge AVRRelaxMemOperations into 
AVRExpandPseudoInsts (authored by Patryk27, committed by benshi001).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122533/new/

https://reviews.llvm.org/D122533

Files:
  clang/docs/tools/clang-formatted-files.txt
  llvm/lib/Target/AVR/AVR.h
  llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
  llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp
  llvm/lib/Target/AVR/AVRTargetMachine.cpp
  llvm/lib/Target/AVR/CMakeLists.txt
  llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
  llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir
  llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn

Index: llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn
===
--- llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn
+++ llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn
@@ -37,7 +37,6 @@
 "AVRInstrInfo.cpp",
 "AVRMCInstLower.cpp",
 "AVRRegisterInfo.cpp",
-"AVRRelaxMemOperations.cpp",
 "AVRShiftExpand.cpp",
 "AVRSubtarget.cpp",
 "AVRTargetMachine.cpp",
Index: llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir
===
--- llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir
+++ /dev/null
@@ -1,31 +0,0 @@
-# RUN: llc -O0 -run-pass=avr-relax-mem %s -o - | FileCheck %s
-
 |
-  target triple = "avr--"
-  define void @test() {
-  entry:
-ret void
-  }
-...
-

-name:test
-body: |
-  bb.0.entry:
-
-; CHECK-LABEL: test
-
-; We shouldn't expand things which already have 6-bit imms.
-; CHECK: STDWPtrQRr $r29r28, 63, $r1r0
-STDWPtrQRr $r29r28, 63, $r1r0
-
-; We shouldn't expand things which already have 6-bit imms.
-; CHECK-NEXT: STDWPtrQRr $r29r28, 0, $r1r0
-STDWPtrQRr $r29r28, 0, $r1r0
-
-; CHECK-NEXT: PUSHWRr $r29r28, implicit-def $sp, implicit $sp
-; CHECK-NEXT: $r29r28 = SBCIWRdK $r29r28, -64, implicit-def $sreg, implicit $sreg
-; CHECK-NEXT: STWPtrRr $r29r28, $r1r0
-; CHECK-NEXT: $r29r28 = POPWRd implicit-def $sp, implicit $sp
-STDWPtrQRr $r29r28, 64, $r1r0
-...
Index: llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
===
--- llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
+++ llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=avr-expand-pseudo  %s -o - | FileCheck %s
+# RUN: llc -O0 -run-pass=avr-expand-pseudo -verify-machineinstrs %s -o - | FileCheck %s
 
 --- |
   target triple = "avr--"
@@ -15,8 +15,52 @@
 
 ; CHECK-LABEL: test
 
-; CHECK:  STDPtrQRr $r29r28, 10, $r0
-; CHECK-NEXT: STDPtrQRr $r29r28, 11, $r1
+; Small displacement (<63):
+; CHECK:  STDPtrQRr $r29r28, 3, $r0
+; CHECK-NEXT: STDPtrQRr $r29r28, 4, $r1
+STDWPtrQRr $r29r28, 3, $r1r0
 
-STDWPtrQRr $r29r28, 10, $r1r0
+; Small displacement where the destination register is killed:
+; CHECK:  STDPtrQRr $r29r28, 3, $r0
+; CHECK-NEXT: STDPtrQRr killed $r29r28, 4, $r1
+STDWPtrQRr killed $r29r28, 3, $r1r0
+
+; Small displacement where the source register is killed:
+; CHECK:  STDPtrQRr $r29r28, 3, killed $r0
+; CHECK-NEXT: STDPtrQRr $r29r28, 4, killed $r1
+STDWPtrQRr $r29r28, 3, killed $r1r0
+
+; Small displacement, near the limit (=62):
+; CHECK:  STDPtrQRr $r29r28, 62, $r0
+; CHECK-NEXT: STDPtrQRr $r29r28, 63, $r1
+STDWPtrQRr $r29r28, 62, $r1r0
+
+; Large displacement (>=63):
+; CHECK: PUSHRr $r28, implicit-def $sp, implicit $sp
+; CHECK-NEXT: PUSHRr $r29, implicit-def $sp, implicit $sp
+; CHECK-NEXT: $r28 = SUBIRdK killed $r28, 193, implicit-def $sreg
+; CHECK-NEXT: $r29 = SBCIRdK killed $r29, 255, implicit-def $sreg, implicit killed $sreg
+; CHECK-NEXT: STPtrRr $r29r28, $r0
+; CHECK-NEXT: STDPtrQRr $r29r28, 1, $r1
+; CHECK-NEXT: $r29 = POPRd implicit-def $sp, implicit $sp
+; CHECK-NEXT: $r28 = POPRd implicit-def $sp, implicit $sp
+STDWPtrQRr $r29r28, 63, $r1r0
+
+; Large displacement where the destination register is killed:
+; CHECK: $r28 = SUBIRdK killed $r28, 193, implicit-def $sreg
+; CHECK-NEXT: $r29 = SBCIRdK killed $r29, 255, implicit-def $sreg, implicit killed $sreg
+; CHECK-NEXT: STPtrRr $r29r28, $r0
+; CHECK-NEXT: STDPtrQRr $r29r28, 1, $r1
+STDWPtrQRr killed $r29r28, 63, $r1r0
+
+; Large displacement where the source register is killed:
+; CHECK: PUSHRr $r28, implicit-def $sp, implicit $sp
+; CHECK-NEXT: PUSHRr $r29, implicit-def $sp, implicit $sp
+; CHECK-NEXT: $r28 = SUBIRdK killed $r28, 193, implicit-def $sreg
+; CHECK-NEXT: $r29 = SBCIRdK killed $r29, 255, implicit-def $sreg, implicit killed $sreg
+; CHECK-NEXT: STPtrRr $r29r28, killed $r0
+; CHECK-NEXT: STDPtrQRr $r29r28, 1, killed $r1
+; CHE

[PATCH] D123567: [clang][AVR] add more builtin macros

2022-04-11 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: MaskRay, aykevl, dylanmckay.
Herald added subscribers: StephenFan, Jim.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D123567

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-common.c


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -4,3 +4,5 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
+// CHECK: #define __avr 1
+// CHECK: #define __avr__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -377,7 +377,9 @@
  MacroBuilder &Builder) const {
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
+  Builder.defineMacro("__avr");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__avr__");
   Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -4,3 +4,5 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
+// CHECK: #define __avr 1
+// CHECK: #define __avr__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -377,7 +377,9 @@
  MacroBuilder &Builder) const {
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
+  Builder.defineMacro("__avr");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__avr__");
   Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][CMake] Add initial support of target AVR

2022-04-11 Thread Ben Shi via Phabricator via cfe-commits

benshi001 marked an inline comment as done.
benshi001 added inline comments.



Comment at: clang/lib/Basic/Targets/AVR.cpp:380
   Builder.defineMacro("__AVR");
+  Builder.defineMacro("__avr");
   Builder.defineMacro("__AVR__");

MaskRay wrote:
> The clang preprocessor changes are unrelated to compiler-rt and should be 
> contribute separated with tests.
I have created another patch as you suggested, thanks.

https://reviews.llvm.org/D123567


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][CMake] Add initial support of target AVR

2022-04-11 Thread Ben Shi via Phabricator via cfe-commits

benshi001 marked an inline comment as done.
benshi001 added a comment.

In D123200#3444520 , @MaskRay wrote:

> Initial support for a new target has a high standard. It needs to show decent 
> support, otherwise it may just invite fixups which may in the end waste 
> review resources.
> Showing that these files buildable is far from enough. You'd need to show 
> that the run-time tests actually work.

Could you please tell me more about `show that the run-time tests actually 
work` ? AVR is 8-bit MCU with any OS, so I just want some math functions in 
compiler-rt/lib/builtins, to avoid linking to libgcc.a.

I have checked that there are tests at `compiler-rt/test/builtins/Unit/arm`, 
and I guess them to be run on a ARM host. So I have to make a new directory 
`compiler-rt/test/builtins/Unit/avr` with some test cases, and promiss that 
they can run on an AVR board? (https://www.arduino.cc/en/hardware#boards-1)

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123567: [clang][AVR] add more builtin macros

2022-04-11 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D123567#3444579 , @MaskRay wrote:

> `avr-gcc -E -dM -xc /dev/null -dM  | grep __avr` has no result, so I am not 
> sure this is correct.

The reason  I added these little case macros, is that I find other backend 
targets have, as shown in the compiler-rt's CMakefile, 
https://github.com/llvm/llvm-project/blob/main/compiler-rt/cmake/Modules/CompilerRTUtils.cmake#L155

I think we need not strictly follow avr-gcc's way, my final goal is making 
clang+llvm+compiler-rt+lld fully functional and can replace avr-gcc toolchain.

I expect clang+llvm+compiler-rt+lld  to be fully functioning against the 
Arduino boards. (https://www.arduino.cc/).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123567/new/

https://reviews.llvm.org/D123567

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123567: [clang][AVR] add more builtin macros

2022-04-11 Thread Ben Shi via Phabricator via cfe-commits

benshi001 abandoned this revision.
benshi001 added a comment.

In D123567#3444674 , @MaskRay wrote:

> In D123567#3444613 , @benshi001 
> wrote:
>
>> In D123567#3444579 , @MaskRay 
>> wrote:
>>
>>> `avr-gcc -E -dM -xc /dev/null -dM  | grep __avr` has no result, so I am not 
>>> sure this is correct.
>>
>> The reason  I added these little case macros, is that I find other backend 
>> targets have, as shown in the compiler-rt's CMakefile, 
>> https://github.com/llvm/llvm-project/blob/main/compiler-rt/cmake/Modules/CompilerRTUtils.cmake#L155
>>
>> I think we need not strictly follow avr-gcc's way, my final goal is making 
>> clang+llvm+compiler-rt+lld fully functional and can replace avr-gcc 
>> toolchain.
>>
>> I expect clang+llvm+compiler-rt+lld  to be fully functioning against the 
>> Arduino boards. (https://www.arduino.cc/).
>
> Err, this is not sufficient justification to introduce new preprocessor 
> macros. Changing the predefined macro set to make an in-tree cmake function 
> happy. I am unsure this is the right thing.
> If the cmake function isn't happy with a lowercase macro, can't you fix it?

I am not sure if there are other concerns of using lower case macros in 
compiler-rt's CMake, and I will check that.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123567/new/

https://reviews.llvm.org/D123567

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-04-12 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, MaskRay, dylanmckay.
Herald added subscribers: StephenFan, Jim, dberris.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D123612

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.h
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/gcc/avr/5.4.0/avr5/libgcc.a
  
clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/avr/libclang_rt.builtins-avr5.a
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -58,3 +58,12 @@
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// LIBGCC: "-lgcc"
+// LIBGCC-NOT: libclang_rt
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=COMRT %s
+// COMRT: libclang_rt.builtins-avr5.a
+// COMRT-NOT: "-lgcc"
Index: clang/lib/Driver/ToolChains/AVR.h
===
--- clang/lib/Driver/ToolChains/AVR.h
+++ clang/lib/Driver/ToolChains/AVR.h
@@ -34,11 +34,20 @@
   llvm::Optional findAVRLibcInstallation() const;
   StringRef getGCCInstallPath() const { return GCCInstallPath; }
 
+  std::string buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const override;
+
+  std::string getCompilerRTPath() const override;
+
+  ToolChain::RuntimeLibType GetDefaultRuntimeLibType() const override;
+
 protected:
   Tool *buildLinker() const override;
 
 private:
   StringRef GCCInstallPath;
+  std::string MCU;
 };
 
 } // end namespace toolchains
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -19,6 +19,7 @@
 #include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Path.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -369,14 +370,13 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
-  std::string CPU = getCPUName(D, Args, Triple);
-  if (CPU.empty())
+  MCU = getCPUName(D, Args, Triple);
+  if (MCU.empty())
 D.Diag(diag::warn_drv_avr_mcu_not_specified);
 
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
-  !Args.hasArg(options::OPT_nodefaultlibs) &&
-  GCCInstallation.isValid()) {
+  !Args.hasArg(options::OPT_nodefaultlibs) && GCCInstallation.isValid()) {
 GCCInstallPath = GCCInstallation.getInstallPath();
 std::string GCCParentPath(GCCInstallation.getParentLibPath());
 getProgramPaths().push_back(GCCParentPath + "/../bin");
@@ -415,6 +415,43 @@
 CC1Args.push_back("-fno-use-cxa-atexit");
 }
 
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const {
+  const char *Prefix = "lib";
+  // libgcc distributed with avr-gcc always has '.a' suffix even on windows.
+  const char *Suffix = ".a";
+
+  // Each device family has its own compiler-rt build.
+  std::string Arch;
+  if (AddArch) {
+Optional FamilyName = GetMCUFamilyName(MCU);
+if (FamilyName)
+  Arch = "-" + (*FamilyName).str();
+  }
+
+  return (Prefix + Twine("clang_rt.") + Component + Arch + Suffix).str();
+}
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return "$ResourceDir/lib/avr/" if exists.
+  SmallString<128> Path0(getDriver().ResourceDir);
+  llvm::sys::path::append(Path0, "lib", "avr");
+  if (llvm::sys::fs::is_directory(Path0))
+return std::string(Path0.str());
+
+  // Fall back to "ResourceDir/lib/".
+  SmallString<128> Path1(getDriver().ResourceDir);
+  llvm::sys::path::append(Path1, "lib");
+  return std::string(Path1.str());
+}
+
+ToolChain::RuntimeLibType AVRToolChain::GetDefaultRuntimeLibType() const {
+

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-04-12 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

As changes in https://reviews.llvm.org/D123200, 
it whould be better to support "--rtlib=compiler-rt" on AVR first.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-04-12 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 422388.
Herald added a subscriber: ormris.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.h
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/gcc/avr/5.4.0/avr5/libgcc.a
  
clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/avr/libclang_rt.builtins-avr5.a
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -58,3 +58,12 @@
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// LIBGCC: "-lgcc"
+// LIBGCC-NOT: libclang_rt
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=COMRT %s
+// COMRT: libclang_rt.builtins-avr5.a
+// COMRT-NOT: "-lgcc"
Index: clang/lib/Driver/ToolChains/AVR.h
===
--- clang/lib/Driver/ToolChains/AVR.h
+++ clang/lib/Driver/ToolChains/AVR.h
@@ -34,11 +34,20 @@
   llvm::Optional findAVRLibcInstallation() const;
   StringRef getGCCInstallPath() const { return GCCInstallPath; }
 
+  std::string buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const override;
+
+  std::string getCompilerRTPath() const override;
+
+  ToolChain::RuntimeLibType GetDefaultRuntimeLibType() const override;
+
 protected:
   Tool *buildLinker() const override;
 
 private:
   StringRef GCCInstallPath;
+  std::string MCU;
 };
 
 } // end namespace toolchains
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -19,6 +19,7 @@
 #include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Path.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -369,14 +370,13 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
-  std::string CPU = getCPUName(D, Args, Triple);
-  if (CPU.empty())
+  MCU = getCPUName(D, Args, Triple);
+  if (MCU.empty())
 D.Diag(diag::warn_drv_avr_mcu_not_specified);
 
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
-  !Args.hasArg(options::OPT_nodefaultlibs) &&
-  GCCInstallation.isValid()) {
+  !Args.hasArg(options::OPT_nodefaultlibs) && GCCInstallation.isValid()) {
 GCCInstallPath = GCCInstallation.getInstallPath();
 std::string GCCParentPath(GCCInstallation.getParentLibPath());
 getProgramPaths().push_back(GCCParentPath + "/../bin");
@@ -415,6 +415,36 @@
 CC1Args.push_back("-fno-use-cxa-atexit");
 }
 
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const {
+  // Each device family has its own compiler-rt build.
+  std::string Arch;
+  if (AddArch) {
+Optional FamilyName = GetMCUFamilyName(MCU);
+if (FamilyName)
+  Arch = "-" + (*FamilyName).str();
+  }
+  // libgcc distributed with avr-gcc always named 'libgcc.a' even on windows.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.
+  SmallString<128> Path(ToolChain::getCompilerRTPath());
+  llvm::sys::path::append(Path, "avr");
+  if (llvm::sys::fs::is_directory(Path))
+return std::string(Path.str());
+  // Fall back to default.
+  return ToolChain::getCompilerRTPath();
+}
+
+ToolChain::RuntimeLibType AVRToolChain::GetDefaultRuntimeLibType() const {
+  return GCCInstallation.isValid() ? ToolChain::RLT_Libgcc
+   : ToolChain::RLT_CompilerRT;
+}
+
 Tool *AVRToolChain::buildLinker() const {
   return new tools::AVR::Linker(getTriple(), *this);
 }
@@ -445,13 +475,19 @@
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   getToolChain().AddFilePathLibArgs(Args, CmdArgs);

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-04-18 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 423366.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.h
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/gcc/avr/5.4.0/avr5/libgcc.a
  
clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/avr/libclang_rt.builtins-avr5.a
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -58,3 +58,12 @@
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// LIBGCC: "-lgcc"
+// LIBGCC-NOT: libclang_rt
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=COMRT %s
+// COMRT: libclang_rt.builtins-avr5.a
+// COMRT-NOT: "-lgcc"
Index: clang/lib/Driver/ToolChains/AVR.h
===
--- clang/lib/Driver/ToolChains/AVR.h
+++ clang/lib/Driver/ToolChains/AVR.h
@@ -34,11 +34,20 @@
   llvm::Optional findAVRLibcInstallation() const;
   StringRef getGCCInstallPath() const { return GCCInstallPath; }
 
+  std::string buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const override;
+
+  std::string getCompilerRTPath() const override;
+
+  ToolChain::RuntimeLibType GetDefaultRuntimeLibType() const override;
+
 protected:
   Tool *buildLinker() const override;
 
 private:
   StringRef GCCInstallPath;
+  std::string MCU;
 };
 
 } // end namespace toolchains
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -19,6 +19,7 @@
 #include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Path.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -369,14 +370,13 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
-  std::string CPU = getCPUName(D, Args, Triple);
-  if (CPU.empty())
+  MCU = getCPUName(D, Args, Triple);
+  if (MCU.empty())
 D.Diag(diag::warn_drv_avr_mcu_not_specified);
 
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
-  !Args.hasArg(options::OPT_nodefaultlibs) &&
-  GCCInstallation.isValid()) {
+  !Args.hasArg(options::OPT_nodefaultlibs) && GCCInstallation.isValid()) {
 GCCInstallPath = GCCInstallation.getInstallPath();
 std::string GCCParentPath(GCCInstallation.getParentLibPath());
 getProgramPaths().push_back(GCCParentPath + "/../bin");
@@ -415,6 +415,36 @@
 CC1Args.push_back("-fno-use-cxa-atexit");
 }
 
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const {
+  // Each device family has its own compiler-rt build.
+  std::string Arch;
+  if (AddArch) {
+Optional FamilyName = GetMCUFamilyName(MCU);
+if (FamilyName)
+  Arch = "-" + (*FamilyName).str();
+  }
+  // libgcc distributed with avr-gcc always named 'libgcc.a' even on windows.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.
+  SmallString<128> Path(ToolChain::getCompilerRTPath());
+  llvm::sys::path::append(Path, "avr");
+  if (llvm::sys::fs::is_directory(Path))
+return std::string(Path.str());
+  // Fall back to default.
+  return ToolChain::getCompilerRTPath();
+}
+
+ToolChain::RuntimeLibType AVRToolChain::GetDefaultRuntimeLibType() const {
+  return GCCInstallation.isValid() ? ToolChain::RLT_Libgcc
+   : ToolChain::RLT_CompilerRT;
+}
+
 Tool *AVRToolChain::buildLinker() const {
   return new tools::AVR::Linker(getTriple(), *this);
 }
@@ -445,13 +475,19 @@
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   getToolChain().AddFilePathLibArgs(Args, CmdArgs);
 
+  // Get the runtime library, cur

[PATCH] D123200: [compiler-rt][CMake] Add initial support of target AVR

2022-04-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 423805.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

Files:
  compiler-rt/cmake/Modules/CompilerRTUtils.cmake
  compiler-rt/cmake/base-config-ix.cmake
  compiler-rt/cmake/builtin-config-ix.cmake
  compiler-rt/cmake/config-ix.cmake
  compiler-rt/lib/builtins/CMakeLists.txt
  compiler-rt/lib/builtins/avr/exit.S
  compiler-rt/lib/builtins/avr/mulhi3.S
  compiler-rt/lib/builtins/avr/mulqi3.S

Index: compiler-rt/lib/builtins/avr/mulqi3.S
===
--- /dev/null
+++ compiler-rt/lib/builtins/avr/mulqi3.S
@@ -0,0 +1,31 @@
+//=== mulhi3.S - int8 multiplication --===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// The corresponding C code is something like:
+//
+// int __mulqi3(char A, char B) {
+//   return __mulhi3((int) A, (int) B);
+// }
+//
+//===--===//
+
+	.text
+	.align 2
+
+	.globl __mulqi3
+	.type  __mulqi3, @function
+
+__mulqi3:
+	movr25, r24
+	lslr25
+	sbcr25, r25 ; Promote A from char to int: `(int) A`.
+	movr23, r22
+	lslr23
+	sbcr23, r23 ; Promote B from char to int: `(int) B`.
+	rcall  __mulhi3 ; `__mulhi3((int) A, (int) B);`.
+	ret
Index: compiler-rt/lib/builtins/avr/mulhi3.S
===
--- /dev/null
+++ compiler-rt/lib/builtins/avr/mulhi3.S
@@ -0,0 +1,58 @@
+//=== mulhi3.S - int16 multiplication -===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// The corresponding C code is something like:
+//
+// int __mulhi3(int A, int B) {
+//   int S = 0;
+//   while (A != 0) {
+// if (A & 1)
+//   S += B;
+// A = ((unsigned int) A) >> 1;
+// B <<= 1;
+//   }
+//   return S;
+// }
+//
+//===--===//
+
+	.text
+	.align 2
+
+	.globl __mulhi3
+	.type  __mulhi3, @function
+
+__mulhi3:
+	eorr28, r28
+	eorr20, r20
+	eorr21, r21 ; Initialize the result to 0: `S = 0;`.
+
+__mulhi3_loop:
+	cp r24, r28
+	cpcr25, r28 ; `while (A != 0) { ... }`
+	breq   __mulhi3_end ; End the loop if A is 0.
+
+	movr29, r24
+	andi   r29, 1   ; `if (A & 1) { ... }`
+	breq   __mulhi3_loop_a  ; Omit the accumulation (`S += B;`) if  A's LSB is 0.
+
+	addr20, r22
+	adcr21, r23 ; Do the accumulation: `S += B;`.
+
+__mulhi3_loop_a:
+	lsrr25
+	rorr24  ; `A = ((unsigned int) A) >> 1;`.
+	lslr22
+	rolr23  ; `B <<= 1;`
+
+  rjmp   __mulhi3_loop
+
+__mulhi3_end:
+	movr24, r20
+	movr25, r21
+	ret
Index: compiler-rt/lib/builtins/avr/exit.S
===
--- /dev/null
+++ compiler-rt/lib/builtins/avr/exit.S
@@ -0,0 +1,18 @@
+//=== exit.S - global terminator for AVR --===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+	.text
+	.align 2
+
+	.globl _exit
+	.type  _exit, @function
+
+_exit:
+	cli ; Disable all interrupts.
+__stop_program:
+	rjmp __stop_program ; Fall into an infinite loop.
Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -668,6 +668,12 @@
   ${GENERIC_TF_SOURCES}
   ${GENERIC_SOURCES})
 
+set(avr_SOURCES
+  avr/mulqi3.S
+  avr/mulhi3.S
+  avr/exit.S
+)
+
 add_custom_target(builtins)
 set_target_properties(builtins PROPERTIES FOLDER "Compiler-RT Misc")
 
Index: compiler-rt/cmake/config-ix.cmake
===
--- compiler-rt/cmake/config-ix.cmake
+++ compiler-rt/cmake/config-ix.cmake
@@ -203,8 +203,10 @@
 
 # Detect whether the current target platform is 32-bit or 64-bit, and setup
 # the correct commandline flags needed to attempt to target 32-bit and 64-bit.
+# AVR and MSP430 are omitted since they have 16-bit pointers.
 if (NOT CMAKE_SIZEOF_VOID_P EQUAL 4 AND
-NOT CMAKE_SIZEOF_VOID_P EQUAL 8

[PATCH] D123200: [compiler-rt][CMake] Add initial support of target AVR

2022-04-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

I added three functions

  __mulqi3: int8 multiplication
  __mulhi3: int16 multiplication
  _exit   : golobal terminator

All of them are contained in libgcc and are necessary.

Some key points,

1. The functions are written in the minimal avrtiny instruction set, so they 
should be compatible for all devices.

2. We build them to higher/upper AVR ELF files by specifying 
`CMAKE_CXX_COMPILER` and `CMAKE_C_COMPILER` when doing cmake.

3. I refered to libgcc, but not simple copy. Actually my implementation is 
shorter than libgcc's, but may cost more cycles. However this is something 
about tradeoff.

4. I have tested against avr hardware multiplier, the results are all the same.

5. My test program locates at 
https://github.com/benshi001/avr-test/blob/main/mul.ino, I only added 300 pairs 
of random numbers as test cases, due to the limitation of my device (atmega328 
has only 2KB SRAM, more test cases will lead to `too large data section`). 
Acutally I have tested 900 pairs.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D124157: [clang][preprocessor] Add more macros to target AVR

2022-04-21 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, dylanmckay.
Herald added a subscriber: Jim.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D124157

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-common.c


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,6 +1,10 @@
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny4 
/dev/null | FileCheck -match-full-lines %s --check-prefix TINY
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
+// CHECK-NOT: __AVR_TINY__
+
+// TINY: #define __AVR_TINY__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -384,6 +384,9 @@
 auto It = llvm::find_if(
 AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
 
+if (It->IsTiny)
+  Builder.defineMacro("__AVR_TINY__", "1");
+
 if (It != std::end(AVRMcus)) {
   Builder.defineMacro(It->DefineName);
   if (It->NumFlashBanks >= 1)


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,6 +1,10 @@
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck -match-full-lines %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny4 /dev/null | FileCheck -match-full-lines %s --check-prefix TINY
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
+// CHECK-NOT: __AVR_TINY__
+
+// TINY: #define __AVR_TINY__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -384,6 +384,9 @@
 auto It = llvm::find_if(
 AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
 
+if (It->IsTiny)
+  Builder.defineMacro("__AVR_TINY__", "1");
+
 if (It != std::end(AVRMcus)) {
   Builder.defineMacro(It->DefineName);
   if (It->NumFlashBanks >= 1)
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D124157: [clang][preprocessor] Add more macros to target AVR

2022-04-21 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 424355.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124157/new/

https://reviews.llvm.org/D124157

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-common.c


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,6 +1,11 @@
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny13 
/dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,AVR %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny4 
/dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,TINY %s
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+
+// TINY: #define __AVR_TINY__ 1
+// AVR-NOT: __AVR_TINY__
+
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -384,6 +384,9 @@
 auto It = llvm::find_if(
 AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
 
+if (It->IsTiny)
+  Builder.defineMacro("__AVR_TINY__", "1");
+
 if (It != std::end(AVRMcus)) {
   Builder.defineMacro(It->DefineName);
   if (It->NumFlashBanks >= 1)


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,6 +1,11 @@
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck -match-full-lines %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny13 /dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,AVR %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny4 /dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,TINY %s
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+
+// TINY: #define __AVR_TINY__ 1
+// AVR-NOT: __AVR_TINY__
+
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -384,6 +384,9 @@
 auto It = llvm::find_if(
 AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
 
+if (It->IsTiny)
+  Builder.defineMacro("__AVR_TINY__", "1");
+
 if (It != std::end(AVRMcus)) {
   Builder.defineMacro(It->DefineName);
   if (It->NumFlashBanks >= 1)
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][builtins] Add several helper functions for AVR

2022-05-01 Thread Ben Shi via Phabricator via cfe-commits

benshi001 marked an inline comment as done.
benshi001 added inline comments.



Comment at: compiler-rt/lib/builtins/CMakeLists.txt:671
 
+set(avr_SOURCES
+  avr/mulqi3.S

MaskRay wrote:
> Keep the `*_SOURCES` in alphabetical order. Move avr to the beginning. Ignore 
> some entries which are unordered.
I will fix all your concerns about "alphabetical order" when committing.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][builtins] Add several helper functions for AVR

2022-05-01 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
benshi001 marked an inline comment as done.
Closed by commit rGfb7a435492a5: [compiler-rt][builtins] Add several helper 
functions for AVR (authored by benshi001).

Changed prior to commit:
  https://reviews.llvm.org/D123200?vs=423805&id=426319#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

Files:
  compiler-rt/cmake/Modules/CompilerRTUtils.cmake
  compiler-rt/cmake/base-config-ix.cmake
  compiler-rt/cmake/builtin-config-ix.cmake
  compiler-rt/cmake/config-ix.cmake
  compiler-rt/lib/builtins/CMakeLists.txt
  compiler-rt/lib/builtins/avr/exit.S
  compiler-rt/lib/builtins/avr/mulhi3.S
  compiler-rt/lib/builtins/avr/mulqi3.S

Index: compiler-rt/lib/builtins/avr/mulqi3.S
===
--- /dev/null
+++ compiler-rt/lib/builtins/avr/mulqi3.S
@@ -0,0 +1,31 @@
+//=== mulhi3.S - int8 multiplication --===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// The corresponding C code is something like:
+//
+// int __mulqi3(char A, char B) {
+//   return __mulhi3((int) A, (int) B);
+// }
+//
+//===--===//
+
+	.text
+	.align 2
+
+	.globl __mulqi3
+	.type  __mulqi3, @function
+
+__mulqi3:
+	movr25, r24
+	lslr25
+	sbcr25, r25 ; Promote A from char to int: `(int) A`.
+	movr23, r22
+	lslr23
+	sbcr23, r23 ; Promote B from char to int: `(int) B`.
+	rcall  __mulhi3 ; `__mulhi3((int) A, (int) B);`.
+	ret
Index: compiler-rt/lib/builtins/avr/mulhi3.S
===
--- /dev/null
+++ compiler-rt/lib/builtins/avr/mulhi3.S
@@ -0,0 +1,58 @@
+//=== mulhi3.S - int16 multiplication -===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// The corresponding C code is something like:
+//
+// int __mulhi3(int A, int B) {
+//   int S = 0;
+//   while (A != 0) {
+// if (A & 1)
+//   S += B;
+// A = ((unsigned int) A) >> 1;
+// B <<= 1;
+//   }
+//   return S;
+// }
+//
+//===--===//
+
+	.text
+	.align 2
+
+	.globl __mulhi3
+	.type  __mulhi3, @function
+
+__mulhi3:
+	eorr28, r28
+	eorr20, r20
+	eorr21, r21 ; Initialize the result to 0: `S = 0;`.
+
+__mulhi3_loop:
+	cp r24, r28
+	cpcr25, r28 ; `while (A != 0) { ... }`
+	breq   __mulhi3_end ; End the loop if A is 0.
+
+	movr29, r24
+	andi   r29, 1   ; `if (A & 1) { ... }`
+	breq   __mulhi3_loop_a  ; Omit the accumulation (`S += B;`) if  A's LSB is 0.
+
+	addr20, r22
+	adcr21, r23 ; Do the accumulation: `S += B;`.
+
+__mulhi3_loop_a:
+	lsrr25
+	rorr24  ; `A = ((unsigned int) A) >> 1;`.
+	lslr22
+	rolr23  ; `B <<= 1;`
+
+	rjmp   __mulhi3_loop
+
+__mulhi3_end:
+	movr24, r20
+	movr25, r21
+	ret
Index: compiler-rt/lib/builtins/avr/exit.S
===
--- /dev/null
+++ compiler-rt/lib/builtins/avr/exit.S
@@ -0,0 +1,18 @@
+//=== exit.S - global terminator for AVR --===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+	.text
+	.align 2
+
+	.globl _exit
+	.type  _exit, @function
+
+_exit:
+	cli ; Disable all interrupts.
+__stop_program:
+	rjmp __stop_program ; Fall into an infinite loop.
Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -567,6 +567,13 @@
 set(armv8m.main_SOURCES ${arm_SOURCES})
 set(armv8.1m.main_SOURCES ${arm_SOURCES})
 
+# 8-bit AVR MCU
+set(avr_SOURCES
+  avr/mulqi3.S
+  avr/mulhi3.S
+  avr/exit.S
+)
+
 # hexagon arch
 set(hexagon_SOURCES
   hexagon/common_entry_exit_abi1.S
Index: compiler-rt/cmake/config-ix.cmake
===
--- compiler-rt/cmake/config-ix.cmake
+++ compiler-rt/cmak

[PATCH] D124157: [clang][preprocessor] Add more macros to target AVR

2022-05-01 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a reviewer: MaskRay.
benshi001 added a comment.
Herald added a subscriber: StephenFan.

avr-gcc does define this __AVR_TINY_ macro for the tiny device family, we can 
check that by `avr-gcc -mmcu=avrtiny -E -dM -xc /dev/null -dM  | grep tiny -i`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124157/new/

https://reviews.llvm.org/D124157

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D124157: [clang][preprocessor] Add more macros to target AVR

2022-05-01 Thread Ben Shi via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG42fa5bae7afc: [clang][preprocessor] Add more macros to 
target AVR (authored by benshi001).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124157/new/

https://reviews.llvm.org/D124157

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-common.c


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,6 +1,11 @@
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny13 
/dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,AVR %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny4 
/dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,TINY %s
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+
+// TINY: #define __AVR_TINY__ 1
+// AVR-NOT: __AVR_TINY__
+
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -384,6 +384,9 @@
 auto It = llvm::find_if(
 AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
 
+if (It->IsTiny)
+  Builder.defineMacro("__AVR_TINY__", "1");
+
 if (It != std::end(AVRMcus)) {
   Builder.defineMacro(It->DefineName);
   if (It->NumFlashBanks >= 1)


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,6 +1,11 @@
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck -match-full-lines %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny13 /dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,AVR %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny4 /dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,TINY %s
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+
+// TINY: #define __AVR_TINY__ 1
+// AVR-NOT: __AVR_TINY__
+
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -384,6 +384,9 @@
 auto It = llvm::find_if(
 AVRMcus, [&](const MCUInfo &Info) { return Info.Name == this->CPU; });
 
+if (It->IsTiny)
+  Builder.defineMacro("__AVR_TINY__", "1");
+
 if (It != std::end(AVRMcus)) {
   Builder.defineMacro(It->DefineName);
   if (It->NumFlashBanks >= 1)
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123200: [compiler-rt][builtins] Add several helper functions for AVR

2022-05-05 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

In D123200#3495356 , @aykevl wrote:

> @benshi001 I have been looking through the GCC code and I think avr-gcc also 
> has a special calling convention for many other functions, including 
> `__mulqi3` and `__mulhi3`.
>
> Source:
>
> 1. I think this is where the ABI is specified in the compiler: 
> https://github.com/gcc-mirror/gcc/blob/releases/gcc-5.4.0/gcc/config/avr/avr.md#L1543-L1549
>  You can see that it multiplies R24 with R22 and stores the result in R24, 
> and clobbers R22 in the process. But no other registers.
> 2. In this code sample , avr-gcc doesn't 
> save `char c` (`r20`) across the `__mulqi3` and `__mulhi3` calls, which is 
> normally call-clobbered.
>
> Therefore, I think we need to be a bit more careful with defining these AVR 
> builtins and check the ABI in avr-gcc first.
> Also, we can make use of this and optimize the AVR backend more (you can see 
> that the Clang generated code is much worse than avr-gcc in the above 
> examples).

Let us discuss that at https://github.com/llvm/llvm-project/issues/55279


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123200/new/

https://reviews.llvm.org/D123200

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D125077: [compiler-rt][builtins] Fix wrong ABI of AVR mulqi3 & mulhi3

2022-05-06 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
benshi001 marked an inline comment as done.
Closed by commit rG3902ebdd5793: [compiler-rt][builtins] Fix wrong ABI of AVR 
__mulqi3 & __mulhi3 (authored by benshi001).
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Changed prior to commit:
  https://reviews.llvm.org/D125077?vs=427601&id=427620#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125077/new/

https://reviews.llvm.org/D125077

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-common.c
  compiler-rt/lib/builtins/avr/mulhi3.S
  compiler-rt/lib/builtins/avr/mulqi3.S

Index: compiler-rt/lib/builtins/avr/mulqi3.S
===
--- compiler-rt/lib/builtins/avr/mulqi3.S
+++ compiler-rt/lib/builtins/avr/mulqi3.S
@@ -8,24 +8,46 @@
 //
 // The corresponding C code is something like:
 //
-// int __mulqi3(char A, char B) {
-//   return __mulhi3((int) A, (int) B);
+// char __mulqi3(char A, char B) {
+//   int S = 0;
+//   while (A != 0) {
+// if (A & 1)
+//   S += B;
+// B <<= 1;
+// A = ((unsigned char) A) >> 1;
+//   }
+//   return S;
 // }
 //
+// __mulqi3 has special ABI, as the implementation of libgcc, the result is
+// returned via R24, while Rtmp and R22 are clobbered.
+//
 //===--===//
 
 	.text
 	.align 2
 
+#ifdef __AVR_TINY__
+	.set __tmp_reg__, 16
+#else
+	.set __tmp_reg__, 0
+#endif
+
 	.globl __mulqi3
 	.type  __mulqi3, @function
 
 __mulqi3:
-	movr25, r24
-	lslr25
-	sbcr25, r25 ; Promote A from char to int: `(int) A`.
-	movr23, r22
-	lslr23
-	sbcr23, r23 ; Promote B from char to int: `(int) B`.
-	rcall  __mulhi3 ; `__mulhi3((int) A, (int) B);`.
-	ret
+	clr   __tmp_reg__  ; S = 0;
+
+__mulqi3_loop:
+	cpi   r24, 0
+	breq  __mulqi3_end ; while (A != 0) {
+	sbrc  r24, 0   ;   if (A & 1)
+	add   __tmp_reg__, r22 ; S += B;
+	add   r22, r22 ;   B <<= 1;
+	lsr   r24  ;   A = ((unsigned char) A) >> 1;
+	rjmp  __mulqi3_loop; }
+
+__mulqi3_end:
+	mov   r24, __tmp_reg__
+	ret; return S;
Index: compiler-rt/lib/builtins/avr/mulhi3.S
===
--- compiler-rt/lib/builtins/avr/mulhi3.S
+++ compiler-rt/lib/builtins/avr/mulhi3.S
@@ -19,40 +19,53 @@
 //   return S;
 // }
 //
+// __mulhi3 has special ABI, as the implementation of libgcc, R25:R24 is used
+// to return result, while Rtmp/R21/R22/R23 are clobbered.
+//
 //===--===//
 
 	.text
 	.align 2
 
+#ifdef __AVR_TINY__
+	.set __tmp_reg__, 16
+	.set __zero_reg__, 17
+#else
+	.set __tmp_reg__, 0
+	.set __zero_reg__, 1
+#endif
+
 	.globl __mulhi3
 	.type  __mulhi3, @function
 
 __mulhi3:
-	eorr28, r28
-	eorr20, r20
-	eorr21, r21 ; Initialize the result to 0: `S = 0;`.
+	; Use Rzero:Rtmp to store the result.
+	clr   __tmp_reg__
+	clr   __zero_reg__ ; S = 0;
 
 __mulhi3_loop:
-	cp r24, r28
-	cpcr25, r28 ; `while (A != 0) { ... }`
-	breq   __mulhi3_end ; End the loop if A is 0.
+	clr   r21
+	cpr24, r21
+	cpc   r25, r21
+	breq  __mulhi3_end ; while (A != 0) {
 
-	movr29, r24
-	andi   r29, 1   ; `if (A & 1) { ... }`
-	breq   __mulhi3_loop_a  ; Omit the accumulation (`S += B;`) if  A's LSB is 0.
-
-	addr20, r22
-	adcr21, r23 ; Do the accumulation: `S += B;`.
+	mov   r21, r24
+	andi  r21, 1
+	breq  __mulhi3_loop_a  ;   if (A & 1)
+	add   __tmp_reg__, r22
+	adc   __zero_reg__, r23; S += B;
 
 __mulhi3_loop_a:
-	lsrr25
-	rorr24  ; `A = ((unsigned int) A) >> 1;`.
-	lslr22
-	rolr23  ; `B <<= 1;`
-
-	rjmp   __mulhi3_loop
+	lsr   r25
+	ror   r24  ;   A = ((unsigned int) A) >> 1;
+	lsl   r22
+	rol   r23  ;   B <<= 1;
+	rjmp  __mulhi3_loop; }
 
 __mulhi3_end:
-	movr24, r20
-	movr25, r21
-	ret
+	; Return the result via R25:R24.
+	mov   r24, __tmp_reg__
+	mov   r25, __zero_reg__
+	; Restore __zero_reg__ to 0.
+	clr   __zero_reg__
+	ret; return S;
Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,5 +1,7 @@
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny13 /dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,AVR %s
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu avr25 /dev/null | FileCheck -match-full-lines --check-prefixes=CHECK,AVR %s
 // RUN: %clang_cc1 -E -

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-05-06 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:430
+  // libgcc distributed with avr-gcc always named 'libgcc.a' even on windows.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}

This method decides the file name of compiler-rt, it is expected to be 

`libclang_rt.builtins-avrfamily.a`, such as

`libclang_rt.builtins-avr51.a`
`libclang_rt.builtins-avrtiny.a`
`libclang_rt.builtins-avrxmega3.a`





Comment at: clang/lib/Driver/ToolChains/AVR.cpp:433
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.

This method decides the library path of compiler-rt, it is
`$(RESOURCE_DIR)/lib/avr` or `$(RESOURCE_DIR)/lib/`. The resource dir is either 
explicitly specified via user option `-resource-dir` or has default value 
`$(LLVM_INSTALL_DIR)/lib/clang/$(LLVM_VERSION`. such as

`/opt/avr-tool-chain/lib/clang/14.0.1/lib/avr`
`/opt/avr-tool-chain/lib/clang/14.0.1/lib/`




Comment at: clang/lib/Driver/ToolChains/AVR.cpp:444
+ToolChain::RuntimeLibType AVRToolChain::GetDefaultRuntimeLibType() const {
+  return GCCInstallation.isValid() ? ToolChain::RLT_Libgcc
+   : ToolChain::RLT_CompilerRT;

Currently we still use libgcc if `--rtlib` option is not specified.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:482
+  (RtLib == ToolChain::RLT_Libgcc || RtLib == ToolChain::RLT_CompilerRT) &&
+  "unknown runtime library");
+

Currently we only allow `--rtlib=libgcc` and `--rtlib=compiler-rt`



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:510
+if (RtLib == ToolChain::RLT_Libgcc)
+  CmdArgs.push_back(Args.MakeArgString("-L" + TC.getGCCInstallPath() +
+   "/" + SubPath));

If `--rtlib` is not specified or specified to `libgcc`, then we generate 
`-L$PATH_TO_LIBGCC`



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:542
+// Link to libgcc.
+if (RtLib == ToolChain::RLT_Libgcc)
+  CmdArgs.push_back("-lgcc");

If `--rtlib` is not specified or specified to `libgcc`, then we generate `-lgcc`



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:555
+// Link to compiler-rt.
+if (RtLib == ToolChain::RLT_CompilerRT) {
+  std::string RtLib =

If `--rtlib=compiler-rt` is explicitly specified, we directly put the 
`libclang.builtins-avrxxx.a` as input file, other than 
`-lclang.builtins-avrxxx`, this is a tradition from other platforms, such as 
x86 and arm.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-05-07 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 427821.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.h
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/gcc/avr/5.4.0/avr5/libgcc.a
  
clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/avr/libclang_rt.builtins-avr5.a
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -58,3 +58,17 @@
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// LIBGCC: "-lgcc"
+// LIBGCC-NOT: libclang_rt
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=COMRT %s
+// COMRT: libclang_rt.builtins-avr5.a
+// COMRT-NOT: "-lgcc"
+
+// RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=NOMCU %s
+// RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=NOMCU %s
+// NOMCU-NOT: libclang_rt
+// NOMCU-NOT: "-lgcc"
Index: clang/lib/Driver/ToolChains/AVR.h
===
--- clang/lib/Driver/ToolChains/AVR.h
+++ clang/lib/Driver/ToolChains/AVR.h
@@ -34,11 +34,20 @@
   llvm::Optional findAVRLibcInstallation() const;
   StringRef getGCCInstallPath() const { return GCCInstallPath; }
 
+  std::string buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const override;
+
+  std::string getCompilerRTPath() const override;
+
+  ToolChain::RuntimeLibType GetDefaultRuntimeLibType() const override;
+
 protected:
   Tool *buildLinker() const override;
 
 private:
   StringRef GCCInstallPath;
+  std::string MCU;
 };
 
 } // end namespace toolchains
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -19,6 +19,7 @@
 #include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Path.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -369,14 +370,13 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
-  std::string CPU = getCPUName(D, Args, Triple);
-  if (CPU.empty())
+  MCU = getCPUName(D, Args, Triple);
+  if (MCU.empty())
 D.Diag(diag::warn_drv_avr_mcu_not_specified);
 
   // Only add default libraries if the user hasn't explicitly opted out.
   if (!Args.hasArg(options::OPT_nostdlib) &&
-  !Args.hasArg(options::OPT_nodefaultlibs) &&
-  GCCInstallation.isValid()) {
+  !Args.hasArg(options::OPT_nodefaultlibs) && GCCInstallation.isValid()) {
 GCCInstallPath = GCCInstallation.getInstallPath();
 std::string GCCParentPath(GCCInstallation.getParentLibPath());
 getProgramPaths().push_back(GCCParentPath + "/../bin");
@@ -415,6 +415,40 @@
 CC1Args.push_back("-fno-use-cxa-atexit");
 }
 
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const {
+  std::string Arch;
+  // Each device family should has its own build with specific optimization.
+  if (AddArch) {
+Optional FamilyName = GetMCUFamilyName(MCU);
+if (FamilyName)
+  Arch = "-" + (*FamilyName).str();
+// Neither libgcc nor compiler-rt will be linked if no '-mmcu' specified.
+// However we still append a default "-avr" for future changes.
+else
+  Arch = "-avr";
+  }
+  // libgcc distributed with avr-gcc always named 'libgcc.a' even on windows.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.
+  SmallString<128> Path(ToolChain::getCompilerRTPath());
+  llvm::sys::path::

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-05-07 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:430
+  // libgcc distributed with avr-gcc always named 'libgcc.a' even on windows.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}

MaskRay wrote:
> benshi001 wrote:
> > This method decides the file name of compiler-rt, it is expected to be 
> > 
> > `libclang_rt.builtins-avrfamily.a`, such as
> > 
> > `libclang_rt.builtins-avr51.a`
> > `libclang_rt.builtins-avrtiny.a`
> > `libclang_rt.builtins-avrxmega3.a`
> > 
> > 
> In `-DLLVM_ENABLE_PER_TARGET_RUNTIME_DIR=on` mode this should be 
> `lib/clang/$version/lib/$triple/libclang_rt.xxx.a` where there is no 
> `-microarch` infix.
But I would expect each subarch has its own specific build with specific 
 optimization. That is the way in avr-gcc distribution.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D123612: [Driver] Support linking to compiler-rt on AVR

2022-05-07 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:430
+  // libgcc distributed with avr-gcc always named 'libgcc.a' even on windows.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}

benshi001 wrote:
> MaskRay wrote:
> > benshi001 wrote:
> > > This method decides the file name of compiler-rt, it is expected to be 
> > > 
> > > `libclang_rt.builtins-avrfamily.a`, such as
> > > 
> > > `libclang_rt.builtins-avr51.a`
> > > `libclang_rt.builtins-avrtiny.a`
> > > `libclang_rt.builtins-avrxmega3.a`
> > > 
> > > 
> > In `-DLLVM_ENABLE_PER_TARGET_RUNTIME_DIR=on` mode this should be 
> > `lib/clang/$version/lib/$triple/libclang_rt.xxx.a` where there is no 
> > `-microarch` infix.
> But I would expect each subarch has its own specific build with specific 
>  optimization. That is the way in avr-gcc distribution.
This hook `buildCompilerRTBasename` with be called twice by the base class. The 
first time is called with `AddArch = false`, for which I do not append 
-microarch infix.

For the second call with `AddArch = true`, I will append -microarch infix.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123612/new/

https://reviews.llvm.org/D123612

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D128133: [Driver] Support linking to compiler-rt for target AVR

2022-07-11 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

ping ...


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128133/new/

https://reviews.llvm.org/D128133

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D128133: [Driver] Support linking to compiler-rt for target AVR

2022-07-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

ping ...


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128133/new/

https://reviews.llvm.org/D128133

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D125157: [RISCV][NFC] Add more tests for clang driver.

2022-05-09 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

Change the title to `[clang][Driver] Add more tests for riscv`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125157/new/

https://reviews.llvm.org/D125157

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D125157: [clang][Driver] Add more tests for riscv

2022-05-09 Thread Ben Shi via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG88c336d8eff0: [clang][Driver] Add more tests for riscv 
(authored by benshi001).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125157/new/

https://reviews.llvm.org/D125157

Files:
  clang/test/Driver/riscv-arch.c


Index: clang/test/Driver/riscv-arch.c
===
--- clang/test/Driver/riscv-arch.c
+++ clang/test/Driver/riscv-arch.c
@@ -559,3 +559,24 @@
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32ifdzve64d -### %s -c 
2>&1 | \
 // RUN:   FileCheck -check-prefix=RV32-ZVE64D-GOOD %s
 // RV32-ZVE64D-GOOD: "-target-feature" "+zve64d"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izfinx -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZFINX-GOOD %s
+// RV32-ZFINX-GOOD: "-target-feature" "+zfinx"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izdinx -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZDINX-GOOD %s
+// RV32-ZDINX-GOOD: "-target-feature" "+zdinx"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izhinxmin -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZHINXMIN-GOOD %s
+// RV32-ZHINXMIN-GOOD: "-target-feature" "+zhinxmin"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izhinx1p0 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZHINX-GOOD %s
+// RV32-ZHINX-GOOD: "-target-feature" "+zhinx"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izhinx0p1 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZHINX-BADVERS %s
+// RV32-ZHINX-BADVERS: error: invalid arch name 'rv32izhinx0p1'
+// RV32-ZHINX-BADVERS: unsupported version number 0.1 for extension 'zhinx'


Index: clang/test/Driver/riscv-arch.c
===
--- clang/test/Driver/riscv-arch.c
+++ clang/test/Driver/riscv-arch.c
@@ -559,3 +559,24 @@
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32ifdzve64d -### %s -c 2>&1 | \
 // RUN:   FileCheck -check-prefix=RV32-ZVE64D-GOOD %s
 // RV32-ZVE64D-GOOD: "-target-feature" "+zve64d"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izfinx -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZFINX-GOOD %s
+// RV32-ZFINX-GOOD: "-target-feature" "+zfinx"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izdinx -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZDINX-GOOD %s
+// RV32-ZDINX-GOOD: "-target-feature" "+zdinx"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izhinxmin -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZHINXMIN-GOOD %s
+// RV32-ZHINXMIN-GOOD: "-target-feature" "+zhinxmin"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izhinx1p0 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZHINX-GOOD %s
+// RV32-ZHINX-GOOD: "-target-feature" "+zhinx"
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32izhinx0p1 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZHINX-BADVERS %s
+// RV32-ZHINX-BADVERS: error: invalid arch name 'rv32izhinx0p1'
+// RV32-ZHINX-BADVERS: unsupported version number 0.1 for extension 'zhinx'
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D125157: [clang][Driver] Add more tests for riscv

2022-05-10 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.
Herald added a subscriber: shiva0217.

It is my mistake. I should add `--author=Ping Deng 
` when doing `git commit`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125157/new/

https://reviews.llvm.org/D125157

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D126192: [Driver] Support linking with lld for target AVR

2022-05-23 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, MaskRay.
Herald added subscribers: StephenFan, Jim, dylanmckay.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D126192

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/Inputs/basic_avr_tree/usr/bin/ld.lld
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/avr/lib/ldscripts/avr5.xn
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -53,8 +53,15 @@
 // LINKA-NOT: warning: {{.*}} data section address
 
 // RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 %s 2>&1 | FileCheck --check-prefixes=NOGCC %s
-// NOGCC: warning: no avr-gcc installation can be found on the system, cannot link standard libraries
+// NOGCC: error: invalid linker
 // NOGCC: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=avrld 2>&1 | FileCheck --check-prefix=NOLD %s
+// NOLD: error: invalid linker
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=lld 2>&1 | FileCheck --check-prefix=LLD %s
+// LLD: {{".*lld"}} {{.*}} "-e" "__vectors" "-T" {{".*avr5.xn"}}
+// LLD-NOT: "-mavr5"
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -429,9 +429,24 @@
   // Compute information about the target AVR.
   std::string CPU = getCPUName(D, Args, getToolChain().getTriple());
   llvm::Optional FamilyName = GetMCUFamilyName(CPU);
+  llvm::Optional AVRLibcRoot = TC.findAVRLibcInstallation();
   llvm::Optional SectionAddressData = GetMCUSectionAddressData(CPU);
 
+  // Compute the linker program path, and use GNU "avr-ld" as default.
   std::string Linker = getToolChain().GetProgramPath(getShortName());
+  const Arg* A = Args.getLastArg(options::OPT_fuse_ld_EQ);
+  if (A) {
+std::string UseLinker = A->getValue();
+// Compute full path of ld.lld.
+if (UseLinker == "lld")
+  Linker = getToolChain().GetProgramPath("ld.lld");
+else
+  Linker = UseLinker;
+  }
+  // Check if the linker program is valid.
+  if (!llvm::sys::fs::can_execute(Linker))
+D.Diag(diag::err_drv_invalid_linker_name) << Linker;
+
   ArgStringList CmdArgs;
   AddLinkerInputs(getToolChain(), Inputs, Args, CmdArgs, JA);
 
@@ -450,17 +465,11 @@
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs)) {
 if (!CPU.empty()) {
-Optional FamilyName = GetMCUFamilyName(CPU);
-Optional AVRLibcRoot = TC.findAVRLibcInstallation();
-
   if (!FamilyName) {
 // We do not have an entry for this CPU in the family
 // mapping table yet.
 D.Diag(diag::warn_drv_avr_family_linking_stdlibs_not_implemented)
 << CPU;
-  } else if (TC.getGCCInstallPath().empty()) {
-// We can not link since there is no avr-ld.
-D.Diag(diag::warn_drv_avr_gcc_not_found);
   } else if (!AVRLibcRoot) {
 // No avr-libc found and so no runtime linked.
 D.Diag(diag::warn_drv_avr_libc_not_found);
@@ -473,7 +482,6 @@
 LinkStdlib = true;
   }
 }
-
 if (!LinkStdlib)
   D.Diag(diag::warn_drv_avr_stdlib_not_linked);
   }
@@ -508,11 +516,28 @@
 
 CmdArgs.push_back("--end-group");
 
-// Specify the family name as the emulation mode to use.
-// This is almost always required because otherwise avr-ld
-// will assume 'avr2' and warn about the program being larger
-// than the bare minimum supports.
-CmdArgs.push_back(Args.MakeArgString(std::string("-m") + *FamilyName));
+// Add specific options for different linkers.
+if (Linker.find("avr-ld") != std::string::npos) {
+  // Specify the family name as the emulation mode to use.
+  // This is almost always required because otherwise avr-ld
+  // will assume 'avr2' and warn about the program being larger
+  // than the bare minimum supports.
+  CmdArgs.push_back(Args.MakeArgString(std::string("-m") + *FamilyName));
+} else if (Linker.find("ld.lld") != std::string::npos) {
+  // We must explicitly specify `__vectors` as the entry for lld.
+  CmdArgs.push_back(Args.MakeArgString("-e"));
+  CmdArgs.push_back(Args.MakeArgString("__vectors"));
+  // We must explicitly spefify the linker script (for lld), which has
+  // alr

[PATCH] D126192: [Driver] Support linking with lld for target AVR

2022-05-23 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 431332.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126192/new/

https://reviews.llvm.org/D126192

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/Inputs/basic_avr_tree/usr/bin/ld.lld
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/avr/lib/ldscripts/avr5.xn
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -53,8 +53,16 @@
 // LINKA-NOT: warning: {{.*}} data section address
 
 // RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 %s 2>&1 | FileCheck --check-prefixes=NOGCC %s
-// NOGCC: warning: no avr-gcc installation can be found on the system, cannot link standard libraries
+// NOGCC: error: invalid linker
 // NOGCC: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=avrld 2>&1 | FileCheck --check-prefix=NOLD %s
+// NOLD: error: invalid linker
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=ld.lld 2>&1 | FileCheck --check-prefix=LLD %s
+// LLD: {{".*lld"}} {{.*}} "-e" "__vectors" "-T" {{".*avr5.xn"}}
+// LLD-NOT: "avr-ld"
+// LLD-NOT: "-mavr5"
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -429,9 +429,20 @@
   // Compute information about the target AVR.
   std::string CPU = getCPUName(D, Args, getToolChain().getTriple());
   llvm::Optional FamilyName = GetMCUFamilyName(CPU);
+  llvm::Optional AVRLibcRoot = TC.findAVRLibcInstallation();
   llvm::Optional SectionAddressData = GetMCUSectionAddressData(CPU);
 
-  std::string Linker = getToolChain().GetProgramPath(getShortName());
+  // Compute the linker program path, and use GNU "avr-ld" as default.
+  const Arg* A = Args.getLastArg(options::OPT_fuse_ld_EQ);
+  std::string Linker(A ? A->getValue() : getShortName());
+  if (!llvm::sys::fs::can_execute(Linker)) {
+std::string FullPath = getToolChain().GetProgramPath(Linker.c_str());
+if (!llvm::sys::fs::can_execute(FullPath))
+  D.Diag(diag::err_drv_invalid_linker_name) << Linker;
+else
+  Linker = FullPath;
+  }
+
   ArgStringList CmdArgs;
   AddLinkerInputs(getToolChain(), Inputs, Args, CmdArgs, JA);
 
@@ -450,17 +461,11 @@
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs)) {
 if (!CPU.empty()) {
-Optional FamilyName = GetMCUFamilyName(CPU);
-Optional AVRLibcRoot = TC.findAVRLibcInstallation();
-
   if (!FamilyName) {
 // We do not have an entry for this CPU in the family
 // mapping table yet.
 D.Diag(diag::warn_drv_avr_family_linking_stdlibs_not_implemented)
 << CPU;
-  } else if (TC.getGCCInstallPath().empty()) {
-// We can not link since there is no avr-ld.
-D.Diag(diag::warn_drv_avr_gcc_not_found);
   } else if (!AVRLibcRoot) {
 // No avr-libc found and so no runtime linked.
 D.Diag(diag::warn_drv_avr_libc_not_found);
@@ -473,7 +478,6 @@
 LinkStdlib = true;
   }
 }
-
 if (!LinkStdlib)
   D.Diag(diag::warn_drv_avr_stdlib_not_linked);
   }
@@ -508,11 +512,28 @@
 
 CmdArgs.push_back("--end-group");
 
-// Specify the family name as the emulation mode to use.
-// This is almost always required because otherwise avr-ld
-// will assume 'avr2' and warn about the program being larger
-// than the bare minimum supports.
-CmdArgs.push_back(Args.MakeArgString(std::string("-m") + *FamilyName));
+// Add specific options for different linkers.
+if (Linker.find("avr-ld") != std::string::npos) {
+  // Specify the family name as the emulation mode to use.
+  // This is almost always required because otherwise avr-ld
+  // will assume 'avr2' and warn about the program being larger
+  // than the bare minimum supports.
+  CmdArgs.push_back(Args.MakeArgString(std::string("-m") + *FamilyName));
+} else if (Linker.find("ld.lld") != std::string::npos) {
+  // We must explicitly specify `__vectors` as the entry for lld.
+  CmdArgs.push_back(Args.MakeArgString("-e"));
+  CmdArgs.push_back(Args.MakeArgString("__vectors"));
+  // We must explicitly spefify the linker script (for lld), which has
+  // already been integrated into avr-libc, and whose full path is
+  // expected to be $AVR-LIBC/lib/ldscripts/$FamilyName.xn .
+  if (AVRLibcRoot && FamilyName) {
+std::string Prefix(*AVRLibcRoot + "/lib/ldscripts/")

[PATCH] D126192: [Driver] Support linking with lld for target AVR

2022-05-23 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:461
 << CPU;
-  } else if (TC.getGCCInstallPath().empty()) {
-// We can not link since there is no avr-ld.

This check is no longer needed, since we will check `if 
(!llvm::sys::fs::can_execute(FullPath))` at above lines.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:526
+  CmdArgs.push_back(Args.MakeArgString("__vectors"));
+  // We must explicitly spefify the linker script (for lld), which has
+  // already been integrated into avr-libc, and whose full path is

I am not familiar with avr-ld internal, but it will implicitly:

1. Use `__vectors` as the entry;
2. Use `$AVR-LIBC/lib/ldscripts/$FamilyName.xn` as the linker script;
 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126192/new/

https://reviews.llvm.org/D126192

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D126192: [Driver] Support linking with lld for target AVR

2022-05-23 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 431565.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126192/new/

https://reviews.llvm.org/D126192

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/Inputs/basic_avr_tree/usr/bin/ld.lld
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/avr/lib/ldscripts/avr5.xn
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -53,8 +53,16 @@
 // LINKA-NOT: warning: {{.*}} data section address
 
 // RUN: %clang -### --target=avr --sysroot=%S/Inputs/ -mmcu=atmega328 %s 2>&1 | FileCheck --check-prefixes=NOGCC %s
-// NOGCC: warning: no avr-gcc installation can be found on the system, cannot link standard libraries
+// NOGCC: error: invalid linker
 // NOGCC: warning: standard library not linked and so no interrupt vector table or compiler runtime routines will be linked
 // NOGCC-NOT: warning: {{.*}} microcontroller
 // NOGCC-NOT: warning: {{.*}} avr-libc
 // NOGCC-NOT: warning: {{.*}} data section address
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=avrld 2>&1 | FileCheck --check-prefix=NOLD %s
+// NOLD: error: invalid linker
+
+// RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=ld.lld 2>&1 | FileCheck --check-prefix=LLD %s
+// LLD: {{".*lld"}} {{.*}} "-e" "__vectors" "-T" {{".*avr5.x"}}
+// LLD-NOT: "avr-ld"
+// LLD-NOT: "-mavr5"
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -429,9 +429,20 @@
   // Compute information about the target AVR.
   std::string CPU = getCPUName(D, Args, getToolChain().getTriple());
   llvm::Optional FamilyName = GetMCUFamilyName(CPU);
+  llvm::Optional AVRLibcRoot = TC.findAVRLibcInstallation();
   llvm::Optional SectionAddressData = GetMCUSectionAddressData(CPU);
 
-  std::string Linker = getToolChain().GetProgramPath(getShortName());
+  // Compute the linker program path, and use GNU "avr-ld" as default.
+  const Arg* A = Args.getLastArg(options::OPT_fuse_ld_EQ);
+  std::string Linker(A ? A->getValue() : getShortName());
+  if (!llvm::sys::fs::can_execute(Linker)) {
+std::string FullPath = getToolChain().GetProgramPath(Linker.c_str());
+if (!llvm::sys::fs::can_execute(FullPath))
+  D.Diag(diag::err_drv_invalid_linker_name) << Linker;
+else
+  Linker = FullPath;
+  }
+
   ArgStringList CmdArgs;
   AddLinkerInputs(getToolChain(), Inputs, Args, CmdArgs, JA);
 
@@ -450,17 +461,11 @@
   if (!Args.hasArg(options::OPT_nostdlib) &&
   !Args.hasArg(options::OPT_nodefaultlibs)) {
 if (!CPU.empty()) {
-Optional FamilyName = GetMCUFamilyName(CPU);
-Optional AVRLibcRoot = TC.findAVRLibcInstallation();
-
   if (!FamilyName) {
 // We do not have an entry for this CPU in the family
 // mapping table yet.
 D.Diag(diag::warn_drv_avr_family_linking_stdlibs_not_implemented)
 << CPU;
-  } else if (TC.getGCCInstallPath().empty()) {
-// We can not link since there is no avr-ld.
-D.Diag(diag::warn_drv_avr_gcc_not_found);
   } else if (!AVRLibcRoot) {
 // No avr-libc found and so no runtime linked.
 D.Diag(diag::warn_drv_avr_libc_not_found);
@@ -473,7 +478,6 @@
 LinkStdlib = true;
   }
 }
-
 if (!LinkStdlib)
   D.Diag(diag::warn_drv_avr_stdlib_not_linked);
   }
@@ -508,11 +512,28 @@
 
 CmdArgs.push_back("--end-group");
 
-// Specify the family name as the emulation mode to use.
-// This is almost always required because otherwise avr-ld
-// will assume 'avr2' and warn about the program being larger
-// than the bare minimum supports.
-CmdArgs.push_back(Args.MakeArgString(std::string("-m") + *FamilyName));
+// Add specific options for different linkers.
+if (Linker.find("avr-ld") != std::string::npos) {
+  // Specify the family name as the emulation mode to use.
+  // This is almost always required because otherwise avr-ld
+  // will assume 'avr2' and warn about the program being larger
+  // than the bare minimum supports.
+  CmdArgs.push_back(Args.MakeArgString(std::string("-m") + *FamilyName));
+} else if (Linker.find("ld.lld") != std::string::npos) {
+  // We must explicitly specify `__vectors` as the entry for lld.
+  CmdArgs.push_back(Args.MakeArgString("-e"));
+  CmdArgs.push_back(Args.MakeArgString("__vectors"));
+  // We must explicitly spefify the linker script (for lld), which has
+  // already been integrated into avr-libc, and whose full path is
+  // expected to be $AVR-LIBC/lib/ldscripts/$FamilyName.x .
+  if (AVRLibcRoot && FamilyName) {
+std::string Prefix(*AVRLibcRoot + "/lib/ldscripts/");

[PATCH] D126282: [Driver] Add more options for target AVR when linking with lld

2022-05-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, MaskRay.
Herald added subscribers: StephenFan, Jim, dylanmckay.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D126282

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -64,5 +64,8 @@
 
 // RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=ld.lld 2>&1 | FileCheck --check-prefix=LLD %s
 // LLD: {{".*lld"}} {{.*}} "-e" "__vectors" "-T" {{".*avr5.x"}}
+// LLD-SAME: "--defsym=__TEXT_REGION_LENGTH__=32768"
+// LLD-SAME: "--defsym=__DATA_REGION_LENGTH__=2048"
+// LLD-SAME: "--defsym=__EEPROM_REGION_LENGTH__=1024"
 // LLD-NOT: "avr-ld"
 // LLD-NOT: "-mavr5"
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -29,310 +29,333 @@
 namespace {
 
 // NOTE: This list has been synchronized with gcc-avr 7.3.0 and avr-libc 2.0.0.
+//   Refer to https://www.alldatasheet.com/ for more device information.
 constexpr struct {
   StringRef Name;
   StringRef SubPath;
   StringRef Family;
   unsigned DataAddr;
+  unsigned FlashSize;
+  unsigned SRAMSize;
+  unsigned EEPROMSize;
 } MCUInfo[] = {
-{"at90s1200", "", "avr1", 0},
-{"attiny11", "", "avr1", 0},
-{"attiny12", "", "avr1", 0},
-{"attiny15", "", "avr1", 0},
-{"attiny28", "", "avr1", 0},
-{"at90s2313", "tiny-stack", "avr2", 0x800060},
-{"at90s2323", "tiny-stack", "avr2", 0x800060},
-{"at90s2333", "tiny-stack", "avr2", 0x800060},
-{"at90s2343", "tiny-stack", "avr2", 0x800060},
-{"at90s4433", "tiny-stack", "avr2", 0x800060},
-{"attiny22", "tiny-stack", "avr2", 0x800060},
-{"attiny26", "tiny-stack", "avr2", 0x800060},
-{"at90s4414", "", "avr2", 0x800060},
-{"at90s4434", "", "avr2", 0x800060},
-{"at90s8515", "", "avr2", 0x800060},
-{"at90c8534", "", "avr2", 0x800060},
-{"at90s8535", "", "avr2", 0x800060},
-{"attiny13", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny13a", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny2313", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny2313a", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny24", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny24a", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny25", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny261", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny261a", "avr25/tiny-stack", "avr25", 0x800060},
-{"at86rf401", "avr25", "avr25", 0x800060},
+{"at90s1200", "", "avr1", 0, 1024, 0, 64},
+{"attiny11", "", "avr1", 0, 1024, 0, 64},
+{"attiny12", "", "avr1", 0, 1024, 0, 64},
+{"attiny15", "", "avr1", 0, 1024, 0, 64},
+{"attiny28", "", "avr1", 0, 2048, 0, 64},
+{"at90s2313", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s2323", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s2333", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s2343", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s4433", "tiny-stack", "avr2", 0x800060, 4096, 128, 256},
+{"attiny22", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"attiny26", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s4414", "", "avr2", 0x800060, 4096, 256, 256},
+{"at90s4434", "", "avr2", 0x800060, 4096, 256, 256},
+{"at90s8515", "", "avr2", 0x800060, 8192, 512, 512},
+{"at90c8534", "", "avr2", 0x800060, 8192, 512, 512},
+{"at90s8535", "", "avr2", 0x800060, 8192, 512, 512},
+{"attiny13", "avr25/tiny-stack", "avr25", 0x800060, 1024, 64, 64},
+{"attiny13a", "avr25/tiny-stack", "avr25", 0x800060, 1024, 64, 64},
+{"attiny2313", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny2313a", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny24", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny24a", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny25", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny261", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny261a", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"at86rf401", "avr25", "avr25", 0x800060, 2048, 128, 128},
 {"ata5272", "avr25", "avr25", 0x800100},
 {"ata6616c", "avr25", "avr25", 0x800100},
-{"attiny4313", "avr25", "avr25", 0x800060},
-{"attiny44", "avr25", "avr25", 0x800060},
-{"attiny44a", "avr25", "avr25", 0x800060},
-{"attiny84", "avr25", "avr25", 0x800060},
-{"attiny84

[PATCH] D126282: [Driver] Add more options for target AVR when linking with lld

2022-05-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 431625.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126282/new/

https://reviews.llvm.org/D126282

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -64,5 +64,8 @@
 
 // RUN: %clang -### --target=avr --sysroot=%S/Inputs/basic_avr_tree -mmcu=atmega328 %s -fuse-ld=ld.lld 2>&1 | FileCheck --check-prefix=LLD %s
 // LLD: {{".*lld"}} {{.*}} "-e" "__vectors" "-T" {{".*avr5.x"}}
+// LLD-SAME: "--defsym=__TEXT_REGION_LENGTH__=32768"
+// LLD-SAME: "--defsym=__DATA_REGION_LENGTH__=2048"
+// LLD-SAME: "--defsym=__EEPROM_REGION_LENGTH__=1024"
 // LLD-NOT: "avr-ld"
 // LLD-NOT: "-mavr5"
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -29,310 +29,333 @@
 namespace {
 
 // NOTE: This list has been synchronized with gcc-avr 7.3.0 and avr-libc 2.0.0.
+//   Refer to https://www.alldatasheet.com/ for more device information.
 constexpr struct {
   StringRef Name;
   StringRef SubPath;
   StringRef Family;
   unsigned DataAddr;
+  unsigned FlashSize;
+  unsigned SRAMSize;
+  unsigned EEPROMSize;
 } MCUInfo[] = {
-{"at90s1200", "", "avr1", 0},
-{"attiny11", "", "avr1", 0},
-{"attiny12", "", "avr1", 0},
-{"attiny15", "", "avr1", 0},
-{"attiny28", "", "avr1", 0},
-{"at90s2313", "tiny-stack", "avr2", 0x800060},
-{"at90s2323", "tiny-stack", "avr2", 0x800060},
-{"at90s2333", "tiny-stack", "avr2", 0x800060},
-{"at90s2343", "tiny-stack", "avr2", 0x800060},
-{"at90s4433", "tiny-stack", "avr2", 0x800060},
-{"attiny22", "tiny-stack", "avr2", 0x800060},
-{"attiny26", "tiny-stack", "avr2", 0x800060},
-{"at90s4414", "", "avr2", 0x800060},
-{"at90s4434", "", "avr2", 0x800060},
-{"at90s8515", "", "avr2", 0x800060},
-{"at90c8534", "", "avr2", 0x800060},
-{"at90s8535", "", "avr2", 0x800060},
-{"attiny13", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny13a", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny2313", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny2313a", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny24", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny24a", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny25", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny261", "avr25/tiny-stack", "avr25", 0x800060},
-{"attiny261a", "avr25/tiny-stack", "avr25", 0x800060},
-{"at86rf401", "avr25", "avr25", 0x800060},
+{"at90s1200", "", "avr1", 0, 1024, 0, 64},
+{"attiny11", "", "avr1", 0, 1024, 0, 64},
+{"attiny12", "", "avr1", 0, 1024, 0, 64},
+{"attiny15", "", "avr1", 0, 1024, 0, 64},
+{"attiny28", "", "avr1", 0, 2048, 0, 64},
+{"at90s2313", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s2323", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s2333", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s2343", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s4433", "tiny-stack", "avr2", 0x800060, 4096, 128, 256},
+{"attiny22", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"attiny26", "tiny-stack", "avr2", 0x800060, 2048, 128, 128},
+{"at90s4414", "", "avr2", 0x800060, 4096, 256, 256},
+{"at90s4434", "", "avr2", 0x800060, 4096, 256, 256},
+{"at90s8515", "", "avr2", 0x800060, 8192, 512, 512},
+{"at90c8534", "", "avr2", 0x800060, 8192, 512, 512},
+{"at90s8535", "", "avr2", 0x800060, 8192, 512, 512},
+{"attiny13", "avr25/tiny-stack", "avr25", 0x800060, 1024, 64, 64},
+{"attiny13a", "avr25/tiny-stack", "avr25", 0x800060, 1024, 64, 64},
+{"attiny2313", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny2313a", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny24", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny24a", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny25", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny261", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"attiny261a", "avr25/tiny-stack", "avr25", 0x800060, 2048, 128, 128},
+{"at86rf401", "avr25", "avr25", 0x800060, 2048, 128, 128},
 {"ata5272", "avr25", "avr25", 0x800100},
 {"ata6616c", "avr25", "avr25", 0x800100},
-{"attiny4313", "avr25", "avr25", 0x800060},
-{"attiny44", "avr25", "avr25", 0x800060},
-{"attiny44a", "avr25", "avr25", 0x800060},
-{"attiny84", "avr25", "avr25", 0x800060},
-{"attiny84a", "avr25", "avr25", 0x800060},
-{"attiny45", "avr25", "avr25", 0x800060},
-{"attiny85", "avr25", "avr25", 0x800060},
-{"attiny441", "avr25", "avr25", 0x800100},
-{"attiny461", "avr25", "avr25", 0

[PATCH] D126282: [Driver] Add more options for target AVR when linking with lld

2022-05-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:38
   unsigned DataAddr;
+  unsigned FlashSize;
+  unsigned SRAMSize;

We need these information to correctly linking with lld.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:581
+  // __DATA_REGION_LENGTH__, and __EEPROM_REGION_LENGTH__ according to
+  // current MCU.
+  CmdArgs.push_back(

These three symbols are implicitly added to GNU avr-ld, but we have to add them 
exeplicitly to lld.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126282/new/

https://reviews.llvm.org/D126282

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D126299: [Driver] Support linking to compiler-rt for target AVR

2022-05-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: aykevl, dylanmckay.
Herald added subscribers: Jim, dberris.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: cfe-commits, jacquesguan, MaskRay.
Herald added a project: clang.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D126299

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.h
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/gcc/avr/5.4.0/avr5/libgcc.a
  
clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/avr/libclang_rt.builtins-avr5.a
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -69,3 +69,17 @@
 // LLD-SAME: "--defsym=__EEPROM_REGION_LENGTH__=1024"
 // LLD-NOT: "avr-ld"
 // LLD-NOT: "-mavr5"
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// LIBGCC: "-lgcc"
+// LIBGCC-NOT: libclang_rt
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=COMRT %s
+// COMRT: libclang_rt.builtins-avr5.a
+// COMRT-NOT: "-lgcc"
+
+// RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=NOMCU %s
+// RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=NOMCU %s
+// NOMCU-NOT: libclang_rt
+// NOMCU-NOT: "-lgcc"
Index: clang/lib/Driver/ToolChains/AVR.h
===
--- clang/lib/Driver/ToolChains/AVR.h
+++ clang/lib/Driver/ToolChains/AVR.h
@@ -34,11 +34,20 @@
   llvm::Optional findAVRLibcInstallation() const;
   StringRef getGCCInstallPath() const { return GCCInstallPath; }
 
+  std::string buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const override;
+
+  std::string getCompilerRTPath() const override;
+
+  ToolChain::RuntimeLibType GetDefaultRuntimeLibType() const override;
+
 protected:
   Tool *buildLinker() const override;
 
 private:
   StringRef GCCInstallPath;
+  std::string MCU;
 };
 
 } // end namespace toolchains
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -19,6 +19,7 @@
 #include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Path.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -413,8 +414,8 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
-  std::string CPU = getCPUName(D, Args, Triple);
-  if (CPU.empty())
+  MCU = getCPUName(D, Args, Triple);
+  if (MCU.empty())
 D.Diag(diag::warn_drv_avr_mcu_not_specified);
 
   // Only add default libraries if the user hasn't explicitly opted out.
@@ -458,6 +459,41 @@
 CC1Args.push_back("-fno-use-cxa-atexit");
 }
 
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const {
+  std::string Arch;
+  // Each device family should has its own compiler-rt build with optimization.
+  if (AddArch) {
+Optional FamilyName = GetMCUFamilyName(MCU);
+if (FamilyName)
+  Arch = "-" + (*FamilyName).str();
+// Neither libgcc nor compiler-rt will be linked if no '-mmcu' specified.
+// However we still append a default "-avr" for future changes.
+else
+  Arch = "-avr";
+  }
+  // Since the libgcc distributed with avr-gcc always named 'libgcc.a' even
+  // on windows, we should also build compiler-rt with a '.a' suffix.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.
+  SmallString<128> Path(ToolChain::getCompilerRTPath());
+  llvm::sys::path::append(Path, "avr");
+  if (llvm::sys::fs::is_directory(Path))
+return std::string(Path.str());
+  // Fall back to default.
+  return ToolChain::getCompil

[PATCH] D126299: [Driver] Support linking to compiler-rt for target AVR

2022-05-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 431665.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126299/new/

https://reviews.llvm.org/D126299

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/lib/Driver/ToolChains/AVR.h
  clang/test/Driver/Inputs/basic_avr_tree/usr/lib/gcc/avr/5.4.0/avr5/libgcc.a
  
clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/avr/libclang_rt.builtins-avr5.a
  clang/test/Driver/avr-toolchain.c

Index: clang/test/Driver/avr-toolchain.c
===
--- clang/test/Driver/avr-toolchain.c
+++ clang/test/Driver/avr-toolchain.c
@@ -69,3 +69,17 @@
 // LLD-SAME: "--defsym=__EEPROM_REGION_LENGTH__=1024"
 // LLD-NOT: "avr-ld"
 // LLD-NOT: "-mavr5"
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=LIBGCC %s
+// LIBGCC: "-lgcc"
+// LIBGCC-NOT: libclang_rt
+
+// RUN: %clang %s -### --target=avr -mmcu=atmega328 --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=COMRT %s
+// COMRT: libclang_rt.builtins-avr5.a
+// COMRT-NOT: "-lgcc"
+
+// RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=compiler-rt 2>&1 | FileCheck --check-prefix=NOMCU %s
+// RUN: %clang %s -### --target=avr --sysroot=%S/Inputs/basic_avr_tree/ -resource-dir=%S/Inputs/resource_dir_with_per_target_subdir --rtlib=libgcc 2>&1 | FileCheck --check-prefix=NOMCU %s
+// NOMCU-NOT: libclang_rt
+// NOMCU-NOT: "-lgcc"
Index: clang/lib/Driver/ToolChains/AVR.h
===
--- clang/lib/Driver/ToolChains/AVR.h
+++ clang/lib/Driver/ToolChains/AVR.h
@@ -34,11 +34,20 @@
   llvm::Optional findAVRLibcInstallation() const;
   StringRef getGCCInstallPath() const { return GCCInstallPath; }
 
+  std::string buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const override;
+
+  std::string getCompilerRTPath() const override;
+
+  ToolChain::RuntimeLibType GetDefaultRuntimeLibType() const override;
+
 protected:
   Tool *buildLinker() const override;
 
 private:
   StringRef GCCInstallPath;
+  std::string MCU;
 };
 
 } // end namespace toolchains
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -19,6 +19,7 @@
 #include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Path.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -413,8 +414,8 @@
 : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
 
-  std::string CPU = getCPUName(D, Args, Triple);
-  if (CPU.empty())
+  MCU = getCPUName(D, Args, Triple);
+  if (MCU.empty())
 D.Diag(diag::warn_drv_avr_mcu_not_specified);
 
   // Only add default libraries if the user hasn't explicitly opted out.
@@ -458,6 +459,41 @@
 CC1Args.push_back("-fno-use-cxa-atexit");
 }
 
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,
+  bool AddArch) const {
+  std::string Arch;
+  // Each device family should has its own compiler-rt build with optimization.
+  if (AddArch) {
+Optional FamilyName = GetMCUFamilyName(MCU);
+if (FamilyName)
+  Arch = "-" + (*FamilyName).str();
+// Neither libgcc nor compiler-rt will be linked if no '-mmcu' specified.
+// However we still append a default "-avr" for future changes.
+else
+  Arch = "-avr";
+  }
+  // Since the libgcc distributed with avr-gcc always named 'libgcc.a' even
+  // on windows, we should also build compiler-rt with a '.a' suffix.
+  return (Twine("libclang_rt.") + Component + Arch + ".a").str();
+}
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.
+  SmallString<128> Path(ToolChain::getCompilerRTPath());
+  llvm::sys::path::append(Path, "avr");
+  if (llvm::sys::fs::is_directory(Path))
+return std::string(Path.str());
+  // Fall back to default.
+  return ToolChain::getCompilerRTPath();
+}
+
+ToolChain::RuntimeLibType AVRToolChain::GetDefaultRuntimeLibType() const {
+  return GCCInstallation.isValid() ? ToolChain::RLT_Libgcc
+   : ToolChain::RLT_Comp

[PATCH] D126299: [Driver] Support linking to compiler-rt for target AVR

2022-05-24 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added inline comments.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:463
+std::string
+AVRToolChain::buildCompilerRTBasename(const llvm::opt::ArgList &Args,
+  StringRef Component, FileType Type,

This method decides the file name of compiler-rt, it is expected to be

libclang_rt.builtins-avrfamily.a, such as

libclang_rt.builtins-avr51.a
libclang_rt.builtins-avrtiny.a
libclang_rt.builtins-avrxmega3.a



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:482
+
+std::string AVRToolChain::getCompilerRTPath() const {
+  // Return default path appended with "/avr", if it exists.

This method decides the library path of compiler-rt, it is
`$(RESOURCE_DIR)/lib/avr` or `$(RESOURCE_DIR)/lib/`. The resource dir is either 
explicitly specified via user option `-resource-dir` or has default value 
`$(LLVM_INSTALL_DIR)/lib/clang/$(LLVM_VERSION)`. such as

```
/opt/avr-tool-chain/lib/clang/14.0.1/lib/avr
/opt/avr-tool-chain/lib/clang/14.0.1/lib/
```



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:492
+
+ToolChain::RuntimeLibType AVRToolChain::GetDefaultRuntimeLibType() const {
+  return GCCInstallation.isValid() ? ToolChain::RLT_Libgcc

Currently we still use libgcc if --rtlib option is not specified.



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:541
+  assert(
+  (RtLib == ToolChain::RLT_Libgcc || RtLib == ToolChain::RLT_CompilerRT) &&
+  "unknown runtime library");

Currently we only allow --rtlib=libgcc and --rtlib=compiler-rt



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:564
+if (RtLib == ToolChain::RLT_Libgcc)
+  CmdArgs.push_back(Args.MakeArgString("-L" + TC.getGCCInstallPath() +
+   "/" + SubPath));

If --rtlib is not specified or specified to libgcc, then we generate 
-L$PATH_TO_LIBGCC



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:595
+// Link to libgcc.
+if (RtLib == ToolChain::RLT_Libgcc)
+  CmdArgs.push_back("-lgcc");

If --rtlib is not specified or specified to libgcc, then we generate -lgcc



Comment at: clang/lib/Driver/ToolChains/AVR.cpp:608
+// Link to compiler-rt.
+if (RtLib == ToolChain::RLT_CompilerRT) {
+  std::string RtLib =

If --rtlib=compiler-rt is explicitly specified, we directly put the 
libclang.builtins-avrxxx.a as input file, other than -lclang.builtins-avrxxx, 
this is a tradition from other platforms, such as x86 and arm.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126299/new/

https://reviews.llvm.org/D126299

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D88352: [clang][AVR] Add more devices

2020-09-25 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: dylanmckay, aykevl.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.
benshi001 requested review of this revision.

AVR.cpp should be kept up-to-date with AVRDevices.td


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88352

Files:
  clang/lib/Basic/Targets/AVR.cpp


Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -63,8 +63,10 @@
 {"attiny85", "__AVR_ATtiny85__"},
 {"attiny261", "__AVR_ATtiny261__"},
 {"attiny261a", "__AVR_ATtiny261A__"},
+{"attiny441", "__AVR_ATtiny441__"},
 {"attiny461", "__AVR_ATtiny461__"},
 {"attiny461a", "__AVR_ATtiny461A__"},
+{"attiny841", "__AVR_ATtiny841__"},
 {"attiny861", "__AVR_ATtiny861__"},
 {"attiny861a", "__AVR_ATtiny861A__"},
 {"attiny87", "__AVR_ATtiny87__"},
@@ -92,11 +94,13 @@
 {"atmega48", "__AVR_ATmega48__"},
 {"atmega48a", "__AVR_ATmega48A__"},
 {"atmega48pa", "__AVR_ATmega48PA__"},
+{"atmega48pb", "__AVR_ATmega48PB__"},
 {"atmega48p", "__AVR_ATmega48P__"},
 {"atmega88", "__AVR_ATmega88__"},
 {"atmega88a", "__AVR_ATmega88A__"},
 {"atmega88p", "__AVR_ATmega88P__"},
 {"atmega88pa", "__AVR_ATmega88PA__"},
+{"atmega88pb", "__AVR_ATmega88PB__"},
 {"atmega8515", "__AVR_ATmega8515__"},
 {"atmega8535", "__AVR_ATmega8535__"},
 {"atmega8hva", "__AVR_ATmega8HVA__"},
@@ -124,6 +128,7 @@
 {"atmega168a", "__AVR_ATmega168A__"},
 {"atmega168p", "__AVR_ATmega168P__"},
 {"atmega168pa", "__AVR_ATmega168PA__"},
+{"atmega168pb", "__AVR_ATmega168PB__"},
 {"atmega169", "__AVR_ATmega169__"},
 {"atmega169a", "__AVR_ATmega169A__"},
 {"atmega169p", "__AVR_ATmega169P__"},
@@ -134,6 +139,7 @@
 {"atmega324a", "__AVR_ATmega324A__"},
 {"atmega324p", "__AVR_ATmega324P__"},
 {"atmega324pa", "__AVR_ATmega324PA__"},
+{"atmega324pb", "__AVR_ATmega324PB__"},
 {"atmega325", "__AVR_ATmega325__"},
 {"atmega325a", "__AVR_ATmega325A__"},
 {"atmega325p", "__AVR_ATmega325P__"},
@@ -144,6 +150,7 @@
 {"atmega3250pa", "__AVR_ATmega3250PA__"},
 {"atmega328", "__AVR_ATmega328__"},
 {"atmega328p", "__AVR_ATmega328P__"},
+{"atmega328pb", "__AVR_ATmega328PB__"},
 {"atmega329", "__AVR_ATmega329__"},
 {"atmega329a", "__AVR_ATmega329A__"},
 {"atmega329p", "__AVR_ATmega329P__"},


Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -63,8 +63,10 @@
 {"attiny85", "__AVR_ATtiny85__"},
 {"attiny261", "__AVR_ATtiny261__"},
 {"attiny261a", "__AVR_ATtiny261A__"},
+{"attiny441", "__AVR_ATtiny441__"},
 {"attiny461", "__AVR_ATtiny461__"},
 {"attiny461a", "__AVR_ATtiny461A__"},
+{"attiny841", "__AVR_ATtiny841__"},
 {"attiny861", "__AVR_ATtiny861__"},
 {"attiny861a", "__AVR_ATtiny861A__"},
 {"attiny87", "__AVR_ATtiny87__"},
@@ -92,11 +94,13 @@
 {"atmega48", "__AVR_ATmega48__"},
 {"atmega48a", "__AVR_ATmega48A__"},
 {"atmega48pa", "__AVR_ATmega48PA__"},
+{"atmega48pb", "__AVR_ATmega48PB__"},
 {"atmega48p", "__AVR_ATmega48P__"},
 {"atmega88", "__AVR_ATmega88__"},
 {"atmega88a", "__AVR_ATmega88A__"},
 {"atmega88p", "__AVR_ATmega88P__"},
 {"atmega88pa", "__AVR_ATmega88PA__"},
+{"atmega88pb", "__AVR_ATmega88PB__"},
 {"atmega8515", "__AVR_ATmega8515__"},
 {"atmega8535", "__AVR_ATmega8535__"},
 {"atmega8hva", "__AVR_ATmega8HVA__"},
@@ -124,6 +128,7 @@
 {"atmega168a", "__AVR_ATmega168A__"},
 {"atmega168p", "__AVR_ATmega168P__"},
 {"atmega168pa", "__AVR_ATmega168PA__"},
+{"atmega168pb", "__AVR_ATmega168PB__"},
 {"atmega169", "__AVR_ATmega169__"},
 {"atmega169a", "__AVR_ATmega169A__"},
 {"atmega169p", "__AVR_ATmega169P__"},
@@ -134,6 +139,7 @@
 {"atmega324a", "__AVR_ATmega324A__"},
 {"atmega324p", "__AVR_ATmega324P__"},
 {"atmega324pa", "__AVR_ATmega324PA__"},
+{"atmega324pb", "__AVR_ATmega324PB__"},
 {"atmega325", "__AVR_ATmega325__"},
 {"atmega325a", "__AVR_ATmega325A__"},
 {"atmega325p", "__AVR_ATmega325P__"},
@@ -144,6 +150,7 @@
 {"atmega3250pa", "__AVR_ATmega3250PA__"},
 {"atmega328", "__AVR_ATmega328__"},
 {"atmega328p", "__AVR_ATmega328P__"},
+{"atmega328pb", "__AVR_ATmega328PB__"},
 {"atmega329", "__AVR_ATmega329__"},
 {"atmega329a", "__AVR_ATmega329A__"},
 {"atmega329p", "__AVR_ATmega329P__"},
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D88352: [clang][AVR] Add more devices

2020-09-26 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 294486.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88352/new/

https://reviews.llvm.org/D88352

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Misc/target-invalid-cpu-note.c

Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -143,51 +143,49 @@
 // AVR-SAME: avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200,
 // AVR-SAME: attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323,
 // AVR-SAME: at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414,
-// AVR-SAME: t90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272,
-// AVR-SAME: ttiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a,
-// AVR-SAME: ttiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25,
-// AVR-SAME: ttiny45, attiny85, attiny261, attiny261a, attiny461, attiny461a,
-// AVR-SAME: ttiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
-// AVR-SAME: ttiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167,
-// AVR-SAME: t90usb82, at90usb162, ata5505, atmega8u2, atmega16u2,
-// AVR-SAME: atmega32u2, attiny1634, atmega8, ata6289, atmega8a, ata6285,
-// AVR-SAME: ata6286, atmega48, atmega48a, atmega48pa, atmega48p, atmega88,
-// AVR-SAME: atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535,
-// AVR-SAME: atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b,
-// AVR-SAME: at90pwm81, ata5790, ata5795, atmega16, atmega16a, atmega161,
-// AVR-SAME: atmega162, atmega163, atmega164a, atmega164p, atmega164pa,
-// AVR-SAME: atmega165, atmega165a, atmega165p, atmega165pa, atmega168,
-// AVR-SAME: atmega168a, atmega168p, atmega168pa, atmega169, atmega169a,
-// AVR-SAME: atmega169p, atmega169pa, atmega32, atmega32a, atmega323,
-// AVR-SAME: atmega324a, atmega324p, atmega324pa, atmega325, atmega325a,
-// AVR-SAME: atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p,
-// AVR-SAME: atmega3250pa, atmega328, atmega328p, atmega329, atmega329a,
-// AVR-SAME: atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
-// AVR-SAME: atmega3290pa, atmega406, atmega64, atmega64a, atmega640, atmega644,
-// AVR-SAME: atmega644a, atmega644p, atmega644pa, atmega645, atmega645a,
-// AVR-SAME: tmega645p, atmega649, atmega649a, atmega649p, atmega6450,
-// AVR-SAME: tmega6450a, atmega6450p, atmega6490, atmega6490a, atmega6490p,
-// AVR-SAME: tmega64rfr2, atmega644rfr2, atmega16hva, atmega16hva2,
-// AVR-SAME: tmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb,
-// AVR-SAME: tmega64hve, at90can32, at90can64, at90pwm161, at90pwm216,
-// AVR-SAME: t90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
-// AVR-SAME: tmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
-// AVR-SAME: t90usb647, at90scr100, at94k, m3000, atmega128, atmega128a,
-// AVR-SAME: tmega1280, atmega1281, atmega1284, atmega1284p, atmega128rfa1,
-// AVR-SAME: tmega128rfr2, atmega1284rfr2, at90can128, at90usb1286,
-// AVR-SAME: t90usb1287, atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2,
-// AVR-SAME: txmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega32a4,
-// AVR-SAME: txmega32a4u, atxmega32c4, atxmega32d4, atxmega32e5, atxmega16e5,
-// AVR-SAME: txmega8e5, atxmega32x1, atxmega64a3, atxmega64a3u, atxmega64a4u,
-// AVR-SAME: txmega64b1, atxmega64b3, atxmega64c3, atxmega64d3, atxmega64d4,
-// AVR-SAME: txmega64a1, atxmega64a1u, atxmega128a3, atxmega128a3u,
-// AVR-SAME: txmega128b1, atxmega128b3, atxmega128c3, atxmega128d3,
-// AVR-SAME: txmega128d4, atxmega192a3, atxmega192a3u, atxmega192c3,
-// AVR-SAME: txmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b,
-// AVR-SAME: txmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3,
-// AVR-SAME: txmega384d3, atxmega128a1, atxmega128a1u, atxmega128a4u,
-// AVR-SAME: ttiny4, attiny5, attiny9, attiny10, attiny20, attiny40, attiny102,
-// AVR-SAME: attiny104
+// AVR-SAME: at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272,
+// AVR-SAME: attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a,
+// AVR-SAME: attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25,
+// AVR-SAME: attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461,
+// AVR-SAME: attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u,
+// AVR-SAME: attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103,
+// AVR-SAME: at43usb320, attiny167, at90usb82, at90usb162, ata5505, atmega8u2,
+// AVR-SAME: atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmega8a,
+// AVR-SAME: ata6285, ata6286, atmega48, atmega48a, atmega48pa, atmega48pb,
+// AVR-SAME: atmega48p, atmega88, atmega88a, atmega88p, atmega88pa, atmega88pb,
+// AVR-SAME: atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b,
+// AVR-SAME: at90pwm3, at90pwm3b, at90pwm81, ata5790, ata5795, atmega16,
+// AVR-SAME: atmega16a, atmega161, atmeg

[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-09-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: dylanmckay, aykevl.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.
benshi001 requested review of this revision.

Improve avr-ld options for total 249 devices:

1. the argument of "-L" (device library sub path)
2. the argument of "-m" (device family)
3. the argument of "-l" (device library file)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88410

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-link-mcu-family-unimplemented.c
  clang/test/Driver/avr-mmcu.c

Index: clang/test/Driver/avr-mmcu.c
===
--- clang/test/Driver/avr-mmcu.c
+++ clang/test/Driver/avr-mmcu.c
@@ -1,5 +1,101 @@
 // A test for the propagation of the -mmcu option to -cc1 and -cc1as
 
-// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega328p -save-temps %s 2>&1 | FileCheck %s
-// CHECK: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega328p"
-// CHECK: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega328p"
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny11 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK0 %s
+// CHECK0: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny11"
+// CHECK0: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny11"
+// CHECK0: {{.*}} "-lattiny11" "-mavr1"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s2313 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK1 %s
+// CHECK1: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s2313"
+// CHECK1: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s2313"
+// CHECK1: {{.*}} "-lat90s2313" "-mavr2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s8515 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK2 %s
+// CHECK2: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s8515"
+// CHECK2: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s8515"
+// CHECK2: {{.*}} "-lat90s8515" "-mavr2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny13a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK3 %s
+// CHECK3: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny13a"
+// CHECK3: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny13a"
+// CHECK3: {{.*}} "-lattiny13a" "-mavr25"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK4 %s
+// CHECK4: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK4: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+// CHECK4: {{.*}} "-lattiny88" "-mavr25"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK5 %s
+// CHECK5: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK5: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+// CHECK5: {{.*}} "-lattiny88" "-mavr25"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK6 %s
+// CHECK6: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK6: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK6: {{.*}} "-latmega8u2" "-mavr35"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK7 %s
+// CHECK7: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK7: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK7: {{.*}} "-latmega8u2" "-mavr35"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK8 %s
+// CHECK8: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK8: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+// CHECK8: {{.*}} "-latmega8a" "-mavr4"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK9 %s
+// CHECK9: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK9: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+// CHECK9: {{.*}} "-latmega8a" "-mavr4"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKa %s
+// CHECKa: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKa: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+// CHECKa: {{.*}} "-latmega16a" "-mavr5"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKb %s
+// CHECKb: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKb: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+// CHECKb: {{.*}} "-latmega16a" "-mavr5"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega128a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKc %s
+// CHECKc: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega128a"
+// CHECKc: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega128a"
+// CHECKc: {{.*}} "-latmega128a" "-mavr

[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-09-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

For some devices, the library sub path "-L" and family name "-m" are not always 
equal.
-L/usr/lib/avr/lib/XXX" "-L/usr/lib/gcc/avr/5.4.0/XXX" "-mYYY"

XXX and YYY do not always equal to each other. But current 
clang/lib/Driver/ToolChains/AVR.cpp assumes they equal.

For example, "./bin/clang  -O2 -Wall b.c --target=avr -mmcu=atmega2313" needs 
the following avr-ld options
"/usr/bin/avr-ld" *** "-L/usr/lib/avr/lib/avr25/tiny-stack" 
"-L/usr/lib/gcc/avr/5.4.0/avr25/tiny-stack" "-mavr25"

Here XXX=avr25/tiny-stack but YYY = avr25


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88410/new/

https://reviews.llvm.org/D88410

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D93579: [clang][AVR] Improve avr-ld command line options

2020-12-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 created this revision.
benshi001 added reviewers: dylanmckay, aykevl.
Herald added a subscriber: Jim.
benshi001 requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93579

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-ld.c

Index: clang/test/Driver/avr-ld.c
===
--- /dev/null
+++ clang/test/Driver/avr-ld.c
@@ -0,0 +1,46 @@
+// RUN: %clang -### --target=avr -mmcu=at90s2313 %s 2>&1 | FileCheck -check-prefix LINKA %s
+// LINKA: {{".*ld.*"}} {{.*}} {{"-L.*tiny-stack"}} {{.*}} "-Tdata=0x800060" {{.*}} "-lat90s2313" "-mavr2"
+
+// RUN: %clang -### --target=avr -mmcu=at90s8515 %s 2>&1 | FileCheck -check-prefix LINKB %s
+// LINKB: {{".*ld.*"}} {{.*}} "-Tdata=0x800060" {{.*}} "-lat90s8515" "-mavr2"
+
+// RUN: %clang -### --target=avr -mmcu=attiny13 %s 2>&1 | FileCheck -check-prefix LINKC %s
+// LINKC: {{".*ld.*"}} {{.*}} {{"-L.*avr25/tiny-stack"}} {{.*}} "-Tdata=0x800060" {{.*}} "-lattiny13" "-mavr25"
+
+// RUN: %clang -### --target=avr -mmcu=attiny44 %s 2>&1 | FileCheck -check-prefix LINKD %s
+// LINKD: {{".*ld.*"}} {{.*}} {{"-L.*avr25"}} {{.*}} "-Tdata=0x800060" {{.*}} "-lattiny44" "-mavr25"
+
+// RUN: %clang -### --target=avr -mmcu=atmega103 %s 2>&1 | FileCheck -check-prefix LINKE %s
+// LINKE: {{".*ld.*"}} {{.*}} {{"-L.*avr31"}} {{.*}} "-Tdata=0x800060" {{.*}} "-latmega103" "-mavr31"
+
+// RUN: %clang -### --target=avr -mmcu=atmega8u2 %s 2>&1 | FileCheck -check-prefix LINKF %s
+// LINKF: {{".*ld.*"}} {{.*}} {{"-L.*avr35"}} {{.*}} "-Tdata=0x800100" {{.*}} "-latmega8u2" "-mavr35"
+
+// RUN: %clang -### --target=avr -mmcu=atmega48pa %s 2>&1 | FileCheck -check-prefix LINKG %s
+// LINKG: {{".*ld.*"}} {{.*}} {{"-L.*avr4"}} {{.*}} "-Tdata=0x800100" {{.*}} "-latmega48pa" "-mavr4"
+
+// RUN: %clang -### --target=avr -mmcu=atmega328 %s 2>&1 | FileCheck -check-prefix LINKH %s
+// LINKH: {{".*ld.*"}} {{.*}} {{"-L.*avr5"}} {{.*}} "-Tdata=0x800100" {{.*}} "-latmega328" "-mavr5"
+
+// RUN: %clang -### --target=avr -mmcu=atmega1281 %s 2>&1 | FileCheck -check-prefix LINKI %s
+// LINKI: {{".*ld.*"}} {{.*}} {{"-L.*avr51"}} {{.*}} "-Tdata=0x800200" {{.*}} "-latmega1281" "-mavr51"
+
+// RUN: %clang -### --target=avr -mmcu=atmega2560 %s 2>&1 | FileCheck -check-prefix LINKJ %s
+// LINKJ: {{".*ld.*"}} {{.*}} {{"-L.*avr6"}} {{.*}} "-Tdata=0x800200" {{.*}} "-latmega2560" "-mavr6"
+
+// RUN: %clang -### --target=avr -mmcu=attiny10 %s 2>&1 | FileCheck -check-prefix LINKK %s
+// LINKK: {{".*ld.*"}} {{.*}} {{"-L.*avrtiny"}} {{.*}} "-Tdata=0x800040" {{.*}} "-lattiny10" "-mavrtiny"
+
+// RUN: %clang -### --target=avr -mmcu=atxmega16a4 %s 2>&1 | FileCheck -check-prefix LINKL %s
+// LINKL: {{".*ld.*"}} {{.*}} {{"-L.*avrxmega2"}} {{.*}} "-Tdata=0x802000" {{.*}} "-latxmega16a4" "-mavrxmega2"
+
+// RUN: %clang -### --target=avr -mmcu=atxmega64b3 %s 2>&1 | FileCheck -check-prefix LINKM %s
+// LINKM: {{".*ld.*"}} {{.*}} {{"-L.*avrxmega4"}} {{.*}} "-Tdata=0x802000" {{.*}} "-latxmega64b3" "-mavrxmega4"
+
+// RUN: %clang -### --target=avr -mmcu=atxmega128a3u %s 2>&1 | FileCheck -check-prefix LINKN %s
+// LINKN: {{".*ld.*"}} {{.*}} {{"-L.*avrxmega6"}} {{.*}} "-Tdata=0x802000" {{.*}} "-latxmega128a3u" "-mavrxmega6"
+
+// RUN: %clang -### --target=avr -mmcu=atxmega128a1 %s 2>&1 | FileCheck -check-prefix LINKO %s
+// LINKO: {{".*ld.*"}} {{.*}} {{"-L.*avrxmega7"}} {{.*}} "-Tdata=0x802000" {{.*}} "-latxmega128a1" "-mavrxmega7"
+
+int main() { return 0; }
Index: clang/lib/Driver/ToolChains/AVR.cpp
===
--- clang/lib/Driver/ToolChains/AVR.cpp
+++ clang/lib/Driver/ToolChains/AVR.cpp
@@ -32,247 +32,248 @@
   StringRef Name;
   std::string SubPath;
   StringRef Family;
+  unsigned DataAddr;
 } MCUInfo[] = {
 {"at90s1200", "", "avr1"},
 {"attiny11", "", "avr1"},
 {"attiny12", "", "avr1"},
 {"attiny15", "", "avr1"},
 {"attiny28", "", "avr1"},
-{"at90s2313", "tiny-stack", "avr2"},
-{"at90s2323", "tiny-stack", "avr2"},
-{"at90s2333", "tiny-stack", "avr2"},
-{"at90s2343", "tiny-stack", "avr2"},
-{"at90s4433", "tiny-stack", "avr2"},
-{"attiny22", "tiny-stack", "avr2"},
-{"attiny26", "tiny-stack", "avr2"},
-{"at90s4414", "", "avr2"},
-{"at90s4434", "", "avr2"},
-{"at90s8515", "", "avr2"},
-{"at90c8534", "", "avr2"},
-{"at90s8535", "", "avr2"},
-{"attiny13", "avr25/tiny-stack", "avr25"},
-{"attiny13a", "avr25/tiny-stack", "avr25"},
-{"attiny2313", "avr25/tiny-stack", "avr25"},
-{"attiny2313a", "avr25/tiny-stack", "avr25"},
-{"attiny24", "avr25/tiny-stack", "avr25"},
-{"attiny24a", "avr25/tiny-stack", "avr25"},
-{"attiny25", "avr25/tiny-stack", "avr25"},
-{"attiny261", "avr25/tiny-stack", "avr25"},
-{"attiny261a", "avr25/tiny-stack", "avr25"},
-{"at86rf401", "avr25", "avr25"},
-{"ata5272",

[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-11-17 Thread Ben Shi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rGbba96c996555: [clang][AVR] Improve avr-ld command line 
options (authored by benshi001).

Changed prior to commit:
  https://reviews.llvm.org/D88410?vs=294872&id=305792#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88410/new/

https://reviews.llvm.org/D88410

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-link-mcu-family-unimplemented.c
  clang/test/Driver/avr-mmcu.c

Index: clang/test/Driver/avr-mmcu.c
===
--- clang/test/Driver/avr-mmcu.c
+++ clang/test/Driver/avr-mmcu.c
@@ -1,5 +1,81 @@
 // A test for the propagation of the -mmcu option to -cc1 and -cc1as
 
-// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega328p -save-temps %s 2>&1 | FileCheck %s
-// CHECK: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega328p"
-// CHECK: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega328p"
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny11 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK0 %s
+// CHECK0: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny11"
+// CHECK0: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny11"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s2313 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK1 %s
+// CHECK1: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s2313"
+// CHECK1: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s2313"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s8515 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK2 %s
+// CHECK2: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s8515"
+// CHECK2: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s8515"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny13a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK3 %s
+// CHECK3: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny13a"
+// CHECK3: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny13a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK4 %s
+// CHECK4: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK4: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK5 %s
+// CHECK5: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK5: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK6 %s
+// CHECK6: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK6: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK7 %s
+// CHECK7: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK7: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK8 %s
+// CHECK8: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK8: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK9 %s
+// CHECK9: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK9: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKa %s
+// CHECKa: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKa: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKb %s
+// CHECKb: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKb: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega128a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKc %s
+// CHECKc: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega128a"
+// CHECKc: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega128a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega2560 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKd %s
+// CHECKd: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega2560"
+// CHECKd: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega2560"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny10 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKe %s
+// CHECKe: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny10"
+// CHECKe: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny10"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atxmega16a4 -s

[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-09-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 294854.
benshi001 edited the summary of this revision.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88410/new/

https://reviews.llvm.org/D88410

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-link-mcu-family-unimplemented.c
  clang/test/Driver/avr-mmcu.c

Index: clang/test/Driver/avr-mmcu.c
===
--- clang/test/Driver/avr-mmcu.c
+++ clang/test/Driver/avr-mmcu.c
@@ -1,5 +1,81 @@
 // A test for the propagation of the -mmcu option to -cc1 and -cc1as
 
-// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega328p -save-temps %s 2>&1 | FileCheck %s
-// CHECK: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega328p"
-// CHECK: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega328p"
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny11 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK0 %s
+// CHECK0: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny11"
+// CHECK0: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny11"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s2313 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK1 %s
+// CHECK1: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s2313"
+// CHECK1: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s2313"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s8515 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK2 %s
+// CHECK2: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s8515"
+// CHECK2: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s8515"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny13a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK3 %s
+// CHECK3: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny13a"
+// CHECK3: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny13a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK4 %s
+// CHECK4: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK4: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK5 %s
+// CHECK5: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK5: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK6 %s
+// CHECK6: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK6: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK7 %s
+// CHECK7: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK7: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK8 %s
+// CHECK8: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK8: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK9 %s
+// CHECK9: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK9: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKa %s
+// CHECKa: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKa: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKb %s
+// CHECKb: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKb: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega128a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKc %s
+// CHECKc: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega128a"
+// CHECKc: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega128a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega2560 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKd %s
+// CHECKd: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega2560"
+// CHECKd: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega2560"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny10 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKe %s
+// CHECKe: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny10"
+// CHECKe: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny10"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atxmega16a4 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKf %s
+// CHECKf: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atxmega16a4"
+// CHECKf: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atxmega16a4"
+
+// RUN: %clang -###

[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-09-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 updated this revision to Diff 294872.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88410/new/

https://reviews.llvm.org/D88410

Files:
  clang/lib/Driver/ToolChains/AVR.cpp
  clang/test/Driver/avr-link-mcu-family-unimplemented.c
  clang/test/Driver/avr-mmcu.c

Index: clang/test/Driver/avr-mmcu.c
===
--- clang/test/Driver/avr-mmcu.c
+++ clang/test/Driver/avr-mmcu.c
@@ -1,5 +1,81 @@
 // A test for the propagation of the -mmcu option to -cc1 and -cc1as
 
-// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega328p -save-temps %s 2>&1 | FileCheck %s
-// CHECK: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega328p"
-// CHECK: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega328p"
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny11 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK0 %s
+// CHECK0: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny11"
+// CHECK0: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny11"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s2313 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK1 %s
+// CHECK1: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s2313"
+// CHECK1: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s2313"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=at90s8515 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK2 %s
+// CHECK2: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "at90s8515"
+// CHECK2: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "at90s8515"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny13a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK3 %s
+// CHECK3: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny13a"
+// CHECK3: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny13a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK4 %s
+// CHECK4: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK4: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny88 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK5 %s
+// CHECK5: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny88"
+// CHECK5: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny88"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK6 %s
+// CHECK6: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK6: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8u2 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK7 %s
+// CHECK7: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8u2"
+// CHECK7: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8u2"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK8 %s
+// CHECK8: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK8: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega8a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECK9 %s
+// CHECK9: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega8a"
+// CHECK9: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega8a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKa %s
+// CHECKa: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKa: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega16a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKb %s
+// CHECKb: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega16a"
+// CHECKb: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega16a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega128a -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKc %s
+// CHECKc: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega128a"
+// CHECKc: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega128a"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atmega2560 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKd %s
+// CHECKd: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atmega2560"
+// CHECKd: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atmega2560"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny10 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKe %s
+// CHECKe: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "attiny10"
+// CHECKe: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "attiny10"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atxmega16a4 -save-temps %s 2>&1 | FileCheck -check-prefix=CHECKf %s
+// CHECKf: clang{{.*}} "-cc1" {{.*}} "-target-cpu" "atxmega16a4"
+// CHECKf: clang{{.*}} "-cc1as" {{.*}} "-target-cpu" "atxmega16a4"
+
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=atxme

[PATCH] D86629: [AVR][clang] Pass the address of the data section to the linker for ATmega328

2020-09-28 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

I think this patch is OK to be committed.

And I hope

1. Temporarily using an array for more devices, before a solution of getting 
info from the tblgen.

2. Distinghuish the arguments for "-L" and "-m". It is correct for atmega328 
that avr-ld needs "-L/usr/lib/avr/lib/avr5" ... "-latmega328p" "-mavr5" But for 
some special devices, such as attiny24, the following options is needed by 
avr-ld "-L/usr/lib/avr/lib/avr25/tiny-stack" ... "-lattiny24" "-mavr25", since 
the avr-lib's file organization.

I am glad to maintain an array before a formal tblgen solution, which includes 
device family (-m), 
lib file sub path (-L), data segment address (-T)

Comment at: clang/lib/Driver/ToolChains/AVR.cpp:40

+llvm::Optional GetMcuSectionAddressData(StringRef MCU) {
+  return llvm::StringSwitch>(MCU)

aykevl wrote:
> I don't think the LLVM coding style says something about this, but coming 
> from Go I'm more used to capitalized abbreviations (`MCU`, 
> `GetMCUSectionAddressData`).
> 
> However, this is just a superficial thing, feel free to ignore.
I prefer to "Mcu"

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86629/new/

https://reviews.llvm.org/D86629

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-10-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.

ping


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88410/new/

https://reviews.llvm.org/D88410

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D88352: [clang][AVR] Add more devices

2020-10-19 Thread Ben Shi via Phabricator via cfe-commits

benshi001 added a comment.
Herald added a subscriber: dexonsmith.

ping


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88352/new/

https://reviews.llvm.org/D88352

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

1 2 3 4 >

1 - 100 of 384 matches

Mail list logo