[clang] [clang-format] Improve QualifierAlignment in guessing macros (PR #145468)

[Owen Pan via cfe-commits]

https://github.com/owenca closed 
https://github.com/llvm/llvm-project/pull/145468
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [clang-tidy] [Modules] Skip checking decls in clang-tidy (PR #145630)

[Baranov Victor via cfe-commits]

vbvictor wrote:

If modules are considered as system headers in clang-tidy, there was work in 
https://github.com/llvm/llvm-project/pull/128150 to reduce scope of traversal 
to match only in user code (I suppose it would affect modules too). But that PR 
had to be reverted due to appeared issues with downstream users. Hopefully it 
will reland in the future. @carlosgalvezp may shine some light on this matter.

Treating modules separately doesn't seem right to me.
Also, If we exclude only `decls` what happens with `stmts` and other nodes, are 
they still getting matched and filtered? What happens if a check looks for a 
`decl` inside system header and later compare it to `decl` inside user-code?

https://github.com/llvm/llvm-project/pull/145630
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] Cap IntRange::Width to MaxWidth (PR #145356)

[Akira Hatanaka via cfe-commits]

https://github.com/ahatanak edited 
https://github.com/llvm/llvm-project/pull/145356
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [clang-tidy] [Modules] Skip checking decls in clang-tidy (PR #145630)

[Chuanqi Xu via cfe-commits]

ChuanqiXu9 wrote:

> If modules are considered as system headers in clang-tidy, there was work in 
> #128150 to reduce scope of traversal to match only in user code (I suppose it 
> would affect modules too). But that PR had to be reverted due to appeared 
> issues with downstream users. Hopefully it will reland in the future. 
> @carlosgalvezp may shine some light on this matter.

I think modules are not system headers. For the example in the issue, the 
module interface is not system nor headers. It is  another TU but we just can 
get AST from it. I think it may be a valid expectation to not check the same TU 
again and again for different consumers.

> 
> Treating modules separately doesn't seem right to me. Also, If we exclude 
> only `decls` what happens with `stmts` and other nodes, are they still 
> getting matched and filtered? What happens if a check looks for a `decl` 
> inside system header and later compare it to `decl` inside user-code?

For "stmts" and other "nodes", my expectation is to exclude them as well. I 
just want to avoid duplications.

https://github.com/llvm/llvm-project/pull/145630
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 01b288f - [clang-format] Improve QualifierAlignment in guessing macros (#145468)

[via cfe-commits]

Author: Owen Pan
Date: 2025-06-25T00:01:06-07:00
New Revision: 01b288fe6a1e627954329198ed5641f2bf55ee8d

URL: 
https://github.com/llvm/llvm-project/commit/01b288fe6a1e627954329198ed5641f2bf55ee8d
DIFF: 
https://github.com/llvm/llvm-project/commit/01b288fe6a1e627954329198ed5641f2bf55ee8d.diff

LOG: [clang-format] Improve QualifierAlignment in guessing macros (#145468)

Fixes #145388

Added: 


Modified: 
clang/lib/Format/QualifierAlignmentFixer.cpp
clang/unittests/Format/QualifierFixerTest.cpp

Removed: 




diff  --git a/clang/lib/Format/QualifierAlignmentFixer.cpp 
b/clang/lib/Format/QualifierAlignmentFixer.cpp
index 8e55d339b2388..b0dda65adfba1 100644
--- a/clang/lib/Format/QualifierAlignmentFixer.cpp
+++ b/clang/lib/Format/QualifierAlignmentFixer.cpp
@@ -635,15 +635,26 @@ bool isConfiguredQualifierOrType(const FormatToken *Tok,
 // If a token is an identifier and it's upper case, it could
 // be a macro and hence we need to be able to ignore it.
 bool isPossibleMacro(const FormatToken *Tok) {
-  if (!Tok)
-return false;
+  assert(Tok);
   if (Tok->isNot(tok::identifier))
 return false;
-  if (Tok->TokenText.upper() == Tok->TokenText.str()) {
-// T,K,U,V likely could be template arguments
-return Tok->TokenText.size() != 1;
-  }
-  return false;
+
+  const auto Text = Tok->TokenText;
+  assert(Text.size() > 0);
+
+  // T,K,U,V likely could be template arguments
+  if (Text.size() == 1)
+return false;
+
+  // It's unlikely that qualified names are object-like macros.
+  const auto *Prev = Tok->getPreviousNonComment();
+  if (Prev && Prev->is(tok::coloncolon))
+return false;
+  const auto *Next = Tok->getNextNonComment();
+  if (Next && Next->is(tok::coloncolon))
+return false;
+
+  return Text == Text.upper();
 }
 
 } // namespace format

diff  --git a/clang/unittests/Format/QualifierFixerTest.cpp 
b/clang/unittests/Format/QualifierFixerTest.cpp
index 3eae39f267c3e..f42f2e307f713 100644
--- a/clang/unittests/Format/QualifierFixerTest.cpp
+++ b/clang/unittests/Format/QualifierFixerTest.cpp
@@ -1122,14 +1122,17 @@ TEST_F(QualifierFixerTest, IsQualifierType) {
 }
 
 TEST_F(QualifierFixerTest, IsMacro) {
-
   auto Tokens = annotate("INT INTPR Foo int");
   ASSERT_EQ(Tokens.size(), 5u) << Tokens;
-
   EXPECT_TRUE(isPossibleMacro(Tokens[0]));
   EXPECT_TRUE(isPossibleMacro(Tokens[1]));
   EXPECT_FALSE(isPossibleMacro(Tokens[2]));
   EXPECT_FALSE(isPossibleMacro(Tokens[3]));
+
+  Tokens = annotate("FOO::BAR");
+  ASSERT_EQ(Tokens.size(), 4u) << Tokens;
+  EXPECT_FALSE(isPossibleMacro(Tokens[0]));
+  EXPECT_FALSE(isPossibleMacro(Tokens[2]));
 }
 
 TEST_F(QualifierFixerTest, OverlappingQualifier) {



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Support of RISCV Zibimm Experimental Extension (PR #127463)

[Boyao Wang via cfe-commits]

https://github.com/BoyaoWang430 updated 
https://github.com/llvm/llvm-project/pull/127463

>From e740d8cfb8b689d766841396c5a6ab9a1d389ec7 Mon Sep 17 00:00:00 2001
From: wangboyao 
Date: Mon, 17 Feb 2025 17:35:52 +0800
Subject: [PATCH 1/3] [RISCV] Add Support of RISCV Zibimm Experimental
 Extension

---
 .../Driver/print-supported-extensions-riscv.c |   1 +
 .../test/Preprocessor/riscv-target-features.c |   9 +
 .../Target/RISCV/AsmParser/RISCVAsmParser.cpp |  15 +
 .../RISCV/Disassembler/RISCVDisassembler.cpp  |  12 +
 .../RISCV/GISel/RISCVInstructionSelector.cpp  |   2 +-
 .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |   1 +
 .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp |  20 ++
 llvm/lib/Target/RISCV/RISCVFeatures.td|   6 +
 llvm/lib/Target/RISCV/RISCVInstrFormats.td|  16 +
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp  |  32 ++
 llvm/lib/Target/RISCV/RISCVInstrInfo.h|   2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.td   |   1 +
 llvm/lib/Target/RISCV/RISCVInstrInfoZibimm.td |  48 +++
 llvm/test/CodeGen/RISCV/attributes.ll |   6 +
 llvm/test/CodeGen/RISCV/zibimm.ll | 299 ++
 llvm/test/MC/RISCV/zibimm-invalid.s   |  34 ++
 llvm/test/MC/RISCV/zibimm-valid.s |  63 
 .../TargetParser/RISCVISAInfoTest.cpp |   1 +
 18 files changed, 566 insertions(+), 2 deletions(-)
 create mode 100644 llvm/lib/Target/RISCV/RISCVInstrInfoZibimm.td
 create mode 100644 llvm/test/CodeGen/RISCV/zibimm.ll
 create mode 100644 llvm/test/MC/RISCV/zibimm-invalid.s
 create mode 100644 llvm/test/MC/RISCV/zibimm-valid.s

diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..17125ad2a6713 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -205,6 +205,7 @@
 // CHECK-EMPTY:
 // CHECK-NEXT: Experimental extensions
 // CHECK-NEXT: p0.14  'P' ('Base P' (Packed SIMD))
+// CHECK-NEXT: zibimm   0.1   'Zibimm' (Branch with 
Immediate)
 // CHECK-NEXT: zicfilp  1.0   'Zicfilp' (Landing pad)
 // CHECK-NEXT: zicfiss  1.0   'Zicfiss' (Shadow stack)
 // CHECK-NEXT: zalasr   0.1   'Zalasr' (Load-Acquire and 
Store-Release Instructions)
diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index 86085c21a95aa..7ac37bde70e05 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -122,6 +122,7 @@
 // CHECK-NOT: __riscv_zfinx {{.*$}}
 // CHECK-NOT: __riscv_zhinx {{.*$}}
 // CHECK-NOT: __riscv_zhinxmin {{.*$}}
+// CHECK-NOT: __riscv_zibimm {{.*$}}
 // CHECK-NOT: __riscv_zic64b {{.*$}}
 // CHECK-NOT: __riscv_zicbom {{.*$}}
 // CHECK-NOT: __riscv_zicbop {{.*$}}
@@ -1029,6 +1030,14 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZHINXMIN-EXT %s
 // CHECK-ZHINXMIN-EXT: __riscv_zhinxmin 100{{$}}
 
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN:   -march=rv32i_zibimm0p1 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZIBIMM-EXT %s
+// RUN: %clang --target=riscv64 -menable-experimental-extensions \
+// RUN:   -march=rv64i_zibimm0p1 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZIBIMM-EXT %s
+// CHECK-ZIBIMM-EXT: __riscv_zibimm
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN:   -march=rv32izic64b -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZIC64B-EXT %s
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..7e6fcc373334b 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -744,6 +744,17 @@ struct RISCVOperand final : public MCParsedAsmOperand {
 return isUImmPred([](int64_t Imm) { return Imm != 0 && isUInt<5>(Imm); });
   }
 
+  bool isUImm5Zibimm() const {
+if (!isImm())
+  return false;
+int64_t Imm;
+RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
+bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
+Imm = fixImmediateForRV32(Imm, isRV64Imm());
+return IsConstantImm && ((isUInt<5>(Imm) && Imm != 0) || Imm == -1) &&
+   VK == RISCVMCExpr::VK_RISCV_None;
+  }
+
   bool isUImm5GT3() const {
 return isUImmPred([](int64_t Imm) { return isUInt<5>(Imm) && Imm > 3; });
   }
@@ -1466,6 +1477,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 5) - 1);
   case Match_InvalidUImm5NonZero:
 return generateImmOutOfRangeError(Operands, ErrorInfo, 1, (1 << 5) - 1);
+  case Match_InvalidUImm5Zibimm:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, -1, (1 << 5) - 1,
+ 

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

llvmbot wrote:



@llvm/pr-subscribers-clang

@llvm/pr-subscribers-mc

Author: UmeshKalappa (ukalappa-mips)


Changes

the extension enabled with xmipscop.

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

---
Full diff: https://github.com/llvm/llvm-project/pull/145647.diff


17 Files Affected:

- (modified) clang/test/Driver/print-supported-extensions-riscv.c (+1) 
- (modified) llvm/docs/RISCVUsage.rst (+3) 
- (modified) llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (+5) 
- (modified) llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp (+18) 
- (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h (+1) 
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+7) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+48) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (+4) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+1-1) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+3) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td (+38) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td (+2-2) 
- (modified) llvm/test/CodeGen/RISCV/features-info.ll (+1) 
- (added) llvm/test/CodeGen/RISCV/xmips-cbop.ll (+40) 
- (modified) llvm/test/MC/RISCV/xmips-invalid.s (+10-1) 
- (modified) llvm/test/MC/RISCV/xmips-valid.s (+15-3) 
- (modified) llvm/unittests/TargetParser/RISCVISAInfoTest.cpp (+1) 


``diff
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -535,6 +535,19 @@ static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t 
Imm, int64_t Address,
   Inst.addOperand(MCOperand::createImm(Imm));
   retu

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-risc-v

Author: UmeshKalappa (ukalappa-mips)


Changes

the extension enabled with xmipscop.

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

---
Full diff: https://github.com/llvm/llvm-project/pull/145647.diff


17 Files Affected:

- (modified) clang/test/Driver/print-supported-extensions-riscv.c (+1) 
- (modified) llvm/docs/RISCVUsage.rst (+3) 
- (modified) llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (+5) 
- (modified) llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp (+18) 
- (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h (+1) 
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+7) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+48) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (+4) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+1-1) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+3) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td (+38) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td (+2-2) 
- (modified) llvm/test/CodeGen/RISCV/features-info.ll (+1) 
- (added) llvm/test/CodeGen/RISCV/xmips-cbop.ll (+40) 
- (modified) llvm/test/MC/RISCV/xmips-invalid.s (+10-1) 
- (modified) llvm/test/MC/RISCV/xmips-valid.s (+15-3) 
- (modified) llvm/unittests/TargetParser/RISCVISAInfoTest.cpp (+1) 


``diff
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -535,6 +535,19 @@ static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t 
Imm, int64_t Address,
   Inst.addOperand(MCOperand::createImm(Imm));
   return MCDisassembl

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-mips

Author: UmeshKalappa (ukalappa-mips)


Changes

the extension enabled with xmipscop.

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

---
Full diff: https://github.com/llvm/llvm-project/pull/145647.diff


17 Files Affected:

- (modified) clang/test/Driver/print-supported-extensions-riscv.c (+1) 
- (modified) llvm/docs/RISCVUsage.rst (+3) 
- (modified) llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (+5) 
- (modified) llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp (+18) 
- (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h (+1) 
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+7) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+48) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (+4) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+1-1) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+3) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td (+38) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td (+2-2) 
- (modified) llvm/test/CodeGen/RISCV/features-info.ll (+1) 
- (added) llvm/test/CodeGen/RISCV/xmips-cbop.ll (+40) 
- (modified) llvm/test/MC/RISCV/xmips-invalid.s (+10-1) 
- (modified) llvm/test/MC/RISCV/xmips-valid.s (+15-3) 
- (modified) llvm/unittests/TargetParser/RISCVISAInfoTest.cpp (+1) 


``diff
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -535,6 +535,19 @@ static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t 
Imm, int64_t Address,
   Inst.addOperand(MCOperand::createImm(Imm));
   return MCDisassembler

[clang] [RISCV] Implement intrinsics for XAndesVBFHCVT (PR #145634)

[Jianjian Guan via cfe-commits]

https://github.com/jacquesguan approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/145634
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [analyzer] Fix crash when modelling 'getline' function in checkers (PR #145229)

[Arseniy Zaostrovnykh via cfe-commits]

@@ -0,0 +1,127 @@
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_CORRECT
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_GETLINE_1
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_GETLINE_2
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_GETLINE_3
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_GETLINE_4
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_GETLINE_5
+// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix -verify %s 
-DTEST_GETLINE_GH144884

necto wrote:

This is perhaps subjective, but I find it very awkward to have a single test 
file that is effectively just a concatenation of 7 independent test files. What 
made you choose to have one file instead of 7 files?
(if you are worried about high file-count in the "test/Analysis" directory, you 
could put these files into a subdirectory, for example)

https://github.com/llvm/llvm-project/pull/145229
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [analyzer] Enforce not making overly complicated symbols (PR #144327)

[Balázs Benics via cfe-commits]

balazs-benics-sonarsource wrote:

Just rebased the PR to exclude the refactor change of `classof`. I'll schedule 
a measurement now.

https://github.com/llvm/llvm-project/pull/144327
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Serialization] Fix source location data loss during decoding. (PR #145529)

[Chuanqi Xu via cfe-commits]

ChuanqiXu9 wrote:

> > The design is, the higher 32 bits are used for module file index and the 
> > lower bits are used for offsets. Could you give a concrete example why the 
> > current implementation is problematic?
> 
> I don’t have a concrete failure case, but I noticed this while working on 
> 64-bit source locations.

Yeah, the current situation conflicts with 64-bit source location. We discussed 
this. The conclusion is, if we need large source location space, use 48 bits 
and leave upper 16 bits for module file index. 48 bits should be enough for 
most cases.

> 
> Currently, we encode offsets in two ways depending on the module file index:
> 
> 1. If the module file index is `0`, we use delta encoding (see [this code 
> path](https://github.com/llvm/llvm-project/blob/01b288fe6a1e627954329198ed5641f2bf55ee8d/clang/include/clang/Serialization/SourceLocationEncoding.h#L165-L168)).
> 2. otherwise, we use raw encoding (see [this code 
> path](https://github.com/llvm/llvm-project/blob/main/clang/include/clang/Serialization/SourceLocationEncoding.h#L173-L183)).
> 
> The 2) case is fine, as the encoded value fits into a 32-bit integer. 
> However, the 1) case can produce a 33-bit value, which doesn’t fit in the 
> lower 32 bits.
> 
> It appears we only use 16 bits for the module file index, the fix here is to 
> preserve an additional bit for the offset to avoid this issue.



https://github.com/llvm/llvm-project/pull/145529
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

github-actions[bot] wrote:



Thank you for submitting a Pull Request (PR) to the LLVM Project!

This PR will be automatically labeled and the relevant teams will be notified.

If you wish to, you can add reviewers by using the "Reviewers" section on this 
page.

If this is not working for you, it is probably because you do not have write 
permissions for the repository. In which case you can instead tag reviewers by 
name in a comment by using `@` followed by their GitHub username.

If you have received no comments on your PR for a week, you can request a 
review by "ping"ing the PR by adding a comment “Ping”. The common courtesy 
"ping" rate is once a week. Please remember that you are asking for valuable 
time from other developers.

If you have further questions, they may be answered by the [LLVM GitHub User 
Guide](https://llvm.org/docs/GitHub.html).

You can also ask questions in a comment on this PR, on the [LLVM 
Discord](https://discord.com/invite/xS7Z362) or on the 
[forums](https://discourse.llvm.org/).

https://github.com/llvm/llvm-project/pull/145647
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [EarlyCSE] Add support for writeonly call CSE (PR #145474)

[Nikita Popov via cfe-commits]

https://github.com/nikic updated 
https://github.com/llvm/llvm-project/pull/145474

>From 295dc3520fb98c4a94263f1926f2e97764c8f442 Mon Sep 17 00:00:00 2001
From: Nikita Popov 
Date: Tue, 24 Jun 2025 10:08:40 +0200
Subject: [PATCH 1/3] [EarlyCSE] Add tests for writeonly

---
 llvm/test/Transforms/EarlyCSE/writeonly.ll | 153 -
 1 file changed, 152 insertions(+), 1 deletion(-)

diff --git a/llvm/test/Transforms/EarlyCSE/writeonly.ll 
b/llvm/test/Transforms/EarlyCSE/writeonly.ll
index 0bfffa3c825a3..354638e9f3fe1 100644
--- a/llvm/test/Transforms/EarlyCSE/writeonly.ll
+++ b/llvm/test/Transforms/EarlyCSE/writeonly.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -passes=early-cse -earlycse-debug-hash < %s | FileCheck %s
+; RUN: opt -S -passes=early-cse -earlycse-debug-hash < %s | FileCheck %s 
--check-prefixes=CHECK,NO-MSSA
+; RUN: opt -S -passes='early-cse' < %s | FileCheck %s 
--check-prefixes=CHECK,MSSA
 
 @var = global i32 undef
 declare void @foo() nounwind
@@ -15,3 +16,153 @@ define void @test() {
   store i32 2, ptr @var
   ret void
 }
+
+declare void @writeonly_void() memory(write)
+
+; Can CSE writeonly calls, including non-nounwind/willreturn.
+define void @writeonly_cse() {
+; CHECK-LABEL: @writeonly_cse(
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:ret void
+;
+  call void @writeonly_void()
+  call void @writeonly_void()
+  ret void
+}
+
+; Can CSE, loads do not matter.
+define i32 @writeonly_cse_intervening_load(ptr %p) {
+; CHECK-LABEL: @writeonly_cse_intervening_load(
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:[[V:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:ret i32 [[V]]
+;
+  call void @writeonly_void()
+  %v = load i32, ptr %p
+  call void @writeonly_void()
+  ret i32 %v
+}
+
+; Cannot CSE, the store may be to the same memory.
+define void @writeonly_cse_intervening_store(ptr %p) {
+; CHECK-LABEL: @writeonly_cse_intervening_store(
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:store i32 0, ptr [[P:%.*]], align 4
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:ret void
+;
+  call void @writeonly_void()
+  store i32 0, ptr %p
+  call void @writeonly_void()
+  ret void
+}
+
+; Can CSE, the store does not alias the writeonly call.
+define void @writeonly_cse_intervening_noalias_store(ptr noalias %p) {
+; CHECK-LABEL: @writeonly_cse_intervening_noalias_store(
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:store i32 0, ptr [[P:%.*]], align 4
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:ret void
+;
+  call void @writeonly_void()
+  store i32 0, ptr %p
+  call void @writeonly_void()
+  ret void
+}
+
+; Cannot CSE loads across writeonly call.
+define i32 @load_cse_across_writeonly(ptr %p) {
+; CHECK-LABEL: @load_cse_across_writeonly(
+; CHECK-NEXT:[[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:[[V2:%.*]] = load i32, ptr [[P]], align 4
+; CHECK-NEXT:[[RES:%.*]] = sub i32 [[V1]], [[V2]]
+; CHECK-NEXT:ret i32 [[RES]]
+;
+  %v1 = load i32, ptr %p
+  call void @writeonly_void()
+  %v2 = load i32, ptr %p
+  %res = sub i32 %v1, %v2
+  ret i32 %res
+}
+
+; Can CSE loads across eliminated writeonly call.
+define i32 @load_cse_across_csed_writeonly(ptr %p) {
+; CHECK-LABEL: @load_cse_across_csed_writeonly(
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:[[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT:call void @writeonly_void()
+; CHECK-NEXT:[[V2:%.*]] = load i32, ptr [[P]], align 4
+; CHECK-NEXT:[[RES:%.*]] = sub i32 [[V1]], [[V2]]
+; CHECK-NEXT:ret i32 [[RES]]
+;
+  call void @writeonly_void()
+  %v1 = load i32, ptr %p
+  call void @writeonly_void()
+  %v2 = load i32, ptr %p
+  %res = sub i32 %v1, %v2
+  ret i32 %res
+}
+
+declare i32 @writeonly(ptr %p) memory(write)
+
+; Can CSE writeonly calls with arg and return.
+define i32 @writeonly_ret_cse(ptr %p) {
+; CHECK-LABEL: @writeonly_ret_cse(
+; CHECK-NEXT:[[V1:%.*]] = call i32 @writeonly(ptr [[P:%.*]])
+; CHECK-NEXT:[[V2:%.*]] = call i32 @writeonly(ptr [[P]])
+; CHECK-NEXT:[[RES:%.*]] = sub i32 [[V1]], [[V2]]
+; CHECK-NEXT:ret i32 [[RES]]
+;
+  %v1 = call i32 @writeonly(ptr %p)
+  %v2 = call i32 @writeonly(ptr %p)
+  %res = sub i32 %v1, %v2
+  ret i32 %res
+}
+
+; Cannot CSE writeonly calls with different arguments.
+define i32 @writeonly_different_args(ptr %p1, ptr %p2) {
+; CHECK-LABEL: @writeonly_different_args(
+; CHECK-NEXT:[[V1:%.*]] = call i32 @writeonly(ptr [[P1:%.*]])
+; CHECK-NEXT:[[V2:%.*]] = call i32 @writeonly(ptr [[P2:%.*]])
+; CHECK-NEXT:[[RES:%.*]] = sub i32 [[V1]], [[V2]]
+; CHECK-NEXT:ret i32 [[RES]]
+;
+  %v1 = call i32 @writeonly(ptr %p1)
+  %v2 = call i32 @writeonly(ptr %p2)
+  %res = sub i32 %v1, %v2

[clang] [llvm] [PowerPC] Support for Packed BCD conversion builtins (PR #142723)

[Tony Varghese via cfe-commits]

https://github.com/tonykuttai updated 
https://github.com/llvm/llvm-project/pull/142723

>From ccaa61d070ba3df59a75945d4e8c3275c71500a9 Mon Sep 17 00:00:00 2001
From: himadhith 
Date: Wed, 4 Jun 2025 06:13:13 +
Subject: [PATCH] [PowerPC] Support for Packed BCD conversion builtins

---
 clang/include/clang/Basic/BuiltinsPPC.def |  6 ++
 clang/lib/Basic/Targets/PPC.cpp   |  6 ++
 clang/lib/Sema/SemaPPC.cpp|  4 +
 .../CodeGen/PowerPC/builtins-bcd-transform.c  | 79 
 clang/test/Sema/builtins-bcd-transform.c  | 30 ++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td |  8 ++
 llvm/lib/Target/PowerPC/PPCInstrAltivec.td| 12 ++-
 .../CodeGen/PowerPC/builtins-bcd-transform.ll | 91 +++
 8 files changed, 232 insertions(+), 4 deletions(-)
 create mode 100644 clang/test/CodeGen/PowerPC/builtins-bcd-transform.c
 create mode 100644 clang/test/Sema/builtins-bcd-transform.c
 create mode 100644 llvm/test/CodeGen/PowerPC/builtins-bcd-transform.ll

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index 099500754a0e0..7c278d6841c74 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -535,6 +535,12 @@ TARGET_BUILTIN(__builtin_ppc_bcdadd_p, "iiV16UcV16Uc", "",
 TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
"isa-v207-instructions")
 
+// P9 Binary-coded decimal (BCD) builtins. 
   
+TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_zoned2packed, "V16UcV16UcUc", "t", 
"power9-vector")
+
 TARGET_BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "", "power9-vector")
 TARGET_BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "", "power9-vector")
 TARGET_BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "", "power9-vector")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 77145e2891a8a..05a5dc2d94256 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -89,6 +89,12 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 }
 
 static void defineXLCompatMacros(MacroBuilder &Builder) {
+  Builder.defineMacro("__builtin_national2packed",
+  "__builtin_ppc_national2packed");
+  Builder.defineMacro("__builtin_packed2national",
+  "__builtin_ppc_packed2national");
+  Builder.defineMacro("__builtin_packed2zoned", "__builtin_ppc_packed2zoned");
+  Builder.defineMacro("__builtin_zoned2packed", "__builtin_ppc_zoned2packed");
   Builder.defineMacro("__cdtbcd", "__builtin_ppc_cdtbcd");
   Builder.defineMacro("__cbcdtd", "__builtin_ppc_cbcdtd");
   Builder.defineMacro("__addg6s", "__builtin_ppc_addg6s");
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 9b4d82745f881..d5c83aedb3008 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -106,6 +106,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   switch (BuiltinID) {
   default:
 return false;
+  case PPC::BI__builtin_ppc_national2packed:
+  case PPC::BI__builtin_ppc_packed2zoned:
+  case PPC::BI__builtin_ppc_zoned2packed:
+return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-transform.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-transform.c
new file mode 100644
index 0..74a8500da6dab
--- /dev/null
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-transform.c
@@ -0,0 +1,79 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// Testfile that verifies positive cases (0 or 1 only) for BCD builtins 
national2packed, packed2zoned and zoned2packed.
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+
+// CHECK-LABEL: define dso_local <16 x i8> @tBcd_National2packed_imm1(
+// CHECK-SAME: <16 x i8> noundef [[A:%.*]]) local_unnamed_addr 
#[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call <16 x i8> 
@llvm.ppc.national2packed(<16 x i8> [[A]], i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+vector unsigned char tBcd_National2packed_imm1(vector unsigned char a) {
+

[clang] [RISCV] Decrease the capacity of SmallVector to 6. NFC. (PR #145650)

[Jim Lin via cfe-commits]

https://github.com/tclin914 created 
https://github.com/llvm/llvm-project/pull/145650

The maximum usage of these SmallVectors is only 6 elements.

>From 233cb3f6c7bfa26d2c9010bb3d6108229a5002fc Mon Sep 17 00:00:00 2001
From: Jim Lin 
Date: Wed, 25 Jun 2025 16:04:07 +0800
Subject: [PATCH] [RISCV] Decrease the capacity of SmallVector to 6. NFC.

The maximum usage of these SmallVectors is only 6 elements.
---
 clang/include/clang/Basic/riscv_vector.td | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/clang/include/clang/Basic/riscv_vector.td 
b/clang/include/clang/Basic/riscv_vector.td
index c6fd8a1a45fd1..104077b274f92 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -1816,7 +1816,7 @@ let ManualCodegen = [{
 // Unmasked: (passthru, op0, round_mode, vl)
 // Masked:   (passthru, op0, mask, frm, vl, policy)
 
-SmallVector Operands;
+SmallVector Operands;
 bool HasMaskedOff = !(
 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
 (!IsMasked && PolicyAttrs & RVV_VTA));
@@ -2021,7 +2021,7 @@ let ManualCodegen = [{
 // LLVM intrinsic
 // Unmasked: (passthru, op0, frm, vl)
 // Masked:   (passthru, op0, mask, frm, vl, policy)
-SmallVector Operands;
+SmallVector Operands;
 bool HasMaskedOff = !(
 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
 (!IsMasked && PolicyAttrs & RVV_VTA));
@@ -2225,7 +2225,7 @@ let ManualCodegen = [{
 // Unmasked: (passthru, op0, op1, round_mode, vl)
 // Masked:   (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, 
policy)
 
-SmallVector Operands;
+SmallVector Operands;
 bool HasMaskedOff = !(
 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
 (!IsMasked && PolicyAttrs & RVV_VTA));

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Decrease the capacity of SmallVector to 6. NFC. (PR #145650)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-risc-v

Author: Jim Lin (tclin914)


Changes

The maximum usage of these SmallVectors is only 6 elements.

---
Full diff: https://github.com/llvm/llvm-project/pull/145650.diff


1 Files Affected:

- (modified) clang/include/clang/Basic/riscv_vector.td (+3-3) 


``diff
diff --git a/clang/include/clang/Basic/riscv_vector.td 
b/clang/include/clang/Basic/riscv_vector.td
index c6fd8a1a45fd1..104077b274f92 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -1816,7 +1816,7 @@ let ManualCodegen = [{
 // Unmasked: (passthru, op0, round_mode, vl)
 // Masked:   (passthru, op0, mask, frm, vl, policy)
 
-SmallVector Operands;
+SmallVector Operands;
 bool HasMaskedOff = !(
 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
 (!IsMasked && PolicyAttrs & RVV_VTA));
@@ -2021,7 +2021,7 @@ let ManualCodegen = [{
 // LLVM intrinsic
 // Unmasked: (passthru, op0, frm, vl)
 // Masked:   (passthru, op0, mask, frm, vl, policy)
-SmallVector Operands;
+SmallVector Operands;
 bool HasMaskedOff = !(
 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
 (!IsMasked && PolicyAttrs & RVV_VTA));
@@ -2225,7 +2225,7 @@ let ManualCodegen = [{
 // Unmasked: (passthru, op0, op1, round_mode, vl)
 // Masked:   (passthru, vector_in, vector_in/scalar_in, mask, frm, vl, 
policy)
 
-SmallVector Operands;
+SmallVector Operands;
 bool HasMaskedOff = !(
 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
 (!IsMasked && PolicyAttrs & RVV_VTA));

``




https://github.com/llvm/llvm-project/pull/145650
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Decrease the capacity of SmallVector to 6. NFC. (PR #145650)

[Pengcheng Wang via cfe-commits]

https://github.com/wangpc-pp approved this pull request.


https://github.com/llvm/llvm-project/pull/145650
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Allow vanilla C function symbol name to be used in __attribute__((alias)) when -funique-internal-linkage-names is specified (PR #145652)

[via cfe-commits]

llvmbot wrote:



@llvm/pr-subscribers-clang

@llvm/pr-subscribers-clang-codegen

Author: None (HighW4y2H3ll)


Changes

`-funique-internal-linkage-names` mangles function symbols even for C 
functions. When using `__attribute__((alias()))`, it's a bit counter-intuitive 
to specify a C++ mangled symbol name in the attribute. Besides, `EmitGlobal` 
won't be able to emit the *aliasee* function because its name has been changed 
which no longer matches any GlobalValue name in the emitted LLVM Module. This 
patch fixes the `EmitGlobal` function which emits a function with the mangled 
name, and resolves the C symbol inside `__attribute__((alias))` to its uniquely 
mangled name to keep the behavior consistent.

---
Full diff: https://github.com/llvm/llvm-project/pull/145652.diff


2 Files Affected:

- (modified) clang/lib/CodeGen/CodeGenModule.cpp (+44-4) 
- (added) clang/test/CodeGen/unique-internal-linkage-names-alias.c (+10) 


``diff
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 16688810d0685..90f02220ec306 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -588,8 +588,9 @@ static const llvm::GlobalValue *getAliasedGlobal(const 
llvm::GlobalValue *GV) {
 }
 
 static bool checkAliasedGlobal(
-const ASTContext &Context, DiagnosticsEngine &Diags, SourceLocation 
Location,
-bool IsIFunc, const llvm::GlobalValue *Alias, const llvm::GlobalValue *&GV,
+const CodeGenModule *CGM, const ASTContext &Context,
+DiagnosticsEngine &Diags, SourceLocation Location, bool IsIFunc,
+const llvm::GlobalValue *Alias, const llvm::GlobalValue *&GV,
 const llvm::MapVector &MangledDeclNames,
 SourceRange AliasRange) {
   GV = getAliasedGlobal(Alias);
@@ -598,6 +599,23 @@ static bool checkAliasedGlobal(
 return false;
   }
 
+  // Only resolve unique internal linkage symbols for C code
+  if (!CGM->getLangOpts().CPlusPlus) {
+for (const auto &[Decl, Name] : MangledDeclNames) {
+  if (const auto *ND = dyn_cast(Decl.getDecl())) {
+IdentifierInfo *II = ND->getIdentifier();
+if (II && II->getName() == GV->getName() &&
+Name.contains(llvm::FunctionSamples::UniqSuffix)) {
+  GlobalDecl GD;
+  if (CGM->lookupRepresentativeDecl(Name, GD)) {
+GV = CGM->getModule().getNamedValue(Name);
+break;
+  }
+}
+  }
+}
+  }
+
   if (GV->hasCommonLinkage()) {
 const llvm::Triple &Triple = Context.getTargetInfo().getTriple();
 if (Triple.getObjectFormat() == llvm::Triple::XCOFF) {
@@ -687,8 +705,8 @@ void CodeGenModule::checkAliases() {
 StringRef MangledName = getMangledName(GD);
 llvm::GlobalValue *Alias = GetGlobalValue(MangledName);
 const llvm::GlobalValue *GV = nullptr;
-if (!checkAliasedGlobal(getContext(), Diags, Location, IsIFunc, Alias, GV,
-MangledDeclNames, Range)) {
+if (!checkAliasedGlobal(this, getContext(), Diags, Location, IsIFunc, 
Alias,
+GV, MangledDeclNames, Range)) {
   Error = true;
   continue;
 }
@@ -4038,6 +4056,7 @@ void CodeGenModule::EmitGlobal(GlobalDecl GD) {
 CXXGlobalInits.push_back(nullptr);
   }
 
+  const auto *ND = dyn_cast(GD.getDecl());
   StringRef MangledName = getMangledName(GD);
   if (GetGlobalValue(MangledName) != nullptr) {
 // The value has already been used and should therefore be emitted.
@@ -4046,6 +4065,12 @@ void CodeGenModule::EmitGlobal(GlobalDecl GD) {
 // The value must be emitted, but cannot be emitted eagerly.
 assert(!MayBeEmittedEagerly(Global));
 addDeferredDeclToEmit(GD);
+  } else if (!getLangOpts().CPlusPlus && ND &&
+ GetGlobalValue(ND->getName()) != nullptr &&
+ MangledName.contains(llvm::FunctionSamples::UniqSuffix)) {
+// Emit static C function that is mangled with
+// -funique-internal-linkage-names.
+addDeferredDeclToEmit(GD);
   } else {
 // Otherwise, remember that we saw a deferred decl with this name.  The
 // first use of the mangled name will cause it to move into
@@ -6189,6 +6214,21 @@ void 
CodeGenModule::EmitGlobalFunctionDefinition(GlobalDecl GD,
/*DontDefer=*/true,
ForDefinition));
 
+  if (!getLangOpts().CPlusPlus &&
+  getCXXABI().getMangleContext().shouldMangleDeclName(D)) {
+// -funique-internal-linkage-names may change the symbol name of C 
function.
+// Replace all uses of old symbol with the emitted global value.
+if (IdentifierInfo *II = D->getIdentifier()) {
+  if (II->getName() != GV->getName() &&
+  GV->getName().contains(llvm::FunctionSamples::UniqSuffix)) {
+if (llvm::GlobalValue *GVDef =
+getModule().getNamedValue(D->getName())) {
+  GVDef->replaceAllUsesWith(GV);
+}
+  }
+}
+  }
+
   // Already emitte

[clang] [Clang] Allow the use of [[gnu::visibility]] with #pragma clang attribute (PR #145653)

[Nikolas Klauser via cfe-commits]

https://github.com/philnik777 created 
https://github.com/llvm/llvm-project/pull/145653

I don't see any reason this shouldn't be allowed. AFAICT this is only disabled 
due to the heuristics used to determine whether it makes sense to allow the use 
of an attribute with `#pragma clang attribute`.

This allows libc++ to drop `_LIBCPP_HIDE_FROM_ABI` in a lot of places, making 
the library significantly easier to read.



>From 16bde542f42a8ef7843331a18769b4c4b5a6fcce Mon Sep 17 00:00:00 2001
From: Nikolas Klauser 
Date: Wed, 25 Jun 2025 10:43:08 +0200
Subject: [PATCH] [Clang] Allow the use of [[gnu::visibility]] with #pragma
 clang attribute

---
 clang/include/clang/Basic/Attr.td |  1 +
 clang/test/CodeGen/visibility.c   | 10 ++
 clang/test/Sema/attr-visibility.c |  6 ++
 3 files changed, 17 insertions(+)

diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index f113cd2ba2fbf..7272715558bf2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3735,6 +3735,7 @@ def Visibility : InheritableAttr {
["default", "hidden", "internal", "protected"],
["Default", "Hidden", "Hidden", "Protected"]>];
   let MeaningfulToClassTemplateDefinition = 1;
+  let PragmaAttributeSupport = 1;
   let Documentation = [Undocumented];
 }
 
diff --git a/clang/test/CodeGen/visibility.c b/clang/test/CodeGen/visibility.c
index ee760ec77879e..3abd70870bf92 100644
--- a/clang/test/CodeGen/visibility.c
+++ b/clang/test/CodeGen/visibility.c
@@ -72,3 +72,13 @@ __private_extern__ int test4 = 10;
 // CHECK-HIDDEN-LABEL: define hidden void @test5()
 __attribute__((availability(macosx,introduced=10.5,deprecated=10.6)))
 __private_extern__ void test5(void) {}
+
+
+#pragma clang attribute push([[gnu::visibility("hidden")]], apply_to=function)
+
+// CHECK-DEFAULT-LABEL: define hidden void @func()
+// CHECK-PROTECTED-LABEL: define hidden void @func()
+// CHECK-HIDDEN-LABEL: define hidden void @func()
+void func(void) {}
+
+#pragma clang attribute pop
diff --git a/clang/test/Sema/attr-visibility.c 
b/clang/test/Sema/attr-visibility.c
index 4acca7a7f69a3..0497e9760c44f 100644
--- a/clang/test/Sema/attr-visibility.c
+++ b/clang/test/Sema/attr-visibility.c
@@ -25,3 +25,9 @@ typedef int __attribute__((visibility("default"))) bar; // 
expected-warning {{'v
 int x __attribute__((type_visibility("default"))); // expected-error 
{{'type_visibility' attribute only applies to types and namespaces}}
 
 int PR17105 __attribute__((visibility(hidden))); // expected-error 
{{'visibility' attribute requires a string}}
+
+#pragma clang attribute push([[gnu::visibility("default")]], apply_to=function)
+
+void func(void) {}
+
+#pragma clang attribute pop

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Allow the use of [[gnu::visibility]] with #pragma clang attribute (PR #145653)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Nikolas Klauser (philnik777)


Changes

I don't see any reason this shouldn't be allowed. AFAICT this is only disabled 
due to the heuristics used to determine whether it makes sense to allow the use 
of an attribute with `#pragma clang attribute`.

This allows libc++ to drop `_LIBCPP_HIDE_FROM_ABI` in a lot of places, making 
the library significantly easier to read.



---
Full diff: https://github.com/llvm/llvm-project/pull/145653.diff


3 Files Affected:

- (modified) clang/include/clang/Basic/Attr.td (+1) 
- (modified) clang/test/CodeGen/visibility.c (+10) 
- (modified) clang/test/Sema/attr-visibility.c (+6) 


``diff
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index f113cd2ba2fbf..7272715558bf2 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3735,6 +3735,7 @@ def Visibility : InheritableAttr {
["default", "hidden", "internal", "protected"],
["Default", "Hidden", "Hidden", "Protected"]>];
   let MeaningfulToClassTemplateDefinition = 1;
+  let PragmaAttributeSupport = 1;
   let Documentation = [Undocumented];
 }
 
diff --git a/clang/test/CodeGen/visibility.c b/clang/test/CodeGen/visibility.c
index ee760ec77879e..3abd70870bf92 100644
--- a/clang/test/CodeGen/visibility.c
+++ b/clang/test/CodeGen/visibility.c
@@ -72,3 +72,13 @@ __private_extern__ int test4 = 10;
 // CHECK-HIDDEN-LABEL: define hidden void @test5()
 __attribute__((availability(macosx,introduced=10.5,deprecated=10.6)))
 __private_extern__ void test5(void) {}
+
+
+#pragma clang attribute push([[gnu::visibility("hidden")]], apply_to=function)
+
+// CHECK-DEFAULT-LABEL: define hidden void @func()
+// CHECK-PROTECTED-LABEL: define hidden void @func()
+// CHECK-HIDDEN-LABEL: define hidden void @func()
+void func(void) {}
+
+#pragma clang attribute pop
diff --git a/clang/test/Sema/attr-visibility.c 
b/clang/test/Sema/attr-visibility.c
index 4acca7a7f69a3..0497e9760c44f 100644
--- a/clang/test/Sema/attr-visibility.c
+++ b/clang/test/Sema/attr-visibility.c
@@ -25,3 +25,9 @@ typedef int __attribute__((visibility("default"))) bar; // 
expected-warning {{'v
 int x __attribute__((type_visibility("default"))); // expected-error 
{{'type_visibility' attribute only applies to types and namespaces}}
 
 int PR17105 __attribute__((visibility(hidden))); // expected-error 
{{'visibility' attribute requires a string}}
+
+#pragma clang attribute push([[gnu::visibility("default")]], apply_to=function)
+
+void func(void) {}
+
+#pragma clang attribute pop

``




https://github.com/llvm/llvm-project/pull/145653
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [win][clang] Align scalar deleting destructors with MSABI (PR #139566)

[Tom Honermann via cfe-commits]

@@ -1590,25 +1590,70 @@ namespace {
   void EmitConditionalDtorDeleteCall(CodeGenFunction &CGF,

tahonermann wrote:

Thanks, the new comment looks great.

https://github.com/llvm/llvm-project/pull/139566
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [analyzer] Enforce not making overly complicated symbols (PR #144327)

[Balázs Benics via cfe-commits]

https://github.com/balazs-benics-sonarsource updated 
https://github.com/llvm/llvm-project/pull/144327

From 2c32b9f6dfa9a236cea5679b6613e567cd8dfc2b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bal=C3=A1zs=20Benics?=
 <108414871+balazs-benics-sonarsou...@users.noreply.github.com>
Date: Tue, 24 Jun 2025 18:57:25 +0200
Subject: [PATCH 1/2] [analyzer][NFC] Make SymExpr::classof methods constexpr
 (#145526)

This should enable more powerful type metaprograms.

Split from #144327
---
 .../Core/PathSensitive/SymExpr.h  |   6 +-
 .../Core/PathSensitive/SymbolManager.h| 100 +-
 2 files changed, 54 insertions(+), 52 deletions(-)

diff --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h 
b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h
index aca14cf813c4b..6233a22d2ca2b 100644
--- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h
+++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h
@@ -152,9 +152,9 @@ class SymbolData : public SymExpr {
   };
 
   // Implement isa support.
-  static inline bool classof(const SymExpr *SE) {
-Kind k = SE->getKind();
-return k >= BEGIN_SYMBOLS && k <= END_SYMBOLS;
+  static bool classof(const SymExpr *SE) { return classof(SE->getKind()); }
+  static constexpr bool classof(Kind K) {
+return K >= BEGIN_SYMBOLS && K <= END_SYMBOLS;
   }
 };
 
diff --git 
a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h 
b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
index 86774ad5043dd..7af86cd721e8e 100644
--- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
+++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
@@ -46,7 +46,7 @@ class SymbolRegionValue : public SymbolData {
 
   friend class SymExprAllocator;
   SymbolRegionValue(SymbolID sym, const TypedValueRegion *r)
-  : SymbolData(SymbolRegionValueKind, sym), R(r) {
+  : SymbolData(ClassKind, sym), R(r) {
 assert(r);
 assert(isValidTypeForSymbol(r->getValueType()));
   }
@@ -56,7 +56,7 @@ class SymbolRegionValue : public SymbolData {
   const TypedValueRegion *getRegion() const { return R; }
 
   static void Profile(llvm::FoldingSetNodeID& profile, const TypedValueRegion* 
R) {
-profile.AddInteger((unsigned) SymbolRegionValueKind);
+profile.AddInteger((unsigned)ClassKind);
 profile.AddPointer(R);
   }
 
@@ -72,9 +72,9 @@ class SymbolRegionValue : public SymbolData {
   QualType getType() const override;
 
   // Implement isa support.
-  static bool classof(const SymExpr *SE) {
-return SE->getKind() == SymbolRegionValueKind;
-  }
+  static constexpr Kind ClassKind = SymbolRegionValueKind;
+  static bool classof(const SymExpr *SE) { return classof(SE->getKind()); }
+  static constexpr bool classof(Kind K) { return K == ClassKind; }
 };
 
 /// A symbol representing the result of an expression in the case when we do
@@ -90,8 +90,8 @@ class SymbolConjured : public SymbolData {
   SymbolConjured(SymbolID sym, ConstCFGElementRef elem,
  const LocationContext *lctx, QualType t, unsigned count,
  const void *symbolTag)
-  : SymbolData(SymbolConjuredKind, sym), Elem(elem), T(t), Count(count),
-LCtx(lctx), SymbolTag(symbolTag) {
+  : SymbolData(ClassKind, sym), Elem(elem), T(t), Count(count), LCtx(lctx),
+SymbolTag(symbolTag) {
 assert(lctx);
 assert(isValidTypeForSymbol(t));
   }
@@ -115,7 +115,7 @@ class SymbolConjured : public SymbolData {
   static void Profile(llvm::FoldingSetNodeID &profile, ConstCFGElementRef Elem,
   const LocationContext *LCtx, QualType T, unsigned Count,
   const void *SymbolTag) {
-profile.AddInteger((unsigned)SymbolConjuredKind);
+profile.AddInteger((unsigned)ClassKind);
 profile.Add(Elem);
 profile.AddPointer(LCtx);
 profile.Add(T);
@@ -128,9 +128,9 @@ class SymbolConjured : public SymbolData {
   }
 
   // Implement isa support.
-  static bool classof(const SymExpr *SE) {
-return SE->getKind() == SymbolConjuredKind;
-  }
+  static constexpr Kind ClassKind = SymbolConjuredKind;
+  static bool classof(const SymExpr *SE) { return classof(SE->getKind()); }
+  static constexpr bool classof(Kind K) { return K == ClassKind; }
 };
 
 /// A symbol representing the value of a MemRegion whose parent region has
@@ -141,7 +141,7 @@ class SymbolDerived : public SymbolData {
 
   friend class SymExprAllocator;
   SymbolDerived(SymbolID sym, SymbolRef parent, const TypedValueRegion *r)
-  : SymbolData(SymbolDerivedKind, sym), parentSymbol(parent), R(r) {
+  : SymbolData(ClassKind, sym), parentSymbol(parent), R(r) {
 assert(parent);
 assert(r);
 assert(isValidTypeForSymbol(r->getValueType()));
@@ -162,7 +162,7 @@ class SymbolDerived : public SymbolData {
 
   static void Profile(llvm::FoldingSetNodeID& profile, SymbolRef parent,
   const TypedVa

[clang] [llvm] [WPD]: Apply speculative WPD in non-lto mode. (PR #145031)

[Hassnaa Hamdi via cfe-commits]

hassnaaHamdi wrote:

Hi @teresajohnson @pcc 
I’d be grateful for your feedback.

https://github.com/llvm/llvm-project/pull/145031
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [CIR] Add support for function linkage and visibility (PR #145600)

[Sirui Mu via cfe-commits]

@@ -1737,25 +1737,51 @@ def GetMemberOp : CIR_Op<"get_member"> {
 
 def FuncOp : CIR_Op<"func", [
   AutomaticAllocationScope, CallableOpInterface, FunctionOpInterface,
+  DeclareOpInterfaceMethods,
   IsolatedFromAbove
 ]> {
   let summary = "Declare or define a function";
   let description = [{
 The `cir.func` operation defines a function, similar to the `mlir::FuncOp`
 built-in.
+
+The function linkage information is specified by `linkage`, as defined by
+`GlobalLinkageKind` attribute.
+
+Example:
+
+```mlir
+// External function definitions.
+cir.func @abort()
+
+// A function with internal linkage.
+cir.func internal @count(%x: i64) -> (i64)
+  return %x : i64
+
+// Linkage information
+cir.func linkonce_odr @some_method(...)
+```
   }];
 
   let arguments = (ins SymbolNameAttr:$sym_name,
+   CIR_VisibilityAttr:$global_visibility,
TypeAttrOf:$function_type,
+   UnitAttr:$dso_local,

Lancern wrote:

Should we elaborate `dso_local` from a simple boolean flag into something like 
a `RuntimePreemption` enum that could be either `NonPreemptable` or 
`Preemptable`?

https://github.com/llvm/llvm-project/pull/145600
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

https://github.com/ukalappa-mips created 
https://github.com/llvm/llvm-project/pull/145647

the extension enabled with xmipscop.

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

>From 8a1f98820b280b02f0662c7129a078680d67497f Mon Sep 17 00:00:00 2001
From: Umesh Kalappa 
Date: Wed, 25 Jun 2025 06:58:37 +
Subject: [PATCH] Added prefetch extensions for MIPS RV64 P8700 and enable with
 xmipscbop option.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension
at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
---
 .../Driver/print-supported-extensions-riscv.c |  1 +
 llvm/docs/RISCVUsage.rst  |  3 ++
 .../Target/RISCV/AsmParser/RISCVAsmParser.cpp |  5 ++
 .../RISCV/Disassembler/RISCVDisassembler.cpp  | 18 +++
 .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |  1 +
 llvm/lib/Target/RISCV/RISCVFeatures.td|  7 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp   | 48 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |  4 ++
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp   |  2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp  |  3 ++
 llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td  | 38 +++
 llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td  |  4 +-
 llvm/test/CodeGen/RISCV/features-info.ll  |  1 +
 llvm/test/CodeGen/RISCV/xmips-cbop.ll | 40 
 llvm/test/MC/RISCV/xmips-invalid.s| 11 -
 llvm/test/MC/RISCV/xmips-valid.s  | 18 +--
 .../TargetParser/RISCVISAInfoTest.cpp |  1 +
 17 files changed, 198 insertions(+), 7 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/xmips-cbop.ll

diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git 

[clang] [docs][coroutines] Revamp "Debugging C++ coroutines" (PR #142651)

[Chuanqi Xu via cfe-commits]

@@ -8,470 +8,966 @@ Debugging C++ Coroutines
 Introduction
 
 
-For performance and other architectural reasons, the C++ Coroutines feature in
-the Clang compiler is implemented in two parts of the compiler.  Semantic
-analysis is performed in Clang, and Coroutine construction and optimization
-takes place in the LLVM middle-end.
+Coroutines in C++ were introduced in C++20, and the user experience for
+debugging them can still be challenging. This document guides you how to most
+efficiently debug coroutines and how to navigate existing shortcomings in
+debuggers and compilers.
+
+Coroutines are generally used either as generators or for asynchronous
+programming. In this document, we will discuss both use cases. Even if you are
+using coroutines for asynchronous programming, you should still read the
+generators section, as it will introduce foundational debugging techniques also
+applicable to the debugging of asynchronous programming.
+
+Both compilers (clang, gcc, ...) and debuggers (lldb, gdb, ...) are
+still improving their support for coroutines. As such, we recommend using the
+latest available version of your toolchain.
+
+This document focuses on clang and lldb. The screenshots show
+[lldb-dap](https://marketplace.visualstudio.com/items?itemName=llvm-vs-code-extensions.lldb-dap)
+in combination with VS Code. The same techniques can also be used in other
+IDEs.
+
+Debugging clang-compiled binaries with gdb is possible, but requires more
+scripting. This guide comes with a basic GDB script for coroutine debugging.
+
+This guide will first showcase the more polished, bleeding-edge experience, but
+will also show you how to debug coroutines with older toolchains. In general,
+the older your toolchain, the deeper you will have to dive into the
+implementation details of coroutines (such as their ABI). The further down in
+this document you go, the more low-level, technical the content will become. If
+you are on an up-to-date toolchain, you will hopefully be able to stop reading
+earlier.
+
+Debugging generators
+
+
+The first major use case for coroutines in C++ are generators, i.e., functions

ChuanqiXu9 wrote:

it sounds better

https://github.com/llvm/llvm-project/pull/142651
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 4efb618 - [C++20] [Modules] Handling template declare with debug info

[Chuanqi Xu via cfe-commits]

Author: Chuanqi Xu
Date: 2025-06-25T17:51:50+08:00
New Revision: 4efb61850b590941a8da51057d3a63782864f44c

URL: 
https://github.com/llvm/llvm-project/commit/4efb61850b590941a8da51057d3a63782864f44c
DIFF: 
https://github.com/llvm/llvm-project/commit/4efb61850b590941a8da51057d3a63782864f44c.diff

LOG: [C++20] [Modules] Handling template declare with debug info

It looks an overlook that debug info can't play well with
explicit template instantiation. Tested in donwstream for years. I just
forgot to upstream it.

Added: 
clang/test/Modules/template-declare.cppm

Modified: 
clang/lib/CodeGen/CGVTables.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGVTables.cpp b/clang/lib/CodeGen/CGVTables.cpp
index 2897ccdf88660..0b6e830e0d557 100644
--- a/clang/lib/CodeGen/CGVTables.cpp
+++ b/clang/lib/CodeGen/CGVTables.cpp
@@ -1138,7 +1138,9 @@ CodeGenModule::getVTableLinkage(const CXXRecordDecl *RD) {
  llvm::Function::InternalLinkage;
 
   case TSK_ExplicitInstantiationDeclaration:
-llvm_unreachable("Should not have been asked to emit this");
+return IsExternalDefinition
+   ? llvm::GlobalVariable::AvailableExternallyLinkage
+   : llvm::GlobalVariable::ExternalLinkage;
   }
   }
 

diff  --git a/clang/test/Modules/template-declare.cppm 
b/clang/test/Modules/template-declare.cppm
new file mode 100644
index 0..01a7cca10e4ee
--- /dev/null
+++ b/clang/test/Modules/template-declare.cppm
@@ -0,0 +1,39 @@
+// RUN: rm -rf %t
+// RUN: mkdir -p %t
+// RUN: split-file %s %t
+//
+// RUN: %clang_cc1 -std=c++20 %t/a.cppm -dwarf-version=4 
-debug-info-kind=constructor \
+// RUN: -emit-module-interface -o %t/a.pcm
+// RUN: %clang_cc1 -std=c++20 %t/b.cppm -dwarf-version=4 
-debug-info-kind=constructor \
+// RUN: -emit-module-interface -o %t/b.pcm -fmodule-file=a=%t/a.pcm
+// RUN: %clang_cc1 -std=c++20 %t/b.cpp -dwarf-version=4 
-debug-info-kind=constructor \
+// RUN: -emit-llvm -o - -fmodule-file=a=%t/a.pcm -fmodule-file=b=%t/b.pcm 
| FileCheck %t/b.cpp 
+
+//--- a.cppm
+export module a;
+export template 
+class a {
+private:
+T *data;
+
+public:
+virtual T* getData();
+};
+
+extern template class a;
+
+//--- b.cppm
+export module b;
+import a;
+export struct b {
+a v;
+};
+
+//--- b.cpp
+module b;
+extern "C" void func() {
+b();
+}
+
+// It is fine enough to check that we won't crash.
+// CHECK: define {{.*}}void @func()



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-format] Added AlignConsecutiveTableGenBreakingDAGArgColons option. (PR #86150)

[Björn Schäpers via cfe-commits]

HazardyKnusperkeks wrote:

I don't actually understand your problem. Can you open an issue and give the 
input, the output and the expected output, along with your `.clang-format`? You 
can tag me and I'll have a look at it.

https://github.com/llvm/llvm-project/pull/86150
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Serialization] Fix source location data loss during decoding. (PR #145529)

[Haojian Wu via cfe-commits]

hokein wrote:

> > Yeah, the current situation conflicts with 64-bit source location. We 
> > discussed this. The conclusion is, if we need large source location space, 
> > use 48 bits and leave upper 16 bits for module file index. 48 bits should 
> > be enough for most cases.

Thanks, this makes sense. In my implementation, `SourceLocation` class would be 
64 bits, but the actual used bits is no more than 48 bits (the limit is easy to 
adjust if needed).

> In this case, I am fine to drop the optimizations. I don't like these small 
> optimization which is hard to maintain and not significant for users.

I had a similar thought when reading through that part of the code -- it’s 
becoming non-trivial to maintain. Removing the optimization would simplify 
things quite a bit. I’ll prepare a patch for that.

The downside is that this may increase the on-disk size of PCM/preamble files. 
Based on [D125403](https://reviews.llvm.org/D125403), the size increase could 
be up to 10%?, but that might be acceptable given the simplification and better 
long-term maintainability.

https://github.com/llvm/llvm-project/pull/145529
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Fix replaceability/relocatability computation (PR #145655)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Corentin Jabot (cor3ntin)


Changes

for eligible classes with user provided constructor or `operator=`

Fixes #144232

---
Full diff: https://github.com/llvm/llvm-project/pull/145655.diff


2 Files Affected:

- (modified) clang/lib/Sema/SemaTypeTraits.cpp (+2-2) 
- (modified) clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp (+36) 


``diff
diff --git a/clang/lib/Sema/SemaTypeTraits.cpp 
b/clang/lib/Sema/SemaTypeTraits.cpp
index 4dbb2450857e0..354816a8e0805 100644
--- a/clang/lib/Sema/SemaTypeTraits.cpp
+++ b/clang/lib/Sema/SemaTypeTraits.cpp
@@ -121,7 +121,7 @@ static bool hasSuitableConstructorForRelocation(Sema 
&SemaRef,
 
   CXXMethodDecl *Decl =
   LookupSpecialMemberFromXValue(SemaRef, D, /*Assign=*/false);
-  return Decl && Decl->isUserProvided() == AllowUserDefined &&
+  return Decl && (AllowUserDefined || !Decl->isUserProvided()) &&
  !Decl->isDeleted();
 }
 
@@ -137,7 +137,7 @@ static bool hasSuitableMoveAssignmentOperatorForRelocation(
   if (!Decl)
 return false;
 
-  return Decl && Decl->isUserProvided() == AllowUserDefined &&
+  return Decl && (AllowUserDefined || !Decl->isUserProvided()) &&
  !Decl->isDeleted();
 }
 
diff --git a/clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp 
b/clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
index 7152a5937d9b7..6f4003f525930 100644
--- a/clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
+++ b/clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
@@ -410,3 +410,39 @@ C& C::operator=(const C&) = default;
 static_assert (!__builtin_is_cpp_trivially_relocatable(C));
 static_assert (!__builtin_is_replaceable(C));
 }
+
+namespace GH144232 {
+
+struct E trivially_relocatable_if_eligible replaceable_if_eligible {
+  E (E &&);
+  E &operator= (E &&) = default;
+};
+
+struct F trivially_relocatable_if_eligible replaceable_if_eligible {
+  F (F &&) = default;
+  F &operator= (F &&);
+};
+
+struct G trivially_relocatable_if_eligible replaceable_if_eligible { G (G 
const &) = default; };
+
+struct I trivially_relocatable_if_eligible replaceable_if_eligible { I 
&operator= (const I &) = default; };
+
+struct J trivially_relocatable_if_eligible replaceable_if_eligible { J (J 
const &); };
+struct K trivially_relocatable_if_eligible replaceable_if_eligible { K (K 
const &); };
+
+
+
+static_assert (__builtin_is_replaceable (E));
+static_assert (__builtin_is_cpp_trivially_relocatable(E));
+static_assert (__builtin_is_replaceable (F));
+static_assert (__builtin_is_cpp_trivially_relocatable(F));
+static_assert (__builtin_is_replaceable (G));
+static_assert (__builtin_is_cpp_trivially_relocatable(G));
+static_assert (__builtin_is_replaceable (I));
+static_assert (__builtin_is_cpp_trivially_relocatable(I));
+static_assert (__builtin_is_replaceable (J));
+static_assert (__builtin_is_cpp_trivially_relocatable(J));
+static_assert (__builtin_is_replaceable (K));
+static_assert (__builtin_is_cpp_trivially_relocatable(K));
+
+}

``




https://github.com/llvm/llvm-project/pull/145655
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][SPIRV][AMDGPU] Override `supportsLibCall` for AMDGCNSPIRV (PR #143814)

[Alex Voicu via cfe-commits]

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/143814
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][AArch64] Add mfloat8_t variants of Neon load intrinsics (PR #145666)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-aarch64

Author: None (amilendra)


Changes

Add mfloat8_t support for the following Neon load intrinsics.

- VLD1
- VLD1_X2
- VLD1_X3
- VLD1_X4
- VLD1_LANE
- VLD1_DUP
- VLD2
- VLD3
- VLD4
- VLD2_DUP
- VLD3_DUP
- VLD4_DUP
- VLD2_LANE
- VLD3_LANE
- VLD4_LANE

---

Patch is 71.51 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/145666.diff


2 Files Affected:

- (modified) clang/include/clang/Basic/arm_neon.td (+15-15) 
- (added) clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c 
(+825) 


``diff
diff --git a/clang/include/clang/Basic/arm_neon.td 
b/clang/include/clang/Basic/arm_neon.td
index 7251cc2d1759a..a21773bd315cd 100644
--- a/clang/include/clang/Basic/arm_neon.td
+++ b/clang/include/clang/Basic/arm_neon.td
@@ -453,18 +453,18 @@ def VSLI_N : WInst<"vsli_n", "...I",
 

 // E.3.14 Loads and stores of a single vector
 def VLD1  : WInst<"vld1", ".(c*!)",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VLD1_X2   : WInst<"vld1_x2", "2(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_X3   : WInst<"vld1_x3", "3(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_X4   : WInst<"vld1_x4", "4(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_LANE : WInst<"vld1_lane", ".(c*!).I",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs",
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm",
   [ImmCheck<2, ImmCheckLaneIndex, 1>]>;
 def VLD1_DUP  : WInst<"vld1_dup", ".(c*!)",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VST1  : WInst<"vst1", "v*(.!)",
   "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
 def VST1_X2   : WInst<"vst1_x2", "v*(2!)",
@@ -495,20 +495,20 @@ def VST1_LANE_F16 : WInst<"vst1_lane", "v*(.!)I", "hQh",
 
 

 // E.3.15 Loads and stores of an N-element structure
-def VLD2 : WInst<"vld2", "2(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
-def VLD3 : WInst<"vld3", "3(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
-def VLD4 : WInst<"vld4", "4(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
+def VLD2 : WInst<"vld2", "2(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
+def VLD3 : WInst<"vld3", "3(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
+def VLD4 : WInst<"vld4", "4(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VLD2_DUP  : WInst<"vld2_dup", "2(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
 def VLD3_DUP  : WInst<"vld3_dup", "3(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
 def VLD4_DUP  : WInst<"vld4_dup", "4(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
-def VLD2_LANE : WInst<"vld2_lane", "2(c*!)2I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
+def VLD2_LANE : WInst<"vld2_lane", "2(c*!)2I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<4, ImmCheckLaneIndex, 1>]>;
-def VLD3_LANE : WInst<"vld3_lane", "3(c*!)3I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+def VLD3_LANE : WInst<"vld3_lane", "3(c*!)3I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<5, ImmCheckLaneIndex, 1>]>;
-def VLD4_LANE : WInst<"vld4_lane", "4(c*!)4I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+def VLD4_LANE : WInst<"vld4_lane", "4(c*!)4I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<6, ImmCheckLaneIndex, 1>]>;
 def VST2 : WInst<"vst2", "v*(2!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
 def VST3 : WInst<"vst3", "v*(3!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
diff --git a/clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c 
b/clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c
new file mode 100644
index 0..7947494a9dbb8
--- /dev/null
+++ b/clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c
@@ -0,0 +1,825 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// RUN: %clang_cc1-triple aarch64-none-

[clang] [Clang][AArch64] Add mfloat8_t variants of Neon load intrinsics (PR #145666)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: None (amilendra)


Changes

Add mfloat8_t support for the following Neon load intrinsics.

- VLD1
- VLD1_X2
- VLD1_X3
- VLD1_X4
- VLD1_LANE
- VLD1_DUP
- VLD2
- VLD3
- VLD4
- VLD2_DUP
- VLD3_DUP
- VLD4_DUP
- VLD2_LANE
- VLD3_LANE
- VLD4_LANE

---

Patch is 71.51 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/145666.diff


2 Files Affected:

- (modified) clang/include/clang/Basic/arm_neon.td (+15-15) 
- (added) clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c 
(+825) 


``diff
diff --git a/clang/include/clang/Basic/arm_neon.td 
b/clang/include/clang/Basic/arm_neon.td
index 7251cc2d1759a..a21773bd315cd 100644
--- a/clang/include/clang/Basic/arm_neon.td
+++ b/clang/include/clang/Basic/arm_neon.td
@@ -453,18 +453,18 @@ def VSLI_N : WInst<"vsli_n", "...I",
 

 // E.3.14 Loads and stores of a single vector
 def VLD1  : WInst<"vld1", ".(c*!)",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VLD1_X2   : WInst<"vld1_x2", "2(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_X3   : WInst<"vld1_x3", "3(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_X4   : WInst<"vld1_x4", "4(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_LANE : WInst<"vld1_lane", ".(c*!).I",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs",
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm",
   [ImmCheck<2, ImmCheckLaneIndex, 1>]>;
 def VLD1_DUP  : WInst<"vld1_dup", ".(c*!)",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VST1  : WInst<"vst1", "v*(.!)",
   "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
 def VST1_X2   : WInst<"vst1_x2", "v*(2!)",
@@ -495,20 +495,20 @@ def VST1_LANE_F16 : WInst<"vst1_lane", "v*(.!)I", "hQh",
 
 

 // E.3.15 Loads and stores of an N-element structure
-def VLD2 : WInst<"vld2", "2(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
-def VLD3 : WInst<"vld3", "3(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
-def VLD4 : WInst<"vld4", "4(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
+def VLD2 : WInst<"vld2", "2(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
+def VLD3 : WInst<"vld3", "3(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
+def VLD4 : WInst<"vld4", "4(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VLD2_DUP  : WInst<"vld2_dup", "2(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
 def VLD3_DUP  : WInst<"vld3_dup", "3(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
 def VLD4_DUP  : WInst<"vld4_dup", "4(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
-def VLD2_LANE : WInst<"vld2_lane", "2(c*!)2I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
+def VLD2_LANE : WInst<"vld2_lane", "2(c*!)2I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<4, ImmCheckLaneIndex, 1>]>;
-def VLD3_LANE : WInst<"vld3_lane", "3(c*!)3I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+def VLD3_LANE : WInst<"vld3_lane", "3(c*!)3I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<5, ImmCheckLaneIndex, 1>]>;
-def VLD4_LANE : WInst<"vld4_lane", "4(c*!)4I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+def VLD4_LANE : WInst<"vld4_lane", "4(c*!)4I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<6, ImmCheckLaneIndex, 1>]>;
 def VST2 : WInst<"vst2", "v*(2!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
 def VST3 : WInst<"vst3", "v*(3!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
diff --git a/clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c 
b/clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c
new file mode 100644
index 0..7947494a9dbb8
--- /dev/null
+++ b/clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c
@@ -0,0 +1,825 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// RUN: %clang_cc1-triple aarch64-none-linux-gnu 

[clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)

[Aditi Medhane via cfe-commits]

https://github.com/AditiRM updated 
https://github.com/llvm/llvm-project/pull/144874

>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane 
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/2] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
 Support

---
 clang/include/clang/Basic/BuiltinsPPC.def |  4 ++
 clang/lib/Basic/Targets/PPC.cpp   |  2 +
 clang/lib/Sema/SemaPPC.cpp|  2 +
 .../CodeGen/PowerPC/builtins-bcd-helpers.c| 29 ++
 llvm/include/llvm/IR/IntrinsicsPowerPC.td |  8 
 llvm/lib/Target/PowerPC/PPCInstrAltivec.td|  6 ++-
 .../CodeGen/PowerPC/builtins-bcd-helpers.ll   | 40 +++
 7 files changed, 89 insertions(+), 2 deletions(-)
 create mode 100644 clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
 create mode 100644 llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll

diff --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index bb7d54bbb793e..c3825822ce0b8 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -515,6 +515,10 @@ TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "", 
"power9-vector")
 TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector")
 TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector")
 
+//P9 BCD builtins
+TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", 
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+
 // P7 BCD builtins.
 TARGET_BUILTIN(__builtin_cdtbcd, "UiUi", "", "isa-v206-instructions")
 TARGET_BUILTIN(__builtin_cbcdtd, "UiUi", "", "isa-v206-instructions")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index e6ef0ecc526ba..876348c29b707 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -88,6 +88,8 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
 }
 
 static void defineXLCompatMacros(MacroBuilder &Builder) {
+  Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
+  Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
   Builder.defineMacro("__cdtbcd", "__builtin_ppc_cdtbcd");
   Builder.defineMacro("__cbcdtd", "__builtin_ppc_cbcdtd");
   Builder.defineMacro("__addg6s", "__builtin_ppc_addg6s");
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 9b4d82745f881..71673062044af 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -106,6 +106,8 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI,
   switch (BuiltinID) {
   default:
 return false;
+  case PPC::BI__builtin_ppc_bcdsetsign:
+return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
   case PPC::BI__builtin_altivec_crypto_vshasigmaw:
   case PPC::BI__builtin_altivec_crypto_vshasigmad:
 return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c 
b/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
new file mode 100644
index 0..0aeb720e545ed
--- /dev/null
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
@@ -0,0 +1,29 @@
+// NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 5
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+
+// CHECK-LABEL: test_bcdcopysign
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdcopysign(<16 
x i8> %a, <16 x i8> %b)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdcopysign(vector unsigned char a, vector unsigned 
char b) {
+return __builtin_ppc_bcdcopysign(a, b);
+}
+
+// CHECK-LABEL: test_bcdsetsign_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdsetsign(<16 
x i8> %a, i32 0)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdsetsign_imm0(vector unsigned char a) {
+return __builtin_ppc_bcdsetsign(a, '\0');
+}
+
+// CHECK-LABEL: test_bcdsetsign_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdsetsign(<16 
x i8> %a, i32 1)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
+return __builtin_ppc_bcdsetsign(a, '\1');
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td 
b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 84c26599b5b70..bd9d85fdaab92 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -668,6 +668,14 @@ let TargetPrefix = "ppc" in {  // All i

[clang] [Clang][AArch64] Add mfloat8_t variants of Neon load intrinsics (PR #145666)

[via cfe-commits]

https://github.com/amilendra created 
https://github.com/llvm/llvm-project/pull/145666

Add mfloat8_t support for the following Neon load intrinsics.

- VLD1
- VLD1_X2
- VLD1_X3
- VLD1_X4
- VLD1_LANE
- VLD1_DUP
- VLD2
- VLD3
- VLD4
- VLD2_DUP
- VLD3_DUP
- VLD4_DUP
- VLD2_LANE
- VLD3_LANE
- VLD4_LANE

>From 157ae6bb475451a0d3ad48266e21a4bc55722fa8 Mon Sep 17 00:00:00 2001
From: Amilendra Kodithuwakku 
Date: Wed, 25 Jun 2025 09:49:46 +0100
Subject: [PATCH] [Clang][AArch64] Add mfloat8_t variants of Neon load
 intrinsics

Add mfloat8_t support for the following Neon load intrinsics.

- VLD1
- VLD1_X2
- VLD1_X3
- VLD1_X4
- VLD1_LANE
- VLD1_DUP
- VLD2
- VLD3
- VLD4
- VLD2_DUP
- VLD3_DUP
- VLD4_DUP
- VLD2_LANE
- VLD3_LANE
- VLD4_LANE
---
 clang/include/clang/Basic/arm_neon.td |  30 +-
 .../neon-fp8-intrinsics/acle_neon_loads.c | 825 ++
 2 files changed, 840 insertions(+), 15 deletions(-)
 create mode 100644 
clang/test/CodeGen/AArch64/neon-fp8-intrinsics/acle_neon_loads.c

diff --git a/clang/include/clang/Basic/arm_neon.td 
b/clang/include/clang/Basic/arm_neon.td
index 7251cc2d1759a..a21773bd315cd 100644
--- a/clang/include/clang/Basic/arm_neon.td
+++ b/clang/include/clang/Basic/arm_neon.td
@@ -453,18 +453,18 @@ def VSLI_N : WInst<"vsli_n", "...I",
 

 // E.3.14 Loads and stores of a single vector
 def VLD1  : WInst<"vld1", ".(c*!)",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VLD1_X2   : WInst<"vld1_x2", "2(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_X3   : WInst<"vld1_x3", "3(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_X4   : WInst<"vld1_x4", "4(c*!)",
-  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPs">;
+  "cfilsUcUiUlUsQcQfQiQlQsQUcQUiQUlQUsPcPsQPcQPsmQm">;
 def VLD1_LANE : WInst<"vld1_lane", ".(c*!).I",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs",
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm",
   [ImmCheck<2, ImmCheckLaneIndex, 1>]>;
 def VLD1_DUP  : WInst<"vld1_dup", ".(c*!)",
-  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
+  "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VST1  : WInst<"vst1", "v*(.!)",
   "QUcQUsQUiQUlQcQsQiQlQfQPcQPsUcUsUiUlcsilfPcPs">;
 def VST1_X2   : WInst<"vst1_x2", "v*(2!)",
@@ -495,20 +495,20 @@ def VST1_LANE_F16 : WInst<"vst1_lane", "v*(.!)I", "hQh",
 
 

 // E.3.15 Loads and stores of an N-element structure
-def VLD2 : WInst<"vld2", "2(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
-def VLD3 : WInst<"vld3", "3(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
-def VLD4 : WInst<"vld4", "4(c*!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
+def VLD2 : WInst<"vld2", "2(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
+def VLD3 : WInst<"vld3", "3(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
+def VLD4 : WInst<"vld4", "4(c*!)", 
"QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPsmQm">;
 def VLD2_DUP  : WInst<"vld2_dup", "2(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
 def VLD3_DUP  : WInst<"vld3_dup", "3(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
 def VLD4_DUP  : WInst<"vld4_dup", "4(c*!)",
-  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUs">;
-def VLD2_LANE : WInst<"vld2_lane", "2(c*!)2I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+  "UcUsUiUlcsilfPcPsQcQfQiQlQsQPcQPsQUcQUiQUlQUsmQm">;
+def VLD2_LANE : WInst<"vld2_lane", "2(c*!)2I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<4, ImmCheckLaneIndex, 1>]>;
-def VLD3_LANE : WInst<"vld3_lane", "3(c*!)3I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+def VLD3_LANE : WInst<"vld3_lane", "3(c*!)3I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<5, ImmCheckLaneIndex, 1>]>;
-def VLD4_LANE : WInst<"vld4_lane", "4(c*!)4I", "QUsQUiQsQiQfQPsUcUsUicsifPcPs",
+def VLD4_LANE : WInst<"vld4_lane", "4(c*!)4I", 
"QUsQUiQsQiQfQPsUcUsUicsifPcPsmQm",
   [ImmCheck<6, ImmCheckLaneIndex, 1>]>;
 def VST2 : WInst<"vst2", "v*(2!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
 def VST3 : WInst<"vst3", "v*(3!)", "QUcQUsQUiQcQsQiQfQPcQPsUcUsUiUlcsilfPcPs">;
diff --git a/clang/test/CodeGen/AArch64/neon-fp8-intrinsics

[clang] [CIR] Add support for function linkage and visibility (PR #145600)

[Sirui Mu via cfe-commits]

https://github.com/Lancern approved this pull request.


https://github.com/llvm/llvm-project/pull/145600
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [REAPPLY][Clang-Repl] Add support for out-of-process execution. #110418 (PR #144064)

[via cfe-commits]

https://github.com/SahilPatidar updated 
https://github.com/llvm/llvm-project/pull/144064

>From 05943c9542cd89ae672ddc0f14514e0c7b1e0bd7 Mon Sep 17 00:00:00 2001
From: SahilPatidar 
Date: Tue, 3 Dec 2024 15:07:56 +0530
Subject: [PATCH 1/5] Re-Land: [Clang-Repl] Add support for out-of-process
 execution. #110418

---
 clang/include/clang/Interpreter/Interpreter.h |   7 +-
 .../clang/Interpreter/RemoteJITUtils.h|  38 +++
 clang/lib/Interpreter/CMakeLists.txt  |   1 +
 clang/lib/Interpreter/Interpreter.cpp |  37 ++-
 clang/lib/Interpreter/RemoteJITUtils.cpp  | 267 ++
 clang/tools/clang-repl/CMakeLists.txt |   2 +
 clang/tools/clang-repl/ClangRepl.cpp  | 123 +++-
 7 files changed, 465 insertions(+), 10 deletions(-)
 create mode 100644 clang/include/clang/Interpreter/RemoteJITUtils.h
 create mode 100644 clang/lib/Interpreter/RemoteJITUtils.cpp

diff --git a/clang/include/clang/Interpreter/Interpreter.h 
b/clang/include/clang/Interpreter/Interpreter.h
index f8663e3193a18..78dff1165dcf5 100644
--- a/clang/include/clang/Interpreter/Interpreter.h
+++ b/clang/include/clang/Interpreter/Interpreter.h
@@ -20,6 +20,7 @@
 
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ExecutionEngine/JITSymbol.h"
+#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
 #include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
 #include "llvm/Support/Error.h"
 #include 
@@ -136,10 +137,14 @@ class Interpreter {
 public:
   virtual ~Interpreter();
   static llvm::Expected>
-  create(std::unique_ptr CI);
+  create(std::unique_ptr CI,
+ std::unique_ptr JITBuilder = nullptr);
   static llvm::Expected>
   createWithCUDA(std::unique_ptr CI,
  std::unique_ptr DCI);
+  static llvm::Expected>
+  createLLJITBuilder(std::unique_ptr EPC,
+ llvm::StringRef OrcRuntimePath);
   const ASTContext &getASTContext() const;
   ASTContext &getASTContext();
   const CompilerInstance *getCompilerInstance() const;
diff --git a/clang/include/clang/Interpreter/RemoteJITUtils.h 
b/clang/include/clang/Interpreter/RemoteJITUtils.h
new file mode 100644
index 0..8705a3b1f669d
--- /dev/null
+++ b/clang/include/clang/Interpreter/RemoteJITUtils.h
@@ -0,0 +1,38 @@
+//===-- RemoteJITUtils.h - Utilities for remote-JITing --*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// Utilities for ExecutorProcessControl-based remote JITing with Orc and
+// JITLink.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_INTERPRETER_REMOTEJITUTILS_H
+#define LLVM_CLANG_INTERPRETER_REMOTEJITUTILS_H
+
+#include "llvm/ADT/StringRef.h"
+#include "llvm/ExecutionEngine/Orc/Core.h"
+#include "llvm/ExecutionEngine/Orc/Layer.h"
+#include "llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h"
+#include "llvm/Support/Error.h"
+
+#include 
+#include 
+#include 
+
+llvm::Expected>
+launchExecutor(llvm::StringRef ExecutablePath, bool UseSharedMemory,
+   llvm::StringRef SlabAllocateSizeString);
+
+/// Create a JITLinkExecutor that connects to the given network address
+/// through a TCP socket. A valid NetworkAddress provides hostname and port,
+/// e.g. localhost:2.
+llvm::Expected>
+connectTCPSocket(llvm::StringRef NetworkAddress, bool UseSharedMemory,
+ llvm::StringRef SlabAllocateSizeString);
+
+#endif // LLVM_CLANG_INTERPRETER_REMOTEJITUTILS_H
diff --git a/clang/lib/Interpreter/CMakeLists.txt 
b/clang/lib/Interpreter/CMakeLists.txt
index bf70cdfbee01e..38cf139fa86a6 100644
--- a/clang/lib/Interpreter/CMakeLists.txt
+++ b/clang/lib/Interpreter/CMakeLists.txt
@@ -27,6 +27,7 @@ add_clang_library(clangInterpreter
   Interpreter.cpp
   InterpreterValuePrinter.cpp
   InterpreterUtils.cpp
+  RemoteJITUtils.cpp
   Value.cpp
   ${WASM_SRC}
   PARTIAL_SOURCES_INTENDED
diff --git a/clang/lib/Interpreter/Interpreter.cpp 
b/clang/lib/Interpreter/Interpreter.cpp
index 84feff82c63a7..30051a24662c6 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -46,6 +46,7 @@
 #include "clang/Sema/Lookup.h"
 #include "clang/Serialization/ObjectFilePCHContainerReader.h"
 #include "llvm/ExecutionEngine/JITSymbol.h"
+#include "llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h"
 #include "llvm/ExecutionEngine/Orc/LLJIT.h"
 #include "llvm/IR/Module.h"
 #include "llvm/Support/Errc.h"
@@ -455,10 +456,11 @@ const char *const Runtimes = R"(
 )";
 
 llvm::Expected>
-Interpreter::create(std::unique_ptr CI) {
+Interpreter::create(std::unique_ptr CI,
+std::unique_ptr JB) {
   llvm::Error Err = llvm::Error::success();
-  auto Interp =
-  std::unique_ptr(new Interpreter(std::move(CI), 

[clang] [Serialization] Remove delta encoding optimization (PR #145670)

[Timm Baeder via cfe-commits]

@@ -733,16 +731,14 @@ class ASTWriter : public ASTDeserializationListener,
   void AddFileID(FileID FID, RecordDataImpl &Record);
 
   /// Emit a source location.
-  void AddSourceLocation(SourceLocation Loc, RecordDataImpl &Record,
- LocSeq *Seq = nullptr);
+  void AddSourceLocation(SourceLocation Loc, RecordDataImpl &Record);
 
   /// Return the raw encodings for source locations.
   SourceLocationEncoding::RawLocEncoding
-  getRawSourceLocationEncoding(SourceLocation Loc, LocSeq *Seq = nullptr);
+  getRawSourceLocationEncoding(SourceLocation loc);

tbaederr wrote:

This should stay `Loc` I think.

https://github.com/llvm/llvm-project/pull/145670
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [CIR] Add support for function linkage and visibility (PR #145600)

[Sirui Mu via cfe-commits]

@@ -1534,6 +1567,27 @@ void CIRGenModule::setGVPropertiesAux(mlir::Operation 
*op,
   assert(!cir::MissingFeatures::opGlobalPartition());
 }
 
+void CIRGenModule::setFunctionAttributes(GlobalDecl globalDecl,
+ cir::FuncOp func,
+ bool isIncompleteFunction,
+ bool isThunk) {
+  // NOTE(cir): Original CodeGen checks if this is an intrinsic. In CIR we
+  // represent them in dedicated ops. The correct attributes are ensured during
+  // translation to LLVM. Thus, we don't need to check for them here.
+
+  assert(!cir::MissingFeatures::setFunctionAttributes());
+  assert(!cir::MissingFeatures::setTargetAttributes());
+
+  // TODO(cir): This needs a lot of work to better match CodeGen. That
+  // ultimately ends up in setGlobalVisibility, which already has the linkage 
of
+  // the LLVM GV (corresponding to our FuncOp) computed, so it doesn't have to
+  // recompute it here. This is a minimal fix for now.
+  if (!isLocalLinkage(getFunctionLinkage(globalDecl))) {
+const auto *decl = globalDecl.getDecl();

Lancern wrote:

Use explicit type here

https://github.com/llvm/llvm-project/pull/145600
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)

[Ulrich Weigand via cfe-commits]

@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid, 
int &CCMask) {
   return false;
 }
 
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one of TrueVal
+// or FalseVal has nested select_cc_b(already been combined sequence)
+SDValue
+SystemZTargetLowering::combineSELECT_CC_CCIPMMask(SDNode *N,
+  DAGCombinerInfo &DCI) const {
+  SelectionDAG &DAG = DCI.DAG;
+  // Check if CCOp1 and CCOp2 refers to the same CC condition node.
+  const auto isSameCCIPMOp = [](SDValue &CCOp1, SDValue &CCOp2,
+int &CCValidVal) {
+// Already combined sequence.
+if (CCValidVal != SystemZ::CCMASK_ANY)
+  return false;
+SDNode *N1 = CCOp1.getNode(), *N2 = CCOp2.getNode();
+return N1 && N2 && N1 == N2;
+  };
+
+  auto *OuterTrueVal = dyn_cast(N->getOperand(0));
+  auto *OuterFalseVal = dyn_cast(N->getOperand(1));
+
+  // Already handled the case both operands constant in combineCCMask.
+  // Not yet encountered the case where both operands are sub-expressions,
+  // that case can be handled by removing this condition.
+  if (!((OuterTrueVal != nullptr) ^ (OuterFalseVal != nullptr)))
+return SDValue();
+
+  SDValue NestedCCOp = OuterTrueVal ? N->getOperand(1) : N->getOperand(0);
+  auto *NestedCCNode = NestedCCOp.getNode();
+  // check if nested select_cc_b has already been combined.
+  if (!NestedCCNode || NestedCCNode->getOpcode() != SystemZISD::SELECT_CCMASK)
+return SDValue();
+
+  auto *NestedTrueVal = dyn_cast(NestedCCNode->getOperand(0));
+  auto *NestedFalseVal = dyn_cast(NestedCCNode->getOperand(1));
+  if (!NestedTrueVal || !NestedFalseVal)
+return SDValue();
+  bool Invert = false;
+  // Check if outer select_cc_a and nested select_cc_b True/False matching
+  // or inverted.
+  if (OuterTrueVal) {
+// OuterFalseVal points to already combined nested select_cc_b.
+if (OuterTrueVal->getZExtValue() == NestedFalseVal->getZExtValue())
+  Invert = !Invert; // Inverted.
+else if (OuterTrueVal->getZExtValue() != NestedTrueVal->getZExtValue())
+  return SDValue();
+  } else if (OuterFalseVal) {
+// OuterTrueVal points to already combined nested select_cc_b.
+if (OuterFalseVal->getZExtValue() == NestedTrueVal->getZExtValue())
+  Invert = !Invert; // Inverted.
+else if (OuterFalseVal->getZExtValue() != NestedFalseVal->getZExtValue())
+  return SDValue();
+  }
+  auto *OuterCCValid = dyn_cast(N->getOperand(2));
+  auto *OuterCCMask = dyn_cast(N->getOperand(3));
+  auto *NestedCCValid = dyn_cast(NestedCCOp->getOperand(2));
+  auto *NestedCCMask = dyn_cast(NestedCCOp->getOperand(3));
+  if (!OuterCCValid || !OuterCCMask || !NestedCCValid || !NestedCCMask)
+return SDValue();
+
+  int OuterCCValidVal = OuterCCValid->getZExtValue();
+  int OuterCCMaskVal = OuterCCMask->getZExtValue();
+  int NestedCCValidVal = NestedCCValid->getZExtValue();
+  int NestedCCMaskVal = NestedCCMask->getZExtValue();
+  int CCMask = OuterCCMaskVal;
+  SDValue OuterCCReg = N->getOperand(4);
+  SDValue NestedCCReg = NestedCCOp->getOperand(4);
+
+  // Combine two already combined (select_cc_a (select_cc_b)), where TrueVal
+  // of select_cc_a points to select_cc_b. We return select_cc with TrueVal
+  // and FalseVal from select_cc_b with combined CCMask.
+  // One of OuterTrueVal or OuterFalseVal has select_cc_b.
+  if ((OuterTrueVal != nullptr) ^ (OuterFalseVal != nullptr)) {
+// Both OuterCCValidVal and NestedCCValidVal have already been combined.
+if (OuterCCValidVal == SystemZ::CCMASK_ANY &&
+// And both points to the same CC.
+isSameCCIPMOp(OuterCCReg, NestedCCReg, NestedCCValidVal)) {
+  CCMask |= NestedCCMaskVal;
+  // NestedCCOp has both operands constants.
+  auto Op0 = NestedCCOp->getOperand(0);
+  auto Op1 = NestedCCOp->getOperand(1);
+  // Return combined select_cc.
+  return DAG.getNode(
+  SystemZISD::SELECT_CCMASK, SDLoc(N), N->getValueType(0), Op0, Op1,
+  DAG.getTargetConstant(OuterCCValidVal, SDLoc(N), MVT::i32),
+  DAG.getTargetConstant(CCMask, SDLoc(N), MVT::i32), NestedCCReg);
+}
+  }
+  // Now handles the case where outer select_cc_a has not yet been combined.
+  // Combine outer select_cc and check if it corresponds to the same
+  // CC as nested CC.
+  // Outer select_cc has yet not been combined.
+  if (OuterCCValidVal != SystemZ::CCMASK_ICMP ||
+  // Try combining outer select_cc.
+  !combineCCMask(OuterCCReg, OuterCCValidVal, OuterCCMaskVal) ||
+  // Check nested select_cc has already been combined and points to
+  // same Condtiion code as outer select_cc.
+  !isSameCCIPMOp(OuterCCReg, NestedCCReg, NestedCCValidVal))
+return SDValue();
+  // Check if nested select_cc original CCMask was CCMASK_CMP_EQ.
+  // Only one-bit is set in Ne

[clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)

[Rainer Orth via cfe-commits]

https://github.com/rorth updated 
https://github.com/llvm/llvm-project/pull/142948

>From e57e53c7e5abdb4c390a04b4ce9084dec9e71dd5 Mon Sep 17 00:00:00 2001
From: Rainer Orth 
Date: Thu, 5 Jun 2025 13:40:26 +0200
Subject: [PATCH 1/3] [clang][python][test] Move python binding tests to lit
 framework

As discussed in PR #142353, the current testsuite of the `clang` Python
bindings has several issues:

- It `libclang.so` cannot be loaded into `python` to run the testsuite, the
  whole `ninja check-all` aborts.
- The result of running the testsuite isn't report like the `lit`-based
  tests, rendering them almost invisible.
- The testsuite is disabled in a non-obvious way (`RUN_PYTHON_TESTS`) in
  `tests/CMakeLists.txt`, which again doesn't show up in the test results.

All these issues can be avoided by integrating the Python bindings tests
with `lit`, which is what this patch does:

- The actual test lives in `clang/test/bindings/python/bindings.sh` and is
  run by `lit`.
- The current `clang/bindings/python/tests` directory (minus the
  now-subperfluous `CMakeLists.txt`) is moved into the same directory.
- The check if `libclang` is loadable (originally from PR #142353) is now
  handled via a new `lit` feature, `libclang-loadable`.
- The various ways to disable the tests have been turned into `XFAIL`s as
  appropriate.  This isn't complete and not completely tested yet.

Tested on `sparc-sun-solaris2.11`, `sparcv9-sun-solaris2.11`,
`i386-pc-solaris2.11`, `amd64-pc-solaris2.11`, `i686-pc-linux-gnu`, and
`x86_64-pc-linux-gnu`.
---
 clang/CMakeLists.txt  |  1 -
 clang/bindings/python/tests/CMakeLists.txt| 66 ---
 clang/test/bindings/python/bindings.sh| 48 ++
 clang/test/bindings/python/lit.local.cfg  | 22 +++
 .../bindings/python/tests/__init__.py |  0
 .../bindings/python/tests/cindex/INPUTS/a.inc |  0
 .../bindings/python/tests/cindex/INPUTS/b.inc |  0
 .../tests/cindex/INPUTS/compile_commands.json |  0
 .../python/tests/cindex/INPUTS/header1.h  |  0
 .../python/tests/cindex/INPUTS/header2.h  |  0
 .../python/tests/cindex/INPUTS/header3.h  |  0
 .../python/tests/cindex/INPUTS/hello.cpp  |  0
 .../python/tests/cindex/INPUTS/include.cpp|  0
 .../tests/cindex/INPUTS/parse_arguments.c |  0
 .../python/tests/cindex/INPUTS/testfile.c |  0
 .../bindings/python/tests/cindex/__init__.py  |  0
 .../tests/cindex/test_access_specifiers.py|  0
 .../bindings/python/tests/cindex/test_cdb.py  |  0
 .../tests/cindex/test_code_completion.py  |  0
 .../python/tests/cindex/test_comment.py   |  0
 .../python/tests/cindex/test_cursor.py|  0
 .../python/tests/cindex/test_cursor_kind.py   |  0
 .../python/tests/cindex/test_diagnostics.py   |  0
 .../python/tests/cindex/test_enums.py |  0
 .../test_exception_specification_kind.py  |  0
 .../bindings/python/tests/cindex/test_file.py |  0
 .../python/tests/cindex/test_index.py |  0
 .../bindings/python/tests/cindex/test_lib.py  |  0
 .../python/tests/cindex/test_linkage.py   |  0
 .../python/tests/cindex/test_location.py  |  0
 .../python/tests/cindex/test_rewrite.py   |  0
 .../python/tests/cindex/test_source_range.py  |  0
 .../python/tests/cindex/test_tls_kind.py  |  0
 .../python/tests/cindex/test_token_kind.py|  0
 .../python/tests/cindex/test_tokens.py|  0
 .../tests/cindex/test_translation_unit.py |  0
 .../bindings/python/tests/cindex/test_type.py |  0
 .../bindings/python/tests/cindex/util.py  |  0
 38 files changed, 70 insertions(+), 67 deletions(-)
 delete mode 100644 clang/bindings/python/tests/CMakeLists.txt
 create mode 100755 clang/test/bindings/python/bindings.sh
 create mode 100644 clang/test/bindings/python/lit.local.cfg
 rename clang/{ => test}/bindings/python/tests/__init__.py (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/a.inc (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/b.inc (100%)
 rename clang/{ => 
test}/bindings/python/tests/cindex/INPUTS/compile_commands.json (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/header1.h (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/header2.h (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/header3.h (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/hello.cpp (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/include.cpp (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/parse_arguments.c 
(100%)
 rename clang/{ => test}/bindings/python/tests/cindex/INPUTS/testfile.c (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/__init__.py (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/test_access_specifiers.py 
(100%)
 rename clang/{ => test}/bindings/python/tests/cindex/test_cdb.py (100%)
 rename clang/{ => test}/bindings/python/tests/cindex/test_code_completion.py 
(100%)
 renam

[clang] [Clang][SPIRV][AMDGPU] Override `supportsLibCall` for AMDGCNSPIRV (PR #143814)

[Alex Voicu via cfe-commits]

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/143814
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 992f0d1 - [Clang][SPIRV][AMDGPU] Override `supportsLibCall` for AMDGCNSPIRV (#143814)

[via cfe-commits]

Author: Alex Voicu
Date: 2025-06-25T11:22:59+01:00
New Revision: 992f0d12255a4a9ae18e45f09700097cbd3739b5

URL: 
https://github.com/llvm/llvm-project/commit/992f0d12255a4a9ae18e45f09700097cbd3739b5
DIFF: 
https://github.com/llvm/llvm-project/commit/992f0d12255a4a9ae18e45f09700097cbd3739b5.diff

LOG: [Clang][SPIRV][AMDGPU] Override `supportsLibCall` for AMDGCNSPIRV (#143814)

The `supportsLibCall` predicate is used to select whether some math builtins 
get expanded in the FE or they get lowered into libcalls. The default 
implementation unconditionally returns true, which is problematic for 
AMDGCN-flavoured SPIRV, as AMDGPU does not support any libcalls at the moment. 
This change overrides the predicate in order to reflect this and correctly do 
the expected FE expansion when targeting AMDGCN-flavoured SPIRV.

Added: 


Modified: 
clang/lib/CodeGen/Targets/SPIR.cpp
clang/test/CodeGen/logb_scalbn.c

Removed: 




diff  --git a/clang/lib/CodeGen/Targets/SPIR.cpp 
b/clang/lib/CodeGen/Targets/SPIR.cpp
index afa23bffcd073..be9a5e60af358 100644
--- a/clang/lib/CodeGen/Targets/SPIR.cpp
+++ b/clang/lib/CodeGen/Targets/SPIR.cpp
@@ -75,6 +75,10 @@ class SPIRVTargetCodeGenInfo : public 
CommonSPIRTargetCodeGenInfo {
  SyncScope Scope,
  llvm::AtomicOrdering Ordering,
  llvm::LLVMContext &Ctx) const 
override;
+  bool supportsLibCall() const override {
+return getABIInfo().getTarget().getTriple().getVendor() !=
+   llvm::Triple::AMD;
+  }
 };
 
 inline StringRef mapClangSyncScopeToLLVM(SyncScope Scope) {

diff  --git a/clang/test/CodeGen/logb_scalbn.c 
b/clang/test/CodeGen/logb_scalbn.c
index be5e68b5fd4b0..52c52bcb292be 100644
--- a/clang/test/CodeGen/logb_scalbn.c
+++ b/clang/test/CodeGen/logb_scalbn.c
@@ -4,6 +4,11 @@
 // RUN: %clang -cc1 -triple amdgcn-amd-amdhsa -o - 
-ffp-exception-behavior=strict -emit-llvm %s | FileCheck %s 
-check-prefixes=STRICT
 // RUN: %clang -cc1 -triple amdgcn-amd-amdhsa -o - 
-ffp-exception-behavior=maytrap -emit-llvm %s | FileCheck %s 
-check-prefixes=MAYTRAP
 // RUN: %clang -cc1 -triple amdgcn-amd-amdhsa -o - -fmath-errno -emit-llvm %s 
| FileCheck %s -check-prefixes=ERRNO
+// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -emit-llvm %s | FileCheck 
%s -check-prefixes=AMDGCNSPIRV-DEFAULT
+// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - 
-ffp-exception-behavior=ignore -emit-llvm %s | FileCheck %s 
-check-prefixes=AMDGCNSPIRV-IGNORE
+// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - 
-ffp-exception-behavior=strict -emit-llvm %s | FileCheck %s 
-check-prefixes=AMDGCNSPIRV-STRICT
+// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - 
-ffp-exception-behavior=maytrap -emit-llvm %s | FileCheck %s 
-check-prefixes=AMDGCNSPIRV-MAYTRAP
+// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -fmath-errno -emit-llvm %s 
| FileCheck %s -check-prefixes=AMDGCNSPIRV-ERRNO
 
 // DEFAULT-LABEL: define dso_local void @test_logbf(
 // DEFAULT-SAME: ) #[[ATTR0:[0-9]+]] {
@@ -78,6 +83,79 @@
 // ERRNO-NEXT:store float [[CALL]], ptr [[D1_ASCAST]], align 4
 // ERRNO-NEXT:ret void
 //
+// AMDGCNSPIRV-DEFAULT-LABEL: define spir_func void @test_logbf(
+// AMDGCNSPIRV-DEFAULT-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] {
+// AMDGCNSPIRV-DEFAULT-NEXT:  [[ENTRY:.*:]]
+// AMDGCNSPIRV-DEFAULT-NEXT:[[D1:%.*]] = alloca float, align 4
+// AMDGCNSPIRV-DEFAULT-NEXT:[[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] 
to ptr addrspace(4)
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP0:%.*]] = call addrspace(4) { float, i32 
} @llvm.frexp.f32.i32(float 0x40301999A000)
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP1:%.*]] = extractvalue { float, i32 } 
[[TMP0]], 1
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP2:%.*]] = add nsw i32 [[TMP1]], -1
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP4:%.*]] = call addrspace(4) float 
@llvm.fabs.f32(float 0x40301999A000)
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP5:%.*]] = fcmp one float [[TMP4]], 
0x7FF0
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP6:%.*]] = select i1 [[TMP5]], float 
[[TMP3]], float [[TMP4]]
+// AMDGCNSPIRV-DEFAULT-NEXT:[[TMP7:%.*]] = select i1 false, float 
0xFFF0, float [[TMP6]]
+// AMDGCNSPIRV-DEFAULT-NEXT:store float [[TMP7]], ptr addrspace(4) 
[[D1_ASCAST]], align 4
+// AMDGCNSPIRV-DEFAULT-NEXT:ret void
+//
+// AMDGCNSPIRV-IGNORE-LABEL: define spir_func void @test_logbf(
+// AMDGCNSPIRV-IGNORE-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] {
+// AMDGCNSPIRV-IGNORE-NEXT:  [[ENTRY:.*:]]
+// AMDGCNSPIRV-IGNORE-NEXT:[[D1:%.*]] = alloca float, align 4
+// AMDGCNSPIRV-IGNORE-NEXT:[[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to 
ptr addrspace(4)
+// AMDGCNSPIRV-IGNORE-NEXT:[[TMP0:%.*]] = call addrspace(4) { float, i32 } 
@llvm.frexp.f32.i32(float 0x40301999

[clang] [Serialization] Remove delta encoding optimization (PR #145670)

[Haojian Wu via cfe-commits]

https://github.com/hokein updated 
https://github.com/llvm/llvm-project/pull/145670

>From d2cac7f56f5adf2ddfe084e684562a56f5c5dc65 Mon Sep 17 00:00:00 2001
From: Haojian Wu 
Date: Wed, 25 Jun 2025 12:30:18 +0200
Subject: [PATCH 1/2] [Serialization] Remove delta encoding.

---
 clang/include/clang/Serialization/ASTReader.h |  20 ++-
 .../clang/Serialization/ASTRecordReader.h |  11 +-
 .../clang/Serialization/ASTRecordWriter.h |  11 +-
 clang/include/clang/Serialization/ASTWriter.h |  10 +-
 .../Serialization/SourceLocationEncoding.h| 114 +-
 clang/lib/Serialization/ASTReader.cpp |  28 ++---
 clang/lib/Serialization/ASTWriter.cpp |  40 +++---
 .../SourceLocationEncodingTest.cpp|  57 -
 8 files changed, 53 insertions(+), 238 deletions(-)

diff --git a/clang/include/clang/Serialization/ASTReader.h 
b/clang/include/clang/Serialization/ASTReader.h
index 7a4b7d21bb20e..7d4b4467eb97d 100644
--- a/clang/include/clang/Serialization/ASTReader.h
+++ b/clang/include/clang/Serialization/ASTReader.h
@@ -464,8 +464,6 @@ class ASTReader
   using ModuleReverseIterator = ModuleManager::ModuleReverseIterator;
 
 private:
-  using LocSeq = SourceLocationSequence;
-
   /// The receiver of some callbacks invoked by ASTReader.
   std::unique_ptr Listener;
 
@@ -2445,18 +2443,16 @@ class ASTReader
   /// Read a source location from raw form and return it in its
   /// originating module file's source location space.
   std::pair
-  ReadUntranslatedSourceLocation(RawLocEncoding Raw,
- LocSeq *Seq = nullptr) const {
-return SourceLocationEncoding::decode(Raw, Seq);
+  ReadUntranslatedSourceLocation(RawLocEncoding Raw) const {
+return SourceLocationEncoding::decode(Raw);
   }
 
   /// Read a source location from raw form.
-  SourceLocation ReadSourceLocation(ModuleFile &MF, RawLocEncoding Raw,
-LocSeq *Seq = nullptr) const {
+  SourceLocation ReadSourceLocation(ModuleFile &MF, RawLocEncoding Raw) const {
 if (!MF.ModuleOffsetMap.empty())
   ReadModuleOffsetMap(MF);
 
-auto [Loc, ModuleFileIndex] = ReadUntranslatedSourceLocation(Raw, Seq);
+auto [Loc, ModuleFileIndex] = ReadUntranslatedSourceLocation(Raw);
 ModuleFile *OwningModuleFile =
 ModuleFileIndex == 0 ? &MF : MF.TransitiveImports[ModuleFileIndex - 1];
 
@@ -2484,9 +2480,9 @@ class ASTReader
 
   /// Read a source location.
   SourceLocation ReadSourceLocation(ModuleFile &ModuleFile,
-const RecordDataImpl &Record, unsigned 
&Idx,
-LocSeq *Seq = nullptr) {
-return ReadSourceLocation(ModuleFile, Record[Idx++], Seq);
+const RecordDataImpl &Record,
+unsigned &Idx) {
+return ReadSourceLocation(ModuleFile, Record[Idx++]);
   }
 
   /// Read a FileID.
@@ -2505,7 +2501,7 @@ class ASTReader
 
   /// Read a source range.
   SourceRange ReadSourceRange(ModuleFile &F, const RecordData &Record,
-  unsigned &Idx, LocSeq *Seq = nullptr);
+  unsigned &Idx);
 
   static llvm::BitVector ReadBitVector(const RecordData &Record,
const StringRef Blob);
diff --git a/clang/include/clang/Serialization/ASTRecordReader.h 
b/clang/include/clang/Serialization/ASTRecordReader.h
index da3f504ff27df..1472497ff5e7e 100644
--- a/clang/include/clang/Serialization/ASTRecordReader.h
+++ b/clang/include/clang/Serialization/ASTRecordReader.h
@@ -32,7 +32,6 @@ class OMPChildren;
 class ASTRecordReader
 : public serialization::DataStreamBasicReader {
   using ModuleFile = serialization::ModuleFile;
-  using LocSeq = SourceLocationSequence;
 
   ASTReader *Reader;
   ModuleFile *F;
@@ -160,7 +159,7 @@ class ASTRecordReader
   TypeSourceInfo *readTypeSourceInfo();
 
   /// Reads the location information for a type.
-  void readTypeLoc(TypeLoc TL, LocSeq *Seq = nullptr);
+  void readTypeLoc(TypeLoc TL);
 
   /// Map a local type ID within a given AST file to a global type ID.
   serialization::TypeID getGlobalTypeID(serialization::TypeID LocalID) const {
@@ -287,13 +286,13 @@ class ASTRecordReader
   void readOpenACCRoutineDeclAttr(OpenACCRoutineDeclAttr *A);
 
   /// Read a source location, advancing Idx.
-  SourceLocation readSourceLocation(LocSeq *Seq = nullptr) {
-return Reader->ReadSourceLocation(*F, Record, Idx, Seq);
+  SourceLocation readSourceLocation() {
+return Reader->ReadSourceLocation(*F, Record, Idx);
   }
 
   /// Read a source range, advancing Idx.
-  SourceRange readSourceRange(LocSeq *Seq = nullptr) {
-return Reader->ReadSourceRange(*F, Record, Idx, Seq);
+  SourceRange readSourceRange() {
+return Reader->ReadSourceRange(*F, Record, Idx);
   }
 
   /// Read an arbitrary constant value, advancing Idx.
diff --git a/clang/include/clang/Serialization/ASTRecordWriter.h 
b/clang

[libclc] [libclc] Avoid out-of-range float-to-int. (PR #145698)

[Harald van Dijk via cfe-commits]

https://github.com/hvdijk created 
https://github.com/llvm/llvm-project/pull/145698

For a kernel such as

  kernel void foo(__global double3 *z) {
double3 x = {0.6631661088,0.6612268107,0.1513627528};
int3 y = {-1980459213,-660855407,615708204};
*z = pown(x, y);
  }

we were not storing anything to z, because the implementation of pown relied on 
an floating-point-to-integer conversion where the floating-point value was 
outside of the integer's range. Although in LLVM IR we permit that operation so 
long as we end up ignoring its result -- that is the general rule for poison -- 
one thing we are not permitted to do is have conditional branches that depend 
on it, and through the call to __clc_ldexp, we did have that.

To fix this, rather than changing expv at the end to INFINITY/0, we can change 
v at the start to values that we know will produce INFINITY/0 without 
performing such out-of-range conversions.

Tested with

  clang --target=nvptx64 -S -O3 -o - test.cl \
-Xclang -mlink-builtin-bitcode \
-Xclang runtimes/runtimes-bins/libclc/nvptx64--.bc

A grep showed that this exact same code existed in three more places, so I 
changed it there too, though I did not do a broader search for other similar 
code that potentially has the same problem.

>From 6e37101f93b285d6f0c5313d4367089daeb7097f Mon Sep 17 00:00:00 2001
From: Harald van Dijk 
Date: Wed, 25 Jun 2025 14:22:15 +0100
Subject: [PATCH] [libclc] Avoid out-of-range float-to-int.

For a kernel such as

  kernel void foo(__global double3 *z) {
double3 x = {0.6631661088,0.6612268107,0.1513627528};
int3 y = {-1980459213,-660855407,615708204};
*z = pown(x, y);
  }

we were not storing anything to z, because the implementation of pown
relied on an floating-point-to-integer conversion where the
floating-point value was outside of the integer's range. Although in
LLVM IR we permit that operation so long as we end up ignoring its
result -- that is the general rule for poison -- one thing we are not
permitted to do is have conditional branches that depend on it, and
through the call to __clc_ldexp, we did have that.

To fix this, rather than changing expv at the end to INFINITY/0, we can
change v at the start to values that we know will produce INFINITY/0
without performing such out-of-range conversions.

Tested with

  clang --target=nvptx64 -S -O3 -o - test.cl \
-Xclang -mlink-builtin-bitcode \
-Xclang runtimes/runtimes-bins/libclc/nvptx64--.bc

A grep showed that this exact same code existed in three more places, so
I changed it there too, though I did not do a broader search for other
similar code that potentially has the same problem.
---
 libclc/clc/lib/generic/math/clc_pow.inc   | 13 +
 libclc/clc/lib/generic/math/clc_pown.inc  | 13 +
 libclc/clc/lib/generic/math/clc_powr.inc  | 13 +
 libclc/clc/lib/generic/math/clc_rootn.inc | 13 +
 4 files changed, 36 insertions(+), 16 deletions(-)

diff --git a/libclc/clc/lib/generic/math/clc_pow.inc 
b/libclc/clc/lib/generic/math/clc_pow.inc
index 98e154984aaa3..8b1f820268ba0 100644
--- a/libclc/clc/lib/generic/math/clc_pow.inc
+++ b/libclc/clc/lib/generic/math/clc_pow.inc
@@ -330,6 +330,15 @@ _CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE 
__clc_pow(__CLC_GENTYPE x,
 const __CLC_GENTYPE lnof2_by_64_head = 0.010830424260348081;
 const __CLC_GENTYPE lnof2_by_64_tail = -4.359010638708991e-10;
 
+// If v is so large that we need to return INFINITY, or so small that we
+// need to return 0, set v to known values that will produce that result. 
Do
+// not try to continue the computation with the original v and patch it up
+// afterwards because v may be so large that temp is out of range of int, 
in
+// which case that conversion, and a value based on that conversion being
+// passed to __clc_ldexp, results in undefined behavior.
+v = v > max_exp_arg ? 1000.0 : v;
+v = v < min_exp_arg ? -1000.0 : v;
+
 __CLC_GENTYPE temp = v * sixtyfour_by_lnof2;
 __CLC_INTN n = __CLC_CONVERT_INTN(temp);
 __CLC_GENTYPE dn = __CLC_CONVERT_GENTYPE(n);
@@ -357,10 +366,6 @@ _CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE 
__clc_pow(__CLC_GENTYPE x,
 
 expv = __clc_fma(f, q, f2) + f1;
 expv = __clc_ldexp(expv, m);
-
-expv = v > max_exp_arg ? 
__CLC_AS_GENTYPE((__CLC_ULONGN)0x7FF0L)
-   : expv;
-expv = v < min_exp_arg ? 0.0 : expv;
   }
 
   // See whether y is an integer.
diff --git a/libclc/clc/lib/generic/math/clc_pown.inc 
b/libclc/clc/lib/generic/math/clc_pown.inc
index 8bdc407e9ac82..483fd2faf2717 100644
--- a/libclc/clc/lib/generic/math/clc_pown.inc
+++ b/libclc/clc/lib/generic/math/clc_pown.inc
@@ -317,6 +317,15 @@ _CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE 
__clc_pown(__CLC_GENTYPE x,
 const __CLC_GENTYPE lnof2_by_64_head = 0.010830424260348081;
 const __CLC_GENTYPE lnof2_by_64_tail = -4.359010638708991e-10;
 
+// If v is so large that we need to return INFIN

[clang] [Clang] Implement diagnostics for why `std::is_standard_layout` is false (PR #144161)

[Samarth Narang via cfe-commits]

@@ -2285,6 +2286,139 @@ static void DiagnoseNonTriviallyCopyableReason(Sema 
&SemaRef,
   SemaRef.Diag(D->getLocation(), diag::note_defined_here) << D;
 }
 
+static bool hasMultipleDataBaseClassesWithFields(const CXXRecordDecl *D) {
+  int NumBasesWithFields = 0;
+  for (const CXXBaseSpecifier &Base : D->bases()) {
+const CXXRecordDecl *BaseRD = Base.getType()->getAsCXXRecordDecl();
+if (!BaseRD || BaseRD->isInvalidDecl())
+  continue;
+
+for (const FieldDecl *Field : BaseRD->fields()) {
+  if (!Field->isUnnamedBitField()) {
+if (++NumBasesWithFields > 1)
+  return true; // found more than one base class with fields
+break; // no need to check further fields in this base class
+  }
+}
+  }
+  return false;
+}
+
+static void DiagnoseNonStandardLayoutReason(Sema &SemaRef, SourceLocation Loc,
+const CXXRecordDecl *D) {
+  for (const CXXBaseSpecifier &B : D->bases()) {
+assert(B.getType()->getAsCXXRecordDecl() && "invalid base?");
+if (B.isVirtual()) {
+  SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::VBase << B.getType()
+  << B.getSourceRange();
+}
+if (!B.getType()->isStandardLayoutType()) {
+  SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::NonStandardLayoutBase << 
B.getType()
+  << B.getSourceRange();
+}
+  }
+  // Check for mixed access specifiers in fields.
+  const FieldDecl *FirstField = nullptr;
+  AccessSpecifier FirstAccess = AS_none;
+
+  for (const FieldDecl *Field : D->fields()) {
+if (Field->isUnnamedBitField())
+  continue;
+
+// Record the first field we see
+if (!FirstField) {
+  FirstField = Field;
+  FirstAccess = Field->getAccess();
+  continue;
+}
+
+// Check if the field has a different access specifier than the first one.
+if (Field->getAccess() != FirstAccess) {
+  // Emit a diagnostic about mixed access specifiers.
+  SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::MixedAccess;
+
+  SemaRef.Diag(FirstField->getLocation(), diag::note_defined_here)
+  << FirstField;
+
+  SemaRef.Diag(Field->getLocation(), diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::MixedAccessField << Field
+  << FirstField;
+
+  // No need to check further fields, as we already found mixed access.
+  return;

snarang181 wrote:

You are correct, this should be a `break`. 

https://github.com/llvm/llvm-project/pull/144161
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-c] introduce queries on GCC-style inline assembly statements (PR #143424)

[Aaron Ballman via cfe-commits]

https://github.com/AaronBallman approved this pull request.

LGTM! The precommit CI failures appear to be unrelated.

https://github.com/llvm/llvm-project/pull/143424
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Implement diagnostics for why `std::is_standard_layout` is false (PR #144161)

[Samarth Narang via cfe-commits]

https://github.com/snarang181 updated 
https://github.com/llvm/llvm-project/pull/144161

>From 7f11d3392e3f3ead823c8af2ea9a3b1f9ef9e0c9 Mon Sep 17 00:00:00 2001
From: Samarth Narang 
Date: Fri, 13 Jun 2025 23:22:18 +0200
Subject: [PATCH 1/9] Implement diagnostics for why `std::is_standard_layout`
 is false

---
 .../clang/Basic/DiagnosticSemaKinds.td|   9 +-
 clang/lib/Sema/SemaTypeTraits.cpp | 132 ++
 .../type-traits-unsatisfied-diags-std.cpp |  50 +++
 .../SemaCXX/type-traits-unsatisfied-diags.cpp |  80 +++
 4 files changed, 270 insertions(+), 1 deletion(-)

diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 9392cbb39c021..232e1b94ee1da 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -1767,7 +1767,8 @@ def note_unsatisfied_trait
 : Note<"%0 is not %enum_select{"
"%TriviallyRelocatable{trivially relocatable}|"
"%Replaceable{replaceable}|"
-   "%TriviallyCopyable{trivially copyable}"
+   "%TriviallyCopyable{trivially copyable}|"
+   "%StandardLayout{standard-layout}"
"}1">;
 
 def note_unsatisfied_trait_reason
@@ -1787,6 +1788,12 @@ def note_unsatisfied_trait_reason
"%NonReplaceableField{has a non-replaceable member %1 of type %2}|"
"%NTCBase{has a non-trivially-copyable base %1}|"
"%NTCField{has a non-trivially-copyable member %1 of type %2}|"
+   "%NonStdLayoutBase{has a non-standard-layout base %1}|"
+   "%MixedAccess{has mixed access specifiers}|"
+   "%MultipleDataBase{has multiple base classes with data members}|"
+   "%VirtualFunction{has virtual functions}|"
+   "%NonStdLayoutMember{has a non-standard-layout member %1 of type 
%2}|"
+   "%IndirectBaseWithFields{has an indirect base %1 with data 
members}|"
"%DeletedDtr{has a %select{deleted|user-provided}1 destructor}|"
"%UserProvidedCtr{has a user provided %select{copy|move}1 "
"constructor}|"
diff --git a/clang/lib/Sema/SemaTypeTraits.cpp 
b/clang/lib/Sema/SemaTypeTraits.cpp
index 4dbb2450857e0..9e34ea2fd5184 100644
--- a/clang/lib/Sema/SemaTypeTraits.cpp
+++ b/clang/lib/Sema/SemaTypeTraits.cpp
@@ -1956,6 +1956,7 @@ static std::optional 
StdNameToTypeTrait(StringRef Name) {
 TypeTrait::UTT_IsCppTriviallyRelocatable)
   .Case("is_replaceable", TypeTrait::UTT_IsReplaceable)
   .Case("is_trivially_copyable", TypeTrait::UTT_IsTriviallyCopyable)
+  .Case("is_standard_layout", TypeTrait::UTT_IsStandardLayout)
   .Default(std::nullopt);
 }
 
@@ -2285,6 +2286,134 @@ static void DiagnoseNonTriviallyCopyableReason(Sema 
&SemaRef,
   SemaRef.Diag(D->getLocation(), diag::note_defined_here) << D;
 }
 
+static bool hasMixedAccessSpecifier(const CXXRecordDecl *D) {
+  AccessSpecifier FirstAccess = AS_none;
+  for (const FieldDecl *Field : D->fields()) {
+
+if (Field->isUnnamedBitField())
+  continue;
+AccessSpecifier FieldAccess = Field->getAccess();
+if (FirstAccess == AS_none) {
+  FirstAccess = FieldAccess;
+} else if (FieldAccess != FirstAccess) {
+  return true;
+}
+  }
+  return false;
+}
+
+static bool hasMultipleDataBaseClassesWithFields(const CXXRecordDecl *D) {
+  int NumBasesWithFields = 0;
+  for (const CXXBaseSpecifier &Base : D->bases()) {
+const CXXRecordDecl *BaseRD = Base.getType()->getAsCXXRecordDecl();
+if (!BaseRD || BaseRD->isInvalidDecl())
+  continue;
+
+for (const FieldDecl *Field : BaseRD->fields()) {
+  if (!Field->isUnnamedBitField()) {
+++NumBasesWithFields;
+break; // Only count the base once.
+  }
+}
+  }
+  return NumBasesWithFields > 1;
+}
+
+static void DiagnoseNonStandardLayoutReason(Sema &SemaRef, SourceLocation Loc,
+const CXXRecordDecl *D) {
+  for (const CXXBaseSpecifier &B : D->bases()) {
+assert(B.getType()->getAsCXXRecordDecl() && "invalid base?");
+if (B.isVirtual()) {
+  SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::VBase << B.getType()
+  << B.getSourceRange();
+}
+if (!B.getType()->isStandardLayoutType()) {
+  SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::NonStdLayoutBase << B.getType()
+  << B.getSourceRange();
+}
+  }
+  if (hasMixedAccessSpecifier(D)) {
+SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+<< diag::TraitNotSatisfiedReason::MixedAccess;
+  }
+  if (hasMultipleDataBaseClassesWithFields(D)) {
+SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+<< diag::TraitNotSatisfiedReason::MultipleDataBase;
+  }
+  if (D->isPolymorphic()) {
+SemaRef.Diag(Loc, diag::note_unsatisfied_trait_reason)
+<< diag:

[clang] [Clang][Driver] Warn on complex number range incompatibility with GCC (PR #144468)

[Aaron Ballman via cfe-commits]

@@ -520,6 +520,9 @@ def warn_drv_math_errno_enabled_after_veclib: Warning<
   "math errno enabled by '%0' after it was implicitly disabled by '%1',"
   " this may limit the utilization of the vector library">,
   InGroup;
+def warn_drv_gcc_incompatible_complex_range_override: Warning<
+  "combination of '%0' and '%1' results in complex number calculations 
incompatible with GCC">,

AaronBallman wrote:

> Does this mean that if we are going to emit both -Woverriding-option and 
> -Wgcc-compat warnings, the warning messages should be combined into one?

Yeah, I would combine it into one under the `-Woverriding-option` and use a 
`%select` so that the GCC compatibility parts are optionally emitted.

> If there is a way to determine whether the -Woverriding-option option is 
> specified during driver processing

IIRC, you can do that by adding an explicit compiler option for it, like:
https://github.com/llvm/llvm-project/blob/31bf9348fa10fc95c4a86ef81485652152bf9906/clang/include/clang/Driver/Options.td#L896C5-L896C17
https://github.com/llvm/llvm-project/blob/31bf9348fa10fc95c4a86ef81485652152bf9906/clang/lib/Driver/ToolChains/Clang.cpp#L6455



https://github.com/llvm/llvm-project/pull/144468
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)

[Steven Perron via cfe-commits]

https://github.com/s-perron updated 
https://github.com/llvm/llvm-project/pull/144774

>From 7d3d8bb30863dd860183f7b9635aa34b72a9c3ae Mon Sep 17 00:00:00 2001
From: Steven Perron 
Date: Wed, 18 Jun 2025 09:19:45 -0400
Subject: [PATCH 1/3] [HLSL][SPRIV] Handle sign RWBuffer correctly
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

In Vulkan, the signedness of the accesses to images has to match the
signedness of the backing image.

See
https://docs.vulkan.org/spec/latest/chapters/textures.html#textures-input,
where it says the behaviour is undefined if

> the signedness of any read or sample operation does not match the signedness 
> of the image’s format.

Users who define say an `RWBuffer` will create a Vulkan image with
a signed integer format. So the HLSL that is generated must match that
expecation.

The solution we use is to generate a `spirv.SignedImage` target type for
signed integer instead of `spirv.Image`. The two types are otherwise the
same.

The backend will add the `signExtend` image operand to access to the
image to ensure the image is access as a signed image.

Fixes #144580

---
 clang/lib/CodeGen/Targets/SPIR.cpp|  28 ++--
 .../builtins/RWBuffer-elementtype.hlsl|  10 +-
 .../builtins/RWBuffer-subscript.hlsl  |   8 +-
 llvm/docs/SPIRVUsage.rst  |   7 +
 llvm/lib/IR/Type.cpp  |   2 +-
 llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp   |  38 +
 llvm/lib/Target/SPIRV/SPIRVBuiltins.td|   1 +
 llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp |   3 +-
 llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp |  34 +
 llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h   |  15 +-
 .../Target/SPIRV/SPIRVInstructionSelector.cpp |  61 +---
 .../hlsl-resources/SignedBufferLoadStore.ll   | 137 ++
 .../hlsl-resources/UnsignedBufferLoadStore.ll | 137 ++
 offload-test-suite|   1 +
 14 files changed, 403 insertions(+), 79 deletions(-)
 create mode 100644 
llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
 create mode 100644 
llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
 create mode 16 offload-test-suite

diff --git a/clang/lib/CodeGen/Targets/SPIR.cpp 
b/clang/lib/CodeGen/Targets/SPIR.cpp
index 2f1e43cdc8cc3..ebbf8ac0a6752 100644
--- a/clang/lib/CodeGen/Targets/SPIR.cpp
+++ b/clang/lib/CodeGen/Targets/SPIR.cpp
@@ -58,7 +58,7 @@ class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
   const SmallVector *Packoffsets = nullptr) const 
override;
   llvm::Type *getSPIRVImageTypeFromHLSLResource(
   const HLSLAttributedResourceType::Attributes &attributes,
-  llvm::Type *ElementType, llvm::LLVMContext &Ctx) const;
+  QualType SampledType, CodeGenModule &CGM) const;
   void
   setOCLKernelStubCallingConvention(const FunctionType *&FT) const override;
 };
@@ -483,12 +483,12 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(
 assert(!ResAttrs.IsROV &&
"Rasterizer order views not implemented for SPIR-V yet");
 
-llvm::Type *ElemType = CGM.getTypes().ConvertType(ContainedTy);
 if (!ResAttrs.RawBuffer) {
   // convert element type
-  return getSPIRVImageTypeFromHLSLResource(ResAttrs, ElemType, Ctx);
+  return getSPIRVImageTypeFromHLSLResource(ResAttrs, ContainedTy, CGM);
 }
 
+llvm::Type *ElemType = CGM.getTypes().ConvertType(ContainedTy);
 llvm::ArrayType *RuntimeArrayType = llvm::ArrayType::get(ElemType, 0);
 uint32_t StorageClass = /* StorageBuffer storage class */ 12;
 bool IsWritable = ResAttrs.ResourceClass == llvm::dxil::ResourceClass::UAV;
@@ -516,13 +516,18 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType(
 }
 
 llvm::Type *CommonSPIRTargetCodeGenInfo::getSPIRVImageTypeFromHLSLResource(
-const HLSLAttributedResourceType::Attributes &attributes,
-llvm::Type *ElementType, llvm::LLVMContext &Ctx) const {
+const HLSLAttributedResourceType::Attributes &attributes, QualType Ty,
+CodeGenModule &CGM) const {
+  llvm::LLVMContext &Ctx = CGM.getLLVMContext();
 
-  if (ElementType->isVectorTy())
-ElementType = ElementType->getScalarType();
+  Ty = Ty->getCanonicalTypeUnqualified();
+  if (const VectorType *V = dyn_cast(Ty))
+Ty = V->getElementType();
+  assert(!Ty->isVectorType() && "We still have a vector type.");
 
-  assert((ElementType->isIntegerTy() || ElementType->isFloatingPointTy()) &&
+  llvm::Type *SampledType = CGM.getTypes().ConvertType(Ty);
+
+  assert((SampledType->isIntegerTy() || SampledType->isFloatingPointTy()) &&
  "The element type for a SPIR-V resource must be a scalar integer or "
  "floating point type.");
 
@@ -531,6 +536,9 @@ llvm::Type 
*CommonSPIRTargetCodeGenInfo::getSPIRVImageTypeFromHLSLResource(
   // https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpTypeImage.
   SmallVector IntParams(6, 0);
 
+  const char *Name =
+  Ty->is

[clang] [llvm] Triple: Forward declare Twine and remove include (PR #145685)

[via cfe-commits]

llvmbot wrote:



@llvm/pr-subscribers-llvm-binary-utilities

@llvm/pr-subscribers-clang

Author: Matt Arsenault (arsenm)


Changes

It turns out real Twine usage is scarce, and seems to only
be used from clang. Add a few overloads for the common cases,
and introduce a string&& case as the base case.

---
Full diff: https://github.com/llvm/llvm-project/pull/145685.diff


14 Files Affected:

- (modified) clang/lib/Lex/PPMacroExpansion.cpp (+6-13) 
- (modified) llvm/include/llvm/TargetParser/Triple.h (+7-1) 
- (modified) llvm/lib/AsmParser/LLParser.cpp (+1-1) 
- (modified) llvm/lib/Bitcode/Reader/BitcodeReader.cpp (+1-1) 
- (modified) llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp (+1-1) 
- (modified) llvm/lib/MC/MCDisassembler/Disassembler.h (+1-1) 
- (modified) llvm/lib/MC/MCSectionELF.cpp (+1) 
- (modified) llvm/lib/MC/MCSubtargetInfo.cpp (+1) 
- (modified) llvm/lib/Object/ArchiveWriter.cpp (+2-2) 
- (modified) llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h (+1) 
- (modified) llvm/lib/TargetParser/CSKYTargetParser.cpp (+1) 
- (modified) llvm/lib/TargetParser/LoongArchTargetParser.cpp (+1) 
- (modified) llvm/lib/TargetParser/Triple.cpp (+3-1) 
- (modified) llvm/lib/TargetParser/Unix/Host.inc (+1-1) 


``diff
diff --git a/clang/lib/Lex/PPMacroExpansion.cpp 
b/clang/lib/Lex/PPMacroExpansion.cpp
index 709cf3bb87c8e..614e8aec3db24 100644
--- a/clang/lib/Lex/PPMacroExpansion.cpp
+++ b/clang/lib/Lex/PPMacroExpansion.cpp
@@ -1464,8 +1464,7 @@ static IdentifierInfo *ExpectFeatureIdentifierInfo(Token 
&Tok,
 
 /// Implements the __is_target_arch builtin macro.
 static bool isTargetArch(const TargetInfo &TI, const IdentifierInfo *II) {
-  std::string ArchName = II->getName().lower() + "--";
-  llvm::Triple Arch(ArchName);
+  llvm::Triple Arch(II->getName().lower() + "--");
   const llvm::Triple &TT = TI.getTriple();
   if (TT.isThumb()) {
 // arm matches thumb or thumbv7. armv7 matches thumbv7.
@@ -1494,9 +1493,7 @@ static bool isTargetVendor(const TargetInfo &TI, const 
IdentifierInfo *II) {
 
 /// Implements the __is_target_os builtin macro.
 static bool isTargetOS(const TargetInfo &TI, const IdentifierInfo *II) {
-  std::string OSName =
-  (llvm::Twine("unknown-unknown-") + II->getName().lower()).str();
-  llvm::Triple OS(OSName);
+  llvm::Triple OS(llvm::Twine("unknown-unknown-") + II->getName().lower());
   if (OS.getOS() == llvm::Triple::Darwin) {
 // Darwin matches macos, ios, etc.
 return TI.getTriple().isOSDarwin();
@@ -1507,12 +1504,11 @@ static bool isTargetOS(const TargetInfo &TI, const 
IdentifierInfo *II) {
 /// Implements the __is_target_environment builtin macro.
 static bool isTargetEnvironment(const TargetInfo &TI,
 const IdentifierInfo *II) {
-  std::string EnvName = (llvm::Twine("---") + II->getName().lower()).str();
-  llvm::Triple Env(EnvName);
+  llvm::Triple Env(llvm::Twine("---") + II->getName().lower());
   // The unknown environment is matched only if
   // '__is_target_environment(unknown)' is used.
   if (Env.getEnvironment() == llvm::Triple::UnknownEnvironment &&
-  EnvName != "---unknown")
+  Env.getEnvironmentName() != "unknown")
 return false;
   return TI.getTriple().getEnvironment() == Env.getEnvironment();
 }
@@ -1524,9 +1520,7 @@ static bool isTargetVariantOS(const TargetInfo &TI, const 
IdentifierInfo *II) {
 if (!VariantTriple)
   return false;
 
-std::string OSName =
-(llvm::Twine("unknown-unknown-") + II->getName().lower()).str();
-llvm::Triple OS(OSName);
+llvm::Triple OS(llvm::Twine("unknown-unknown-") + II->getName().lower());
 if (OS.getOS() == llvm::Triple::Darwin) {
   // Darwin matches macos, ios, etc.
   return VariantTriple->isOSDarwin();
@@ -1543,8 +1537,7 @@ static bool isTargetVariantEnvironment(const TargetInfo 
&TI,
 const llvm::Triple *VariantTriple = TI.getDarwinTargetVariantTriple();
 if (!VariantTriple)
   return false;
-std::string EnvName = (llvm::Twine("---") + II->getName().lower()).str();
-llvm::Triple Env(EnvName);
+llvm::Triple Env(llvm::Twine("---") + II->getName().lower());
 return VariantTriple->getEnvironment() == Env.getEnvironment();
   }
   return false;
diff --git a/llvm/include/llvm/TargetParser/Triple.h 
b/llvm/include/llvm/TargetParser/Triple.h
index 1865be6e95dea..96ee993a57fbc 100644
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -9,7 +9,7 @@
 #ifndef LLVM_TARGETPARSER_TRIPLE_H
 #define LLVM_TARGETPARSER_TRIPLE_H
 
-#include "llvm/ADT/Twine.h"
+#include "llvm/ADT/StringRef.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/VersionTuple.h"
 
@@ -20,6 +20,7 @@
 #undef sparc
 
 namespace llvm {
+class Twine;
 
 /// Triple - Helper class for working with autoconf configuration names. For
 /// historical reasons, we also call these 'triples' (they used to contain
@@ -349,7 +350,12 @@ class Triple {
   /// triple fields unknown.
   Triple() = default;
 
+  L

[clang] [clang][dataflow] Expose simple access to child StorageLocation presence. (PR #145520)

[Samira Bakon via cfe-commits]

bazuzi wrote:

No underlying bug, but I was able to simplify my approach out-of-tree and avoid 
exposing this function that doesn't capture the intended semantics.

I'll revert this.

https://github.com/llvm/llvm-project/pull/145520
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (PR #145696)

[Paul Walker via cfe-commits]

https://github.com/paulwalker-arm created 
https://github.com/llvm/llvm-project/pull/145696

Adds sve-sha3 to reference FEAT_SVE_SHA3 without specifically enabling SVE2. 
The SVE2 requirement for AES, SHA3 and Bitperm is replaced with SVE for 
non-streaming function.

>From 565d4f767f2abee3d62690016098360b2eb02d75 Mon Sep 17 00:00:00 2001
From: Paul Walker 
Date: Tue, 24 Jun 2025 14:46:07 +0100
Subject: [PATCH] [LLVM][AArch64] Relax SVE/SME codegen predicates for crypto
 and bitperm.

Adds sve-sha3 to reference FEAT_SVE_SHA3 without specifically enabling
SVE2. The SVE2 requirement for AES, SHA3 and Bitperm is replaced with
SVE for non-streaming function.
---
 clang/test/CodeGen/AArch64/fmv-dependencies.c |  2 +-
 .../Driver/aarch64-implied-sve-features.c |  4 +--
 .../aarch64-fujitsu-monaka.c  |  2 +-
 .../print-enabled-extensions/aarch64-grace.c  |  2 +-
 .../aarch64-olympus.c |  2 +-
 .../print-supported-extensions-aarch64.c  |  3 +-
 llvm/lib/Target/AArch64/AArch64.td|  6 ++--
 llvm/lib/Target/AArch64/AArch64Features.td|  7 +++--
 llvm/lib/Target/AArch64/AArch64InstrInfo.td   | 29 +++
 llvm/lib/Target/AArch64/AArch64Processors.td  |  6 ++--
 .../lib/Target/AArch64/AArch64SVEInstrInfo.td | 10 +++
 .../AArch64/AsmParser/AArch64AsmParser.cpp|  3 +-
 llvm/lib/TargetParser/AArch64TargetParser.cpp |  7 +
 .../sve2-intrinsics-bit-permutation.ll|  5 +++-
 .../CodeGen/AArch64/sve2-intrinsics-crypto.ll |  4 ++-
 .../CodeGen/AArch64/sve2-intrinsics-rax1.ll   |  2 ++
 .../directive-arch_extension-negative.s   |  2 +-
 llvm/test/MC/AArch64/SVE2/aesd.s  |  2 +-
 llvm/test/MC/AArch64/SVE2/aese.s  |  2 +-
 llvm/test/MC/AArch64/SVE2/aesimc.s|  4 +--
 llvm/test/MC/AArch64/SVE2/aesmc.s |  4 +--
 llvm/test/MC/AArch64/SVE2/bdep.s  |  8 ++---
 llvm/test/MC/AArch64/SVE2/bext.s  |  8 ++---
 llvm/test/MC/AArch64/SVE2/bgrp.s  |  8 ++---
 .../MC/AArch64/SVE2/directive-arch-negative.s |  2 +-
 .../SVE2/directive-arch_extension-negative.s  | 12 ++--
 .../MC/AArch64/SVE2/directive-cpu-negative.s  |  6 ++--
 llvm/test/MC/AArch64/SVE2/pmullb-128.s|  2 +-
 llvm/test/MC/AArch64/SVE2/pmullt-128.s|  2 +-
 llvm/test/MC/AArch64/SVE2/rax1.s  |  6 +++-
 llvm/test/MC/AArch64/SVE2p1/aesd.s| 12 
 llvm/test/MC/AArch64/SVE2p1/aesdimc.s | 12 
 llvm/test/MC/AArch64/SVE2p1/aese.s| 12 
 llvm/test/MC/AArch64/SVE2p1/aesemc.s  | 12 
 llvm/test/MC/AArch64/SVE2p1/pmlal.s   |  6 ++--
 llvm/test/MC/AArch64/SVE2p1/pmull.s   |  6 ++--
 .../TargetParser/TargetParserTest.cpp | 10 ++-
 37 files changed, 131 insertions(+), 101 deletions(-)

diff --git a/clang/test/CodeGen/AArch64/fmv-dependencies.c 
b/clang/test/CodeGen/AArch64/fmv-dependencies.c
index 7aaf143f2afc5..a97c4e95cd032 100644
--- a/clang/test/CodeGen/AArch64/fmv-dependencies.c
+++ b/clang/test/CodeGen/AArch64/fmv-dependencies.c
@@ -188,7 +188,7 @@ int caller() {
 // CHECK: attributes #[[sve2]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+v8a"
 // CHECK: attributes #[[sve2_aes]] = { {{.*}} 
"target-features"="+aes,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve-aes,+sve2,+sve2-aes,+v8a"
 // CHECK: attributes #[[sve2_bitperm]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve-bitperm,+sve2,+sve2-bitperm,+v8a"
-// CHECK: attributes #[[sve2_sha3]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sha2,+sha3,+sve,+sve2,+sve2-sha3,+v8a"
+// CHECK: attributes #[[sve2_sha3]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sha2,+sha3,+sve,+sve-sha3,+sve2,+sve2-sha3,+v8a"
 // CHECK: attributes #[[sve2_sm4]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sm4,+sve,+sve2,+sve2-sm4,+v8a"
 // CHECK: attributes #[[wfxt]] = { {{.*}} 
"target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,+wfxt"
 // CHECK: attributes #[[cssc]] = { {{.*}} 
"target-features"="+cssc,+fp-armv8,+neon,+outline-atomics,+v8a"
diff --git a/clang/test/Driver/aarch64-implied-sve-features.c 
b/clang/test/Driver/aarch64-implied-sve-features.c
index ecc1e9500b667..18c39974a5c14 100644
--- a/clang/test/Driver/aarch64-implied-sve-features.c
+++ b/clang/test/Driver/aarch64-implied-sve-features.c
@@ -46,13 +46,13 @@
 // SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "-sve-aes" 
"-target-feature" "+sve2" "-target-feature" "-sve2-aes"
 
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3+nosve2-sha3 
%s -### 2>&1 | FileCheck %s --check-prefix=SVE2-SHA3-REVERT
-// SVE2-SHA3-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "-sve2-sha3"
+// SVE2-SHA3-REVERT: "-target-feature" "+sve" "-target-feature" "-sve-sha3" 
"-target-featur

[clang] Revert "[clang][dataflow] Expose simple access to child StorageLocation presence." (PR #145710)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang-analysis

Author: Samira Bakon (bazuzi)


Changes

Reverts llvm/llvm-project#145520

Exposed function is no longer needed and side-stepped the intended contract 
that the present children are the same set returned by `getModeledFields()` and 
presence shouldn't need to be queried for arbitrary fields.

---
Full diff: https://github.com/llvm/llvm-project/pull/145710.diff


1 Files Affected:

- (modified) clang/include/clang/Analysis/FlowSensitive/StorageLocation.h (-2) 


``diff
diff --git a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h 
b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
index 8b263b16d5b1e..8fcc6a44027a0 100644
--- a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
+++ b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
@@ -168,8 +168,6 @@ class RecordStorageLocation final : public StorageLocation {
 return {Children.begin(), Children.end()};
   }
 
-  bool hasChild(const ValueDecl &D) const { return Children.contains(&D); }
-
 private:
   FieldToLoc Children;
   SyntheticFieldMap SyntheticFields;

``




https://github.com/llvm/llvm-project/pull/145710
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] Revert "[clang][dataflow] Expose simple access to child StorageLocation presence." (PR #145710)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Samira Bakon (bazuzi)


Changes

Reverts llvm/llvm-project#145520

Exposed function is no longer needed and side-stepped the intended contract 
that the present children are the same set returned by `getModeledFields()` and 
presence shouldn't need to be queried for arbitrary fields.

---
Full diff: https://github.com/llvm/llvm-project/pull/145710.diff


1 Files Affected:

- (modified) clang/include/clang/Analysis/FlowSensitive/StorageLocation.h (-2) 


``diff
diff --git a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h 
b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
index 8b263b16d5b1e..8fcc6a44027a0 100644
--- a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
+++ b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
@@ -168,8 +168,6 @@ class RecordStorageLocation final : public StorageLocation {
 return {Children.begin(), Children.end()};
   }
 
-  bool hasChild(const ValueDecl &D) const { return Children.contains(&D); }
-
 private:
   FieldToLoc Children;
   SyntheticFieldMap SyntheticFields;

``




https://github.com/llvm/llvm-project/pull/145710
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] NFC: Add alias for std::pair used in SourceLocation (PR #145711)

[Haojian Wu via cfe-commits]

https://github.com/hokein created 
https://github.com/llvm/llvm-project/pull/145711

Introduce a type alias for the commonly used `std::pair` to 
improve code readability, and make it easier for future updates (64-bit source 
locations).

>From 2bd778b5b5c5ffc0a36cf0e0e71034fe16c48ad0 Mon Sep 17 00:00:00 2001
From: Haojian Wu 
Date: Wed, 25 Jun 2025 16:12:40 +0200
Subject: [PATCH] [clang] Create alias for the common `std::pair` type used in SourceLocation.

---
 clang/include/clang/Basic/SourceLocation.h|  6 +-
 clang/include/clang/Basic/SourceManager.h | 28 -
 clang/lib/AST/ASTContext.cpp  |  2 +-
 clang/lib/AST/ASTImporter.cpp |  2 +-
 clang/lib/AST/CommentLexer.cpp|  2 +-
 clang/lib/AST/Expr.cpp|  3 +-
 clang/lib/AST/RawCommentList.cpp  |  7 +--
 clang/lib/Analysis/PathDiagnostic.cpp |  4 +-
 clang/lib/Basic/Diagnostic.cpp|  9 ++-
 clang/lib/Basic/Sarif.cpp |  2 +-
 clang/lib/Basic/SourceLocation.cpp|  4 +-
 clang/lib/Basic/SourceManager.cpp | 59 +--
 clang/lib/Edit/Commit.cpp |  8 +--
 clang/lib/Frontend/SARIFDiagnostic.cpp|  4 +-
 clang/lib/Frontend/TextDiagnostic.cpp |  6 +-
 clang/lib/Index/CommentToXML.cpp  |  2 +-
 clang/lib/Index/USRGeneration.cpp |  2 +-
 clang/lib/Lex/Lexer.cpp   | 21 ---
 clang/lib/Lex/MacroInfo.cpp   |  6 +-
 clang/lib/Lex/Preprocessor.cpp|  2 +-
 clang/lib/Parse/ParseStmt.cpp |  2 +-
 clang/lib/Parse/ParseStmtAsm.cpp  |  9 +--
 clang/lib/Rewrite/Rewriter.cpp|  2 +-
 clang/lib/Sema/CodeCompleteConsumer.cpp   |  4 +-
 clang/lib/Sema/SemaDecl.cpp   |  2 +-
 clang/lib/Sema/SemaObjCProperty.cpp   |  2 +-
 clang/lib/Serialization/ASTReader.cpp |  3 +-
 .../Checkers/LocalizationChecker.cpp  |  3 +-
 .../Core/BugReporterVisitors.cpp  |  2 +-
 .../StaticAnalyzer/Core/HTMLDiagnostics.cpp   |  4 +-
 clang/lib/Tooling/Core/Replacement.cpp|  7 +--
 .../lib/Tooling/Refactoring/AtomicChange.cpp  |  2 +-
 clang/lib/Tooling/Transformer/SourceCode.cpp  |  4 +-
 clang/tools/libclang/CIndex.cpp   | 20 +++
 clang/tools/libclang/CIndexHigh.cpp   |  6 +-
 clang/tools/libclang/CXIndexDataConsumer.cpp  |  6 +-
 clang/tools/libclang/CXSourceLocation.cpp |  4 +-
 clang/unittests/Lex/LexerTest.cpp |  7 +--
 38 files changed, 124 insertions(+), 144 deletions(-)

diff --git a/clang/include/clang/Basic/SourceLocation.h 
b/clang/include/clang/Basic/SourceLocation.h
index 7a0f5ba8d1270..14543cc41a38e 100644
--- a/clang/include/clang/Basic/SourceLocation.h
+++ b/clang/include/clang/Basic/SourceLocation.h
@@ -70,6 +70,8 @@ class FileID {
   int getOpaqueValue() const { return ID; }
 };
 
+using FileIDAndOffset = std::pair;
+
 /// Encodes a location in the source. The SourceManager can decode this
 /// to get at the full include stack, line and column information.
 ///
@@ -403,7 +405,7 @@ class FullSourceLoc : public SourceLocation {
   /// pair, after walking through all expansion records.
   ///
   /// \see SourceManager::getDecomposedExpansionLoc
-  std::pair getDecomposedExpansionLoc() const;
+  FileIDAndOffset getDecomposedExpansionLoc() const;
 
   unsigned getSpellingLineNumber(bool *Invalid = nullptr) const;
   unsigned getSpellingColumnNumber(bool *Invalid = nullptr) const;
@@ -424,7 +426,7 @@ class FullSourceLoc : public SourceLocation {
   ///
   /// The first element is the FileID, the second is the offset from the
   /// start of the buffer of the location.
-  std::pair getDecomposedLoc() const;
+  FileIDAndOffset getDecomposedLoc() const;
 
   bool isInSystemHeader() const;
 
diff --git a/clang/include/clang/Basic/SourceManager.h 
b/clang/include/clang/Basic/SourceManager.h
index cd3dac9133223..eefd4885534c8 100644
--- a/clang/include/clang/Basic/SourceManager.h
+++ b/clang/include/clang/Basic/SourceManager.h
@@ -795,7 +795,7 @@ class SourceManager : public RefCountedBase {
   ///
   /// Used to cache results from and speed-up \c getDecomposedIncludedLoc
   /// function.
-  mutable llvm::DenseMap> IncludedLocMap;
+  mutable llvm::DenseMap IncludedLocMap;
 
   /// The key value into the IsBeforeInTUCache table.
   using IsBeforeInTUCacheKey = std::pair;
@@ -1269,7 +1269,7 @@ class SourceManager : public 
RefCountedBase {
   ///
   /// The first element is the FileID, the second is the offset from the
   /// start of the buffer of the location.
-  std::pair getDecomposedLoc(SourceLocation Loc) const {
+  FileIDAndOffset getDecomposedLoc(SourceLocation Loc) const {
 FileID FID = getFileID(Loc);
 auto *Entry = getSLocEntryOrNull(FID);
 if (!Entry)
@@ -1281,8 +1281,7 @@ class SourceManager : public 
RefCountedBase {
   ///
   /// If the location is 

[clang] [clang] NFC: Add alias for std::pair used in SourceLocation (PR #145711)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Haojian Wu (hokein)


Changes

Introduce a type alias for the commonly used `std::pair` to improve code readability, and make it easier for future 
updates (64-bit source locations).

---

Patch is 52.91 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/145711.diff


38 Files Affected:

- (modified) clang/include/clang/Basic/SourceLocation.h (+4-2) 
- (modified) clang/include/clang/Basic/SourceManager.h (+12-16) 
- (modified) clang/lib/AST/ASTContext.cpp (+1-1) 
- (modified) clang/lib/AST/ASTImporter.cpp (+1-1) 
- (modified) clang/lib/AST/CommentLexer.cpp (+1-1) 
- (modified) clang/lib/AST/Expr.cpp (+1-2) 
- (modified) clang/lib/AST/RawCommentList.cpp (+3-4) 
- (modified) clang/lib/Analysis/PathDiagnostic.cpp (+2-2) 
- (modified) clang/lib/Basic/Diagnostic.cpp (+4-5) 
- (modified) clang/lib/Basic/Sarif.cpp (+1-1) 
- (modified) clang/lib/Basic/SourceLocation.cpp (+2-2) 
- (modified) clang/lib/Basic/SourceManager.cpp (+27-32) 
- (modified) clang/lib/Edit/Commit.cpp (+4-4) 
- (modified) clang/lib/Frontend/SARIFDiagnostic.cpp (+2-2) 
- (modified) clang/lib/Frontend/TextDiagnostic.cpp (+3-3) 
- (modified) clang/lib/Index/CommentToXML.cpp (+1-1) 
- (modified) clang/lib/Index/USRGeneration.cpp (+1-1) 
- (modified) clang/lib/Lex/Lexer.cpp (+10-11) 
- (modified) clang/lib/Lex/MacroInfo.cpp (+2-4) 
- (modified) clang/lib/Lex/Preprocessor.cpp (+1-1) 
- (modified) clang/lib/Parse/ParseStmt.cpp (+1-1) 
- (modified) clang/lib/Parse/ParseStmtAsm.cpp (+3-6) 
- (modified) clang/lib/Rewrite/Rewriter.cpp (+1-1) 
- (modified) clang/lib/Sema/CodeCompleteConsumer.cpp (+2-2) 
- (modified) clang/lib/Sema/SemaDecl.cpp (+1-1) 
- (modified) clang/lib/Sema/SemaObjCProperty.cpp (+1-1) 
- (modified) clang/lib/Serialization/ASTReader.cpp (+1-2) 
- (modified) clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp (+1-2) 
- (modified) clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp (+1-1) 
- (modified) clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp (+2-2) 
- (modified) clang/lib/Tooling/Core/Replacement.cpp (+3-4) 
- (modified) clang/lib/Tooling/Refactoring/AtomicChange.cpp (+1-1) 
- (modified) clang/lib/Tooling/Transformer/SourceCode.cpp (+2-2) 
- (modified) clang/tools/libclang/CIndex.cpp (+10-10) 
- (modified) clang/tools/libclang/CIndexHigh.cpp (+3-3) 
- (modified) clang/tools/libclang/CXIndexDataConsumer.cpp (+3-3) 
- (modified) clang/tools/libclang/CXSourceLocation.cpp (+2-2) 
- (modified) clang/unittests/Lex/LexerTest.cpp (+3-4) 


``diff
diff --git a/clang/include/clang/Basic/SourceLocation.h 
b/clang/include/clang/Basic/SourceLocation.h
index 7a0f5ba8d1270..14543cc41a38e 100644
--- a/clang/include/clang/Basic/SourceLocation.h
+++ b/clang/include/clang/Basic/SourceLocation.h
@@ -70,6 +70,8 @@ class FileID {
   int getOpaqueValue() const { return ID; }
 };
 
+using FileIDAndOffset = std::pair;
+
 /// Encodes a location in the source. The SourceManager can decode this
 /// to get at the full include stack, line and column information.
 ///
@@ -403,7 +405,7 @@ class FullSourceLoc : public SourceLocation {
   /// pair, after walking through all expansion records.
   ///
   /// \see SourceManager::getDecomposedExpansionLoc
-  std::pair getDecomposedExpansionLoc() const;
+  FileIDAndOffset getDecomposedExpansionLoc() const;
 
   unsigned getSpellingLineNumber(bool *Invalid = nullptr) const;
   unsigned getSpellingColumnNumber(bool *Invalid = nullptr) const;
@@ -424,7 +426,7 @@ class FullSourceLoc : public SourceLocation {
   ///
   /// The first element is the FileID, the second is the offset from the
   /// start of the buffer of the location.
-  std::pair getDecomposedLoc() const;
+  FileIDAndOffset getDecomposedLoc() const;
 
   bool isInSystemHeader() const;
 
diff --git a/clang/include/clang/Basic/SourceManager.h 
b/clang/include/clang/Basic/SourceManager.h
index cd3dac9133223..eefd4885534c8 100644
--- a/clang/include/clang/Basic/SourceManager.h
+++ b/clang/include/clang/Basic/SourceManager.h
@@ -795,7 +795,7 @@ class SourceManager : public RefCountedBase {
   ///
   /// Used to cache results from and speed-up \c getDecomposedIncludedLoc
   /// function.
-  mutable llvm::DenseMap> IncludedLocMap;
+  mutable llvm::DenseMap IncludedLocMap;
 
   /// The key value into the IsBeforeInTUCache table.
   using IsBeforeInTUCacheKey = std::pair;
@@ -1269,7 +1269,7 @@ class SourceManager : public 
RefCountedBase {
   ///
   /// The first element is the FileID, the second is the offset from the
   /// start of the buffer of the location.
-  std::pair getDecomposedLoc(SourceLocation Loc) const {
+  FileIDAndOffset getDecomposedLoc(SourceLocation Loc) const {
 FileID FID = getFileID(Loc);
 auto *Entry = getSLocEntryOrNull(FID);
 if (!Entry)
@@ -1281,8 +1281,7 @@ class SourceManager : public 
RefCountedBase {
   ///
   /// If the location is an expansion record, walk through it until we find
   /// t

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

https://github.com/ukalappa-mips updated 
https://github.com/llvm/llvm-project/pull/145647

>From 8a1f98820b280b02f0662c7129a078680d67497f Mon Sep 17 00:00:00 2001
From: Umesh Kalappa 
Date: Wed, 25 Jun 2025 06:58:37 +
Subject: [PATCH] Added prefetch extensions for MIPS RV64 P8700 and enable with
 xmipscbop option.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension
at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
---
 .../Driver/print-supported-extensions-riscv.c |  1 +
 llvm/docs/RISCVUsage.rst  |  3 ++
 .../Target/RISCV/AsmParser/RISCVAsmParser.cpp |  5 ++
 .../RISCV/Disassembler/RISCVDisassembler.cpp  | 18 +++
 .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |  1 +
 llvm/lib/Target/RISCV/RISCVFeatures.td|  7 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp   | 48 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |  4 ++
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp   |  2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp  |  3 ++
 llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td  | 38 +++
 llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td  |  4 +-
 llvm/test/CodeGen/RISCV/features-info.ll  |  1 +
 llvm/test/CodeGen/RISCV/xmips-cbop.ll | 40 
 llvm/test/MC/RISCV/xmips-invalid.s| 11 -
 llvm/test/MC/RISCV/xmips-valid.s  | 18 +--
 .../TargetParser/RISCVISAInfoTest.cpp |  1 +
 17 files changed, 198 insertions(+), 7 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/xmips-cbop.ll

diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disas

[clang] Revert "[clang][dataflow] Expose simple access to child StorageLocation presence." (PR #145710)

[Samira Bakon via cfe-commits]

bazuzi wrote:

This reverts a simple change added <24 hours ago and reverting has been 
discussed directly with original change reviewers. Merging without additional 
review.

https://github.com/llvm/llvm-project/pull/145710
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][analyzer] Correctly handle lambda-converted function pointers (PR #144906)

[LLVM Continuous Integration via cfe-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `clangd-ubuntu-tsan` 
running on `clangd-ubuntu-clang` while building `clang` at step 6 
"test-build-clangd-clangd-index-server-clangd-in...".

Full details are available at: 
https://lab.llvm.org/buildbot/#/builders/134/builds/21264


Here is the relevant piece of the build log for the reference

```
Step 6 (test-build-clangd-clangd-index-server-clangd-in...) failure: test 
(failure)
 TEST 'Clangd :: target_info.test' FAILED 

Exit Code: 66

Command Output (stderr):
--
rm -rf 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir
 && mkdir -p 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir
 # RUN: at line 5
+ rm -rf 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir
+ mkdir -p 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir
echo '[{"directory": 
"/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir",
 "command": 
"/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir/armv7-clang
 -x c++ the-file.cpp -v", "file": "the-file.cpp"}]' > 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir/compile_commands.json
 # RUN: at line 7
+ echo '[{"directory": 
"/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir",
 "command": 
"/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir/armv7-clang
 -x c++ the-file.cpp -v", "file": "the-file.cpp"}]'
sed -e 
"s|INPUT_DIR|/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir|g"
 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/clang-tools-extra/clangd/test/target_info.test
 > 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test.1
 # RUN: at line 9
+ sed -e 
's|INPUT_DIR|/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.dir|g'
 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/clang-tools-extra/clangd/test/target_info.test
sed -E -e 's|"file://([A-Z]):/|"file:///\1:/|g' 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test.1
 > 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test
 # RUN: at line 12
+ sed -E -e 's|"file://([A-Z]):/|"file:///\1:/|g' 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test.1
clangd -lit-test < 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test
 2>&1 | /vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/bin/FileCheck 
-strict-whitespace 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test
 # RUN: at line 14
+ clangd -lit-test
+ /vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/bin/FileCheck 
-strict-whitespace 
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clangd/test/Output/target_info.test.tmp.test

--




```



https://github.com/llvm/llvm-project/pull/144906
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] e64f5dd - Revert "[clang][dataflow] Expose simple access to child StorageLocation presence." (#145710)

[via cfe-commits]

Author: Samira Bakon
Date: 2025-06-25T10:24:29-04:00
New Revision: e64f5dd948478505a790e339525847c71eb1eb24

URL: 
https://github.com/llvm/llvm-project/commit/e64f5dd948478505a790e339525847c71eb1eb24
DIFF: 
https://github.com/llvm/llvm-project/commit/e64f5dd948478505a790e339525847c71eb1eb24.diff

LOG: Revert "[clang][dataflow] Expose simple access to child StorageLocation 
presence." (#145710)

Reverts llvm/llvm-project#145520

Exposed function is no longer needed and side-stepped the intended
contract that the present children are the same set returned by
`getModeledFields()` and presence shouldn't need to be queried for
arbitrary fields.

Added: 


Modified: 
clang/include/clang/Analysis/FlowSensitive/StorageLocation.h

Removed: 




diff  --git a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h 
b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
index 8b263b16d5b1e..8fcc6a44027a0 100644
--- a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
+++ b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
@@ -168,8 +168,6 @@ class RecordStorageLocation final : public StorageLocation {
 return {Children.begin(), Children.end()};
   }
 
-  bool hasChild(const ValueDecl &D) const { return Children.contains(&D); }
-
 private:
   FieldToLoc Children;
   SyntheticFieldMap SyntheticFields;



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [clang-tidy] [Modules] Skip checking decls in clang-tidy (PR #145630)

[Balazs Benics via cfe-commits]

https://github.com/steakhal commented:

I also believe that the nodes from modules should not be traversed by default, 
but there should be an option to allow traversing those - just like it's 
implemented.

https://github.com/llvm/llvm-project/pull/145630
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [clang-tidy] [Modules] Skip checking decls in clang-tidy (PR #145630)

[Balazs Benics via cfe-commits]

@@ -1469,6 +1470,12 @@ bool MatchASTVisitor::TraverseDecl(Decl *DeclNode) {
 return true;
   }
 
+  if (Options.SkipDeclsInModules && DeclNode->isFromASTFile()) {
+auto *M = DeclNode->getOwningModule();
+if (M && (M->isInterfaceOrPartition() || M->isGlobalModule()))
+  return true;
+  }
+

steakhal wrote:

I'm not familiar with modules at all, I just want to make sure we check this 
the right way as there are about 8 member functions matching the `is*Module()` 
pattern.

https://github.com/llvm/llvm-project/pull/145630
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] b8e8ff3 - [Clang] Implement diagnostics for why is_empty is false (#145044)

[via cfe-commits]

Author: Samarth Narang
Date: 2025-06-25T10:34:51-04:00
New Revision: b8e8ff3dd6698335a73ff808e39021ec5d1478ea

URL: 
https://github.com/llvm/llvm-project/commit/b8e8ff3dd6698335a73ff808e39021ec5d1478ea
DIFF: 
https://github.com/llvm/llvm-project/commit/b8e8ff3dd6698335a73ff808e39021ec5d1478ea.diff

LOG: [Clang] Implement diagnostics for why is_empty is false (#145044)

Expands on https://github.com/llvm/llvm-project/issues/141911

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Sema/SemaTypeTraits.cpp
clang/test/SemaCXX/type-traits-unsatisfied-diags-std.cpp
clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 047b1b929c0d9..ec1e1e7334d90 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -647,7 +647,7 @@ Improvements to Clang's diagnostics
   #GH69470, #GH59391, #GH58172, #GH46215, #GH45915, #GH45891, #GH44490,
   #GH36703, #GH32903, #GH23312, #GH69874.
 
-
+  
 Improvements to Clang's time-trace
 --
 

diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 9392cbb39c021..6eba0619883d3 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -1767,7 +1767,8 @@ def note_unsatisfied_trait
 : Note<"%0 is not %enum_select{"
"%TriviallyRelocatable{trivially relocatable}|"
"%Replaceable{replaceable}|"
-   "%TriviallyCopyable{trivially copyable}"
+   "%TriviallyCopyable{trivially copyable}|"
+   "%Empty{empty}"
"}1">;
 
 def note_unsatisfied_trait_reason
@@ -1787,6 +1788,10 @@ def note_unsatisfied_trait_reason
"%NonReplaceableField{has a non-replaceable member %1 of type %2}|"
"%NTCBase{has a non-trivially-copyable base %1}|"
"%NTCField{has a non-trivially-copyable member %1 of type %2}|"
+   "%NonEmptyMember{has a non-static data member %1 of type %2}|"
+   "%VirtualFunction{has a virtual function %1}|"
+   "%NonEmptyBase{has a base class %1 that is not empty}|"
+   "%NonZeroLengthField{field %1 is a non-zero-length bit-field}|"
"%DeletedDtr{has a %select{deleted|user-provided}1 destructor}|"
"%UserProvidedCtr{has a user provided %select{copy|move}1 "
"constructor}|"

diff  --git a/clang/lib/Sema/SemaTypeTraits.cpp 
b/clang/lib/Sema/SemaTypeTraits.cpp
index bf59bbb87fd8a..c8a764d19c3d5 100644
--- a/clang/lib/Sema/SemaTypeTraits.cpp
+++ b/clang/lib/Sema/SemaTypeTraits.cpp
@@ -1958,6 +1958,7 @@ static std::optional 
StdNameToTypeTrait(StringRef Name) {
   .Case("is_replaceable", TypeTrait::UTT_IsReplaceable)
   .Case("is_trivially_copyable", TypeTrait::UTT_IsTriviallyCopyable)
   .Case("is_assignable", TypeTrait::BTT_IsAssignable)
+  .Case("is_empty", TypeTrait::UTT_IsEmpty)
   .Default(std::nullopt);
 }
 
@@ -2313,6 +2314,74 @@ static void DiagnoseNonAssignableReason(Sema &SemaRef, 
SourceLocation Loc,
   SemaRef.Diag(D->getLocation(), diag::note_defined_here) << D;
 }
 
+static void DiagnoseIsEmptyReason(Sema &S, SourceLocation Loc,
+  const CXXRecordDecl *D) {
+  // Non-static data members (ignore zero-width bit‐fields).
+  for (const auto *Field : D->fields()) {
+if (Field->isZeroLengthBitField())
+  continue;
+if (Field->isBitField()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::NonZeroLengthField << Field
+  << Field->getSourceRange();
+  continue;
+}
+S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+<< diag::TraitNotSatisfiedReason::NonEmptyMember << Field
+<< Field->getType() << Field->getSourceRange();
+  }
+
+  // Virtual functions.
+  for (const auto *M : D->methods()) {
+if (M->isVirtual()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::VirtualFunction << M
+  << M->getSourceRange();
+  break;
+}
+  }
+
+  // Virtual bases and non-empty bases.
+  for (const auto &B : D->bases()) {
+const auto *BR = B.getType()->getAsCXXRecordDecl();
+if (!BR || BR->isInvalidDecl())
+  continue;
+if (B.isVirtual()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::VBase << B.getType()
+  << B.getSourceRange();
+}
+if (!BR->isEmpty()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::NonEmptyBase << B.getType()
+  << B.getSourceRange();
+}
+  }
+}
+
+static void DiagnoseIsEmptyReason(Sema &S, SourceLocation Loc, QualType T) {
+  // Emit 

[clang] a945fb1 - [clang] NFC, move the SourceLocationEncoding.h header guard to the begining of the file

[Haojian Wu via cfe-commits]

Author: Haojian Wu
Date: 2025-06-25T16:26:40+02:00
New Revision: a945fb1481e01f9631fde5f6174276532c33fc98

URL: 
https://github.com/llvm/llvm-project/commit/a945fb1481e01f9631fde5f6174276532c33fc98
DIFF: 
https://github.com/llvm/llvm-project/commit/a945fb1481e01f9631fde5f6174276532c33fc98.diff

LOG: [clang] NFC, move the SourceLocationEncoding.h header guard to the 
begining of the file

Added: 


Modified: 
clang/include/clang/Serialization/SourceLocationEncoding.h

Removed: 




diff  --git a/clang/include/clang/Serialization/SourceLocationEncoding.h 
b/clang/include/clang/Serialization/SourceLocationEncoding.h
index 4a068bbf3fd8a..5b2485dbc719f 100644
--- a/clang/include/clang/Serialization/SourceLocationEncoding.h
+++ b/clang/include/clang/Serialization/SourceLocationEncoding.h
@@ -28,13 +28,13 @@
 //
 
//===--===//
 
+#ifndef LLVM_CLANG_SERIALIZATION_SOURCELOCATIONENCODING_H
+#define LLVM_CLANG_SERIALIZATION_SOURCELOCATIONENCODING_H
+
 #include "clang/Basic/SourceLocation.h"
 #include "llvm/Support/MathExtras.h"
 #include 
 
-#ifndef LLVM_CLANG_SERIALIZATION_SOURCELOCATIONENCODING_H
-#define LLVM_CLANG_SERIALIZATION_SOURCELOCATIONENCODING_H
-
 namespace clang {
 
 /// Serialized encoding of SourceLocations without context.



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Implement diagnostics for why is_empty is false (PR #145044)

[Samarth Narang via cfe-commits]

https://github.com/snarang181 updated 
https://github.com/llvm/llvm-project/pull/145044

>From 29de582dd07ceb89ead7ecf24be6c19004edd46e Mon Sep 17 00:00:00 2001
From: Samarth Narang 
Date: Fri, 20 Jun 2025 10:51:04 -0400
Subject: [PATCH 1/3] Explain why 'is_empty' evaluates to false Add tests for
 various cases of 'is_empty' evaluating to false // and ensure that the
 diagnostics are correct.

---
 .../clang/Basic/DiagnosticSemaKinds.td|  8 ++-
 clang/lib/Sema/SemaTypeTraits.cpp | 66 +++
 .../type-traits-unsatisfied-diags-std.cpp | 44 +
 .../SemaCXX/type-traits-unsatisfied-diags.cpp | 58 
 4 files changed, 175 insertions(+), 1 deletion(-)

diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 9392cbb39c021..f8b733063f10b 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -1767,7 +1767,8 @@ def note_unsatisfied_trait
 : Note<"%0 is not %enum_select{"
"%TriviallyRelocatable{trivially relocatable}|"
"%Replaceable{replaceable}|"
-   "%TriviallyCopyable{trivially copyable}"
+   "%TriviallyCopyable{trivially copyable}|"
+   "%Empty{empty}"
"}1">;
 
 def note_unsatisfied_trait_reason
@@ -1787,6 +1788,11 @@ def note_unsatisfied_trait_reason
"%NonReplaceableField{has a non-replaceable member %1 of type %2}|"
"%NTCBase{has a non-trivially-copyable base %1}|"
"%NTCField{has a non-trivially-copyable member %1 of type %2}|"
+   "%NonEmptyMember{has a non-static data member %1 of type %2}|"
+   "%VirtualFunction{has a virtual function %1}|"
+   "%VirtualBase{has a virtual base class %1}|"
+   "%NonEmptyBase{has a base class %1 that is not empty}|"
+   "%ZeroLengthField{field %1 is a non-zero-length bit-field}|"
"%DeletedDtr{has a %select{deleted|user-provided}1 destructor}|"
"%UserProvidedCtr{has a user provided %select{copy|move}1 "
"constructor}|"
diff --git a/clang/lib/Sema/SemaTypeTraits.cpp 
b/clang/lib/Sema/SemaTypeTraits.cpp
index bf59bbb87fd8a..1c71ca2448f1c 100644
--- a/clang/lib/Sema/SemaTypeTraits.cpp
+++ b/clang/lib/Sema/SemaTypeTraits.cpp
@@ -1958,6 +1958,7 @@ static std::optional 
StdNameToTypeTrait(StringRef Name) {
   .Case("is_replaceable", TypeTrait::UTT_IsReplaceable)
   .Case("is_trivially_copyable", TypeTrait::UTT_IsTriviallyCopyable)
   .Case("is_assignable", TypeTrait::BTT_IsAssignable)
+  .Case("is_empty", TypeTrait::UTT_IsEmpty)
   .Default(std::nullopt);
 }
 
@@ -2313,6 +2314,68 @@ static void DiagnoseNonAssignableReason(Sema &SemaRef, 
SourceLocation Loc,
   SemaRef.Diag(D->getLocation(), diag::note_defined_here) << D;
 }
 
+static void DiagnoseIsEmptyReason(Sema &S, SourceLocation Loc,
+  const CXXRecordDecl *D) {
+  // Non-static data members (ignore zero-width bit‐fields).
+  for (auto *Field : D->fields()) {
+if (Field->isBitField() && Field->getBitWidthValue() == 0)
+  continue;
+S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+<< diag::TraitNotSatisfiedReason::NonEmptyMember << Field
+<< Field->getType() << Field->getSourceRange();
+  }
+
+  // Virtual functions.
+  for (auto *M : D->methods()) {
+if (M->isVirtual()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::VirtualFunction << M->getDeclName()
+  << M->getSourceRange();
+  break;
+}
+  }
+
+  // Virtual bases and non-empty bases.
+  for (auto &B : D->bases()) {
+auto *BR = B.getType()->getAsCXXRecordDecl();
+if (!BR || BR->isInvalidDecl())
+  continue;
+if (B.isVirtual()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::VirtualBase << B.getType()
+  << B.getSourceRange();
+}
+if (!BR->isEmpty()) {
+  S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+  << diag::TraitNotSatisfiedReason::NonEmptyBase << B.getType()
+  << B.getSourceRange();
+}
+  }
+}
+
+static void DiagnoseIsEmptyReason(Sema &S, SourceLocation Loc, QualType T) {
+  // Emit primary "not empty" diagnostic.
+  S.Diag(Loc, diag::note_unsatisfied_trait) << T << diag::TraitName::Empty;
+
+  // While diagnosing is_empty, we want to look at the actual type, not a
+  // reference or an array of it. So we need to massage the QualType param to
+  // strip refs and arrays.
+  if (T->isReferenceType())
+S.Diag(Loc, diag::note_unsatisfied_trait_reason)
+<< diag::TraitNotSatisfiedReason::Ref;
+  T = T.getNonReferenceType();
+
+  if (auto *AT = S.Context.getAsArrayType(T))
+T = AT->getElementType();
+
+  if (auto *D = T->getAsCXXRecordDecl()) {
+if (D->hasDefinition()) {
+  DiagnoseIsEmptyReason(S, Loc, D);
+  S.Diag(D->g

[clang] [llvm] Test 142948, please ignore (PR #144873)

[Jannick Kremer via cfe-commits]

https://github.com/DeinAlptraum closed 
https://github.com/llvm/llvm-project/pull/144873
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [CIR] Add support for function linkage and visibility (PR #145600)

[Sirui Mu via cfe-commits]

@@ -1737,25 +1737,51 @@ def GetMemberOp : CIR_Op<"get_member"> {
 
 def FuncOp : CIR_Op<"func", [
   AutomaticAllocationScope, CallableOpInterface, FunctionOpInterface,
+  DeclareOpInterfaceMethods,
   IsolatedFromAbove
 ]> {
   let summary = "Declare or define a function";
   let description = [{
 The `cir.func` operation defines a function, similar to the `mlir::FuncOp`
 built-in.
+
+The function linkage information is specified by `linkage`, as defined by
+`GlobalLinkageKind` attribute.
+
+Example:
+
+```mlir
+// External function definitions.
+cir.func @abort()
+
+// A function with internal linkage.
+cir.func internal @count(%x: i64) -> (i64)
+  return %x : i64
+
+// Linkage information
+cir.func linkonce_odr @some_method(...)
+```
   }];
 
   let arguments = (ins SymbolNameAttr:$sym_name,
+   CIR_VisibilityAttr:$global_visibility,
TypeAttrOf:$function_type,
+   UnitAttr:$dso_local,
+   DefaultValuedAttr:$linkage,
+   OptionalAttr:$sym_visibility,

Lancern wrote:

What is this attribute for?

https://github.com/llvm/llvm-project/pull/145600
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)

[Jannick Kremer via cfe-commits]

DeinAlptraum wrote:

I agree, this might be the easier way. Sounds good to me.
Could you resolve the conflict so we can also confirm that the CI runs as usual?

https://github.com/llvm/llvm-project/pull/142948
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)

[Rainer Orth via cfe-commits]

rorth wrote:

> I still don't entirely understand how lit works exactly, but it seems to me 
> that completely removing the cmake target for this is not necessary, no? So 
> at least this wouldn't require the CI changes on top of the other changes. 
> Happy to hear your thoughts on this though @rorth

It occured to me that restoring a `clang-check-python` target might be the 
easiest solution:

- I'd originally removed it because the python tests would now be run by 
regular `ninja check-clang`, not knowing about the CI and its use there.
- Given how incredibly hard it seems to be to teach the CI to run just a single 
command (and me having no experience with GitHub Actions and seeing no need for 
them in the forseeable future), modifying the workflow doesn't seem doable to 
me.
- Besides, while I'm by no means a `cmake` expert, I find my way around (and 
can test things locally).

So I've reintroruced the target so the workflow should run unchanged, now only 
being `lit`-based.  I've exluded it from `ninja check-all` for fear of it 
running twice then, once from `check-clang` and then by itself.

I've retested this version on the same set of platforms as before (with the 
exception of Linux/sparc64 which is slow) and manually run `ninja 
check-clang-python`, all with the expected results.

Let me know what you think.

https://github.com/llvm/llvm-project/pull/142948
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [clang-tidy] [Modules] Skip checking decls in clang-tidy (PR #145630)

[Carlos Galvez via cfe-commits]

carlosgalvezp wrote:

I think this patch can be orthogonal to the system headers one, the original 
one from @njames93 contained similar logic I believe (but I chose to not 
include it for simplicity).

It's probably good to apply this change now before modules become mainstream 
and we have debt to deal with, like it happened with my patch :) 

I agree however that there may be other things than Decls to take care of, but 
I don't have a complete picture here. 

https://github.com/llvm/llvm-project/pull/145630
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Serialization] Fix source location data loss during decoding. (PR #145529)

[Chuanqi Xu via cfe-commits]

ChuanqiXu9 wrote:

Yeah, and for what it worth, maybe you want to take a look at: 
https://discourse.llvm.org/t/rfc-c-modules-stop-using-abbrev-and-drop-the-maintainance/87063/2

https://github.com/llvm/llvm-project/pull/145529
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang-driver

Author: UmeshKalappa (ukalappa-mips)


Changes

the extension enabled with xmipscop.

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

---
Full diff: https://github.com/llvm/llvm-project/pull/145647.diff


17 Files Affected:

- (modified) clang/test/Driver/print-supported-extensions-riscv.c (+1) 
- (modified) llvm/docs/RISCVUsage.rst (+3) 
- (modified) llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (+5) 
- (modified) llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp (+18) 
- (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h (+1) 
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+7) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+48) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (+4) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+1-1) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+3) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td (+38) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td (+2-2) 
- (modified) llvm/test/CodeGen/RISCV/features-info.ll (+1) 
- (added) llvm/test/CodeGen/RISCV/xmips-cbop.ll (+40) 
- (modified) llvm/test/MC/RISCV/xmips-invalid.s (+10-1) 
- (modified) llvm/test/MC/RISCV/xmips-valid.s (+15-3) 
- (modified) llvm/unittests/TargetParser/RISCVISAInfoTest.cpp (+1) 


``diff
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -535,6 +535,19 @@ static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t 
Imm, int64_t Address,
   Inst.addOperand(MCOperand::createImm(Imm));
   return MCDisassembler

[clang] [Serialization] Remove delta encoding optimization (PR #145670)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang-modules

Author: Haojian Wu (hokein)


Changes

See the discussion in https://github.com/llvm/llvm-project/pull/145529.

This will slightly increase the PCM size (~5%), some data (in-memory preamble 
size in clangd):

- SemaExpr.cpp: 77MB  -> 80MB
- FindTarget.cpp: 71MB -> 75 MB

---

Patch is 22.68 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/145670.diff


8 Files Affected:

- (modified) clang/include/clang/Serialization/ASTReader.h (+8-12) 
- (modified) clang/include/clang/Serialization/ASTRecordReader.h (+5-6) 
- (modified) clang/include/clang/Serialization/ASTRecordWriter.h (+5-6) 
- (modified) clang/include/clang/Serialization/ASTWriter.h (+3-7) 
- (modified) clang/include/clang/Serialization/SourceLocationEncoding.h 
(+6-108) 
- (modified) clang/lib/Serialization/ASTReader.cpp (+11-17) 
- (modified) clang/lib/Serialization/ASTWriter.cpp (+15-25) 
- (modified) clang/unittests/Serialization/SourceLocationEncodingTest.cpp (-57) 


``diff
diff --git a/clang/include/clang/Serialization/ASTReader.h 
b/clang/include/clang/Serialization/ASTReader.h
index 7a4b7d21bb20e..7d4b4467eb97d 100644
--- a/clang/include/clang/Serialization/ASTReader.h
+++ b/clang/include/clang/Serialization/ASTReader.h
@@ -464,8 +464,6 @@ class ASTReader
   using ModuleReverseIterator = ModuleManager::ModuleReverseIterator;
 
 private:
-  using LocSeq = SourceLocationSequence;
-
   /// The receiver of some callbacks invoked by ASTReader.
   std::unique_ptr Listener;
 
@@ -2445,18 +2443,16 @@ class ASTReader
   /// Read a source location from raw form and return it in its
   /// originating module file's source location space.
   std::pair
-  ReadUntranslatedSourceLocation(RawLocEncoding Raw,
- LocSeq *Seq = nullptr) const {
-return SourceLocationEncoding::decode(Raw, Seq);
+  ReadUntranslatedSourceLocation(RawLocEncoding Raw) const {
+return SourceLocationEncoding::decode(Raw);
   }
 
   /// Read a source location from raw form.
-  SourceLocation ReadSourceLocation(ModuleFile &MF, RawLocEncoding Raw,
-LocSeq *Seq = nullptr) const {
+  SourceLocation ReadSourceLocation(ModuleFile &MF, RawLocEncoding Raw) const {
 if (!MF.ModuleOffsetMap.empty())
   ReadModuleOffsetMap(MF);
 
-auto [Loc, ModuleFileIndex] = ReadUntranslatedSourceLocation(Raw, Seq);
+auto [Loc, ModuleFileIndex] = ReadUntranslatedSourceLocation(Raw);
 ModuleFile *OwningModuleFile =
 ModuleFileIndex == 0 ? &MF : MF.TransitiveImports[ModuleFileIndex - 1];
 
@@ -2484,9 +2480,9 @@ class ASTReader
 
   /// Read a source location.
   SourceLocation ReadSourceLocation(ModuleFile &ModuleFile,
-const RecordDataImpl &Record, unsigned 
&Idx,
-LocSeq *Seq = nullptr) {
-return ReadSourceLocation(ModuleFile, Record[Idx++], Seq);
+const RecordDataImpl &Record,
+unsigned &Idx) {
+return ReadSourceLocation(ModuleFile, Record[Idx++]);
   }
 
   /// Read a FileID.
@@ -2505,7 +2501,7 @@ class ASTReader
 
   /// Read a source range.
   SourceRange ReadSourceRange(ModuleFile &F, const RecordData &Record,
-  unsigned &Idx, LocSeq *Seq = nullptr);
+  unsigned &Idx);
 
   static llvm::BitVector ReadBitVector(const RecordData &Record,
const StringRef Blob);
diff --git a/clang/include/clang/Serialization/ASTRecordReader.h 
b/clang/include/clang/Serialization/ASTRecordReader.h
index da3f504ff27df..1472497ff5e7e 100644
--- a/clang/include/clang/Serialization/ASTRecordReader.h
+++ b/clang/include/clang/Serialization/ASTRecordReader.h
@@ -32,7 +32,6 @@ class OMPChildren;
 class ASTRecordReader
 : public serialization::DataStreamBasicReader {
   using ModuleFile = serialization::ModuleFile;
-  using LocSeq = SourceLocationSequence;
 
   ASTReader *Reader;
   ModuleFile *F;
@@ -160,7 +159,7 @@ class ASTRecordReader
   TypeSourceInfo *readTypeSourceInfo();
 
   /// Reads the location information for a type.
-  void readTypeLoc(TypeLoc TL, LocSeq *Seq = nullptr);
+  void readTypeLoc(TypeLoc TL);
 
   /// Map a local type ID within a given AST file to a global type ID.
   serialization::TypeID getGlobalTypeID(serialization::TypeID LocalID) const {
@@ -287,13 +286,13 @@ class ASTRecordReader
   void readOpenACCRoutineDeclAttr(OpenACCRoutineDeclAttr *A);
 
   /// Read a source location, advancing Idx.
-  SourceLocation readSourceLocation(LocSeq *Seq = nullptr) {
-return Reader->ReadSourceLocation(*F, Record, Idx, Seq);
+  SourceLocation readSourceLocation() {
+return Reader->ReadSourceLocation(*F, Record, Idx);
   }
 
   /// Read a source range, advancing Idx.
-  SourceRange readSourceRange(LocSeq *Seq = nullptr) {
-return Reader->ReadSourceRange(*F,

[clang] [Serialization] Remove delta encoding optimization (PR #145670)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Haojian Wu (hokein)


Changes

See the discussion in https://github.com/llvm/llvm-project/pull/145529.

This will slightly increase the PCM size (~5%), some data (in-memory preamble 
size in clangd):

- SemaExpr.cpp: 77MB  -> 80MB
- FindTarget.cpp: 71MB -> 75 MB

---

Patch is 22.68 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/145670.diff


8 Files Affected:

- (modified) clang/include/clang/Serialization/ASTReader.h (+8-12) 
- (modified) clang/include/clang/Serialization/ASTRecordReader.h (+5-6) 
- (modified) clang/include/clang/Serialization/ASTRecordWriter.h (+5-6) 
- (modified) clang/include/clang/Serialization/ASTWriter.h (+3-7) 
- (modified) clang/include/clang/Serialization/SourceLocationEncoding.h 
(+6-108) 
- (modified) clang/lib/Serialization/ASTReader.cpp (+11-17) 
- (modified) clang/lib/Serialization/ASTWriter.cpp (+15-25) 
- (modified) clang/unittests/Serialization/SourceLocationEncodingTest.cpp (-57) 


``diff
diff --git a/clang/include/clang/Serialization/ASTReader.h 
b/clang/include/clang/Serialization/ASTReader.h
index 7a4b7d21bb20e..7d4b4467eb97d 100644
--- a/clang/include/clang/Serialization/ASTReader.h
+++ b/clang/include/clang/Serialization/ASTReader.h
@@ -464,8 +464,6 @@ class ASTReader
   using ModuleReverseIterator = ModuleManager::ModuleReverseIterator;
 
 private:
-  using LocSeq = SourceLocationSequence;
-
   /// The receiver of some callbacks invoked by ASTReader.
   std::unique_ptr Listener;
 
@@ -2445,18 +2443,16 @@ class ASTReader
   /// Read a source location from raw form and return it in its
   /// originating module file's source location space.
   std::pair
-  ReadUntranslatedSourceLocation(RawLocEncoding Raw,
- LocSeq *Seq = nullptr) const {
-return SourceLocationEncoding::decode(Raw, Seq);
+  ReadUntranslatedSourceLocation(RawLocEncoding Raw) const {
+return SourceLocationEncoding::decode(Raw);
   }
 
   /// Read a source location from raw form.
-  SourceLocation ReadSourceLocation(ModuleFile &MF, RawLocEncoding Raw,
-LocSeq *Seq = nullptr) const {
+  SourceLocation ReadSourceLocation(ModuleFile &MF, RawLocEncoding Raw) const {
 if (!MF.ModuleOffsetMap.empty())
   ReadModuleOffsetMap(MF);
 
-auto [Loc, ModuleFileIndex] = ReadUntranslatedSourceLocation(Raw, Seq);
+auto [Loc, ModuleFileIndex] = ReadUntranslatedSourceLocation(Raw);
 ModuleFile *OwningModuleFile =
 ModuleFileIndex == 0 ? &MF : MF.TransitiveImports[ModuleFileIndex - 1];
 
@@ -2484,9 +2480,9 @@ class ASTReader
 
   /// Read a source location.
   SourceLocation ReadSourceLocation(ModuleFile &ModuleFile,
-const RecordDataImpl &Record, unsigned 
&Idx,
-LocSeq *Seq = nullptr) {
-return ReadSourceLocation(ModuleFile, Record[Idx++], Seq);
+const RecordDataImpl &Record,
+unsigned &Idx) {
+return ReadSourceLocation(ModuleFile, Record[Idx++]);
   }
 
   /// Read a FileID.
@@ -2505,7 +2501,7 @@ class ASTReader
 
   /// Read a source range.
   SourceRange ReadSourceRange(ModuleFile &F, const RecordData &Record,
-  unsigned &Idx, LocSeq *Seq = nullptr);
+  unsigned &Idx);
 
   static llvm::BitVector ReadBitVector(const RecordData &Record,
const StringRef Blob);
diff --git a/clang/include/clang/Serialization/ASTRecordReader.h 
b/clang/include/clang/Serialization/ASTRecordReader.h
index da3f504ff27df..1472497ff5e7e 100644
--- a/clang/include/clang/Serialization/ASTRecordReader.h
+++ b/clang/include/clang/Serialization/ASTRecordReader.h
@@ -32,7 +32,6 @@ class OMPChildren;
 class ASTRecordReader
 : public serialization::DataStreamBasicReader {
   using ModuleFile = serialization::ModuleFile;
-  using LocSeq = SourceLocationSequence;
 
   ASTReader *Reader;
   ModuleFile *F;
@@ -160,7 +159,7 @@ class ASTRecordReader
   TypeSourceInfo *readTypeSourceInfo();
 
   /// Reads the location information for a type.
-  void readTypeLoc(TypeLoc TL, LocSeq *Seq = nullptr);
+  void readTypeLoc(TypeLoc TL);
 
   /// Map a local type ID within a given AST file to a global type ID.
   serialization::TypeID getGlobalTypeID(serialization::TypeID LocalID) const {
@@ -287,13 +286,13 @@ class ASTRecordReader
   void readOpenACCRoutineDeclAttr(OpenACCRoutineDeclAttr *A);
 
   /// Read a source location, advancing Idx.
-  SourceLocation readSourceLocation(LocSeq *Seq = nullptr) {
-return Reader->ReadSourceLocation(*F, Record, Idx, Seq);
+  SourceLocation readSourceLocation() {
+return Reader->ReadSourceLocation(*F, Record, Idx);
   }
 
   /// Read a source range, advancing Idx.
-  SourceRange readSourceRange(LocSeq *Seq = nullptr) {
-return Reader->ReadSourceRange(*F, Record,

[clang] [Serialization] Remove delta encoding optimization (PR #145670)

[Chuanqi Xu via cfe-commits]

https://github.com/ChuanqiXu9 approved this pull request.

LGTM. Maintainability is important given the limited dev resources right now.

https://github.com/llvm/llvm-project/pull/145670
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement `SpirvType` and `SpirvOpaqueType` (PR #134034)

[Aaron Ballman via cfe-commits]

@@ -4855,6 +4857,17 @@ LinkageInfo 
LinkageComputer::computeTypeLinkageInfo(const Type *T) {
 return computeTypeLinkageInfo(cast(T)
   ->getContainedType()
   ->getCanonicalTypeInternal());
+  case Type::HLSLInlineSpirv:
+return LinkageInfo::external();
+{

AaronBallman wrote:

What's going on here? We always return but we've got some dead code following 
this. (I suspect we're missing some test coverage for non-external linkages.

https://github.com/llvm/llvm-project/pull/134034
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [analyzer] Enforce not making overly complicated symbols (PR #144327)

[Balázs Benics via cfe-commits]

https://github.com/balazs-benics-sonarsource updated 
https://github.com/llvm/llvm-project/pull/144327

From bc7dfc2b4f143c2caa1189db096bf9e4ea76f053 Mon Sep 17 00:00:00 2001
From: Balazs Benics 
Date: Mon, 16 Jun 2025 12:14:06 +0200
Subject: [PATCH] [analyzer] Enforce not making overly complicated symbols

CPP-6182
---
 .../Core/PathSensitive/SValBuilder.h  |   8 +-
 .../Core/PathSensitive/SymExpr.h  |  19 +--
 .../Core/PathSensitive/SymbolManager.h| 127 +-
 .../Core/PathSensitive/Symbols.def|   1 +
 clang/lib/StaticAnalyzer/Checkers/Taint.cpp   |   2 +-
 .../Checkers/TrustNonnullChecker.cpp  |   2 +-
 clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp |   2 +-
 .../Core/RangeConstraintManager.cpp   |  11 +-
 clang/lib/StaticAnalyzer/Core/SValBuilder.cpp |  43 +++---
 .../StaticAnalyzer/Core/SimpleSValBuilder.cpp |   6 +-
 .../lib/StaticAnalyzer/Core/SymbolManager.cpp |  13 ++
 .../ensure-capped-symbol-complexity.cpp   |  58 
 12 files changed, 211 insertions(+), 81 deletions(-)
 create mode 100644 clang/test/Analysis/ensure-capped-symbol-complexity.cpp

diff --git 
a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h 
b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
index 2911554de9d97..fae78c564e0ab 100644
--- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
+++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
@@ -57,6 +57,8 @@ class SValBuilder {
 protected:
   ASTContext &Context;
 
+  const AnalyzerOptions &AnOpts;
+
   /// Manager of APSInt values.
   BasicValueFactory BasicVals;
 
@@ -68,8 +70,6 @@ class SValBuilder {
 
   ProgramStateManager &StateMgr;
 
-  const AnalyzerOptions &AnOpts;
-
   /// The scalar type to use for array indices.
   const QualType ArrayIndexTy;
 
@@ -326,8 +326,8 @@ class SValBuilder {
   nonloc::SymbolVal makeNonLoc(const SymExpr *lhs, BinaryOperator::Opcode op,
const SymExpr *rhs, QualType type);
 
-  NonLoc makeNonLoc(const SymExpr *operand, UnaryOperator::Opcode op,
-QualType type);
+  nonloc::SymbolVal makeNonLoc(const SymExpr *operand, UnaryOperator::Opcode 
op,
+   QualType type);
 
   /// Create a NonLoc value for cast.
   nonloc::SymbolVal makeNonLoc(const SymExpr *operand, QualType fromTy,
diff --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h 
b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h
index 6233a22d2ca2b..11d0a22a31c46 100644
--- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h
+++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h
@@ -51,9 +51,11 @@ class SymExpr : public llvm::FoldingSetNode {
   /// Note, however, that it can't be used in Profile because SymbolManager
   /// needs to compute Profile before allocating SymExpr.
   const SymbolID Sym;
+  const unsigned Complexity;
 
 protected:
-  SymExpr(Kind k, SymbolID Sym) : K(k), Sym(Sym) {}
+  SymExpr(Kind k, SymbolID Sym, unsigned Complexity)
+  : K(k), Sym(Sym), Complexity(Complexity) {}
 
   static bool isValidTypeForSymbol(QualType T) {
 // FIXME: Depending on whether we choose to deprecate structural symbols,
@@ -61,8 +63,6 @@ class SymExpr : public llvm::FoldingSetNode {
 return !T.isNull() && !T->isVoidType();
   }
 
-  mutable unsigned Complexity = 0;
-
 public:
   virtual ~SymExpr() = default;
 
@@ -108,7 +108,7 @@ class SymExpr : public llvm::FoldingSetNode {
 return llvm::make_range(symbol_iterator(this), symbol_iterator());
   }
 
-  virtual unsigned computeComplexity() const = 0;
+  unsigned complexity() const { return Complexity; }
 
   /// Find the region from which this symbol originates.
   ///
@@ -136,10 +136,15 @@ using SymbolRefSmallVectorTy = SmallVector;
 /// A symbol representing data which can be stored in a memory location
 /// (region).
 class SymbolData : public SymExpr {
+  friend class SymbolManager;
   void anchor() override;
 
 protected:
-  SymbolData(Kind k, SymbolID sym) : SymExpr(k, sym) { assert(classof(this)); }
+  SymbolData(Kind k, SymbolID sym) : SymExpr(k, sym, computeComplexity()) {
+assert(classof(this));
+  }
+
+  static unsigned computeComplexity(...) { return 1; }
 
 public:
   ~SymbolData() override = default;
@@ -147,10 +152,6 @@ class SymbolData : public SymExpr {
   /// Get a string representation of the kind of the region.
   virtual StringRef getKindStr() const = 0;
 
-  unsigned computeComplexity() const override {
-return 1;
-  };
-
   // Implement isa support.
   static bool classof(const SymExpr *SE) { return classof(SE->getKind()); }
   static constexpr bool classof(Kind K) {
diff --git 
a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h 
b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
index 7af86cd721e8e..9c27669a61ba9 100644
--- a/clang/include/clang/StaticAnalyzer/Cor

[clang] [Clang][SPIRV][AMDGPU] Override `supportsLibCall` for AMDGCNSPIRV (PR #143814)

[Alex Voicu via cfe-commits]

https://github.com/AlexVlx commented:

> Well, I'm not sure if my review is gating here, if "AMDGPU does not support 
> any libcalls at the moment" - it is what it is, no objections from my side. 

Since I am modifying the shared CodeGenInfo bit, it made sense to ask:) Also, I 
wasn't entirely certain that SPIRV advertising libcall support was intentional.

https://github.com/llvm/llvm-project/pull/143814
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [flang][OpenMP] Remove experimental warning (PR #144915)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-flang-driver

Author: Tom Eccles (tblah)


Changes

RFC: 
https://discourse.llvm.org/t/rfc-removing-the-openmp-experimental-warning-for-llvm-21/86455

Fixes: #110008

There are a handful of open issues still to resolve before this can go out of 
draft. See the linked issue.

---
Full diff: https://github.com/llvm/llvm-project/pull/144915.diff


3 Files Affected:

- (modified) clang/include/clang/Basic/DiagnosticDriverKinds.td (+2-2) 
- (modified) clang/lib/Driver/ToolChains/Flang.cpp (+16-3) 
- (modified) flang/test/Driver/fopenmp.f90 (+2-2) 


``diff
diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index 29f6480ba935c..68f87ebb1b39f 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -143,8 +143,8 @@ def warn_drv_unsupported_option_for_processor : Warning<
 def warn_drv_unsupported_openmp_library : Warning<
   "the library '%0=%1' is not supported, OpenMP will not be enabled">,
   InGroup;
-def warn_openmp_experimental : Warning<
-  "OpenMP support in flang is still experimental">,
+def warn_openmp_incomplete : Warning<
+  "OpenMP support for version %0 in flang is still incomplete">,
   InGroup;
 
 def err_drv_invalid_thread_model_for_target : Error<
diff --git a/clang/lib/Driver/ToolChains/Flang.cpp 
b/clang/lib/Driver/ToolChains/Flang.cpp
index 47d0e345086b2..04613457cb20a 100644
--- a/clang/lib/Driver/ToolChains/Flang.cpp
+++ b/clang/lib/Driver/ToolChains/Flang.cpp
@@ -11,6 +11,7 @@
 
 #include "clang/Basic/CodeGenOptions.h"
 #include "clang/Driver/CommonArgs.h"
+#include "clang/Driver/OptionUtils.h"
 #include "clang/Driver/Options.h"
 #include "llvm/Frontend/Debug/Options.h"
 #include "llvm/Support/Path.h"
@@ -772,6 +773,13 @@ static void renderRemarksOptions(const ArgList &Args, 
ArgStringList &CmdArgs,
   }
 }
 
+static std::string OpenMPVersionToString(int Version) {
+  int Major = Version / 10;
+  int Minor = Version % 10;
+
+  return llvm::Twine{Major}.concat(".").concat(llvm::Twine{Minor}).str();
+}
+
 void Flang::ConstructJob(Compilation &C, const JobAction &JA,
  const InputInfo &Output, const InputInfoList &Inputs,
  const ArgList &Args, const char *LinkingOutput) const 
{
@@ -906,9 +914,14 @@ void Flang::ConstructJob(Compilation &C, const JobAction 
&JA,
 
   if (Args.hasArg(options::OPT_fopenmp_force_usm))
 CmdArgs.push_back("-fopenmp-force-usm");
-  // TODO: OpenMP support isn't "done" yet, so for now we warn that it
-  // is experimental.
-  D.Diag(diag::warn_openmp_experimental);
+
+  // TODO: OpenMP support for newer versions of the standard is incomplete.
+  if (int Version =
+  getLastArgIntValue(Args, options::OPT_fopenmp_version_EQ, 0)) {
+if (Version >= 40)
+  D.Diag(diag::warn_openmp_incomplete)
+  << OpenMPVersionToString(Version);
+  }
 
   // FIXME: Clang supports a whole bunch more flags here.
   break;
diff --git a/flang/test/Driver/fopenmp.f90 b/flang/test/Driver/fopenmp.f90
index b3c3547800bdb..3a150aa657953 100644
--- a/flang/test/Driver/fopenmp.f90
+++ b/flang/test/Driver/fopenmp.f90
@@ -74,6 +74,6 @@
 ! CHECK-LD-ANYMD: "{{.*}}ld{{(.exe)?}}"
 ! CHECK-LD-ANYMD: "-l{{(omp|gomp|iomp5md)}}"
 !
-! RUN: %flang -fopenmp -c %s -### 2>&1 | FileCheck %s 
--check-prefix=CHECK-EXPERIMENTAL
+! RUN: %flang -fopenmp -fopenmp-version=40 -c %s -### 2>&1 | FileCheck %s 
--check-prefix=CHECK-INCOMPLETE
 !
-! CHECK-EXPERIMENTAL: flang{{.*}}: warning: OpenMP support in flang is still 
experimental
+! CHECK-INCOMPLETE: flang{{.*}}: warning: OpenMP support for version 4.0 in 
flang is still incomplete

``




https://github.com/llvm/llvm-project/pull/144915
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [flang][OpenMP] Remove experimental warning (PR #144915)

[via cfe-commits]

llvmbot wrote:



@llvm/pr-subscribers-clang-driver

@llvm/pr-subscribers-clang

Author: Tom Eccles (tblah)


Changes

RFC: 
https://discourse.llvm.org/t/rfc-removing-the-openmp-experimental-warning-for-llvm-21/86455

Fixes: #110008

There are a handful of open issues still to resolve before this can go out of 
draft. See the linked issue.

---
Full diff: https://github.com/llvm/llvm-project/pull/144915.diff


3 Files Affected:

- (modified) clang/include/clang/Basic/DiagnosticDriverKinds.td (+2-2) 
- (modified) clang/lib/Driver/ToolChains/Flang.cpp (+16-3) 
- (modified) flang/test/Driver/fopenmp.f90 (+2-2) 


``diff
diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index 29f6480ba935c..68f87ebb1b39f 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -143,8 +143,8 @@ def warn_drv_unsupported_option_for_processor : Warning<
 def warn_drv_unsupported_openmp_library : Warning<
   "the library '%0=%1' is not supported, OpenMP will not be enabled">,
   InGroup;
-def warn_openmp_experimental : Warning<
-  "OpenMP support in flang is still experimental">,
+def warn_openmp_incomplete : Warning<
+  "OpenMP support for version %0 in flang is still incomplete">,
   InGroup;
 
 def err_drv_invalid_thread_model_for_target : Error<
diff --git a/clang/lib/Driver/ToolChains/Flang.cpp 
b/clang/lib/Driver/ToolChains/Flang.cpp
index 47d0e345086b2..04613457cb20a 100644
--- a/clang/lib/Driver/ToolChains/Flang.cpp
+++ b/clang/lib/Driver/ToolChains/Flang.cpp
@@ -11,6 +11,7 @@
 
 #include "clang/Basic/CodeGenOptions.h"
 #include "clang/Driver/CommonArgs.h"
+#include "clang/Driver/OptionUtils.h"
 #include "clang/Driver/Options.h"
 #include "llvm/Frontend/Debug/Options.h"
 #include "llvm/Support/Path.h"
@@ -772,6 +773,13 @@ static void renderRemarksOptions(const ArgList &Args, 
ArgStringList &CmdArgs,
   }
 }
 
+static std::string OpenMPVersionToString(int Version) {
+  int Major = Version / 10;
+  int Minor = Version % 10;
+
+  return llvm::Twine{Major}.concat(".").concat(llvm::Twine{Minor}).str();
+}
+
 void Flang::ConstructJob(Compilation &C, const JobAction &JA,
  const InputInfo &Output, const InputInfoList &Inputs,
  const ArgList &Args, const char *LinkingOutput) const 
{
@@ -906,9 +914,14 @@ void Flang::ConstructJob(Compilation &C, const JobAction 
&JA,
 
   if (Args.hasArg(options::OPT_fopenmp_force_usm))
 CmdArgs.push_back("-fopenmp-force-usm");
-  // TODO: OpenMP support isn't "done" yet, so for now we warn that it
-  // is experimental.
-  D.Diag(diag::warn_openmp_experimental);
+
+  // TODO: OpenMP support for newer versions of the standard is incomplete.
+  if (int Version =
+  getLastArgIntValue(Args, options::OPT_fopenmp_version_EQ, 0)) {
+if (Version >= 40)
+  D.Diag(diag::warn_openmp_incomplete)
+  << OpenMPVersionToString(Version);
+  }
 
   // FIXME: Clang supports a whole bunch more flags here.
   break;
diff --git a/flang/test/Driver/fopenmp.f90 b/flang/test/Driver/fopenmp.f90
index b3c3547800bdb..3a150aa657953 100644
--- a/flang/test/Driver/fopenmp.f90
+++ b/flang/test/Driver/fopenmp.f90
@@ -74,6 +74,6 @@
 ! CHECK-LD-ANYMD: "{{.*}}ld{{(.exe)?}}"
 ! CHECK-LD-ANYMD: "-l{{(omp|gomp|iomp5md)}}"
 !
-! RUN: %flang -fopenmp -c %s -### 2>&1 | FileCheck %s 
--check-prefix=CHECK-EXPERIMENTAL
+! RUN: %flang -fopenmp -fopenmp-version=40 -c %s -### 2>&1 | FileCheck %s 
--check-prefix=CHECK-INCOMPLETE
 !
-! CHECK-EXPERIMENTAL: flang{{.*}}: warning: OpenMP support in flang is still 
experimental
+! CHECK-INCOMPLETE: flang{{.*}}: warning: OpenMP support for version 4.0 in 
flang is still incomplete

``




https://github.com/llvm/llvm-project/pull/144915
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] Mark GlobalAllocationFunctionVisibility as benign. (PR #145654)

[Takuto Ikuta via cfe-commits]

https://github.com/atetubou created 
https://github.com/llvm/llvm-project/pull/145654

This is similar PR to https://github.com/llvm/llvm-project/pull/131569, but for 
GlobalAllocationFunctionVisibility.

>From 74514982213e31702469c1dc08c1e17008c840e6 Mon Sep 17 00:00:00 2001
From: Takuto Ikuta 
Date: Wed, 25 Jun 2025 17:53:41 +0900
Subject: [PATCH] change benign

---
 clang/include/clang/Basic/LangOptions.def | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/LangOptions.def 
b/clang/include/clang/Basic/LangOptions.def
index 789761c1f3647..9e1c0630acc03 100644
--- a/clang/include/clang/Basic/LangOptions.def
+++ b/clang/include/clang/Basic/LangOptions.def
@@ -329,8 +329,8 @@ BENIGN_LANGOPT(IgnoreXCOFFVisibility, 1, 0, "All the 
visibility attributes that
 BENIGN_LANGOPT(VisibilityInlinesHiddenStaticLocalVar, 1, 0,
"hidden visibility for static local variables in inline C++ "
"methods when -fvisibility-inlines hidden is enabled")
-ENUM_LANGOPT(GlobalAllocationFunctionVisibility, VisibilityForcedKinds, 3, 
VisibilityForcedKinds::ForceDefault,
- "How to apply visibility to global operator new and delete 
declarations")
+BENIGN_ENUM_LANGOPT(GlobalAllocationFunctionVisibility, VisibilityForcedKinds, 
3, VisibilityForcedKinds::ForceDefault,
+   "How to apply visibility to global operator new and delete 
declarations")
 LANGOPT(NewInfallible , 1, 0, "Treats throwing global C++ operator new as 
always returning valid memory (annotates with __attribute__((returns_nonnull)) 
and throw()). This is detectable in source.")
 BENIGN_LANGOPT(ParseUnknownAnytype, 1, 0, "__unknown_anytype")
 BENIGN_LANGOPT(DebuggerSupport , 1, 0, "debugger support")

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] Remove unneeded checks for null; NFC (PR #145686)

[Björn Schäpers via cfe-commits]

https://github.com/HazardyKnusperkeks approved this pull request.


https://github.com/llvm/llvm-project/pull/145686
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [OpenMP] Add directive spellings introduced in spec v6.0 (PR #141772)

[Krzysztof Parzyszek via cfe-commits]

https://github.com/kparzysz closed 
https://github.com/llvm/llvm-project/pull/141772
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libclc] [NFC][libclc] Refactor _CLC_*_VECTORIZE macros to functions in .inc files (PR #145678)

[Fraser Cormack via cfe-commits]

@@ -0,0 +1,121 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include 
+
+#if __CLC_VECSIZE_OR_1 == 1
+
+#ifndef __IMPL_FUNCTION
+#define __IMPL_FUNCTION FUNCTION
+#endif
+
+#ifndef __CLC_DEF_SPEC
+#define __CLC_DEF_SPEC _CLC_DEF

frasercrmck wrote:

I like this idea. We should probably extend this to the existing gentype 
helpers (in another PR) so there's always control over the def spec.

https://github.com/llvm/llvm-project/pull/145678
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libclc] [NFC][libclc] Refactor _CLC_*_VECTORIZE macros to functions in .inc files (PR #145678)

[Fraser Cormack via cfe-commits]

https://github.com/frasercrmck edited 
https://github.com/llvm/llvm-project/pull/145678
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-c] introduce queries on GCC-style inline assembly statements (PR #143424)

[via cfe-commits]

dingxiangfei2009 wrote:

@AaronBallman Yes, please. I don't have the merge right, so I would like to ask 
for your assistance. Many thanks!

https://github.com/llvm/llvm-project/pull/143424
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

https://github.com/ukalappa-mips updated 
https://github.com/llvm/llvm-project/pull/145647

>From 8a1f98820b280b02f0662c7129a078680d67497f Mon Sep 17 00:00:00 2001
From: Umesh Kalappa 
Date: Wed, 25 Jun 2025 06:58:37 +
Subject: [PATCH 1/2] Added prefetch extensions for MIPS RV64 P8700 and enable
 with xmipscbop option.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension
at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
---
 .../Driver/print-supported-extensions-riscv.c |  1 +
 llvm/docs/RISCVUsage.rst  |  3 ++
 .../Target/RISCV/AsmParser/RISCVAsmParser.cpp |  5 ++
 .../RISCV/Disassembler/RISCVDisassembler.cpp  | 18 +++
 .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |  1 +
 llvm/lib/Target/RISCV/RISCVFeatures.td|  7 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp   | 48 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |  4 ++
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp   |  2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp  |  3 ++
 llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td  | 38 +++
 llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td  |  4 +-
 llvm/test/CodeGen/RISCV/features-info.ll  |  1 +
 llvm/test/CodeGen/RISCV/xmips-cbop.ll | 40 
 llvm/test/MC/RISCV/xmips-invalid.s| 11 -
 llvm/test/MC/RISCV/xmips-valid.s  | 18 +--
 .../TargetParser/RISCVISAInfoTest.cpp |  1 +
 17 files changed, 198 insertions(+), 7 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/xmips-cbop.ll

diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/D

[clang] [Clang][WIP] Normalize constraints before checking for satisfaction (PR #141776)

[Corentin Jabot via cfe-commits]

https://github.com/cor3ntin edited 
https://github.com/llvm/llvm-project/pull/141776
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Add support for Windows Secure Hot-Patching (redo) (PR #145565)

[Rainer Orth via cfe-commits]

rorth wrote:

Both the original patch and the redo break the [Solaris/amd64 
buildbot](https://lab.llvm.org/staging/#/builders/120/builds/9897).  I wonder 
if somehow the fact that the source lives in `/opt/llvm-buildbot` somehow 
interferes with Windows command line parsing?

https://github.com/llvm/llvm-project/pull/145565
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Allow the use of [[gnu::visibility]] with #pragma clang attribute (PR #145653)

[Nikolas Klauser via cfe-commits]

philnik777 wrote:

@AaronBallman Are any of these concerns specific to `[[gnu::visibility]]`? The 
exact same concerns seem to apply to any other attribute that applies to 
functions.

https://github.com/llvm/llvm-project/pull/145653
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Add support for Windows Secure Hot-Patching (redo) (PR #145565)

[Alexandre Ganea via cfe-commits]

aganea wrote:

> Both the original patch and the redo break the [Solaris/amd64 
> buildbot](https://lab.llvm.org/staging/#/builders/120/builds/9897). I wonder 
> if somehow the fact that the source lives in `/opt/llvm-buildbot` somehow 
> interferes with Windows command line parsing?

Yes, the files names in the tests have to come after hyphens (—) otherwise they 
can be treated like flags on some systems, here on Solaris or on MacOS. 
@dpaoliello @sivadeilra 

https://github.com/llvm/llvm-project/pull/145565
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

https://github.com/ukalappa-mips updated 
https://github.com/llvm/llvm-project/pull/145647

>From 8a1f98820b280b02f0662c7129a078680d67497f Mon Sep 17 00:00:00 2001
From: Umesh Kalappa 
Date: Wed, 25 Jun 2025 06:58:37 +
Subject: [PATCH 1/2] Added prefetch extensions for MIPS RV64 P8700 and enable
 with xmipscbop option.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s 
Guide" for more info on the extension
at 
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
---
 .../Driver/print-supported-extensions-riscv.c |  1 +
 llvm/docs/RISCVUsage.rst  |  3 ++
 .../Target/RISCV/AsmParser/RISCVAsmParser.cpp |  5 ++
 .../RISCV/Disassembler/RISCVDisassembler.cpp  | 18 +++
 .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |  1 +
 llvm/lib/Target/RISCV/RISCVFeatures.td|  7 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp   | 48 +++
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |  4 ++
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp   |  2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp  |  3 ++
 llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td  | 38 +++
 llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td  |  4 +-
 llvm/test/CodeGen/RISCV/features-info.ll  |  1 +
 llvm/test/CodeGen/RISCV/xmips-cbop.ll | 40 
 llvm/test/MC/RISCV/xmips-invalid.s| 11 -
 llvm/test/MC/RISCV/xmips-valid.s  | 18 +--
 .../TargetParser/RISCVISAInfoTest.cpp |  1 +
 17 files changed, 198 insertions(+), 7 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/xmips-cbop.ll

diff --git a/clang/test/Driver/print-supported-extensions-riscv.c 
b/clang/test/Driver/print-supported-extensions-riscv.c
index 5008c2b7f789d..204e6860b6d67 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -169,6 +169,7 @@
 // CHECK-NEXT: xcvmac   1.0   'XCVmac' (CORE-V 
Multiply-Accumulate)
 // CHECK-NEXT: xcvmem   1.0   'XCVmem' (CORE-V 
Post-incrementing Load & Store)
 // CHECK-NEXT: xcvsimd  1.0   'XCVsimd' (CORE-V SIMD ALU)
+// CHECK-NEXT: xmipscbop1.0   'XMIPSCBOP' (MIPS Software 
Prefetch)
 // CHECK-NEXT: xmipscmov1.0   'XMIPSCMov' (MIPS 
conditional move instruction (mips.ccmov))
 // CHECK-NEXT: xmipslsp 1.0   'XMIPSLSP' (MIPS 
optimization for hardware load-store bonding)
 // CHECK-NEXT: xsfcease 1.0   'XSfcease' (SiFive sf.cease 
Instruction)
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 81684ba30f12c..82114791b3c0c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -498,6 +498,9 @@ The current vendor extensions supported are:
 ``experimental-Xqcisync``
   LLVM implements `version 0.3 of the Qualcomm uC Sync Delay extension 
specification 
`__ by 
Qualcomm. These instructions are only available for riscv32.
 
+``Xmipscbop``
+  LLVM implements MIPS prefetch extension `p8700 processor 
`__ by MIPS.
+
 ``Xmipscmov``
   LLVM implements conditional move for the `p8700 processor 
`__ by MIPS.
 
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e5d8ab07891ac..edb319e460e35 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -732,6 +732,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isUImm6() const { return isUImm<6>(); }
   bool isUImm7() const { return isUImm<7>(); }
   bool isUImm8() const { return isUImm<8>(); }
+  bool isUImm9() const { return isUImm<9>(); }
   bool isUImm10() const { return isUImm<10>(); }
   bool isUImm11() const { return isUImm<11>(); }
   bool isUImm16() const { return isUImm<16>(); }
@@ -1523,6 +1524,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, 0, (1 << 8) - 8,
 "immediate must be a multiple of 8 bytes in the range");
+  case Match_InvalidUImm9:
+return generateImmOutOfRangeError(
+Operands, ErrorInfo, 0, (1 << 9) - 1,
+"immediate must be a multiple of 9 bytes in the range");
   case Match_InvalidBareSImm9Lsb0:
 return generateImmOutOfRangeError(
 Operands, ErrorInfo, -(1 << 8), (1 << 8) - 2,
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 27e04c0cb1f8b..043aaec11e8c5 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/D

[clang] b8bda9d - [clang][analyzer] Correctly handle lambda-converted function pointers (#144906)

[via cfe-commits]

Author: flovent
Date: 2025-06-25T16:15:01+02:00
New Revision: b8bda9d446e756f1ec722a06d604a654b472e581

URL: 
https://github.com/llvm/llvm-project/commit/b8bda9d446e756f1ec722a06d604a654b472e581
DIFF: 
https://github.com/llvm/llvm-project/commit/b8bda9d446e756f1ec722a06d604a654b472e581.diff

LOG: [clang][analyzer] Correctly handle lambda-converted function pointers 
(#144906)

For lambdas that are converted to C function pointers, 
```
int (*ret_zero)() = []() { return 0; };
```
clang will generate conversion method like:
```
CXXConversionDecl implicit used constexpr operator int (*)() 'int (*() const 
noexcept)()' inline
 -CompoundStmt
   -ReturnStmt
-ImplicitCastExpr 'int (*)()' 
 -DeclRefExpr 'int ()' lvalue CXXMethod 0x5ddb6fe35b18 '__invoke' 'int ()'
-CXXMethodDecl implicit used __invoke 'int ()' static inline
 -CompoundStmt (empty)
```
Based on comment in Sema, `__invoke`'s function body is left empty
because it's will be filled in CodeGen, so in AST analysis phase we
should get lambda's `operator()` directly instead of calling `__invoke`
itself.

Added: 
clang/test/Analysis/lambda-convert-to-func-ptr.cpp

Modified: 
clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
clang/lib/StaticAnalyzer/Core/CallEvent.cpp

Removed: 




diff  --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h 
b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
index f6a43bf5f493b..5dcf03f7a4648 100644
--- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
+++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
@@ -554,6 +554,8 @@ class SimpleFunctionCall : public AnyFunctionCall {
 
   const FunctionDecl *getDecl() const override;
 
+  RuntimeDefinition getRuntimeDefinition() const override;
+
   unsigned getNumArgs() const override { return getOriginExpr()->getNumArgs(); 
}
 
   const Expr *getArgExpr(unsigned Index) const override {

diff  --git a/clang/lib/StaticAnalyzer/Core/CallEvent.cpp 
b/clang/lib/StaticAnalyzer/Core/CallEvent.cpp
index f78b1b84f9df6..34fcb9b64d555 100644
--- a/clang/lib/StaticAnalyzer/Core/CallEvent.cpp
+++ b/clang/lib/StaticAnalyzer/Core/CallEvent.cpp
@@ -688,6 +688,18 @@ const FunctionDecl *SimpleFunctionCall::getDecl() const {
   return getSVal(getOriginExpr()->getCallee()).getAsFunctionDecl();
 }
 
+RuntimeDefinition SimpleFunctionCall::getRuntimeDefinition() const {
+  // Clang converts lambdas to function pointers using an implicit conversion
+  // operator, which returns the lambda's '__invoke' method. However, Sema
+  // leaves the body of '__invoke' empty (it is generated later in CodeGen), so
+  // we need to skip '__invoke' and access the lambda's operator() directly.
+  if (const auto *CMD = dyn_cast_if_present(getDecl());
+  CMD && CMD->isLambdaStaticInvoker())
+return RuntimeDefinition{CMD->getParent()->getLambdaCallOperator()};
+
+  return AnyFunctionCall::getRuntimeDefinition();
+}
+
 const FunctionDecl *CXXInstanceCall::getDecl() const {
   const auto *CE = cast_or_null(getOriginExpr());
   if (!CE)

diff  --git a/clang/test/Analysis/lambda-convert-to-func-ptr.cpp 
b/clang/test/Analysis/lambda-convert-to-func-ptr.cpp
new file mode 100644
index 0..c2ad7cd2de34a
--- /dev/null
+++ b/clang/test/Analysis/lambda-convert-to-func-ptr.cpp
@@ -0,0 +1,21 @@
+// RUN: %clang_analyze_cc1 -std=c++11 
-analyzer-checker=core,debug.ExprInspection -analyzer-config 
inline-lambdas=true -verify %s
+
+void clang_analyzer_eval(bool);
+
+void basic() {
+  int (*ret_zero)() = []() { return 0; };
+  clang_analyzer_eval(ret_zero() == 0); // expected-warning{{TRUE}}
+}
+
+void withParam() {
+  int (*add_ten)(int) = [](int b) { return b + 10; };
+  clang_analyzer_eval(add_ten(1) == 11); // expected-warning{{TRUE}}
+}
+
+int callBack(int (*fp)(int), int x) {
+  return fp(x);
+}
+
+void passWithFunc() {
+  clang_analyzer_eval(callBack([](int x) { return x; }, 5) == 5); // 
expected-warning{{TRUE}}
+}



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] Suppress noreturn warning if last statement in a function is a throw (PR #145166)

[Samarth Narang via cfe-commits]

snarang181 wrote:

> > > I feel like this is a solution that can grow out of hand very easily. IMO 
> > > the better solution would be to have `-Wmissing-noreturn` place a 
> > > `[[noreturn]]` into the AST to avoid incorrect follow-up diagnostics.
> 
> > 
> 
> > I agree, in principle I would expect Clang to be able to prove (in simple 
> > cases) that a function cannot return, and then treat it as-if they were 
> > marked as `[[noreturn]]` in the source code, not just for purposes of 
> > diagnostics but also optimization. Suppressing the `-Wreturn-type` warning 
> > does not achieve that.
> 
> 
> 
> Actually, I just saw this and think it is a reasonably good idea.  Rather 
> than trying to check the same functions over and over, we can 'cache' the 
> answers via an implicit function attribute (only when one of the relevant 
> diagnostics is enabled).  I'm not sure I would spell it `[[noreturn]]` even 
> when implicit (as that could result in cascading diagnostics, and I'm not 
> sure I want the optimization outcomes), but it would be generally more 
> accurate.
> 
> 
> 
> Sorry for not seeing this sooner.

No issues. I will work on it further, thanks. 

https://github.com/llvm/llvm-project/pull/145166
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Add support for Windows Secure Hot-Patching (redo) (PR #145565)

[via cfe-commits]

sivadeilra wrote:

Looking at this now.

Would it be sufficient to change the `/Fo...` argument to `-Fo...` ?

Also, why was this not caught during the CI jobs for the PR?  Can something be 
changed so that it would be caught during CI?

https://github.com/llvm/llvm-project/pull/145565
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][analyzer] Correctly handle lambda-converted function pointers (PR #144906)

[Balazs Benics via cfe-commits]

https://github.com/steakhal closed 
https://github.com/llvm/llvm-project/pull/144906
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[Craig Topper via cfe-commits]

@@ -2925,6 +2925,54 @@ bool RISCVDAGToDAGISel::SelectAddrRegImm(SDValue Addr, 
SDValue &Base,
   return true;
 }
 
+/// Similar to SelectAddrRegImm, except that the offset restricted for
+/// nine bits.
+bool RISCVDAGToDAGISel::SelectAddrRegImm9(SDValue Addr, SDValue &Base,
+  SDValue &Offset) {
+  if (SelectAddrFrameIndex(Addr, Base, Offset))
+return true;
+
+  SDLoc DL(Addr);
+  MVT VT = Addr.getSimpleValueType();
+
+  if (CurDAG->isBaseWithConstantOffset(Addr)) {
+
+int64_t CVal = cast(Addr.getOperand(1))->getSExtValue();
+if (isUInt<9>(CVal)) {
+  Base = Addr.getOperand(0);
+
+  if (auto *FIN = dyn_cast(Base))
+Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), VT);
+  Offset = CurDAG->getSignedTargetConstant(CVal, DL, VT);
+  return true;
+}
+
+// Handle with 12 bit ofset  immediates with ADDI.

topperc wrote:

ofset -> offset

https://github.com/llvm/llvm-project/pull/145647
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits