On Wed, Mar 04, 2026 at 09:25:06PM +0800, Max Chou wrote: > According to the Zvfbfa isa spec: > The Zvfbfa extension requires the Zve32f and Zfbfmin extensions. > Reviewed-by: Chao Liu <[email protected]>
Best regards, Chao Liu > Reviewed-by: Daniel Henrique Barboza <[email protected]> > Reviewed-by: Nutty Liu <[email protected]> > Signed-off-by: Max Chou <[email protected]> > --- > target/riscv/cpu.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 2ddc26c837..376517755e 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -2619,6 +2619,15 @@ static RISCVCPUImpliedExtsRule SSCTR_IMPLIED = { > }, > }; > > +static RISCVCPUImpliedExtsRule ZVFBFA_IMPLIED = { > + .ext = CPU_CFG_OFFSET(ext_zvfbfa), > + .implied_multi_exts = { > + CPU_CFG_OFFSET(ext_zve32f), CPU_CFG_OFFSET(ext_zfbfmin), > + > + RISCV_IMPLIED_EXTS_RULE_END > + }, > +}; > + > RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] = { > &RVA_IMPLIED, &RVD_IMPLIED, &RVF_IMPLIED, > &RVM_IMPLIED, &RVV_IMPLIED, NULL > @@ -2632,8 +2641,8 @@ RISCVCPUImpliedExtsRule > *riscv_multi_ext_implied_rules[] = { > &ZHINX_IMPLIED, &ZHINXMIN_IMPLIED, &ZICNTR_IMPLIED, > &ZIHPM_IMPLIED, &ZK_IMPLIED, &ZKN_IMPLIED, > &ZKS_IMPLIED, &ZVBB_IMPLIED, &ZVE32F_IMPLIED, > - &ZVE32X_IMPLIED, &ZVE64D_IMPLIED, &ZVE64F_IMPLIED, > - &ZVE64X_IMPLIED, &ZVFBFMIN_IMPLIED, &ZVFBFWMA_IMPLIED, > + &ZVE32X_IMPLIED, &ZVE64D_IMPLIED, &ZVE64F_IMPLIED, &ZVE64X_IMPLIED, > + &ZVFBFA_IMPLIED, &ZVFBFMIN_IMPLIED, &ZVFBFWMA_IMPLIED, > &ZVFH_IMPLIED, &ZVFHMIN_IMPLIED, &ZVKN_IMPLIED, > &ZVKNC_IMPLIED, &ZVKNG_IMPLIED, &ZVKNHB_IMPLIED, > &ZVKS_IMPLIED, &ZVKSC_IMPLIED, &ZVKSG_IMPLIED, &SSCFG_IMPLIED, > -- > 2.52.0 >
