In pptt_setup(), set the cache properties to match the example CBQRI controller configuration.
Base addr 0x4820000 Cluster 0 L2 cache controller 0x4821000 Cluster 1 L2 cache controller 0X482b000 Shared LLC cache controller Signed-off-by: Drew Fustini <[email protected]> --- hw/riscv/virt-acpi-build.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 5703b0827682..da3c355427af 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -985,6 +985,7 @@ static void pptt_setup(GArray *table_data, BIOSLinker *linker, MachineState *ms, .associativity = 4, .sets = 256, .attributes = 0x02, + .id = 0x1D, }, .l1i_cache = &(CPUCacheInfo) { .type = INSTRUCTION_CACHE, @@ -993,22 +994,34 @@ static void pptt_setup(GArray *table_data, BIOSLinker *linker, MachineState *ms, .associativity = 4, .sets = 256, .attributes = 0x04, + .id = 0x1E, }, - .l2_cache = &(CPUCacheInfo) { + .l2_cluster1_cache = &(CPUCacheInfo) { .type = UNIFIED_CACHE, - .size = 2048 * KiB, + .size = 750 * KiB, .line_size = 64, - .associativity = 8, - .sets = 4096, + .associativity = 12, + .sets = 1000, + .attributes = 0x0a, + .id = 0x4821000, + }, + .l2_cluster2_cache = &(CPUCacheInfo) { + .type = UNIFIED_CACHE, + .size = 750 * KiB, + .line_size = 64, + .associativity = 12, + .sets = 1000, .attributes = 0x0a, + .id = 0x4820000, }, .l3_cache = &(CPUCacheInfo) { .type = UNIFIED_CACHE, - .size = 4096 * KiB, + .size = 3 * MiB, .line_size = 64, - .associativity = 8, - .sets = 8192, + .associativity = 16, + .sets = 4096, .attributes = 0x0a, + .id = 0x482b000, }, }; -- 2.43.0
