[Mesa-dev] [PATCH 07/21] i965: Add resize() register helper function.

[Francisco Jerez]

The resize() function takes a number of vector components from the
register given as argument.  Until now the VEC4 back-end would use
swizzle() or writemask() depending on the register type, and the FS
back-end would leave the register untouched.  This provides a
consistent interface to do the same operation on any register type on
either back-end.
---
 src/mesa/drivers/dri/i965/brw_ir_fs.h   | 10 ++++++++++
 src/mesa/drivers/dri/i965/brw_ir_vec4.h | 18 ++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h 
b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index ee5606f..89c8e15 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
@@ -170,6 +170,16 @@ component(const fs_reg &reg, unsigned i)
    return offset(reg, i);
 }
 
+/**
+ * Return a register with the first \p n components of \p reg.  No-op since FS
+ * registers have an unspecified number of components.
+ */
+static inline fs_reg
+resize(const fs_reg &reg, unsigned n)
+{
+   return reg;
+}
+
 static inline bool
 is_uniform(const fs_reg &reg)
 {
diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h 
b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
index f0bdd29..c65c148 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
@@ -105,6 +105,15 @@ component(const src_reg &reg, unsigned i)
    return swizzle(reg, BRW_SWIZZLE4(i, i, i, i));
 }
 
+/**
+ * Return a register with the first \p n components of \p reg.
+ */
+static inline src_reg
+resize(const src_reg &reg, unsigned n)
+{
+   return swizzle(reg, brw_swizzle_for_size(n));
+}
+
 static inline bool
 is_uniform(const src_reg &reg)
 {
@@ -169,6 +178,15 @@ component(const dst_reg &reg, unsigned i)
    return writemask(reg, 1 << i);
 }
 
+/**
+ * Return a register with the first \p n components of \p reg.
+ */
+static inline dst_reg
+resize(const dst_reg &reg, unsigned n)
+{
+   return writemask(reg, (1 << n) - 1);
+}
+
 class vec4_instruction : public backend_instruction {
 public:
    DECLARE_RALLOC_CXX_OPERATORS(vec4_instruction)
-- 
2.3.5

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